Assm13 Lecture 2 Digital Components

CSW 353
(Assembly Language)
Computer Architecture
Dr. Salma Hamdy
10/6/2013
s.hamdy@cis.asu.edu.eg
Course Logistics Textbook Outline

Chapter 1: Digital Logic Circuits Chapter 2: Digital Components Chapter 3: Data Representation Chapter 4: Register Transfer and Microoperations Chapter 5: Basic Computer Organization Chapter 6: Programming the Basic Computer Chapter 7: Microporgammed Control
Chapter 12: Memory Organization
Chapter 8: CPU
Chapter 11: I/O Organization

2
Digital Components
1. 2. 3. 4. 5. 6. Integrated Circuits Decoders Multiplexers Registers Binary Counters Memory Units
1. Integrated Circuits
Miniature, low-cost electronics circuits whose components are fabricated on a single, continuous piece of semiconductor material to perform a high-level function. Usually referred to as a monolithic IC.
10/6/2013 4
1. Integrated Circuits (cont.)

Characterized by 1. Scale
10/6/2013

2. Circuit technology (digital logic family): Bipolar or MOS or both. Bipolar:
Diode logic (DL). (obsolete) Resistor transistor logic (RTL). (obsolete) Diode transistor logic (DTL). (obsolete) Transistor Transistor logic (TTL). Emitter Coupled Logic (ECL), also known as Current Mode Logic(CML). Integrated Injection logic (I2L). (obsolete)
10/6/2013 6

2. Circuit technology (digital logic family): Bipolar or MOS or both. MOS:
PMOS family (using P-channel MOSFETs) (obsolete) The NMOS family (using N-channel MOSFETs). The CMOS family (using both N- and P-channel devices). The Bi-MOS logic family uses both bipolar and MOS devices.
10/6/2013 7

Data sheet
10/6/2013

Basic components Combinational
Decoders binary adders or any Boolean function Multiplexers
Sequential
Flip-Flops Registers
binary counters and memory units
10/6/2013
2. Decoders
Converts binary information from coded inputs to a maximum of unique outputs. -to- line or . (can use less than ) Each output represents one of the minterms of the input variables.
10/6/2013
10
2. Decoders (cont.)
A -to- line decoder
10/6/2013
11
2. Decoders (cont.)
Truth table for -to- line decoder
10/6/2013
12
2. Decoders (cont.)
A -to- line decoder can be used for:
Binary to octal conversion: input variable may represent a binary number, and outputs will then represent the eight digits in a octal number system.
10/6/2013
13
2. Decoders (cont.)
Generally, decoders can be used for:
Implementing Boolean functions: any combinational circuit with inputs and outputs can be implemented with an -to- decoder and OR gates. Example: implement a full-adder circuit.
10/6/2013
14
2. Decoders (cont.)
Decoders can be used for:
Implementing Boolean functions. Example: implement a full-adder circuit.
10/6/2013
15
2. Decoders (cont.)
A -to- line decoder with enable (demultiplexer)
10/6/2013
16
2. Decoders (cont.)
Truth table for -to- line decoder with enable:
10/6/2013
17
2. Decoders (cont.)
NAND gate decoders produce the minterms in their complement form. -to- line NAND decoder with enable.
10/6/2013
18
2. Decoders (cont.)
Decoder expansion: constructing decoder from smaller ones. larger
The most significant bit(s) decide(s) which decoder(s) is/are enabled and which is/are disabled.
10/6/2013 19
2. Decoders (cont.)
An encoder circuit performs the inverse operation of a decoder. Has (or less) input lines and output lines that generate the binary code corresponding to the input value. Example: octal to binary decoder.
10/6/2013
20
2. Decoders (cont.)
An encoder circuit performs the inverse operation of a decoder. Has (or less) input lines and output lines. Example: octal to binary decoder.
It is assumed that only one input has the value of 1 at any given time; otherwise, the circuit has no meaning.
10/6/2013 21
Selected Problems
10/6/2013
22
Selected Problems (cont.)
10/6/2013
23
10/6/2013
24
10/6/2013
25
10/6/2013
26
Do
10/6/2013
27
3. Multiplexers
Multiplexing means transmitting a large number of information units over a smaller number of channels or lines. A digital multiplexer (MUX, data selector) is a combinational circuit that selects binary information from one or many input lines and directs it to as single output line. Selection is controlled by a set of selection lines inputs and selection lines.
10/6/2013 28
3. Multiplexers (cont.)
-to- multiplexer
10/6/2013
29
A -to- multiplexer is constructed from an -to- decoder by adding to it input lines, one from each data input and using the inputs as selection lines.
May have enable input to control the operation of the unit.

Two or more in single IC package.
10/6/2013
30
Quadruple -to- line multiplexer
10/6/2013
31
10/6/2013
32
10/6/2013
33
10/6/2013
34
10/6/2013
35
4. Registers
ICs that contain storage cells are classified by the function they perform:
Registers Counters Memory units.
10/6/2013
36
4. Registers (cont.)
A register is a group of flip-flops. -bit register has a group of flip-flops and is capable of storing any binary information of bits. Built into the CPU Very fast A register may hold a computer instruction , a storage address, or any kind of data. Register = flip-flops (load) + gates (control when/how data is transferred into register).
10/6/2013 37
Loading = transfer of new info into a register. Parallel load = all bits of the register are loaded simultaneously (single clock pulse).
A 4-bit register
10/6/2013 38
Parallel load Master clock then a separate load control signal.
10/6/2013
39
Parallel load example Design a sequential circuit whose state table is listed below.
10/6/2013
40
10/6/2013
41
10/6/2013
42
Parallel load example
10/6/2013
43
Shift Register: capable of shifting its binary information in one (unidirectional) or both directions (bidirectional). Logical configuration: a chain of flip-flops in cascade.
10/6/2013
A 4-bit shift register
44
Serial transfer
10/6/2013
45
Serial transfer
10/6/2013
46
The most general shift register has all these capabilities:
Clock pulse input to sync. Shift-left operation and serial input line. Shift right operation and serial input line. Parallel load operation an input lines. parallel output lines. Control state.
Bidirectional shift register with parallel load.

10/6/2013 47
Bidirectional shift register with parallel load
10/6/2013
48
Bidirectional shift register with parallel load
10/6/2013
49
Bidirectional shift register with parallel load often used to interface digital systems situated remotely from each other, e.g. transmission of -bit between two points. Transmitter loads in parallel into a shift register, transmits from serial output. Receiver accepts one at a time through serial input into a shift register, then taken in parallel after all bits are accumulated.
10/6/2013 50
5. Counters
A counter is basically a register that goes through a predetermined sequence of states upon the application of input pulses. The design of synchronous binary counters:
Previous lecture (sequential circuits). Direct inspection of the sequence of states that the register must undergo. e.g. 0000, 0001, 0010 when does a bit change?
10/6/2013 51
5. Counters (cont.)
Synchronous binary counters have a regular patter and their circuit will usually employ flip-flops with complementing capabilities T or JK. Example: 4-bit counter with JK flip-flips.
10/6/2013
52
5. Counters (cont.)
4-bit synchronous binary counter.
10/6/2013
To extend counter to next stage 53
5. Counters (cont.)
Binary counters with Parallel Load for transmitting an initial binary number prior to the counter operation.
10/6/2013
54
5. Counters (cont.)
Binary counters with Parallel Load
10/6/2013
55
Selected Problems
10/6/2013
56
10/6/2013
57
10/6/2013
58
10/6/2013
59
10/6/2013
60
4 5 6 7
10/6/2013
61
10/6/2013
62
10/6/2013
63
10/6/2013
64
10/6/2013
65
Next Lecture
Register Transfer and Microoperations.
Assignment
- Reading: Chapters 2+3.
10/6/2013
66
References
- Digital Design, 4th ed, M. Morris Mano, Prentice Hall, 2006.
-http://microcom.kut.ac.kr/ ch02 -http://www.buzzle.com/articles/what-is-computer-ramrandom-access-memory.html -http://newton.dep.anl.gov/askasci/comp99/CS036.htm
- God bless Google and Wiki!
10/6/2013
67

Assm13 Lecture 2 Digital Components

Enviado por

Dados do documento

Direitos autorais

Formatos disponíveis

Compartilhar este documento

Compartilhar ou incorporar documento

Opções de compartilhamento

Você considera este documento útil?

Este conteúdo é inapropriado?

Direitos autorais:

Formatos disponíveis

Assm13 Lecture 2 Digital Components

Enviado por

Direitos autorais:

Formatos disponíveis

CSW 353

Course Logistics Textbook Outline

Chapter 12: Memory Organization

Chapter 11: I/O Organization

1. Integrated Circuits (cont.)

1. Integrated Circuits (cont.)

1. Integrated Circuits (cont.)

1. Integrated Circuits (cont.)

1. Integrated Circuits (cont.)

Selected Problems (cont.)

Selected Problems (cont.)

Selected Problems (cont.)

Selected Problems (cont.)

Selected Problems (cont.)

May have enable input to control the operation of the unit.

Selected Problems (cont.)

Selected Problems (cont.)

Selected Problems (cont.)

Selected Problems (cont.)

A 4-bit shift register

Bidirectional shift register with parallel load.

To extend counter to next stage 53

Selected Problems (cont.)

Selected Problems (cont.)

Selected Problems (cont.)

Selected Problems (cont.)

Selected Problems (cont.)

Selected Problems (cont.)

Selected Problems (cont.)

Selected Problems (cont.)

Selected Problems (cont.)

- God bless Google and Wiki!

Você também pode gostar