CURRENT-LIMITING INDUCTORS USED IN CAPACITOR BANK APPLICATIONS AND THEIR IMPACT ON FAULT CURRENT INTERRUPTION

Terrance A. Bellei Ernst H. Camm S&C Electric Company Chicago, Illinois

Gene Ransom ComEd Chicago, Illinois

180-T69

Current-Limiting Inductors Used in Capacitor Bank Applications and Their Impact on Fault Current Interruption
Abstract Utilities often use in-line currentlimiting inductors for capacitor bank installations to limit the severity of outrush currents from the bank(s) into close-in line or bus faults. Because of the very high inherent frequency of the currentlimiting inductors used in these applications, circuit breakers used for protecting the capacitor bank bus can be subjected to very severe transient recovery voltages after the interruption of faults limited by the inductors. The impact of currentlimiting inductors on circuit breaker interrupting performance was demonstrated by a recent incident involving a phase-to-ground fault in one of four 138-kV, 57.6-Mvar capacitor banks at ComEds Silver Lake Substation. A 138-kV, 2000-A circuit breaker used for protecting two capacitor banks was unable to interrupt the fault current because of the severe transient recovery voltage produced by a 1-ohm current-limiting inductor in the circuit. This paper describes the details of the analysis involved in identifying the sequence of events that led to the circuit breaker being unable to interrupt successfully and highlights the impact of currentlimiting inductors on fault current interruption in capacitor bank applications. While the current-limiting inductor reduces the severity of the outrush current during close-in bus faults, it also presents a severe TRV to the circuit breaker protecting the capacitor bank(s) when a fault occurs in the capacitor bank(s) or between the inductor and the capacitor bank. This is due to the very high inherent frequency of the inductors, which results in a very highfrequency oscillation on the load side of the circuit breaker when it attempts to interrupt the fault current. This paper describes the details of the analysis involved in identifying the sequence of events that led to a circuit breaker being unable to successfully interrupt during a phase-to-ground fault in a 138-kV, 57.6-Mvar capacitor bank in ComEds Silver Lake Substation.

II. BACKGROUND
In September 1999 extensive damage occurred to a 138-kV, 57.6-Mvar grounded-wye capacitor bank in ComEds Silver Lake Substation. A 2000-ampere circuit breaker, used to protect this bank and a second 57.6-Mvar capacitor bank in parallel with it, was unable to interrupt the associated fault current, causing the bus circuit breakers to open to clear the fault. A 1-ohm currentlimiting inductor is connected on the load side of the circuit breaker to limit outrush currents from the two capacitor banks. Two additional 138-kV capacitor banks are connected in a similar circuit arrangement on a second 138-kV bus. Each of the capacitor banks is switched with a Circuit-Switcher equipped with 40-mH 5.5-ohm pre-insertion inductors. See Figure 1.

I. INTRODUCTION
Current-limiting inductors are often connected in series with shunt capacitor banks to limit the severity of outrush currents into close-in bus faults. High-magnitude and high-frequency outrush currents that would otherwise occur can cause damaging overvoltages when line circuit breakers reignite and subsequently interrupt at highfrequency current zeros [1]. The rate of rise of the transient recovery voltage (TRV) which a line circuit breaker will be subjected to during a close-in fault is considerably lower than normal when a capacitor bank is present, while the peak of the TRV is higher. The lower rate of rise of the TRV will enable the line circuit breaker to interrupt with a very short arcing time, thereby increasing the possibility of reignitions in the circuit breaker if the dielectric withstand capability of the contact gap is exceeded after interruption with a small contact gap. The size of the current-limiting inductor is generally selected to ensure that the product of the peak outrush current and the frequency is less than 2 107 for generalpurpose circuit breakers [2, 3]. In back-to-back capacitor bank applications, a single bank of three-phase currentlimiting inductors is usually used to limit outrush current from two or more shunt capacitor banks.

Figure 1. Simplied one-line diagram of 138-kV circuit in ComEds Silver Lake Substation.

Initial reports on the incident indicated that the event occurred shortly after the capacitor bank in which the fault occurred (bank #4) was de-energized. Another capacitor bank (bank #2) was also de-energized a short time prior to the incident. At the time of the incident the normally open bus tie circuit breaker was closed. Initial review of oscillograms of bus voltages and circuit breaker phase currents suggested that the A phase of the Circuit-Switcher used to switch the bank may not have interrupted successfully during de-energization of the bank. If this happened the high-speed disconnect blade, which opens shortly after the interrupter opens would have caused the pre-insertion inductor to be inserted into the circuit. If a fault occurred in the capacitor bank during that stage of the blade opening, the pre-insertion inductor would have limited the initial fault current substantially and failed thermally shortly afterwards. At rst glance, this theory appeared to be also supported by the damage observed on the high-speed disconnect blade and the pre-insertion inductor in the faulted phase and the initial oscillograms of circuit breaker phase currents. See Figure 2.

Closer examination of the event summary report associated with the relay event recording indicated that the RMS current values of the unfaulted phases were actually increasing after the event was triggered. This was contrary to what was expected as the unfaulted phase currents were expected to decrease to zero after current interruption if the event occurred during the opening of the Circuit-Switcher. This led to a reconstruction of the unfaulted current waveforms based on the relays event recording. The resulting waveforms indicated that the unfaulted phase currents were actually increasing from RMS values representative of the RMS phase currents with one bank on-line to that of two banks on-line. See Figure 3. There is some evidence of increased current in the B phase of the circuit breaker, which may have been caused by damage to some of the B phase capacitor units resulting from the damage in the A phase capacitor units.

Figure 3. Recorded B- and C-phase currents through 2000-A circuit breaker during incident at Silver Lake Substation. Figure 2. Recorded phase currents through 2000-A circuit breaker during incident at Silver Lake Substation.

III. ANALYSIS OF RELAY EVENT RECORDING

The initial analysis of the oscillograms of the SEL-251C relay event recording indicated that a phase-to-ground fault occurred in the A phase of the capacitor bank. The fault current was initially limited to about 3.1 kA RMS by the pre-insertion inductor, and increased to about 21 kA RMS after thermal breakdown of the pre-insertion inductor. It was also evident from the oscillograms that the circuit breaker failed to interrupt the fault current as the relay initiated a trip about 4 cycles after the start of the event recording.

The reconstructed current waveforms of the unfaulted phase currents indicated that the event actually occurred during closing of the Circuit-Switcher used to switch the capacitor bank. Based on the reported switching events at the time of the incident it was concluded that the fault in the capacitor bank might have been initiated by closing into a bank with trapped charge voltage shortly after opening the Circuit-Switcher. This possibility was further investigated by developing an Electromagnetic Transients Program (EMTP) simulation circuit model of the installation and simulating the closing of the CircuitSwitcher into a capacitor bank with trapped charge voltage. Figures 4 though 6 show the simulated capacitor bank and 138-kV bus voltages, and the circuit breaker phase currents when closing the Circuit-Switcher into a

bank with trapped charge voltage. The 138-kV bus voltages and circuit breaker phase currents showed a close correlation to that obtained from the relay event recordings. The peak overvoltage at the capacitor bank bus is approximately -284 kV on A phase (i.e., 2.52 per unit of normal peak phase-to-ground voltage). The associated high-voltage stress on the top rack of capacitor units may have been sufcient to cause a ashover of the fuse links protecting the capacitor units. The nal fault current value is higher than measured, most likely due to differences in the actual available fault current during the incident and that specied for the simulation.
Figure 6. 2000-A circuit breaker phase currents during energizing with trapped charge voltage on the capacitor bank. A full-blown phase-to-ground fault occurs in A phase at 16 ms. The pre-insertion inductor is shorted out after thermal breakdown at 50 ms. The B and C phases of the 2000-A circuit breaker interrupt after 80 ms.

IV. CIRCUIT BREAKER TRV ANALYSIS

While the analysis of the relay event recording gave an indication of the initial sequence of events, the cause of the circuit breakers failure to interrupt was still not known. Because of the presence of the 1-ohm currentlimiting inductor in the circuit, the effect of the inherent frequency of the inductor on the TRV was the suspected cause leading to further analysis. The effective capacitance of current-limiting inductors, consisting of the terminal-to-ground and terminal-to-terminal capacitances, are typically quite small (usually tens to a few hundreds of picofarads). Consequently, these inductors have a very high inherent frequency, which could be on the order of tens to hundreds of kilohertz. If a phase-to-ground fault occurs on the load-side terminals of a current-limiting inductor, a voltage determined by the magnitude of the fault current and the impedance of the inductor develops across the inductor. When a sourceside circuit breaker in series with the inductor interrupts the fault current, the voltage on the load side of the circuit breaker will rapidly oscillate to zero. The voltage on the source side of the circuit breaker will return to its nominal power-frequency value through a low-frequency oscillation, which is dictated by the effective source inductance and effective system capacitance. The highfrequency oscillation on the load side of the circuit breaker gives rise to a very severe TRV across the contacts of the circuit breaker. The frequency of this oscillation is determined by the inductance of the reactor and the equivalent phase-to-ground capacitance on the load-side terminals of the circuit breaker. The load-side capacitance includes the effective capacitance of the inductor, the capacitance of the length of bus between the inductor and circuit breaker, and the phase-to-ground capacitance of the circuit breaker.

Figure 4. Simulated capacitor bank phase-to-ground voltages during energizing with trapped charge voltage on the capacitor bank. A full-blown phase-to-ground fault occurs in A phase at 16 ms. The pre-insertion inductor is shorted out after thermal breakdown at 50 ms. The B and C phases of the 2000-A circuit breaker interrupt after 80 ms.

Figure 5. Simulated 138-kV bus phase-to-ground voltages during energizing with trapped charge voltage on the capacitor bank. A full-blown phase-to-ground fault occurs in A phase at 16 ms. The pre-insertion inductor is shorted out after thermal breakdown at 50 ms. The B and C phases of the 2000-A circuit breaker interrupt after 80 ms.

The manufacturer of the current-limiting inductors was contacted to obtain the actual capacitance of the inductors installed at Silver Lake Substation. The capacitance of the current-limiting inductors was specied to be 81.7 pF phase-to-ground and 16 pF terminal-to-terminal, yielding an effective capacitance of 97.7 pF. This capacitance, combined with the capacitance of the buswork between the circuit breaker and the current-limiting inductor, as well as the equivalent capacitance of the circuit breaker, yielded a total effective capacitance on the load side of the 2000-A circuit breaker of 249 pF. The inductance of the current-limiting inductor is approximately 2.65 mH, which yields a frequency of oscillation on the load side of the circuit breaker of approximately 196 kHz. The EMTP simulation circuit model was used to determine the peak TRV across the circuit breaker contacts when interrupting the phase-to-ground fault current. The resulting TRV is shown in Figure 7. The initial TRV has a peak value of approximately 86.8 kV and a time-to-peak value of approximately 2.55 microseconds, giving an average rate of rise of recovery voltage of approximately 34 kV per microsecond. For a 63-kA circuit breaker the preferred ratings of rated transient recovery voltage specied in ANSI C37.06 [3] include a peak voltage of 255 kV, a time-to-peak of 310 microseconds, and an initial rate of rise of recovery voltage of 1.8 kV per microsecond at rated interrupting current. For a 45% fault (i.e., for a fault limited to 28.2 kA by the 1-ohm currentlimiting inductor), the preferred TRV parameters include a peak voltage of 281 kV, a time-to-peak of 89 microseconds, and an initial rate of rise of recovery voltage of 1.8 kV per microsecond.

the most likely reason why the circuit breaker was unable to interrupt the fault current involved during the incident at Silver Lake Substation. Review of the special circumstances of the fault involved in this incident by the circuit breaker manufacturer also led to the conclusion that the evolving nature of the fault may have contributed to the inability of the circuit breaker to clear the fault. The circuit breaker uses an arc-assist interrupter unit, which develops a pressure proportional to the magnitude of the fault current to assist with extinguishing the arc during fault current interruption. The gradual increase in the magnitude of the fault current, initially limited by the current-limiting inductor and pre-insertion inductor, resulted in insufcient pressure in the interrupter to successfully interrupt the current. In order to limit the severity of the initial TRV across the circuit breaker contacts, the use of a capacitor connected in parallel with the current-limiting inductor was considered. The capacitance value must be selected such that the voltage acceleration associated with the initial TRV is less than that resulting from the ANSIspecied rate of rise of recovery voltage of 1.8 kV per microsecond. This translates into a limiting voltage acceleration of 175 volts per microsecond2. For an initial peak TRV of 86.8 kV, the frequency on the load side of the circuit breaker must be limited to less than approximately 10 kHz in order not to exceed the specied rate of rise of recovery voltage. This would require a capacitance of at least 94 nF across the terminals of the current-limiting inductors in each phase. A 100 nF capacitor per phase was recommended to be used for this purpose.

V. CONCLUSIONS
Current-limiting inductors applied to reduce the severity of outrush currents from capacitor banks during close-in bus faults can impact the interrupting capability of circuit breakers used for protecting the capacitor banks. The very high inherent frequency of the current-limiting inductors can cause very severe transient recovery voltages to occur across the opening contacts of the circuit breaker during interruption of faults that involve the current-limiting inductors. The impact of current-limiting inductors on fault current interruption was demonstrated by the incident described in this paper. Care should be exercised in the application of current-limiting inductors that are connected directly on the load side of the circuit breaker used for protecting the capacitor bank(s). If the inherent frequency of the current-limiting inductor will result in a rate of rise of recovery voltage across the contacts of the circuit breaker that would exceed that specied in the standards, additional capacitance must be connected on the load side of the circuit breaker.

Figure 7. Simulated initial TRV across A-phase contacts of 2000-A circuit breaker when interrupting capacitor bank phase-to-ground fault current.

The TRV parameters during interruption of fault current in this application greatly exceeded the ANSIspecied TRV time-to-peak and rate of rise values. This is

VI. REFERENCES
[1] L. van der Sluis, A.L.J. Jansen, Clearing Faults Near Shunt Capacitor Banks, Presented at the 1990 IEEE-PES Winter Meeting, Atlanta, Georgia, February 4 - 8, 1990. [2] Brian C. Furumasu, Robert M. Hasibar, Design and Installation of 500-kV Back-to-Back Shunt Capacitor Banks, in IEEE Transactions on Power Delivery, Vol. 7, No. 2, April 1992. [3] ANSI C37.06-1997, AC High-Voltage Circuit Breakers Rated on a Symmetrical Current Basis Preferred Ratings and Related Required Capabilities. Terrance A. Bellei received his BSEE from Marquette University in Milwaukee, Wisconsin. He has been with S&C Electric Company since 1974 and has held various positions in R&D and the Power Systems Services Division. He is currently Manager, Engineering Services, in the Power Systems Services Division. Within IEEE, he has served as a member of the High Voltage Fuses Subcommittee, Working Group on External Fuses for Shunt Capacitors, Working Group on Full-Range Current-Limiting Fuses, and as the secretary of the Working Group on Revision of Fuse Standards. He has served as Chairman of a Task Force formed by the Working Group on Revision of Fuse Standards. He was also a former representative of S&C in the North America Short-Circuit Testing Liaison (STLNA). Ernst H. Camm received his BSc (Eng) degree in Electrical and Electronic Engineering from the University of Cape Town, South Africa in 1984 and his MSEE degree from the Ohio State University in 1992. From 1984 to 1990, he held various positions in Plant and Project Engineering at S&C Electric Company. He is currently a Senior Engineer in the Engineering Services Department at S&C Electric Company. Ernst has had extensive involvement in capacitor switching transient and power quality analysis at S&C, including analysis in the development of optimally sized pre-insertion inductors for capacitor switching transient mitigation. He is the author of and co-presenter of S&Cs Seminar on Capacitor Switching Transients and Their Impact on Your System. He is a member of the Switching Transients Task Force of the IEEEs Modeling and Analysis of System Transients Working Group and the Shunt Capacitor Application Guide Working Group. Gene Ransom received his BS degree in Electrical and Electronic Engineering from the Illinois Institute of Technology. He has been with ComEd since 1972 and has held various positions in Transmission, Distribution, and Substation engineering and construction. He is currently Substation Engineering Manager for ComEd.