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14/11/2013
Topics
Decoders Encoders Priority Encoders
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Fall 2013
EC381/Digital Systems I
Decoders
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n inputs and 2n outputs !! Drives high the output corresponding to binary code of input
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!! Notice
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EC381/Digital Systems I
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EC381/Digital Systems I
Fall 2013
EC381/Digital Systems I
Variations
Sometimes, in implementation decoders are done with NAND gates rather than AND gates. With NAND gates, the table illustrating the decoder operation would look like this:
So pay attention In using a decoder, it is useful to know when the output is intended to be active high, or active low!
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Decoder Expansion
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A 2-to-4 Line decoder requires 4 (2-input) AND gates A 3-to-8 line decoder requires 8 (3-input) AND gates If we want to design a 6-to-64 line decoder then we will need? 64 (6-input) AND gates! Unfortunately, as decoders become larger, this approach gives a high gate input count! If we have decoders with enables, we can use multiple, small decoders to implement larger decoders.
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EC381/Digital Systems I
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EC381/Digital Systems I
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When w =0, the top decoder is enabled and the other is disabled. The bottom decoder outputs are all 0s, and the top eight outputs generate minterms 0000 to 0111. When w = 1, the enable conditions are reversed
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logic circuits! !! Memory address lines !! Decoders are used in Micro Computer Interfacing for Keyboard and Display applications.
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EC381/Digital Systems I
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With the variables used as control inputs Enable inputs tied to 1 and Appropriate minterms summed to form the function
Decoder generates appropriate minterm based on control signals (it "decodes" control signals)
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EC381/Digital Systems I
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S(x,y,z) = SUM(m(1,2,4,7))
C(x,y,z) = SUM(m(3,5,6,7))
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EC381/Digital Systems I
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Example
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F1
Enable
4:16 DEC
Fall 2013
EC381/Digital Systems I
A B C D
Encoder
Encoder is the opposite of decoder !! 2n inputs !! n outputs
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EC381/Digital Systems I
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Truth Table
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EC381/Digital Systems I
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EC381/Digital Systems I
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Priority Encoder
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Priority Encoder
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