COM 353 Microprocessors

Computer Organization and Introduction to Microprocessors

Prof. Dr. Halk Gmkaya
haluk.gumuskaya@gediz.edu.tr haluk@gumuskaya.com http://www.gumuskaya.com

Prof. Dr. Halk Gmkaya

haluk@gumuskaya.com http://www.gumuskaya.com

Computer Engineering Department

Saturday, October 06, 2012

Saturday, October 06, 2012

Lecture Outline
1. Introduction
2. Views of Computer Systems 3. Processor Based System 4. Processor 5. Memory 6. Input/Output 7. Interconnection: The Glue 8. Historical Perspective Introduction
Basic Terminology and Notation

Outline
Processor
Execution cycle Pipelining RISC and CISC

Views of Computer Systems Users view Programmers view

Advantages of high-level languages Why program in assembly language?

Memory
Basic memory operations Design issues

Architects view Implementers view

Input/Output Interconnection: The glue Historical Perspective

Introduction
Some basic terms
Computer organization Computer architecture Computer design Computer programming Users view Programmers view Architects view Implementers view
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1. Introduction

2. Views of Computer Systems

3. Processor Based System 4. Processor 5. Memory 6. Input/Output 7. Interconnection: The Glue 8. Historical Perspective

Various views of computer systems

From Personal Computer to Mobile Devices

Personal Computer: Components

RAM storage tape control unit hard disk floppy CD-ROM registers flags ALU cache central processing unit keyboard monitor modem address memory buses ROM data I/O mouse

data

address

A Users View of Computer Systems

A Programmers View
Depends on the type and level of language used A hierarchy of languages
Machine language Assembly language High-level language Application programs increasing level of abstraction

Machine-independent
High-level languages/application programs

Machine-specific
Machine and assembly languages

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A Programmers View (contd)

A Programmers View (contd)

Machine language
Native to a processor Consists of alphabet 1s and 0s 1111 1111 0000 0110 0000 1010 0000 0000B

Assembly language
Slightly higher-level language Human-readable One-to-one correspondence with most machine language instructions

inc
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count
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A Programmers View (contd)

Readability of assembly language instructions is much better than the machine language instructions
Machine language instructions are a sequence of 1s and 0s

A Programmers View (contd)

Assemblers translate between assembly and machine languages
TASM MASM NASM

Assembly Language inc mov and add result class_size,45 mask,128 marks,10

Machine Language (in Hex) FF060A00 C7060C002D00 80260E0080 83060F000A

Compiler translates from a high-level language to machine language

Directly Indirectly via assembly language

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A Programmers View (contd)

A Programmers View (contd)

High-level languages versus low-level languages In C:

result = count1 + count2 + count3 + count4

In Pentium assembly language:

mov add add add mov

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AX,count1 AX,count2 AX,count3 AX,count4 result,AX

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A Programmers View (contd)

Some simple high-level language instructions can be expressed by a single assembly instruction Assembly Language
inc mov and add result size,45 mask1,128 marks,10

A Programmers View (contd)

Most high-level language instructions need more than one assembly instruction C Assembly Language
size = value; mov mov AX,value size,AX AX,sum AX,x AX,y AX,z sum,AX
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C
result++; size = 45; mask1 &= 128; marks += 10;

sum += x + y + z;

mov add add add mov

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A Programmers View (contd)

Instruction Set Architecture (ISA)
An important level of abstraction Specifies how a processor functions
Defines a logical processor

Advantages of High-Level Languages

Program development is faster
High-level instructions Fewer instructions to code

Various physical implementations are possible

All logically look the same Different implementations may differ in
Performance Price

Program maintenance is easier

For the same reasons as above

Programs are portable

Contain few machine-dependent details Can be used with little or no modifications on different types of machines Compiler translates to the target machine language Assembly language programs are not portable

Two popular examples of ISA specifications

SPARC and JVM
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Why Program in Assembly Language?

Two main reasons:
Efficiency
Space-efficiency Time-efficiency

Architects View
Looks at the design aspect from a high level
Much like a building architect Does not focus on low level details Uses higher-level building blocks
Ex: Arithmetic and logical unit (ALU)

Accessibility to system hardware

Space-efficiency
Assembly code tends to be compact

Consists of three main components

Processor Memory I/O devices

Time-efficiency
Assembly language programs tend to run faster
Only a well-written assembly language program runs faster Easy to write an assembly program that runs slower than its high-level language equivalent
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Glued together by an interconnect

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Architects View (contd)

Architects View (contd)

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Implementers View
Implements the designs generated by architects
Uses digital logic gates and other hardware circuits

Implementers View (contd)

Example
Processor consists of
Control unit Datapath ALU Registers

Implementers are concerned with design of these components

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Implementers View (contd)

Implementers View (contd)

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A Processor Based System

1. Introduction 2. Views of Computer Systems

3. Processor Based System

4. Processor 5. Memory 6. Input/Output 7. Interconnection: The Glue 8. Historical Perspective

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Microprocessor Based System: Collection of Addressable Registers

We

Microprocessor Busses
Address

can view the entire system microprocessor, ROM, RWM, and I/O ports as a collection of addressable registers. Those registers reside within the microprocessor are internal registers, and those exist in the ROM, RWM (RAM), and I/O ports are external registers.

Bus input bus to memory device specifying location of data to read/write Bus input/output bus to memory device containing data value being read or written. Bus control signals of a processor for memory and I/O devices

Data

Control

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Address, Data and Control Buses

1. Introduction 2. Views of Computer Systems 3. Processor Based System

4. Processor
5. Memory 6. Input/Output 7. Interconnection: The Glue 8. Historical Perspective

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Processor Integration
Processor
Execution cycle
Fetch Decode Execute

Early computers had many separate chips for the different portions of a computer system

von Neumann architecture

Stored program model No distinction between data and instructions Instructions are executed sequentially

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Microprocessors

Modern Processors

First microprocessors placed control, registers, and arithmetic logic unit (ALU) in one integrated circuit (one chip).

Modern microprocessors (general purpose Processors) also integrate memory onchip for faster access. External memory and I/O components are still required. Memory integrated on the microprocessor is called cache memory.

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Microcontrollers
Microcontrollers integrate all of the components (control, memory, I/O) of a computer system into one integrated circuit. Microcontrollers are intended to be single chip solutions for systems requiring low to moderate processing power.

Pipelining: Overlapping Processor Operations

Pipelining
Overlapped execution Increases throughput

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Pipelining (contd)
Another way of looking at pipelined execution

RISC and CISC Processors

RISC and CISC designs
Reduced Instruction Set Computer
Uses simple instructions Operands are assumed to be in processor registers Not in memory Simplifies design Example: Fixed instruction size

Complex Instruction Set Computer

Uses complex instructions Operands can be in registers or memory Instruction size varies Typically uses a microprogram

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CISC and RISC Implementations

Microprogramming
Variations of the ISA-level can be implemented by changing the microprogram

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1. Introduction 2. Views of Computer Systems 3. Processor Based System 4. Processor

Memory
Ordered sequence of bytes
The sequence number is called the memory address Byte addressable memory
Each byte has a unique address Almost all processors support this

5. Memory
6. Input/Output 7. Interconnection: The Glue 8. Historical Perspective

Memory address space

Determined by the address bus width Pentium has a 32-bit address bus
address space = 4GB (232)

Itanium with 64-bit address bus supports

264 bytes of address space

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Memory (contd)
Memory unit
Address Data Control signals
Read Write

Memory (contd)

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Memory (contd)
Read cycle
1. Place address on the address bus 2. Assert memory read control signal 3. Wait for the memory to retrieve the data
Introduce wait states if using a slow memory

Memory (contd)
Write cycle
1. 2. 3. 4. Place address on the address bus Place data on the data bus Assert memory write signal Wait for the memory to retrieve the data
Introduce wait states if necessary

4. Read the data from the data bus 5. Drop the memory read signal

5. Drop the memory write signal

In Pentium, a simple read takes three clocks cycles

Clock 1: steps 1 and 2 Clock 2: step 3 Clock 3 : steps 4 and 5

In Pentium, a simple write also takes three clocks

Clock 1: steps 1 and 3 Clock 2: step 2 Clock 3 : steps 4 and 5

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Byte Ordering

Byte Ordering (contd)

Multibyte data address pointer is independent of the endianness
100 in our example

Little-endian
Used by Pentium

Big-endian
Default in MIPS and PowerPC

On modern processors
Configurable

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Design Issues
Slower memories
Problem: Speed gap between processor and memory Solution: Cache memory
Use small amount of fast memory Make the slow memory appear faster Works due to reference locality

Design Issues (contd)

Size limitations
Limited amount of physical memory
Overlay technique Programmer managed

Virtual memory
Automates overlay management Some additional benefits

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Design Issues (contd)

1. Introduction 2. Views of Computer Systems 3. Processor Based System 4. Processor 5. Memory

6. Input/Output
7. Interconnection: The Glue 8. Historical Perspective

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Input/Output
I/O devices are interfaced via an I/O controller
Takes care of low-level operations details

Input/Output (contd)

Several ways of mapping I/O

Memory-mapped I/O
Reading and writing similar to memory read/write Uses same memory read and write signals Most processors use this I/O mapping

Isolated I/O
Separate I/O address space Separate I/O read and write signals are needed Pentium supports isolated I/O Also supports memory-mapped I/O

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Input/Output (contd)
Several ways of transferring data
Programmed I/O
Program uses a busy-wait loop Anticipated transfer

1. Introduction 2. Views of Computer Systems 3. Processor Based System 4. Processor 5. Memory 6. Input/Output

Direct memory access (DMA)

Special controller (DMA controller) handles data transfers Typically used for bulk data transfer

Interrupt-driven I/O
Interrupts are used to initiate and/or terminate data transfers Powerful technique Handles unanticipated transfers

7. Interconnection: The Glue

8. Historical Perspective

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Interconnection
System components are interconnected by buses
Bus: a bunch of parallel wires

Interconnection (contd)
Bus is a shared resource
Bus transactions
Sequence of actions to complete a well-defined activity Involves a master and a slave Memory read, memory write, I/O read, I/O write

Uses several buses at various levels

On-chip buses
Buses to interconnect ALU and registers A, B, and C buses in our example Data and address buses to connect on-chip caches

Bus operations
A bus transaction may perform one or more bus operations Pentium burst read Transfers four memory words Bus transaction consists of four memory read operations

Internal buses
PCI, AGP, PCMCIA

External buses
Serial, parallel, USB, IEEE 1394 (FireWire)
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Bus arbitration

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1. Introduction 2. Views of Computer Systems 3. Processor Based System 4. Processor 5. Memory 6. Input/Output 7. Interconnection: The Glue

Historical Perspective
The early generations
Difference engine of Charles Babbage

Vacuum tube generation

Around the 1940s and 1950s

Transistor generation
Around the 1950s and 1960s

8. Historical Perspective

IC generation
Around the 1960s and 1970s

VLSI generation
Since the mid-1970s

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Intel CPU Family

1971-1972 4 ve 8bit

Intel CPU Family

Processor 4004 Year 1971 1972 1974 1976 1978 1979 1982 1982 1982 1985 1988 1989 1993 1995 1997 1997 1999 2001 Register/ Data Bus Width 4/4 8/8 8/8 8/8 16/16 16/8 16/16 16/8 16/16 32/32 32/16 32/32 32/64 36/64 36/64 36/64 36/64 36/64 Address Space 640 byte 16K 64K 64K 1M 1M 1M 1M 16M/1G* 4G/64T* 4G/64T* 4G/64T* 4G/64T* 64G/64T* 4G/64T* 64G/64T* 64G/64T* nemli zellikler lk mikroilemci, 2300 transistr, 10 mikron lk 8-bit ilemci, 108 Khz lk genel amal CPU, 6 mikron, 6000 transistr Gelimi 8080, 6200 transistr lk 16-bit CPU, 5 10MHz, 29000 transistr, 3 mikron 1981de retilen IBM PC deki ilk ilemci, 8-bit veri yollu 8086 8086 + I/O 8088 + I/O 134000 transistr, 1.5 mikron, IBM PC/ATnin ilk ilemcisi Intelin ilk 32-bit ilemcisi, 275000 transistr, 1 mikron 80286 yoluna sahip 80386 80386 + FPU + cache, 1.2 milyon transistr, 0.8 mikron 3.1 milyon transistr, 0.8 mikron, 60 200 MHz, superscalar mimari 5.5 milyon transistr, 0.32 mikron, tmdevre zeri L2 cache, P6 mimarisi: oklu dallanma tahmini, veri ak analizi ve tahmini yrtme 4.5 milyon transistr, multi-medya ekleri 7.5 milyon transistr, 0.25 mikron, 300 450 MHz, MMX + Pro teknolojisi 9.5 milyon transistr, 0.18 mikron, 450 500 MHz, 3D grafikler ve daha fazla multimedya destei 8008 8080 8085

4004 8008

1974-76 8-bit

8080 8085

1978-1979 16-bit

8086 8088

1976 8-bit

8048 8051

8086 8088 80186

1982 16-bit

80286

1982 16-bit

80186 80188

8-bit

80251 80151

16-bit

8096 80196

80188 80286 80386DX

1985-1988 32-bit

80386DX 80386SX

1985 32-bit

80386

80386SX 80486DX

1989 32-bit

80486DX

Pentium Pentium Pro Pentium MMX Pentium II Pentium III Pentium IV

Pentium Mikroilemcileri
(32-bit i mimari, 64-bit veri yolu)

Pentium Pentium Pentium Pentium Pentium Pentium

Pro MMX II III IV

(1993) (1995) (1997) (1997) (1999) (2001)

Mikroilemciler

Mikrodenetleyiciler

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80x86 Evolution: First Microprocessors

8085, 8086, and 80286

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80386 and 80486

Pentium I

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Pentium Pro

Pentium II

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Pentium III

Pentium IV

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Acknowledgement
The slides have been based in-part upon original slides of a number of books including: Fundamentals of Computer Organization and Design, S. P. Dandamudi, Springer, 1060 pages, 2003. Mikroilemciler ve Bilgisayarlar, 6. Basm, H. Gmkaya, ALFA, 2011.

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