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UM1670 User manual

Discovery kit for STM32F429/439 lines

Introduction
The STM32F429 Discovery kit (32F429IDISCOVERY) helps you to discover the high performance of the STM32F4 series and to develop your applications. It is based on an STM32F429ZIT6 and includes an ST-LINK/V2 embedded debug tool interface, 2.4" TFT LCD, SDRAM 64 Mbits, Gyroscope ST MEMS, LEDs, pushbuttons and a USB OTG micro-B connector. Figure 1. STM32F429 Discovery board

September 2013

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Contents

UM1670

Contents
1 2 Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Quick start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 2.2 2.3 2.4 Getting started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 System requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Development toolchain supporting the STM32F429 Discovery kit . . . . . . . 4 Order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 4

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Hardware layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6


4.1 4.2 STM32F429ZIT6 microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Embedded ST-LINK/V2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.2.1 4.2.2 Using ST-LINK/V2 to program/debug the STM32F429ZIT6 on board . . 13 Using ST-LINK/V2 to program/debug an external STM32 application . . 14

4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 4.11

Power supply and power selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Pushbuttons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 USB OTG supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Gyroscope MEMS (ST MEMS L3GD20) . . . . . . . . . . . . . . . . . . . . . . . . . 16 TFT LCD (Thin-film-transistor liquid-crystal display) . . . . . . . . . . . . . . . . 16 64-Mbit SDRAM (1Mbit x 16-bit x 4-bank) . . . . . . . . . . . . . . . . . . . . . . . . 16 JP3 (Idd) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 OSC clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.11.1 4.11.2 OSC clock supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 OSC 32 KHz clock supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.12 4.13

Solder bridges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Extension connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5 6

Mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Electrical schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

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Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

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List of tables

List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. ON/OFF conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Features and benefits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Jumper states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Debug connector CN2 (SWD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Solder bridges. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 MCU pin description versus board function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

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List of figures

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List of figures
Figure 1. Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. STM32F429 Discovery board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Hardware block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Top layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Bottom layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 STM32F429ZIT6 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 STM32F429ZIT6 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Typical configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 STM32F429 Discovery board connections image . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 ST-LINK/V2 connections image . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 STM32F429 Discovery board mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 STM32F429 Discovery board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 ST-LINK/V2 (SWD only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 USB OTG_FS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 SDRAM 64 Mbits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 STM32F429ZIT6 MCU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 LCD 2.4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

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Conventions

Conventions
Table 1 provides the definition of some conventions used in the present document. Table 1. ON/OFF conventions
Convention Jumper JPx ON Jumper JPx OFF Solder bridge SBx ON Solder bridge SBx OFF Jumper fitted Jumper not fitted SBx connections closed by solder SBx connections left open Definition

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Quick start

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Quick start
The STM32F429 Discovery is a low-cost and easy-to-use development kit to quickly evaluate and start a development with an STM32F4 series microcontroller. Before installing and using the product, please accept the Evaluation Product License Agreement from www.st.com/stm32f4-discovery. For more information on the STM32F429 Discovery board and for demonstration software, visit www.st.com/stm32f4-discovery.

2.1

Getting started
Follow the sequence below to configure the STM32F429 Discovery board and launch the DISCOVER application: 1. 2. Ensure that the jumpers JP3 and CN4 are set to "on" (Discovery mode). Connect the STM32F429 Discovery board to a PC using a USB cable type A/mini-B through the USB ST-LINK connector CN1, to power the board. The LEDs LD2 (PWR) and LD1 (COM). The following applications are available on the screen: 4. 5. Clock/Calendar and Game Video Player and Image Browser (play videos and view images from the USB mass storage connected to CN6) Performance monitor (watch the CPU load and run a graphical benchmark) System Info

3.

The demo software, as well as other software examples that allow you to discover the STM32 F4 series features, are available on www.st.com/stm32f4-discovery. Develop your own applications starting from the examples.

2.2

System requirements
Windows PC (XP, Vista, 7) USB type A to mini-B cable

2.3

Development toolchain supporting the STM32F429 Discovery kit


Altium: TASKING VX-Toolset Atollic: TrueSTUDIO IAR: EWARM Keil: MDK-ARM

2.4

Order code
To order the STM32F429 Discovery kit, use the STM32F429I-DISCO order code.

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Features

Features
The STM32F429 Discovery board offers the following features: STM32F429ZIT6 microcontroller featuring 2 MB of Flash memory, 256 KB of RAM in an LQFP144 package On-board ST-LINK/V2 with selection mode switch to use the kit as a standalone STLINK/V2 (with SWD connector for programming and debugging) Board power supply: through the USB bus or from an external 3 V or 5 V supply voltage L3GD20, ST MEMS motion sensor, 3-axis digital output gyroscope TFT LCD (Thin-film-transistor liquid-crystal display) 2.4", 262K colors RGB, 240 x 320 dots SDRAM 64 Mbits (1 Mbit x 16-bit x 4-bank) including an AUTO REFRESH MODE, and a power-saving Six LEDs: LD1 (red/green) for USB communication LD2 (red) for 3.3 V power-on Two user LEDs: LD3 (green), LD4 (red) Two USB OTG LEDs: LD5 (green) VBUS and LD6 (red) OC (over-current)

Two pushbuttons (user and reset) USB OTG with micro-AB connector Extension header for LQFP144 I/Os for a quick connection to the prototyping board and an easy probing

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Hardware layout

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Hardware layout
The STM32F429 Discovery board has been designed around the STM32F429ZIT6 microcontroller in a 144-pin LQFP package. Figure 1 illustrates the connections between the STM32F429ZIT6 and its peripherals (STLINK/V2, pushbutton, LED, USB OTG, Gyroscope ST MEMS, Accelerometer + Magnetometer ST MEMS, and connectors). Figure 2 and Figure 3 help you to locate these features on the STM32F429 Discovery board. Figure 1. Hardware block diagram
Mini-USB

Embedded ST-LINK/V2

SWD

STM32F429ZIT6

I/O Header

I/O

I/O LEDs LD3...LD6 SDRAM 64 Mbits 2.4" QVGA TFT LCD Micro-USB

RESET

B2 RESET B1 USER L3GD20

ACP/RF
MS32376V1

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Header

UM1670 Figure 2. Top layout


ST-LINK/V2
LD1 (red/green LED) COM CN2 SWD connector JP3 IDD measurement

Hardware layout

LD2 (red LED) PWR

CN4 ST-LINK/DISCOVERY selector

B1 user button LD3 (orange LED)

3 V power supply input/output B2 reset button SB1 (B2-RESET)

LD4 (green LED)

2.4" TFT LCD

MS32363V1

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Hardware layout Figure 3. Bottom layout

UM1670

SB3, SB5, SB7, SB13 (RESERVED) SB4, SB6, SB8, SB14 (DEFAULT) SB12 (NRST) SB11 (RX, TX) SB9 (SWO) SB15 (RX, TX) SB10 (STM_RST) SB19, 20 (X3 crystal)

SB16, 17 (X2 crystal) SB21 (BOOT1)

SB22, 23, 24, 25 SB18 (MCO)

STM32F429ZIT6

SB26, 27 (USB OTG)

SDRAM

USB OTG micro-AB MS32364V1

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Hardware layout

4.1

STM32F429ZIT6 microcontroller
This ARM Cortex-M4 32-bit MCU with FPU has 225 DMIPS, up to 2 MB Flash/256 + 4 KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 comm. interfaces, a camera and an LCD-TFT, 1.7-3.6 V operation. Figure 4. STM32F429ZIT6 package

STM32F429ZIT6
2 Mbytes of Flash memory 256 Kbytes of RAM

LQFP144 20 x 20 mm

MS32377V1

This device provides the following benefits (see Table 2). Table 2. Features and benefits
Features Benefits Boosted execution of control algorithms More features for your applications Ease of use Better code efficiency Faster time to market Elimination of scaling and saturation Easier support for meta-language tools

High performance Up to 180 MHz/225 DMIPS Cortex-M4 with single cycle DSP MAC and floating point unit CoreMark score: 608 at 180 MHz CoreMark/MHz: 3.37

Maximum integration Read while write operations support Up to 2 Mbytes of on-chip dual bank Flash memory, up More features in space-constrained applications to 256 Kbytes of SRAM, reset circuit, internal RCs, Use of high-level languages: Java, .Net PLLs, ultra-small packages (WLCSP) Designed for high performance and ultra-fast data transfers ART Accelerator: memory accelerator Chrom-ART Accelerator: graphic accelerator (rectangle filling, rectangle copy with pixel format conversion and blending) 32-bit, 7-layer AHB bus matrix with up to 10 masters and 8 slaves including 3 blocks of SRAM Multi DMA controllers: 2 general-purpose, 1 for USB HS, one for Ethernet One 4th SRAM block dedicated to the core Performance equivalent to zero-wait execution from Flash Graphic content is created twice as fast and independently from the CPU

Concurrent execution and data transfer

Simplified resource allocation

Flexible memory interface with SDRAM support: up to High bandwidth for external memories 90 MHz, 32-bit parallel Cost-effective external RAM

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Hardware layout Table 2. Features and benefits (continued)


Features Outstanding power efficiency Ultra-low dynamic power in Run mode: 260 A/MHz at 180 MHz running CoreMark benchmark from Flash memory (peripherals off) RTC <1 A typ in VBAT mode Down to 100 A typ in Stop mode 3.6 V down to 1.7 V VDD 1.2 V voltage regulator with power scaling capability Benefits

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Extra flexibility to reduce power consumption for applications requiring both high-processing and lowpower performance when running at low voltage or on a rechargeable battery

Superior and innovative peripherals and connectivity Connectivity: camera interface, crypto/hash HW processor with AES GCM and CCM support, and SHA-256 New possibilities to connect and communicate high Ethernet MAC10/100 with IEEE 1588 v2 support, 2 speed data USB OTG (one with HS support) Up to 20 communication interfaces (including 4x USART + 4x UART, 6x SPI, 3x IC with digital filter, 2x CAN, SDIO) USART at 11.25 Mbit/s; SPI at 45 Mbit/s Audio: dedicated audio PLL, 2x I2S and 1x SAI with TDM(1) support LCD TFT controller Up to SVGA format (800 x 600) Up to 24-bit RGB parallel pixel output 2-layer support with blending High-quality multi-channel audio support

Support for cost-effective standard displays

Analog: 2x 12-bit DACs, 3x 12-bit ADCs reaching 7.2 MSPS in More precision thanks to high resolution interleaved mode Up to 17 timers: 16 and 32 bits running up to 180 MHz High integration WLCSP143 4.5 x 5.5 mm, 2-Mbyte Flash/256-Kbyte SRAM) Extensive tools and software solutions Hardware sector protection with execute only access Various IDE, starter kits, libraries, RTOS and stacks, either open source or provided by ST or 3rd parties, including the ARM CMSIS DSP library optimized for Cortex-M4 instructions
1. TDM: time division multiplex

Smaller board space allowing for smaller applications

Software IP protection A wide choice within the STM32 ecosystem to develop your applications

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UM1670 Figure 5. STM32F429ZIT6 block diagram


CCM data RAM 64 KB
NJTRST, JTDI, JTCK/SWCLK JTDO/SWD, JTDO TRACECLK TRACED[3:0] JTAG & SW ETM MPU NVIC D-BUS
AHB3

Hardware layout

External memory controller (FMC)


SRAM, SDRAM, PSRAM, NOR Flash, PC Card (ATA), NAND Flash

FPU
S-BUS MII or RMII as AF MDIO as AF DP, DM ULPI:CK, D[7:0], DIR, STP, NXT ID, VBUS, SOF

AHB bus-matrix 8S7M

ART ACCEL/ CACHE

ARM Cortex-M4 180 MHz I-BUS

CLK, NE [3:0], A[23:0], D[31:0], NOEN, NWEN, NBL[3:0], SDCLKE[1:0], SDNE[1:0], SDNWE, NL NRAS, NCAS, NADV NWAIT/NIORD, NREG, CD INTN

1MB Flash 1MB Flash


FIFO FIFO SRAM 16 KB SRAM 64 KB
RNG

Ethernet MAC DMA/ FIFO 10/100 PHY USB OTG HS DMA2 DMA1
DMA/ FIFO
8 Streams FIFO 8 Streams FIFO

SRAM 112 KB

Camera interface PHY USB OTG FS

HSYNC, VSYNC PUIXCLK, D[13:0] DP DM ID, VBUS, SOF

AHB2 180 MHz AHB1 180 MHz VDD

LCD_R[7:0], LCD_G[7:0], LCD_B[7:0], LCD_HSYNC, LCD_VSYNC, LCD_DE, LCD_CLK

LCD-TFT CHROM-ART DMA2D

FIFO

Power managmt Voltage regulator 3.3 to 1.2 V @VDD

VDD = 1.8 to 3.6 V VSS VCAP1, VCPA2

@VDDA
FIFO

RC HS RC LS PLL1,2,3

POR reset

PA[15:0] PB[15:0] PC[15:0] PD[15:0] PE[15:0] PF[15:0] PG[15:0] PH[15:0] PI[15:0] PJ[15:0] PK[7:0]

GPIO PORT A GPIO PORT B GPIO PORT C GPIO PORT D GPIO PORT E GPIO PORT F
HCLKx PCLKx FCLK Reset & clock MANAGT control

Int

Supply supervision POR/PDR BOR PVD @VDDA @VDD XTAL OSC 4- 16MHz IWDG

VDDA, VSSA NRST

OSC_IN OSC_OUT

Standby interface
@VBAT LS XTAL 32 kHz

VBAT = 1.65 to 3.6 V OSC32_IN OSC32_OUT RTC_AF1 RTC_AF1 RTC_50HZ

GPIO PORT G GPIO PORT H GPIO PORT I GPIO PORT J GPIO PORT K

RTC
LS
AWU Backup register

4 KB BKPSRAM

TIM2 TIM3

32b 16b 16b 32b 16b 16b 16b

4 channels, ETR as AF 4 channels, ETR as AF 4 channels, ETR as AF 4 channels 2 channels as AF 1 channel as AF 1 channel as AF RX, TX as AF CTS, RTS as AF RX, TX as AF CTS, RTS as AF RX, TX as AF RX, TX as AF RX, TX as AF RX, TX as AF MOSI/SD, MISO/SD_ext, SCK/CK NSS/WS, MCK as AF MOSI/SD, MISO/SD_ext, SCK/CK NSS/WS, MCK as AF

168 AF D[7:0] CMD, CK as AF 4 compl. chan. (TIM1_CH1[1:4]N), 4 chan. (TIM1_CH1[1:4]ETR, BKIN as AF 4 compl. chan.(TIM8_CH1[1:4]N), 4 chan. (TIM8_CH1[1:4], ETR, BKIN as AF 2 channels as AF 1 channel as AF 1 channel as AF RX, TX, CK, CTS, RTS as AF RX, TX, CK, CTS, RTS as AF MOSI, MISO, SCK, NSS as AF MOSI, MISO, SCK, NSS as AF MOSI, MISO, SCK, NSS as AF MOSI, MISO, SCK, NSS as AF SD, SCK, FS, MCLK as AF VDDREF_ADC 8 analog inputs common to the 3 ADCs 8 analog inputs common to the ADC1 & 2 8 analog inputs for ADC3

EXT IT. WKUP


FIFO

DMA2

DMA1

TIM4 TIM5 TIM12

SDIO / MMC

AHB/APB2 AHB/APB1

TIM1 / PWM 16b TIM13 TIM8 / PWM16b TIM9 TIM10 TIM11


smcard USART1 irDA smcard USART6 irDA 16b 16b APB2 90 MHz 16b

TIM14

smcard USART2 irDA

WWDG

smcard USART3 irDA

UART4 UART5
APB1 30MHz APB1 45 MHz (max)

UART7 UART8 SP2/I2S2 SP3/I2S3 I2C1/SMBUS

SPI4 SPI5 SPI6 SAI1


FIFO

APB2 60MHz

SPI1

TIM6 TIM7

16b 16b

Digital filter

SCL, SDA, SMBA as AF SCL, SDA, SMBA as AF SCL, SDA, SMBA as AF TX, RX TX, RX

@VDDA

I2C2/SMBUS ITF I2C3/SMBUS bxCAN1 bxCAN2

USART 2MBps Temperature sensor ADC1 ADC2 ADC3


@VDDA

DAC1 DAC2

IF
DAC1_OUT DAC2_OUT as AF as AF

FIFO

MS30420V2

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4.2

Embedded ST-LINK/V2
The ST-LINK/V2 programming and debugging tool is integrated on the STM32F429 Discovery board. The embedded ST-LINK/V2 can be used in 2 different ways according to the jumper states (see Table 3): Program/debug the MCU on board, Program/debug an MCU in an external application board using a cable connected to SWD connector CN3.

The embedded ST-LINK/V2 supports only SWD for STM32 devices. For information about debugging and programming features, refer to user manual UM1075 (ST-LINK/V2 in-circuit debugger/programmer for STM8 and STM32) which describes in detail all the ST-LINK/V2 features. Figure 6. Typical configuration

Hardware requirements: - USB cable type A to mini-B - Computer with Windows XP, Vista or 7

Development toolchains: - Altium TASKING VX-Toolset - Atollic TrueSTUDIO - IAR EWARM - Keil MDK-ARM

MS31115V1

Table 3. Jumper states


Jumper state Both CN4 jumpers ON Both CN4 jumpers OFF Description ST-LINK/V2 functions enabled for on-board programming (default) ST-LINK/V2 functions enabled for application through external CN3 connector (SWD supported)

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Hardware layout

4.2.1

Using ST-LINK/V2 to program/debug the STM32F429ZIT6 on board


To program the STM32F429ZIT6 on board, simply plug in the two jumpers on CN4, as shown in Figure 7 in red, but do not use the CN3 connector as that could disturb the communication with the STM32F429ZIT6 of the STM32F429 Discovery board. Figure 7. STM32F429 Discovery board connections image

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Hardware layout

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4.2.2

Using ST-LINK/V2 to program/debug an external STM32 application


It is very easy to use the ST-LINK/V2 to program the STM32 on an external application. Simply remove the two jumpers from CN4 as shown in Figure 8, and connect your application to the CN3 debug connector according to Table 4.

Note:

SB7must be OFF if you use CN2 pin 5 in your external application. Table 4. Debug connector CN2 (SWD)
Pin 1 2 3 4 5 6 CN2 VDD_TARGET SWCLK GND SWDIO NRST SWO Designation VDD from application SWD clock Ground SWD data input/output RESET of target MCU Reserved

Figure 8. ST-LINK/V2 connections image

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Hardware layout

4.3

Power supply and power selection


The power supply is provided either by the host PC through the USB cable, or by an external 5 V power supply. The D1 and D2 diodes protect the 5 V and 3 V pins from external power supplies: 5 V and 3 V can be used as output power supplies when another application board is connected to pins P1 and P2. In this case, the 5 V and 3 V pins deliver a 5 V or 3 V power supply and the power consumption must be lower than 100 mA. 5 V and 3 V can also be used as input power supplies, e.g. when the USB connectors are not connected to the PC. In this case, the STM32F429 Discovery board must be powered by a power supply unit or by an auxiliary equipment complying with standard EN-60950-1: 2006+A11/2009, and must be Safety Extra Low Voltage (SELV) with limited power capability.

Note:

The board can also be powered through the USB USER connector and is protected by D4 and D5 diodes when both USBs are connected (in which case, the 5 V power is around 4.4 volts).

4.4

LEDs
LD1 COM: LD1 default status is red. LD1 turns to green to indicate that communications are in progress between the PC and the ST-LINK/V2. LD2 PWR: The red LED indicates that the board is powered. User LD3: The green LED is a user LED connected to the I/O PG13 of the STM32F429ZIT6. User LD4: The red LED is a user LED connected to the I/O PG14 of the STM32F429ZIT6. User LD5: The green LED indicates when VBUS is present on CN6 and is connected to PB13 of the STM32F429ZIT6. User LD6: The red LED indicates an overcurrent from VBUS of CN6 and is connected to the I/O PC5 of the STM32F429ZIT6.

4.5

Pushbuttons
B1 USER: User and Wake-Up button connected to the I/O PA0 of the STM32F429ZIT6. B2 RESET: The pushbutton connected to NRST is used to RESET the STM32F429ZIT6.

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Hardware layout

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4.6

USB OTG supported


The STM32F429ZIT6 is used to drive only USB OTG full speed on this board. The USB micro-AB connector (CN6) allows the user to connect a host or device component, such as a USB key, mouse, and so on. Two LEDs are dedicated to this module: LD5 (green LED) indicates when VBUS is active LD6 (red LED) indicates an overcurrent from a connected device.

4.7

Gyroscope MEMS (ST MEMS L3GD20)


The L3GD20 is an ultra-compact, low-power, three-axis angular rate sensor. It includes a sensing element and an IC interface able to provide the measured angular rate to the external world through the I2C/SPI serial interface. The L3GD20 has dynamically user-selectable full scales of 250 dps/500 dps/2000 dps and is capable of measuring rates. The STM32F429ZIT6 MCU controls this motion sensor through the SPI interface.

4.8

TFT LCD (Thin-film-transistor liquid-crystal display)


The TFT LCD is a 2.41" display of 262 K colors. Its definition is QVGA (240 x 320 dots) and is directly driven by the STM32F429ZIT6 using the RGB protocol. It includes the ILI9341 LCD controller and can operate with a 2.8 0.3 V voltage. The STM32F429ZIT6 MCU controls this motion sensor through the SPI interface.

4.9

64-Mbit SDRAM (1Mbit x 16-bit x 4-bank)


The 64-Mbit SDRAM is a high speed CMOS, dynamic random-access memory designed to operate in 3.3 V memory systems containing 67,108,864 bits. it is internally configured as a quad-bank DRAM with a synchronous interface. Each 16,777,216-bit bank is organized as 4,096 rows by 256 columns by 16 bits. The 64-Mbit SDRAM includes an AUTO REFRESH MODE, and a power-saving, power-down mode. All signals are registered on the positive edge of the clock signal, CLK. The STM32F429ZIT6 MCU reads and writes data at 80 MHz.

4.10

JP3 (Idd)
Jumper JP3, labeled Idd, allows the consumption of STM32F429ZIT6 to be measured by removing the jumper and connecting an ammeter. Jumper on: STM32F429ZIT6 is powered (default). Jumper off: an ammeter must be connected to measure the STM32F429ZIT6 current, (if there is no ammeter, the STM32F429ZIT6 is not powered).

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Hardware layout

4.11
4.11.1

OSC clock
OSC clock supply
The following information indicates all configurations for clock supply selection. MCO from ST-LINK (from MCO of the STM32F429ZIT6) This frequency cannot be changed, it is fixed at 8 MHz and connected to PH0-OSC_IN of the STM32F429ZIT6. The configuration needed is: SB18 closed, SB19 open, R56 removed SB20, R57, C20, C21, X3 = don't care

Oscillator onboard (from X3 crystal) For typical frequencies and its capacitors and resistors, please refer to the STM32F429ZIT6 Datasheet. The configuration needed is: SB18, SB19, SB20 open -R56, R57, C20, C21, X3 soldered

Oscillator from external PH0 (from external oscillator through pin 10 of the P2 connector) The configuration needed is: SB19 closed, SB18 open, R56 removed SB20, R57, C20, C21, X3 = don't care

No external oscillator (from Internal oscillator HSI only). PH0 and PH1 can be used as GPIO. The configuration needed is: SB18 open, SB19 closed, SB20 closed, R56 removed, R57 removed C20, C21, X3 = don't care

4.11.2

OSC 32 KHz clock supply


The following information indicates all configurations for the 32 kHz clock supply selection. Oscillator on board (from X2 Crystal, not provided). The configuration needed is: SB16 open, SB17 open. R53, R54, C23, C24, X2 soldered.

Oscillator from external PC14 (from external oscillator through pin 9 of P1 connector) The configuration needed is: SB16 closed, R53 removed SB17, R54, C23, C24, X2 = don't care

No external oscillator (PC14 and PC15 can be used as GPI. The configuration needed is: SB16 closed, SB17 closed, R53 removed, R54 removed. C23, C24, X2 = don't care.

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Hardware layout

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4.12

Solder bridges
Table 5. Solder bridges
Bridge State OFF ON
(1)

Description X3, C20, C21, R56 and R57 provide a clock. PH0, PH1 are disconnected from P2 PH0, PH1 are connected to P2. Remove only R56 and R57 Reserved, do not modify Reserved, do not modify Reserved, do not modify X2, C23, C24, R53 and R54 deliver a 32 KHz clock. PC14, PC15 are not connected to P2 PC14, PC15 are only connected to P2 Remove only R53 and R54 B2 Push Button is connected to NRST of STM32F429ZIT6 B2 Push Button is not connected to NRST of STM32F429ZIT6 B1 Push Button is connected to PA0 B1 Push Button is not connected to PA0 Reserved, do not modify Reserved, do not modify NRST signal of connector CN2 is connected to NRST of STM32F429ZIT6 NRST signal is not connected SWO signal is not connected SWO signal of connector CN3 is connected to PB3 No incidence on NRST signal of STM32F429ZIT6 NRST signal of STM32F429ZIT6 is connected to GND BOOT0 signal of STM32F429ZIT6 is at level "0" through 510 pull-down BOOT0 signal of STM32F429ZIT6 is at level "1" through 10 K pull-up (not provided) PB14 and PB15 are only used for USB OTG and not connected to P2 to avoid noise PB14 and PB15 are connected to P2. MCO signal of STM32F429ZIT6 is not used MCO clock signal from STM32F429ZIT6 is connected to OSC_IN of STM32F429ZIT6

SB19,20 (X3 crystal) SB4,6,8,14 (default) SB3,5,7,13 (reserved) SB22,23,24,25

ON OFF OFF OFF

SB16,17 (X2 crystal) ON SB1 (B2-RESET) ON OFF ON OFF OFF ON ON OFF OFF ON OFF ON ON SB21 (BOOT0) OFF OFF ON OFF SB18 (MCO) ON

SB2 (B1-USER)

SB11,15 (RX,TX)

SB12 (NRST)

SB9 (SWO)

SB10 (STM_RST)

SB26,27 (USB OTG)

1. Default SBx state is shown in bold.

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Hardware layout

4.13

Extension connectors
The male headers P1 and P2 can connect the STM32F429 Discovery board to a standard prototyping/wrapping board. STM32F429ZIT6 GPI/Os are available on these connectors. P1 and P2 can also be probed by an oscilloscope, a logical analyzer or a voltmeter. Table 6. MCU pin description versus board function (page 1 of 7)

MCU pin LCD-RGB LQFP144 LCD-TFT LCD-SPI

Board function Power supply Touch panel Puchbutton

L3GD20

Main function

Free I/O

ACP/RF

SDRAM

System

USB

CN2

CN3

CN6

LED

P1 21 53 52 51 50 49 48

BOOT0

138

BOOT0

RESET

RESET

RESET

NRST

NRST PA0 PA1 PA2 PA3 PA4 PA5 PA6

25 34 35 36

B2

12 18 17 20 19 22 21

VSYNC DB3

37 40 41

DB6

G2

VSYNC

B5

INT2 INT1

B1

42

24 SCL ACP_RST

PA7

43

23

PA8 PA9 PA10 PA11 PA12

100 101 102 DB15 DB14 103 104 SWDIO R4

SCL

R5

PA13

105

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34

P2

Hardware layout Table 6. MCU pin description versus board function (page 2 of 7)
MCU pin LCD-RGB LQFP144 LCD-TFT LCD-SPI Board function Power supply Touch panel Puchbutton

UM1670

L3GD20

Main function

Free I/O

ACP/RF

SDRAM

System

USB

CN2

CN3

CN6

LED

P1 47 46 28 25 26 23 24 19 20

PA14 PA15 PB0 PB1

109 110

SWCLK

2 INT

DB16 DB13

46 47 SWO BOOT1

R3

28 27

R6

PB2

48

30

PB3 PB4 PB5

133 134 135

PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PC0

136 137

SDNE1 SDCKE1

DB9 DB8 DB5 DB4

139 140 69 70 73 74 75 76 26 SDNWE

G4

B7

B6

48 47 DP DM VBUS ID 4 Green 1 2 3 50 49 52(1) 51(2) 14

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G5

DocID025175 Rev 1

P2

UM1670

Hardware layout Table 6. MCU pin description versus board function (page 3 of 7)

MCU pin LCD-RGB LQFP144 LCD-TFT LCD-SPI

Board function Power supply Touch panel Puchbutton

L3GD20

Main function

Free I/O

ACP/RF

SDRAM

System

USB

CN2

CN3

CN6

LED

P1 57 56 55 54 45 44 43 12 9 10 42 41 40 39 38 37

PC1 PC2 PC3 PC4 PC5 PC6

27 CSX CSX CSX 28 29 44 45 DB10 HSYNC 96 HSYNC

CS

13 16 15 QC PSO 26 Red 25

PC7 PC8 PC9 PC10 PC11 PC12 PC13

97 98

G6

SDA

99 DB12 111 112 113 7 OSC32_OUT OSC32_IN R2

SDA

PC14

PC15

PD0 PD1 PD2 PD3 PD4 PD5

114 115 116

D3 D2

DB11

117 118 119

G7

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34

P2

Hardware layout Table 6. MCU pin description versus board function (page 4 of 7)
MCU pin LCD-RGB LQFP144 LCD-TFT LCD-SPI Board function Power supply Touch panel Puchbutton

UM1670

L3GD20

Main function

Free I/O

ACP/RF

SDRAM

System

USB

CN2

CN3

CN6

LED

P1 36 35 17 18 15 16 13 14 11

DB0

PD6 PD7 PD8 PD9 PD10 PD11 PD12 PD13 PD14 PD15 PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7 PE8 PE9 PE10 PE11 PE12 PE13 PE14

122 123 D15 D14 D13 77 78 79 80 81 82 85 86 141 142 1 2 3 4 5 D11 D10 D9 D8 D7 D6 D5 D4 58 59 60 63 64 65 66 67 NBL1 NBL0 D1 D0

B2

54 53 56 WRX RDX TE 55 58 DCX 57 60 59

37 40 39 42 41 44 43 46

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P2

UM1670

Hardware layout Table 6. MCU pin description versus board function (page 5 of 7)

MCU pin LCD-RGB LQFP144 LCD-TFT LCD-SPI

Board function Power supply Touch panel Puchbutton

L3GD20

Main function

Free I/O

ACP/RF

SDRAM

System

USB

CN2

CN3

CN6

LED

P1 7 8 5 6 3 4 62 61

PE15 PF0 PF1 PF2 PF3 PF4 PF5 PF6 PF7 PF8

68 10 11 12 13 14 15 18

A5 A4 A3 A2 A1 A0 D12

45

DCX

19 20

MISO SCK

SCL

SDI/SDO

PF9

21

MOSI

SDA

ENABLE

DE

PF10

22 A11 A10 A9 A8 A7 A6 SDNRAS

PF11 PF12 PF13 PF14 PF15 PG0 PG1 PG2 PG3 PG4 PG5

49 50 53 54 55 56 57 87 88 89 90

32 31 34 33 36 35 38 62 61

BA1 BA0

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34

P2 3 6 5 8 7

Hardware layout Table 6. MCU pin description versus board function (page 6 of 7)
MCU pin LCD-RGB LQFP144 LCD-TFT LCD-SPI Board function Power supply Touch panel Puchbutton

UM1670

L3GD20

Main function

Free I/O

ACP/RF

SDRAM

System

USB

CN2

CN3

CN6

LED

P1 60 59 58 33 34 31 32 29 30 27 22 1 2 63

DOTLCK DB17

PG6

91

PG7

92 SDCLK

PG8 PG9 PG10 PG11 PG12 PG13 PG14

93 124

DB2 DB1 DB7

125 126 127 128 129 SDNCAS

B4

B3

G3

CLK

R7

PG15

132 OSC_OUT OSC_IN

Red Green

PH0

23

10

PH1

24

GND 5 V 5 V 3 V 3 V VDD

11

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P2 9 1 2

UM1670

Hardware layout Table 6. MCU pin description versus board function (page 7 of 7)

MCU pin LCD-RGB LQFP144 LCD-TFT LCD-SPI

Board function GND GND GND Power supply Touch panel Puchbutton

L3GD20

Main function

Free I/O

ACP/RF

SDRAM

System

USB

CN2

CN3

CN6

LED

P1 64

29 63 64

1. If SB27 is On. 2. If SB26 is On.

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P2

Mechanical drawing

UM1670

Mechanical drawing
Figure 9. STM32F429 Discovery board mechanical drawing

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UM1670

U_LCD-24 LCD-24.SchDoc U_SDRAM SDRAM.SchDoc R[0..7] G[0..7] B[0..7] IM[0..3] A[0..11] D[0..15] BA0 BA1 NBL0 NBL1 BA0 BA1 NBL0 NBL1 A[0..11] D[0..15] SDNWE SDNRAS SDNCAS SDCLK SDCKE1 SDNE1 I2C3_SCL I2C3_SDA TP_INT1 SDNE1 NRST SDNWE SDNRAS SDNCAS SDCLK SDCKE1

ST_LINK_V2.SCHDOC U_ST_LINK MCO PA14 PA13 PB3 TCK/SWCLK TMS/SWDIO T_SWO T_NRST NRST

STM32F4_USART1_RX STM32F4_USART1_TX

PA10 PA9

PA10 PA9

MCO PA14 PA13 PB3

NRST

VSYNC CSX HSYNC TE RDX WRX_DCX DCX_SCL SDA ENABLE DOTCLK VSYNC R[0..7] CSX G[0..7] HSYNC B[0..7] TE IM[0..3] RDX WRX_DCX I2C3_SCL DCX_SCL I2C3_SDA SDA TP_INT1 ENABLE DOTCLK NRST

U_USB_OTG_FS USB_OTG_FS.SchDoc U_STM32Fx STM32Fx.SchDoc OTG_FS_OC OTG_FS_PSO PA[0..15] PB[0..15] PC[0..15] PD[0..15] PE[0..15] PF[0..15] PG[0..15] PH[0..2] PA[0..15] PB[0..15] PC[0..15] PD[0..15] PE[0..15] PF[0..15] PG[0..15] PH[0..2] BOOT0 NRST MCO SPI5_SCK SPI5_MOSI SPI5_MISO NCS_MEMS_SPI MEMS_INT2 MEMS_INT1 D[0..15] A[0..11] 3V BOOT0 5V NRST D[0..15] A[0..11] 3V PF6 PF8 PF10 PH1 P2

Electrical schematics

VBUS_FS OTG_FS_DM OTG_FS_DP OTG_FS_ID

VBUS_FS OTG_FS_DM OTG_FS_DP OTG_FS_ID

OTG_FS_OC OTG_FS_PSO

3V

P1

5V

SDCKE1 SDNE1 SDNWE SDNRAS SDNCAS SDCLK NBL0 NBL1 BA0 BA1

SDCKE1 SDNE1 SDNWE SDNRAS SDNCAS SDCLK NBL0 NBL1 BA0 BA1

PC1 PC3 PA1 PA3 PA5 PA7 PC5 PB1

Figure 10. STM32F429 Discovery board


BOOT1 / PB2

DocID025175 Rev 1
VDD PF12 PF14 PG0 PE7 PE9 PE11 PE13 PE15 PB11 PB13 PB15 SB26 PD9 PD11 PD13 PD15 PG3 OTG_FS_ID OTG_FS_DM OTG_FS_DP OTG_FS_PSO OTG_FS_OC VBUS_FS R[0..7] G[0..7] B[0..7] IM[0..3] VSYNC CSX HSYNC TE RDX WRX_DCX DCX_SCL SDA ENABLE DOTCLK ACP_RST I2C3_SCL I2C3_SDA TP_INT1 R[0..7] G[0..7] MCO B[0..7] IM[0..3] SPI5_SCK VSYNC SPI5_MOSI CSX SPI5_MISO HSYNC NCS_MEMS_SPI TE MEMS_INT2 RDX MEMS_INT1 WRX_DCX DCX_SCL OTG_FS_ID SDA OTG_FS_DM ENABLE OTG_FS_DP DOTCLK OTG_FS_PSO OTG_FS_OC ACP_RST VBUS_FS I2C3_SCL I2C3_SDA TP_INT1 U_IO Peripherals IO Peripherals.SchDoc PA0 NRST SPI5_SCK SPI5_MOSI SPI5_MISO NCS_MEMS_SPI MEMS_INT2 MEMS_INT1 PG13 SPI5_SCK PA0 SPI5_MOSI NRST SPI5_MISO NCS_MEMS_SPI ACP_RST MEMS_INT2 I2C3_SCL MEMS_INT1 I2C3_SDA PG13 PG14 ACP_RST I2C3_SCL I2C3_SDA PG14 Title:

5V PF5 PF3 PF1 PC15 PC13 PE5 PE3 PE1 PB9

3V NC PF7 PF9 PH0 NRST PC0 PC2 PA0 PA2 PA4 PA6 PC4 PB0 PB2 PF11 PF13 PF15 PG1 PE8 PE10 PE12 PE14 PB10 PB12 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 Header 32X2 PD8 PD10 PD12 PD14 PG2

PB14 SB27

5V PF4 PF2 PF0 PC14 PE6 PE4 PE2 PE0 PB8 BOOT0 PB6 PB4 PG15 PG13 PG11 PG9 PD7 PD5 PD3 PD1 PC12 PC10 PA14 PA12 PA10 PA8 PC8 PC6 PG7 PG5

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64

PB7 PB5 PB3 PG14 PG12 PG10 PD6 PD4 PD2 PD0 PC11 PA15 PA13 PA11 PA9 PC9 PC7 PG8 PG6 PG4

Rev A.0 --> PCB label MB1075 A-00 Rev B.1 --> PCB label MB1075 B-01, PA8 - I2C3_SCL, PC9 - I2C3_SDA, PG7 - DOTCLK, YU<->YD

Header 32X2

STMicroelectronics
STM32F429I-DISCO
Number:MB1075 Rev: B.1(PCB.SCH) Date: 8/13/2013 Sheet 1 of
7

Electrical schematics

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34

SWIM_IN SWIM

SWIM_IN SWIM_RST SWIM_RST_IN

STM_JTCK

DEFAULT

Not Fitted
48 47 46 45 44 43 42 41 40 39 38 37

3V R14
T_JTCK

CN2 22 SB4 SB6 R15


T_JTMS

RESERVED

VDD_3 VSS_3 PB9 PB8 BOOT0 PB7 PB6 PB5 PB4/JNTRST PB3/JTDO PA15/JTDI JTCK/SWCLK

OSC_IN OSC_OUT STM_RST

STM_JTMS USB_DP USB_DM T_SWO LED_STLINK T_SWO

RC Must be very close to STM32F103 pin 29


R28 100
MCO

MCO

SB10
T_JTMS T_JTCK

C9 100nF R16

3V C18 20pF

CN4

R18

4K7

AIN_1

R19

4K7

1 2 3 4 5 6 7 8 9 10 11 12 3V Header 6 R20 22
T_NRST

VBAT PC13 PC14 PC15 OSCIN OSCOUT NRST VSSA VDDA PA0 PA1 PA2

VDD_2 VSS_2 JTMS/SWDIO PA12 PA11 PA10 PA9 PA8 PB15 PB14 PB13 PB12

36 35 34 33 32 31 30 29 28 27 26 25

Not Fitted

Jumpers ON --> DISCOVERY Selected Jumpers OFF --> ST-LINK Selected

PA9 1K LD2 LED, red

STLINK_RX R4

STM32F4_USART1_TX

SB11

13 14 15 T_JTCK 16 T_JTDO 17 T_JTDI 18 T_NRST T_JRST 19 20 SWIM_IN 21 22 SWIM 23 24

Figure 11. ST-LINK/V2 (SWD only)

DocID025175 Rev 1
PA3 PA4 PA5 PA6 PA7 PB0 PB1 PB2/BOOT1 PB10 PB11 VSS_1 VDD_1
T_SWDIO_IN

STM32F4_USART1_RX

STLINK_TX

100

Wired on Solder Side


LD1 VDD JP1

PA10 3V 3V JP3

Idd

1 2 3 4

28/35
TCK/SWCLK TMS/SWDIO
T_NRST

SWD

R7 100K D1 10K R13 BAT60JFILM [NA] AIN_1 R5

Electrical schematics

10K

R8 SB9

T_SWO

SB12

PA14 PA13 NRST PB3

Board Ident: PC13=0

R6

10K

SWD

SB3
STM_JTCK

U2 STM32F103C8T6 22 SB8 R17 22 SB14

3V

SWCLK
SB5 SB7
STM_JTMS

C17 20pF

C16 20pF

3V

X1

1 2 3 4 5 6

SWDIO
SB13

R21 100K

8MHz

SB15 TX RX

JP4

COM
JP2
LED_STLINK

R2 100 R1 100

Red

3
_Green

4 R3 0 LD_BICOLOR_CMS

3V

Close to JP Not Fitted

Not Fitted

PWR
5V U1 1 C27 100nF C4 100nF C46 100nF C47 100nF
Vin Vout

D3 5 3V

USB ST-LINK
3V U5V

CN1

EXT_5V, Input only

D2

R10 R12 R11 R9

1K5 3V 0 USB_DM 0 USB_DP 100K

3 INH BAT60JFILM C2 C5 GND BYPASS 1F_X5R_0603 1F_X5R_0603 EXT_3V, LD3985M33R C1 C3 C6 100nF 10nF_X7R_0603 100nF

Input only

U5V

5V

BAT60JFILM

VCC DD+ ID GND SHELL

1 2 3 4 5 6

USB-MINI-typeB

STMicroelectronics
Title:

STM32F429I-DISCO ST-LINK/V2 (SWD only)


Number:MB1075 Rev: B.1(PCB.SCH) Date: 8/13/2013 Sheet 2 of
7

UM1670

UM1670

3V R73 620
1

3V U8
2

OTG_FS_PowerSwitchOn 0
USB_Micro-AB receptacle

R71 10K OTG_FS_OverCurrent 0 OTG_FS_OC CN6 C53 4.7uF 1 2 3 4 5 VBUS DM DP ID GND OTG_FS_OC 5V STMPS2141STR 3 1 2 5 4 GND FAULT IN OUT EN

R68 47K LD6 Red R69

OTG_FS_PSO

OTG_FS_PSO R72

6 R64 R63 R67 0 3V R70 330


1

Shield

USB-MICRO-AB 22 22

Vbus D+out D-out Dz Pup GND EMIF02-USB03F2 D2

ID D+in D-in Pd1 Pd2

R65 47K 1 R66 [N/A]

DocID025175 Rev 1
U7 B3 C3 D3 A2 B2 A3 C1 D1 B1 C2 LD5 Green T1 9013-SOT23

Figure 12. USB OTG_FS

VBUS_FS OTG_FS_DM OTG_FS_DP OTG_FS_ID

VBUS_FS OTG_FS_DM OTG_FS_DP OTG_FS_ID

STMicroelectronics
Title:

STM32F429I-DISCO USB_OTG_FS
Number:MB1075 Rev: B.1(PCB.SCH) Date: 8/13/2013

Electrical schematics

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34

C50

C7

C8

C51

C10

C15

100nF

100nF

100nF

100nF

100nF

100nF

Place close SDRAM

100nF

C22

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A[0..11] A[0..11] D[0..15] D[0..15] U6 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 23 24 25 26 29 30 31 32 33 34 22 35 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 BA1 BA0 UDQM LDQM NC NC 52 46 12 6 54 41 28 40 36 CS WE RAS CAS CLK CKE 39 15 NBL1 NBL0 NBL1 NBL0 21 20 19 16 18 17 38 37 49 43 9 3 1 14 27 VDDQ VDDQ VDDQ VDDQ VDD VDD VDD IS42S16400J GNDQ GNDQ GNDQ GNDQ GND GND GND DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 BA1 BA0 SDNE1 SDNWE SDNRAS SDNCAS SDCLK SDCKE1 2 4 5 7 8 10 11 13 42 44 45 47 48 50 51 53 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15

Electrical schematics

BA1 BA0

SDNE1 SDNWE SDNRAS SDNCAS SDCLK SDCKE1

DocID025175 Rev 1
3V 3V Title:

Figure 13. SDRAM 64 Mbits

STMicroelectronics
STM32F429I-DISCO SDRAM 64Mbits
Number:MB1075 Rev: B.1(PCB.SCH) Date: 8/13/2013 Sheet 4

UM1670

UM1670

U5A

PA[0..15] MCO SB18 PH0-OSC_IN SB19 R56 0


2

PA[0..15] MCO

PB[0..15]

PB[0..15]

PC[0..15] PH0

PC[0..15]

PC10 PB0 PA11 PA12 PB1 PG6

R2 R3 R4 R5 R6 R7

PD[0..15]

PD[0..15]

C20 20pF X3 8MHz

PE[0..15] PH1 PH1-OSC_OUT SB20 R57

PE[0..15]

PB5 PB6 PC0 PE0 PE1 PF11 PG4 PG5 PG8 PG15 SDCKE1 SDNE1 SDNWE NBL0 NBL1 SDNRAS BA0 BA1 SDCLK SDNCAS SDCKE1 SDNE1 SDNWE NBL0 NBL1 SDNRAS BA0 BA1 SDCLK SDNCAS 220
1

PF[0..15]

PF[0..15]

PG[0..15]

PG[0..15]

PA6 PG10 PB10 PB11 PC7 PD3

G2 G3 G4 G5 G6 G7

C21 20pF

PH[0..2]

PH[0..2]

PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PD10 PD11 PD12 PD13 PD14 PD15 PD6 PG11 PG12 PA3 PB8 PB9 B2 B3 B4 B5 B6 B7 PC14 SB16 PC14-OSC32_IN PA4 PC2 PC6 PD11 PD12 PD13 PF7 PF9 PF10 PG7 VSYNC CSX HSYNC TE RDX WRX_DCX DCX_SCL SDA ENABLE DOTCLK R53 IM0 IM1 IM2 IM3 SB22 PC15 SB17 PC5 PC4 PB15 PB14 PB13 PB12 OTG_FS_OC OTG_FS_PSO OTG_FS_DP OTG_FS_DM VBUS_FS OTG_FS_ID U5B 33 L1 BEAD C26 1uF C25 1uF R58 VDD 0 C31 100nF C30 100nF 32 VDDA VREF+ VSSA VSS_2 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11
C35 C36 C37 C38 C39 C40 C29 C32 C43 C44 C45 C33 R52

34 35 36 37 40 41 42 43 100 101 102 103 104 105 109 110

D[0..15]

D[0..15]

PA0-WKUP1 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15

114 115 116 117 118 119 122 123 77 78 79 80 81 82 85 86

PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PD10 PD11 PD12 PD13 PD14 PD15

A[0..11]

A[0..11]

VSYNC CSX HSYNC TE RDX WRX_DCX DCX_SCL SDA ENABLE DOTCLK I2C3_SCL I2C3_SDA TP_INT1 ACP_RST I2C3_SCL I2C3_SDA TP_INT1 ACP_RST

0
4 3

R[0..7] PA8 PC9 PA15 PA7

R[0..7] R0 R1

C23 6.8pF X2 MC306-G-06Q-32.768


1

PD2 PD4 SB25 PD5 SB24 PD7 SB23

G[0..7]

G[0..7] G0 G1 OTG_FS_OC OTG_FS_PSO OTG_FS_DP OTG_FS_DM VBUS_FS OTG_FS_ID

PC15-OSC32_OUT

R54

Not Fitted

C24 6.8pF

B[0..7]

B[0..7] B0 B1

PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7 PE8 PE9 PE10 PE11 PE12 PE13 PE14 PE15 141 142 1 2 3 4 5 58 59 60 63 64 65 66 67 68

46 47 48 133 134 135 136 137 139 140 69 70 73 74 75 76

Figure 14. STM32F429ZIT6 MCU

C34

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

PD14 PD15 PD0 PD1 PE7 PE8 PE9 PE10 PE11 PE12 PE13 PE14 PE15 PD8 PD9 PD10 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15

100nF

DocID025175 Rev 1
PF0 PF1 PF2 PF3 PF4 PF5 PF6 PF7 PF8 PF9 PF10 PF11 PF12 PF13 PF14 PF15 10 11 12 13 14 15 18 19 20 21 22 49 50 53 54 55 PF0 PF1 PF2 PF3 PF4 PF5 PF6 PF7 PF8 PF9 PF10 PF11 PF12 PF13 PF14 PF15 C28 1uF PG0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 PG8 PG9 PG10 PG11 PG12 PG13 PG14 PG15 PF0 PF1 PF2 PF3 PF4 PF5 PF12 PF13 PF14 PF15 PG0 PG1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 56 57 87 88 89 90 91 92 93 124 125 126 127 128 129 132 PG0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 PG8 PG9 PG10 PG11 PG12 PG13 PG14 PG15 PF7 PF8 PF9 PC1 PA2 PA1 SPI5_SCK SPI5_MISO SPI5_MOSI NCS_MEMS_SPI MEMS_INT2 MEMS_INT1 SPI5_SCK SPI5_MISO SPI5_MOSI NCS_MEMS_SPI MEMS_INT2 MEMS_INT1 Title:

IM[0..3]

IM[0..3]

PB0 PB1 PB2/BOOT1 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15

PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7 PE8 PE9 PE10 PE11 PE12 PE13 PE14 PE15

31 107 38 16 51 61 83 94 120 130 72 108 144 39 17 52 62 84 95 121 131 30 6 PDR_ON VCAP1 VCAP2 VBAT STM32F429ZIT6 143 71 106 C42 2.2uF C41 2.2uF VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD

PC0 26 PC1 27 PC2 28 PC3 29 PC4 44 PC5 45 PC6 96 PC7 97 PC8 98 PC9 99 PC10 111 PC11 112 PC12 113 PC13 7 PC14-OSC32_IN 8 PC15-OSC32_OUT 9

PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13-WKUP2 PC14-OSC32_IN PC15-OSC32_OUT

PH0-OSC_IN PH1-OSC_OUT

23 24

PH0-OSC_IN PH1-OSC_OUT

NRST BOOT0

NRST BOOT0

25 138

NRST BOOT0

VDD

R59

[N/A]

R61

510

SB21

STMicroelectronics
STM32F429I-DISCO - STM32F429ZIT6 MCU
Number:MB1075 Rev: B.1(PCB.SCH) Date: 8/13/2013 Sheet 5 of
7

Electrical schematics

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STM32F429ZIT6

34

100
4 1

SW-PUSH-CMS_BLUE B1

PA0 SB2 330 R22 220K


3 2 RESET Button

PA0 C12 100nF

R23

3V U3 C48 100nF C19 10nF/25V 10uF C13 PG14 PG13 PG13 R26 510

SW-PUSH-CMS_BLACK B2

USER & WAKE-UP Button

3 2

4 1

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VDD R25

Not Fitted
R24 100K NRST SB1 NRST

VDD

Electrical schematics

C11 100nF

LD3 Green 1 LD4 Red PG14 R27 680 1

DocID025175 Rev 1
1 2 3 4 5 6 7 8 VDD_IO SCL/SPC SDA/SDI/SDO SA0/SDO CS_I2C/SPI DRDY/INT2 INT1 GND L3GD20 VDD VDD C1 GND GND GND GND GND 16 15 14 13 12 11 10 9

Figure 15. Peripherals

SPI5_SCK SPI5_MOSI SPI5_MISO NCS_MEMS_SPI MEMS_INT2 MEMS_INT1

SPI5_SCK SPI5_MOSI SPI5_MISO NCS_MEMS_SPI MEMS_INT2 MEMS_INT1

LEDs

MEMS

ACP/RF E2P Connector


CN3 I2C3_SDA I2C3_SCL 3V 1 3 5 7 SSM-104-L-DH 2 4 6 8 ACP_RST 5V ACP_RST

I2C3_SDA I2C3_SCL

STMicroelectronics
Title:

STM32F429I-DISCO Peripherals
Number:MB1075 Rev: B.1(PCB.SCH) Date: 8/13/2013

UM1670

UM1670

VDD R51 R62 R60 4K7 4K7 4K7 ENABLE DOTCLK HSYNC VSYNC CSX RDX TE 38 35 11 CSX RDX TE WRX/DCX DCX/SCL SDA RESET VCI VDD3 IM0 IM1 IM2 IM3 VDD3_P(nc) BC_CTRL(nc) BC(nc) GND 5 8 9 10 40 41 42 43 IM0 IM1 IM2 IM3 3V R35 R36 R37 R38 [N/A]4K7 4K7 [N/A] 36 37 30 39 6 7 WRX_DCX DCX_SCL SDA NRST 3V C52 100nF R50 R49 R48 R47 0 0 0 0 44 45 46 47 48 LEDA LEDK1 LEDK2 LEDK3 LEDK4 C14 4.7uF NRST

R[0..7]

R[0..7] R0 R1 R55 4K7 CN5 32 ENABLE 31 DOTCLK 33 HSYNC 34 VSYNC

G[0..7]

G[0..7] G0 G1

B[0..7]

B[0..7] B0 B1

IM[0..3]

IM[0..3]

DB0/B0 DB1/B1 DB2/B2 DB3/B3 DB4/B4 DB5/B5 DB6/G0 DB7/G1 DB8/G2 DB9/G3 DB10/G4 DB11/G5 DB12/R0 DB13/R1 DB14/R2 DB15/R3 DB16/R4 DB17/R5

29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12

B2 B3 B4 B5 B6 B7 G2 G3 G4 G5 G6 G7 R2 R3 R4 R5 R6 R7

SPI5_SCK SPI5_MOSI

VSYNC CSX HSYNC TE RDX WRX_DCX DCX_SCL SDA ENABLE DOTCLK YD XL YU XR 3 2 1 4 YD XL YU XR SF-TC240T-9370-T

VSYNC CSX HSYNC TE RDX WRX_DCX DCX_SCL SDA ENABLE DOTCLK

R41 R42 R43 R44 4K7 [N/A][N/A]4K7

DocID025175 Rev 1
3V R45 4K7 YD XL YU XR C49 100nF U4 R31 R39 R40 STMPE811QTR 4K7 [N/A] 0 6 14 10 4 5 2 7 3 VCC Vio GND SCLK SDAT INT Data in A0/Data Out YXY+ X+ IN3 IN2 IN1 IN0 1 16 15 13 12 11 9 8 R46 R34 R33 R32 100K 100K 100K 100K

Figure 16. LCD 2.4


IM[0..3] = 0110 --> 4-wire 8-bit serial I, SDA:In/Out

3V

R29 4K7

R30 4K7

I2C3_SCL I2C3_SDA TP_INT1

I2C3_SCL I2C3_SDA TP_INT1

3V

STMicroelectronics
Title:

Default I2C Address:1000001

STM32F429I-DISCO LCD 2.4"


Number:MB1075 Rev: B.1(PCB.SCH) Date: 8/13/2013 Sheet 7 of

Electrical schematics

33/35

34

Revision history

UM1670

Revision history
Table 7. Document revision history
Date 10-Sep-2013 Revision 1 Initial release. Changes

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DocID025175 Rev 1

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