DATASHEET

Cell Name: NAND2x05

Table1:
ASU ID

Gate

Size

Legs for
NMOS

Legs for
PMOS

120632
1047

NAND2
x05

Schematic:

After Well notch

optimization
NMOS
PMOS
legs
legs
6
7

Total width
of cell

2.28 m

Layout:

Symbol:

DRC:

LVS:

DRC Rings_01 :

DRC Rings_02:

Table 2: For input driver with 0.5x the strength of the standard cell being characterized given an output
load of 1x
tphl
TT

8.07 ps

tplh
13.7 ps

trise
23.9 ps

tfall
22.1 ps

Table 3: For input driver with 1x the strength of the standard cell being characterized given an output
load of 4x
tphl
TT

15.27 ps

tplh
21.79 ps

trise
41.04 ps

tfall
40.60 ps

Table 4:For input driver with 2x the strength of the standard cell being characterized given an output
load of 8x
tphl
TT

24.85 ps

tplh
35.49 ps

trise
68.59 ps

tfall
66.24 ps

APPENDIX
Netlist with NAND2x05, driver and load:
************************************************************************
* auCdl Netlist:
*
* Library Name: EEE525
* Top Cell Name: NAND2x05_tb
* View Name: schematic
* Netlisted on: Jan 31 14:25:20 2014
************************************************************************
*.BIPOLAR
*.RESI = 2000
*.RESVAL
*.CAPVAL
*.DIOPERI
*.DIOAREA
*.EQUATION
*.SCALE METER
*.MEGA
.PARAM
*.GLOBAL gnd!
+
vcc!
*.PIN gnd!
*+ vcc!
************************************************************************
* Library Name: EEE525
* Cell Name: NAND2x05
* View Name: schematic
************************************************************************
.SUBCKT NAND2x05 a b y
.PININFO a:I b:I y:O
MM3 y a vcc! vcc! p105 m=1 w=2.555u l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM0 y b vcc! vcc! p105 m=1 w=2.555u l=30n ad=10.5f as=10.5f pd=310n ps=310n

MM2 net16 b gnd! gnd! n105 m=1 w=4.254u l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM1 y a net16 gnd! n105 m=1 w=4.254u l=30n ad=10.5f as=10.5f pd=310n ps=310n
.ENDS
************************************************************************
* Library Name: EEE525
* Cell Name: NAND2x05_tb
* View Name: schematic
************************************************************************
.SUBCKT NAND2x05_tb in1 in2 out
*.PININFO in1:I in2:I out:O
XI0 net10 net13 net15 / NAND2x05
MM4 out y gnd! gnd! n105 m=1 w=24.72u l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM3 b in2 gnd! gnd! n105 m=1 w=7187.2n l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM0 a in1 gnd! gnd! n105 m=1 w=7187.2n l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM5 out y vcc! vcc! p105 m=1 w=29.68988u l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM2 b in2 vcc! vcc! p105 m=1 w=7424.72n l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM1 a in1 vcc! vcc! p105 m=1 w=7424.72n l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
.ENDS
Testbench:
.TEMP 25
.OPTION
.param pvcc=1.05
.param period=1n
.param tr=30p
.param tf=30p
.param pw='(period/2)-(tr+tf/2)'
.lib'/afs/asu.edu/users/s/p/a/sparamai/525_lab/iPDK/hspice/saed32nm.lib' TT
.include " ./NAND2x05_tb.sp"
.include " ./NAND2x05new.spf"
Vgnd gnd! 0 DC=0
Vvcc vcc! 0 DC=1.05V
vin2 in2 0 DC=0

vin1 in1 0 PULSE (0 1.05 0 tr tf pw period)

X_mynand in1 in2 out NAND2x05_tb
.measure TRAN t_rise TRIG v(X_mynand.y) VAL = '0.1*pvcc' RISE = 3 TARG v(X_mynand.y) VAL
='0.9*pvcc' RISE = 3
.measure TRAN t_fall TRIG v(X_mynand.y) VAL = '0.9*pvcc' FALL = 3 TARG v(X_mynand.y) VAL
='0.1*pvcc' FALL = 3
.measure TRAN tphl TRIG v(X_mynand.a) VAL = '0.5*pvcc' RISE = 3 TARG v(X_mynand.y) VAL =
'0.5*pvcc' FALL = 3
.measure TRAN tplh TRIG v(X_mynand.a) VAL = '0.5*pvcc' FALL = 3 TARG v(X_mynand.y) VAL =
'0.5*pvcc' RISE = 3
.tran 2p 12n Start = 0.0
.probe v(*)
.option post
.end
Output Waveforms and delays:

Tplh and Trise:

Tphl and Tfall:

DATASHEET
Cell Name: PGIx01
Table1:
ASU ID

Gate

Size

Legs for
NMOS

Legs for
PMOS

120632
1047

PGIx01

13

13

After Well notch

optimization
NMOS
PMOS
legs
legs
13
13

Total width
of cell

3.192 m

Schematic:

Layout:

Symbol:

DRC:

LVS:

DRC Rings 01:

DRC Rings 02:

Table 2: For input driver with 0.5x the strength of the standard cell being characterized given an output
load of 1x
output

tphl

tplh

trise

tfall

TT

40.13 ps

32.11 ps

24.37 ps

27.65 ps

TT

17.88 ps

21.44 ps

40.58 ps

33.48 ps

Table 3: For input driver with 1x the strength of the standard cell being characterized given an output
load of 4x
output

tphl

tplh

trise

tfall

TT

41.52 ps

37.35 ps

35.97 ps

36.64 ps

TT

20.38 ps

24.46 ps

51.04 ps

40.26 ps

Table 4:For input driver with 2x the strength of the standard cell being characterized given an output
load of 8x
output

tphl

tplh

trise

tfall

TT

47.09 ps

45.18 ps

54.05 ps

50.36 ps

TT

24.51 ps

32.05 ps

69.16 ps

54.67 ps

APPENDIX
PGIx01 netlist:
************************************************************************
* auCdl Netlist:
*
* Library Name:

EEE525

* Top Cell Name: PGIx01

* View Name:
* Netlisted on:

schematic
Feb 11 00:50:22 2014

************************************************************************

*.BIPOLAR
*.RESI = 2000
*.RESVAL
*.CAPVAL
*.DIOPERI
*.DIOAREA
*.EQUATION
*.SCALE METER
*.MEGA
.PARAM

.GLOBAL vcc!
+

*.PIN vcc!

gnd!

*+

gnd!

************************************************************************
* Library Name: EEE525
* Cell Name:
* View Name:

PGIx01
schematic

************************************************************************

.SUBCKT PGIx01 a b g p
*.PININFO a:I b:I g:O p:O
MM17 g net11 vcc! vcc! p105 m=1 w=504n l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM13 net11 a vcc! vcc! p105 m=1 w=152n l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM12 net11 b vcc! vcc! p105 m=1 w=152n l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM11 net27 b vcc! vcc! p105 m=1 w=252n l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM10 net24 a vcc! vcc! p105 m=1 w=252n l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM3 p b net30 vcc! p105 m=1 w=1.008u l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM2 p a net30 vcc! p105 m=1 w=1.008u l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM1 net30 net27 vcc! vcc! p105 m=1 w=1.008u l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM0 net30 net24 vcc! vcc! p105 m=1 w=1.008u l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM16 g net11 gnd! gnd! n105 m=1 w=420n l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM15 net52 b gnd! gnd! n105 m=1 w=253n l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM14 net11 a net52 gnd! n105 m=1 w=253n l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM9 net24 a gnd! gnd! n105 m=1 w=210n l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM8 net27 b gnd! gnd! n105 m=1 w=210n l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM7 net53 b gnd! gnd! n105 m=1 w=840n l=30n ad=10.5f as=10.5f pd=310n ps=310n

MM6 net54 net24 gnd! gnd! n105 m=1 w=840n l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM5 p a net53 gnd! n105 m=1 w=840n l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM4 p net27 net54 gnd! n105 m=1 w=840n l=30n ad=10.5f as=10.5f pd=310n ps=310n
.ENDS
Testbench netlist with driver and load:
************************************************************************
* auCdl Netlist:
*
* Library Name:

EEE525

* Top Cell Name: PGIx01_TB

* View Name:
* Netlisted on:

schematic
Feb

9 14:57:56 2014

************************************************************************

*.BIPOLAR
*.RESI = 2000
*.RESVAL
*.CAPVAL
*.DIOPERI
*.DIOAREA
*.EQUATION
*.SCALE METER
*.MEGA
.PARAM

.GLOBAL vcc!

gnd!

*.PIN vcc!
*+

gnd!

************************************************************************
* Library Name: EEE525
* Cell Name:
* View Name:

PGIx01
schematic

************************************************************************

* .SUBCKT PGIx01 a b g p
* *.PININFO a:I b:I g:O p:O
* XMM17 g net11 vcc! vcc! p105 m=1 w=504n l=30n ad=10.5f as=10.5f pd=310n ps=310n
* XMM13 net11 a vcc! vcc! p105 m=1 w=151.2n l=30n ad=10.5f as=10.5f pd=310n
* + ps=310n
* XMM12 net11 b vcc! vcc! p105 m=1 w=151.2n l=30n ad=10.5f as=10.5f pd=310n
* + ps=310n
* XMM11 net27 b vcc! vcc! p105 m=1 w=252n l=30n ad=10.5f as=10.5f pd=310n ps=310n
* XMM10 net24 a vcc! vcc! p105 m=1 w=252n l=30n ad=10.5f as=10.5f pd=310n ps=310n
* XMM3 p net27 net30 vcc! p105 m=1 w=1.008u l=30n ad=10.5f as=10.5f pd=310n
* + ps=310n
* XMM2 p net24 net30 vcc! p105 m=1 w=1.008u l=30n ad=10.5f as=10.5f pd=310n
* + ps=310n
* XMM1 net30 b vcc! vcc! p105 m=1 w=1.008u l=30n ad=10.5f as=10.5f pd=310n ps=310n
* XMM0 net30 a vcc! vcc! p105 m=1 w=1.008u l=30n ad=10.5f as=10.5f pd=310n ps=310n
* XMM16 g net11 gnd! gnd! n105 m=1 w=420n l=30n ad=10.5f as=10.5f pd=310n ps=310n

* XMM15 net52 b gnd! gnd! n105 m=1 w=252n l=30n ad=10.5f as=10.5f pd=310n ps=310n
* XMM14 net11 a net52 gnd! n105 m=1 w=252n l=30n ad=10.5f as=10.5f pd=310n ps=310n
* XMM9 net24 a gnd! gnd! n105 m=1 w=210n l=30n ad=10.5f as=10.5f pd=310n ps=310n
* XMM8 net27 b gnd! gnd! n105 m=1 w=210n l=30n ad=10.5f as=10.5f pd=310n ps=310n
* XMM7 net53 b gnd! gnd! n105 m=1 w=840n l=30n ad=10.5f as=10.5f pd=310n ps=310n
* XMM6 net54 net27 gnd! gnd! n105 m=1 w=840n l=30n ad=10.5f as=10.5f pd=310n
* + ps=310n
* XMM5 p a net53 gnd! n105 m=1 w=840n l=30n ad=10.5f as=10.5f pd=310n ps=310n
* XMM4 p net24 net54 gnd! n105 m=1 w=840n l=30n ad=10.5f as=10.5f pd=310n ps=310n
* .ENDS

************************************************************************
* Library Name: EEE525
* Cell Name:
* View Name:

PGIx01_TB
schematic

************************************************************************

.SUBCKT PGIx01_TB in1 in2 out1 out2

*.PININFO in1:I in2:I out1:O out2:O
*XI0 net15 net12 net18 net17 / PGIx01
XI0 b a vcc! gnd! p g PGIx01
XMM6 out2 p vcc! vcc! p105 m=1 w=2.016u l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
XMM4 out1 g vcc! vcc! p105 m=1 w=2.016u l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
XMM1 b in2 vcc! vcc! p105 m=1 w=504n l=30n ad=10.5f as=10.5f pd=310n ps=310n
XMM0 a in1 vcc! vcc! p105 m=1 w=504n l=30n ad=10.5f as=10.5f pd=310n ps=310n

XMM7 out2 p gnd! gnd! n105 m=1 w=1.68u l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
XMM5 out1 g gnd! gnd! n105 m=1 w=1.68u l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
XMM3 a in1 gnd! gnd! n105 m=1 w=420n l=30n ad=10.5f as=10.5f pd=310n ps=310n
XMM2 b in2 gnd! gnd! n105 m=1 w=420n l=30n ad=10.5f as=10.5f pd=310n ps=310n
.ENDS
Testbench for measurements:
.TEMP 25
.OPTION

.param pvcc = 1.05

.param period = 1n
.param tr = 30p
.param tf = 30p
.param pw = '((period/2)-(tr+tf)/2)'

.lib '/afs/asu.edu/users/s/p/a/sparamai/525_lab/iPDK/hspice/saed32nm.lib' TT
.include"./PGIx01_TB.sp"
.include"./PGIx01.spf"
Vgnd gnd! 0 DC = 0
Vvcc vcc! 0 DC = 1.05
X_myPGI in1 in2 out1 out2 PGIx01_TB
Vin1 in1 0 DC= 0
Vin2 in2 0 PULSE(0 1.05 0 tr tf pw period)
.measure TRAN trisep TRIG v(X_myPGI.p) VAL='0.1*pvcc' RISE=3 TARG v(X_myPGI.p)
VAL='0.9*pvcc' RISE=3

.measure TRAN tfallp TRIG v(X_myPGI.p) VAL='0.9*pvcc' FALL=3 TARG v(X_myPGI.p)

VAL='0.1*pvcc' FALL=3
.measure TRAN triseg TRIG v(X_myPGI.g) VAL='0.1*pvcc' RISE=3 TARG v(X_myPGI.g)
VAL='0.9*pvcc' RISE=3
.measure TRAN tfallg TRIG v(X_myPGI.g) VAL='0.9*pvcc' FALL=3 TARG v(X_myPGI.g)
VAL='0.1*pvcc' FALL=3
.measure TRAN tphlp TRIG v(X_myPGI.b) VAL='0.5*pvcc' RISE=3 TARG v(X_myPGI.p)
VAL='0.5*pvcc' FALL=3
.measure TRAN tplhp TRIG v(X_myPGI.b) VAL='0.5*pvcc' FALL=3 TARG v(X_myPGI.p)
VAL='0.5*pvcc' RISE=3
.measure TRAN tphlg TRIG v(X_myPGI.b) VAL='0.5*pvcc' FALL=3 TARG v(X_myPGI.g)
VAL='0.5*pvcc' FALL=3
.measure TRAN tplhg TRIG v(X_myPGI.b) VAL='0.5*pvcc' RISE=3 TARG v(X_myPGI.g)
VAL='0.5*pvcc' RISE=3
.tran 2p 12n Start = 0.0
.probe v(*)
.option post
.end

Output Waveforms and delays:

Rise and fall times:

Tphl and Tplh for output g for 1x drive and 4x load:

Tplh and Tphl for output p for 1x drive and 4x load:

DATASHEET
Cell Name: PGIx01
Table1:
ASU ID

Gate

Size

Legs for
NMOS

Legs for
PMOS

120632
1047

latlfx06

19

19

Schematic:

After Well notch

optimization
NMOS
PMOS
legs
legs
19
19

Total width
of cell

3.8 m

Layout:

Symbol:

DRC:

DRC Rings 01:

DRC Rings 02:

LVS:

LATLF TIMINGS:Timing
Setup time at data rising edge
Setup time at data falling edge
Hold time at Rising and Falling edges of data
D2Q at data falling edge
D2Q at data rising edge
C2Q when data is high
C2Q when data is low

Value
19 ps
30 ps
0 ps
39.426 ps
41.787 ps
58.666 ps
32.411 ps

APPENDIX
latlfx06 netlist:
************************************************************************
* auCdl Netlist:
*
* Library Name:

EEE525

* Top Cell Name: latlf

* View Name:
* Netlisted on:

schematic
Feb 22 21:37:55 2014

************************************************************************

*.BIPOLAR
*.RESI = 2000
*.RESVAL
*.CAPVAL
*.DIOPERI
*.DIOAREA
*.EQUATION
*.SCALE METER
*.MEGA
.PARAM

.GLOBAL vcc!
+

*.PIN vcc!

gnd!

*+

gnd!

************************************************************************
* Library Name: EEE525
* Cell Name:
* View Name:

latlf
schematic

************************************************************************

.SUBCKT latlf D Q clk

*.PININFO D:I clk:I Q:O
MM12 net10 clk vcc! vcc! p105 m=1 w=278n l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM5 net15 net10 net40 vcc! p105 m=1 w=364n l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM4 net40 net21 vcc! vcc! p105 m=1 w=364n l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM3 Q net15 vcc! vcc! p105 m=1 w=3.829u l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM2 net21 net15 vcc! vcc! p105 m=1 w=182n l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM1 net15 clk net42 vcc! p105 m=1 w=2.004u l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM0 net42 D vcc! vcc! p105 m=1 w=2.004u l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM13 net10 clk gnd! gnd! n105 m=1 w=231n l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM11 Q net15 gnd! gnd! n105 m=1 w=3.192u l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM10 net39 net21 gnd! gnd! n105 m=1 w=304n l=30n ad=10.5f as=10.5f pd=310n

+ ps=310n
MM9 net15 clk net39 gnd! n105 m=1 w=304n l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM8 net21 net15 gnd! gnd! n105 m=1 w=152n l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
MM7 net41 D gnd! gnd! n105 m=1 w=1.672u l=30n ad=10.5f as=10.5f pd=310n ps=310n
MM6 net15 net10 net41 gnd! n105 m=1 w=1.672u l=30n ad=10.5f as=10.5f pd=310n
+ ps=310n
.ENDS
Testbench netlist with driver and load:
.TEMP 25
.OPTION

.param pvcc = 1.05

.param period = 1n
.param tr = 30p
.param tf = 30p
.param pw = '((period/2)-(tr+tf)/2)'
*.param period1= 3n
*.param pw1 = '((period1/2)-(tr+tf)/2)'
.lib '/afs/asu.edu/users/s/p/a/sparamai/525_lab/iPDK/hspice/saed32nm.lib' TT
.include"./latlf_tb_netlist.sp"
.include"./latlfx06.spf"
Vgnd gnd! 0 DC = 0
Vvcc vcc! 0 DC = 1.05
X_mylatlf Dn Qn clkn latlf_tb
Vin1 Dn 0 PULSE(0 1.05 r tr tf pw period)

Vin2 clkn 0 PULSE(0 1.05 0 tr tf pw period)

.measure TRAN td2q TRIG v(X_mylatlf.D) VAL = '0.5*pvcc' RISE = 1 TARG v(X_mylatlf.Q) VAL =
'0.5*pvcc' RISE = 1
.tran 2p 12n Start = 0.0 sweep r lin 10 0.98n 0.99n
.probe v(*)
.option captab
.option post
.end

Output Waveforms and delays:

Rise and Fall setup times: Rise setup=19 ps. Falling edge setup time=30 ps.

Hold time: Hold time=0 because even if the data falls at same time as clock, the ouput doesnt change.

D2Q at falling Edge: D2Q at falling edge is 39.426 ps.

D2Q at rising edge: D2Q at rising edge is 41.787 ps.

C2Q when data is high: C2Q delay when data is high is 58.666p

C2Q when data is low: C2Q when data is low is 32.411 ps.