TL084 Datasheet

TL081, TL081A, TL081B, TL082, TL082A, TL082B TL084, TL084A, TL084B
www.ti.com SLOS081H FEBRUARY 1977 REVISED JANUARY 2014
TL08xx JFET-Input Operational Amplifiers

Check for Samples: TL081, TL081A, TL081B, TL082, TL082A, TL082B, TL084, TL084A, TL084B
1
FEATURES
Low Power Consumption: 1.4 mA/ch Typ Wide Common-Mode and Differential Voltage Ranges Low Input Bias Current: 30 pA Typ Low Input Offset Current: 5 pA Typ Output Short-Circuit Protection Low Total Harmonic Distortion: 0.003% Typ High Input Impedance: JFET Input Stage Latch-Up-Free Operation High Slew Rate: 13 V/s Typ Common-Mode Input Voltage Range Includes VCC+
DESCRIPTION
The TL08xx JFET-input operational amplifier family is designed to offer a wider selection than any previously developed operational amplifier family. Each of these JFET-input operational amplifiers incorporates well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset currents, and low offset-voltage temperature coefficient. Offset adjustment and external compensation options are available within the TL08x family. The C-suffix devices are characterized for operation from 0C to 70C. The I-suffix devices are characterized for operation from 40C to 85C. The Q-suffix devices are characterized for operation from 40C to 125C. The M-suffix devices are characterized for operation over the full military temperature range of 55C to 125C.
TL084, TL084A, TL084B D, J, N, NS, OR PW PACKAGE (TOP VIEW)
TL081, TL081A, TL081B D, P, OR PS PACKAGE (TOP VIEW)
TL082, TL082A, TL082B D, JG, P, PS, OR PW PACKAGE (TOP VIEW)
OFFSET N1 IN IN + VCC
1 2 3 4
8 7 6 5
NC VCC + OUT OFFSET N2
1OUT 1IN 1IN + VCC
1 2 3 4
8 7 6 5
VCC + 2OUT 2IN 2IN +
NC No internal connection
1OUT 1IN 1IN + VCC + 2IN + 2IN 2OUT
1 2 3 4 5 6 7
14 13 12 11 10 9 8
4OUT 4IN 4IN + VCC 3IN + 3IN 3OUT
TL082M . . . FK PACKAGE (TOP VIEW)
TL084M . . . FK PACKAGE (TOP VIEW)
NC 1OUT NC VCC+ NC
NC 1IN NC 1IN + NC
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
NC 2OUT NC 2IN NC
1IN + NC VCC + NC 2IN +
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
1IN 1OUT NC 4OUT 4IN

4IN + NC VCC NC 3IN +
Copyright 19772014, Texas Instruments Incorporated
NC VCC NC 2IN + NC
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
2IN 2OUT NC 3OUT 3IN

SLOS081H FEBRUARY 1977 REVISED JANUARY 2014 www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Symbols
TL081 OFFSET N1 IN + IN OFFSET N2 + OUT IN + IN + OUT TL082 (EACH AMPLIFIER) TL084 (EACH AMPLIFIER)
Schematic (Each Amplifier)

VCC +
IN + 64 OUT 128 64 C1
IN
1080 VCC OFFSET N1
1080
OFFSET N2
TL081 Only
Component values shown are nominal.
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Product Folder Links: TL081 TL081A TL081B TL082 TL082A TL082B TL084 TL084A TL084B

Absolute Maximum Ratings (1)

over operating free-air temperature range (unless otherwise noted)
TL08_C TL08_AC TL08_BC VCC+ VCC VID VI Supply voltage (2) Differential input voltage Input voltage (2) (4) Duration of output short circuit (5) Continuous total power dissipation TA Operating free-air temperature range D package (8-pin) D package (14-pin) N package (14-pin) JA Package thermal impedance (6) (7) NS package (14-pin) P package PS package PW package (8 pin) PW package (14 pin) Operating virtual junction temperature TC Case temperature for 60 seconds Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds Tstg Storage temperature range FK package J or JG package 0 to 70 97 86 76 80 85 95 149 113 150 113 150 150 85 95
(3)
TL08_I 18 18 30 15 Unlimited
TL084Q 18 18 30 15 Unlimited
TL08_M 18 18 30 15 Unlimited
UNIT
18 18 30 15 Unlimited
V V V
See Dissipation Rating Table 40 to 85 97 86 76 40 to 125 55 to 125 97 86 80 76 85 95 149 113 150 260 300 65 to 150 65 to 150 65 to 150 65 to 150 C C C C C/W C
(1) (2) (3) (4) (5) (6) (7)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC. Differential voltages are at IN+, with respect to IN. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded. Maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) TA)/JA. Operating at the absolute maximum TJ of 150C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7.
Dissipation Rating Table

PACKAGE D (14 pin) FK J JG TA 25C POWER RATING 680 mW 680 mW 680 mW 680 mW DERATING FACTOR 7.6 mW/C 11.0 mW/C 11.0 mW/C 8.4 mW/C DERATE ABOVE TA 60C 88C 88C 69C TA = 70C POWER RATING 604 m/W 680 m/W 680 m/W 672 m/W TA = 85C POWER RATING 490 mW 680 mW 680 mW 546 mW TA = 125C POWER RATING 186 mW 273 mW 273 mW 210 mW

Electrical Characteristics
VCC = 15 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA (1) MIN VIO Input offset voltage Temperature coefficient of input offset voltage Input offset current (2) Input bias current (2) Commonmode input voltage range Maximum peak output voltage swing Large-signal differential voltage amplification Unity-gain bandwidth Input resistance Commonmode rejection ratio Supplyvoltage rejection ratio (VCC/VIO) Supply current (each amplifier) Crosstalk attenuation VIC = VICRmin, VO = 0, RS = 50 VCC = 15 V to 9 V, VO = 0, RS = 50 VO = 0, No load AVD = 100 RL = 10 k RL 10 k RL 2 k VO = 10 V, RL 2 k VO = 0, RS = 50 VO = 0, RS = 50 25C Full range TL081C TL082C TL084C TYP 3 MAX 15 20 MIN TL081AC TL082AC TL084AC TYP 3 MAX 6 7.5 MIN TL081BC TL082BC TL084BC TYP 2 MAX 3 5 MIN TL081I TL082I TL084I TYP 3 MAX 6 9 mV UNIT
VIO
Full range
18
18
18
18
V/C
IIO IIB
VO = 0 VO = 0
25C Full range 25C Full range 25C 25C Full range 25C Full range 25C 25C 11 12 12 10 25 15
200 2
100 2
100 2
100 10
pA nA pA nA V
30
400 10
30
200 7
30
200 7
30
200 20
VICR
12 to 15 13.5
11 12 12
12 to 15 13.5
11 12 12
12 to 15 13.5
11 12 12
12 to 15 13.5
VOM
V 12 200 V/mV
12 200
10 50 15
12 200
10 50 25
12 200
10 50 25
AVD
B1 ri CMRR
3 1012 70 86 75
3 1012 86 75
3 1012 86 75
3 1012 86
MHz
25C
dB
kSVR
25C
70
86
80
86
80
86
80
86
dB
ICC VO1/VO
2
25C
1.4
2.8
1.4
2.8
1.4
2.8
1.4
2.8
mA
25C
120
120
120
120
dB
(1) (2)
All characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified. Full range for TA is 0C to 70C for TL08_C, TL08_AC, TL08_BC and 40C to 85C for TL08_I. Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 17. Pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.

Electrical Characteristics
VCC = 15 V (unless otherwise noted)
PARAMETER TEST CONDITIONS (1) TA 25C Full range Full range 25C 125C 25C 125C 25C RL = 10 k VOM Maximum peak output voltage swing Large-signal differential voltage amplification Unity-gain bandwidth Input resistance Common-mode rejection ratio VIC = VICRmin, VO = 0, RS = 50 RL 10 k RL 2 k AVD B1 ri CMRR kSVR ICC VO1/VO2 VO = 10 V, RL 2 k 25C Full range 25C Full range 25C 25C 25C 25C 25C 25C 80 80 11 12 12 10 25 15 3 1012 86 86 1.4 120 2.8 80 80 12 200 12 to 15 13.5 30 18 5 100 20 200 50 11 12 to 15 12 12 10 25 15 3 1012 86 86 1.4 120 2.8 12 200 V/mV MHz dB dB mA dB 13.5 V 30 TL081M, TL082M MIN TYP 3 MAX 6 9 18 5 100 20 200 50 TL084Q, TL084M MIN TYP 3 MAX 9 15 UNIT
VIO VIO IIO IIB VICR
Input offset voltage Temperature coefficient of input offset voltage Input offset current (2) Input bias current (2) Common-mode input voltage range
VO = 0, RS = 50 VO = 0, RS = 50 VO = 0 VO = 0
mV V/C pA nA pA nA V
Supply-voltage rejection VCC = 15 V to 9 V, ratio (VCC/VIO) VO = 0, RS = 50 Supply current (each amplifier) Crosstalk attenuation VO = 0, No load AVD = 100
(1) (2)
All characteristics are measured under open-loop conditions, with zero common-mode input voltage, unless otherwise specified. Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 17. Pulse techniques must be used that maintain the junction temperatures as close to the ambient temperature as possible.
Operating Characteristics
VCC = 15 V, TA= 25C (unless otherwise noted)
PARAMETER SR tr Slew rate at unity gain Rise-time overshoot factor Vn In THD (1) Equivalent input noise voltage Equivalent input noise current Total harmonic distortion TEST CONDITIONS VI = 10 V, RL = 2 k, CL = 100 pF, See Figure 1 VI = 10 V, RL = 2 k, CL = 100 pF, TA = 55C to 125C, See Figure 1 VI = 20 V, RL = 2 k, CL = 100 pF, See Figure 1 RS = 20 RS = 20 , f = 1 kHz f = 10 Hz to 10 kHz f = 1 kHz MIN 8 (1) 5 (1) 0.05 20 18 4 0.01 0.003 TYP 13 V/s s % nV/Hz V pA/Hz % MAX UNIT
VIrms = 6 V, AVD = 1, RS 1 k, RL 2 k, f = 1 kHz,
On products compliant to MIL-PRF-38535, this parameter is not production tested.

Parameter Measurement Information

10 k 1 k VI OUT + VI + CL = 100 pF RL = 2 k RL OUT CL = 100 pF
C2 IN + C1 500 pF N2 N1 +
IN
N1 OUT
Figure 3.
Figure 1.
100 k IN
Figure 2.
TL081 OUT
100 k
1.5 k VCC
Figure 4.

Typical Characteristics
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
Table of Graphs
Figure VOM Maximum peak output voltage Large-signal differential voltage amplification Differential voltage amplification PD ICC IIB VO CMRR Vn THD Total power dissipation Supply current Input bias current Large-signal pulse response Output voltage Common-mode rejection ratio Equivalent input noise voltage Total harmonic distortion vs vs vs vs Frequency Free-air temperature Load resistance Supply voltage Figure 5, Figure 6, Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 18 Figure 19 Figure 20 Figure 21 Figure 22
AVD
vs Free-air temperature vs Load resistance vs Frequency with feed-forward compensation vs Free-air temperature vs Free-air temperature vs Supply voltage vs Free-air temperature vs Time vs Elapsed time vs Free-air temperature vs Frequency vs Frequency
MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY

15 VOM VOM Maximum Peak Output Voltage V VCC = 15 V 15 VOM VOM Maximum Peak Output Voltage V RL = 10 k TA = 25C See Figure 2
12.5
10
7.5

VCC = 10 V VCC = 5 V 1k
12.5

VCC = 15 V VCC = 10 V
RL = 2 k TA = 25C See Figure 2
10
7.5
2.5
0 100
10 k 100 k f Frequency Hz Figure 5.
1M
10 M
5 VCC = 5 V 2.5
0 100
1k
10 k 100 k f Frequency Hz Figure 6.
1M
10 M

15 VOM VOM Maximum Peak Output Voltage V
12.5
TA = 25C
V VOM OM Maximum Peak Output Voltage V
10
7.5

TA = 55C TA = 125C

15 VCC = 15 V RL = 2 k See Figure 2
MAXIMUM PEAK OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE
12.5
10

RL = 10 k RL = 2 k
2.5
0 10 k

4M 10 M
7.5
2.5
VCC = 15 V See Figure 2
40 k 100 k 400 k 1 M f Frequency Hz Figure 7.
0 75
50
25
25
50
75
100
125
TA Free-Air Temperature C Figure 8.
MAXIMUM PEAK OUTPUT VOLTAGE vs LOAD RESISTANCE

15 VOM Maximum Peak Output Voltage V VOM VOM VOM Maximum Peak Output Voltage V VCC = 15 V TA = 25C See Figure 2 15
MAXIMUM PEAK OUTPUT VOLTAGE vs SUPPLY VOLTAGE

RL = 10 k TA = 25C
12.5
12.5
10
10
7.5
7.5
2.5
0 0.1
0.2
0.4
0.7 1
7 10
2.5
0 0 2 4 6 8 10 12 14 16 |VCC| Supply Voltage V Figure 10.
RL Load Resistance k Figure 9.

LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE

1000 400 A AVD VD Large-Signal Differential Voltage Amplification V/mV 200 100 40 20 10 4 2 1 75 VCC = 15 V VO = 10 V RL = 2 k 50 25 0 25 50 75 100 125
A AVD VD Large-Signal Differential Voltage Amplification 105 106
LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY

VCC = 5 V to 15 V RL = 2 k TA = 25C 0 45
103
Differential Voltage Amplification
102 Phase Shift
90 135
101
1 1 10
100 1k 10 k 100 k f Frequency Hz
1M
180 10 M
Figure 12.
DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREQUENCY WITH FEED-FORWARD COMPENSATION

106 250 VCC = 15 V C2 = 3 pF TA = 25C See Figure 3 225
TOTAL POWER DISSIPATION vs FREE-AIR TEMPERATURE

VCC = 15 V No Signal No Load
AVD Differential Voltage Amplification V/mV
PD Total Power Dissipation mW
105
200 175 150 125 100 75 50 25 TL081 TL082, TL083 TL084, TL085
104
103
102
10
1 100
1k
10 k
100 k
1M
10 M
0 75
50
25
25
50
75
100
125
f Frequency With Feed-Forward Compensation Hz Figure 13.
Phase Shift
104

SUPPLY CURRENT PER AMPLIFIER vs FREE-AIR TEMPERATURE

2 ICC I CC Supply Current Per Amplifier mA 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 75 50 25 0 25 50 75 100 125 ICC I CC Supply Current Per Amplifier mA VCC = 15 V No Signal No Load 2 1.8 1.6 1.4 1.2 1
SUPPLY CURRENT PER AMPLIFIER vs SUPPLY VOLTAGE

TA = 25C No Signal No Load
0.8 0.6 0.4 0.2 0 0 2 4 6 8 10 12 14 16 |VCC| Supply Voltage V Figure 16.
INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE

V CC = 15 V
VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE

6 VI and VO Input and Output Voltages V VCC = 15 V RL = 2 k CL = 100 pF TA = 25C
100
4 Output 2
I IB Input Bias Current nA
10
0.1

25 0 25 50 75 100 125 TA Free-Air Temperature C Figure 17.

Input 0 0.5 1 1.5 t Time s Figure 18. 2 2.5 3 3.5
0.01 50
10

OUTPUT VOLTAGE vs ELAPSED TIME

28 24
CMRR Common-Mode Rejection Ratio dB
89
COMMON-MODE REJECTION RATIO vs FREE-AIR TEMPERATURE

VCC = 15 V RL = 10 k 88
VO Output Voltage mV
20 16 12 8 4 0 4 0 0.2 0.4 0.6 0.8 1.0 1.2 t Elapsed Time s Figure 19.
87
VCC = 15 V RL = 2 k CL = 100 pF TA = 25C See Figure 1
86
85
84
83 75
50
25
25
50
75
100
125
Vn V nV/ Hz n Equivalent Input Noise Voltage nV/Hz
40
THD Total Harmonic Distortion %
EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY

VCC = 15 V AVD = 10 RS = 20 TA = 25C 1 0.4
TOTAL HARMONIC DISTORTION vs FREQUENCY

VCC = 15 V AVD = 1 VI(RMS) = 6 V TA = 25C
50
0.1 0.04
30
20
0.01 0.004
10
0 10 40 100 400 1 k 4 k 10 k f Frequency Hz Figure 21. 40 k 100 k
0.001 100
400
1k 4 k 10 k f Frequency Hz Figure 22.
40 k 100 k
11

APPLICATION INFORMATION
RF = 100 k
15 V TL081 CF = 3.3 F + 1 k 15 V 3.3 k f= 1 2 RF CF 9.1 k VCC + TL081 + Output VCC R1 = R2 = 2(R3) = 1.5 M C2 C1 = C2 = C3 = 110 pF 2 1 fo = = 1 kHz 2 R1 C1 + + + 3.3 k Output
Figure 23.
Input
R1 C3
R2
R3 C1
Figure 24.
VCC + 1 M VCC + 1 F Input 100 k + TL084 VCC + TL084 100 k 100 k 100 F 100 k VCC + VCC + TL084 Output C Output B TL084 Output A
Figure 25. Audio-Distribution Amplifier
12

6 sin t 18 pF
1N4148 15 V 18 pF 1 k 18 k (see Note A)
VCC + 1/2 TL082 + VCC 1 k 15 V 1N4148 88.4 k 18 k (see Note A) 6 cos t 16 k 220 pF 30 k 43 k VCC + VCC +
1/4 TL084
88.4 k 18 pF
A.
These resistor values may be adjusted for a symmetrical output.
220 pF 43 k VCC +
1/4 TL084
43 k Input
220 pF
1.5 k
VCC
1.5 k VCC
VCC
Output A Output A Output B
2 kHz/div Second-Order Bandpass Filter fo = 100 kHz, Q = 30, GAIN = 4
2 kHz/div Cascaded Bandpass Filter fo = 100 kHz, Q = 69, GAIN = 16
Figure 27. Positive-Feedback Bandpass Filter
1/4 TL084
43 k
43 k
1/2 TL082 + VCC 16 k +
88.4 k
VCC+
Figure 26. 100-KHz Quadrature Oscillator
30 k
VCC +
220 pF
1/4 TL084
43 k
Output B
VCC
13

REVISION HISTORY
Changes from Revision G (September 2004) to Revision H Page
Updated document to new TI datasheet format - no specification changes. ....................................................................... 1 Added ESD warning. ............................................................................................................................................................ 2
14
PACKAGE OPTION ADDENDUM
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24-Jan-2014
PACKAGING INFORMATION
Orderable Device 5962-9851501Q2A Status
(1)
Package Type Package Pins Package Drawing Qty LCCC FK 20 1
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp

(3)
Op Temp (C) -55 to 125
Device Marking
(4/5)
Samples
ACTIVE
TBD
POST-PLATE
N / A for Pkg Type
59629851501Q2A TL082MFKB 9851501QPA TL082M 59629851503Q2A TL084 MFKB 5962-9851503QC A TL084MJB 081AC 081AC 081AC 081AC 081AC 081AC
5962-9851501QPA 5962-9851503Q2A
ACTIVE ACTIVE
CDIP LCCC
JG FK
8 20
1 1
TBD TBD
A42 POST-PLATE
N / A for Pkg Type N / A for Pkg Type
-55 to 125 -55 to 125
5962-9851503QCA
ACTIVE
CDIP
14
TBD
A42
N / A for Pkg Type
-55 to 125
TL081ACD TL081ACDE4 TL081ACDG4 TL081ACDR TL081ACDRE4 TL081ACDRG4 TL081ACJG TL081ACP TL081ACPE4 TL081BCD TL081BCDE4 TL081BCDG4
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
SOIC SOIC SOIC SOIC SOIC SOIC CDIP PDIP PDIP SOIC SOIC SOIC
D D D D D D JG P P D D D
8 8 8 8 8 8 8 8 8 8 8 8
75 75 75 2500 2500 2500
Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Addendum-Page 1
CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU
Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70
50 50 75 75 75
TL081ACP TL081ACP 081BC 081BC 081BC
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Orderable Device TL081BCDR TL081BCDRE4 TL081BCDRG4 TL081BCP TL081BCPE4 TL081CD TL081CDE4 TL081CDG4 TL081CDR TL081CDRE4 TL081CDRG4 TL081CP TL081CPE4 TL081CPSR TL081CPSRE4 TL081CPSRG4 TL081CPWLE TL081ID
Status
(1)
Package Type Package Pins Package Drawing Qty SOIC SOIC SOIC PDIP PDIP SOIC SOIC SOIC SOIC SOIC SOIC PDIP PDIP SO SO SO TSSOP SOIC D D D P P D D D D D D P P PS PS PS PW D 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 75 2500 2500 2500 50 50 75 75 75 2500 2500 2500 50 50 2000 2000 2000
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp

(3)
Op Temp (C) 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 -40 to 85
Device Marking
(4/5)
Samples
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE
Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br)
CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU
Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI Level-1-260C-UNLIM
081BC 081BC 081BC TL081BCP TL081BCP TL081C TL081C TL081C TL081C TL081C TL081C TL081CP TL081CP T081 T081 T081
TL081I
Addendum-Page 2
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Orderable Device TL081IDE4 TL081IDG4 TL081IDR TL081IDRE4 TL081IDRG4 TL081IP TL081IPE4 TL081MFKB TL081MJG TL081MJGB TL082ACD TL082ACDE4 TL082ACDG4 TL082ACDR TL082ACDRE4 TL082ACDRG4 TL082ACP TL082ACPE4 TL082ACPSR
Status
(1)
Package Type Package Pins Package Drawing Qty SOIC SOIC SOIC SOIC SOIC PDIP PDIP LCCC CDIP CDIP SOIC SOIC SOIC SOIC SOIC SOIC PDIP PDIP SO D D D D D P P FK JG JG D D D D D D P P PS 8 8 8 8 8 8 8 20 8 8 8 8 8 8 8 8 8 8 8 75 75 75 2500 2500 2500 50 50 2000 75 75 2500 2500 2500 50 50
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp

(3)
Op Temp (C) -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -55 to 125 -55 to 125 -55 to 125 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70
Device Marking
(4/5)
Samples
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE OBSOLETE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) TBD TBD TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br)
CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI Call TI Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU
Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type Call TI Call TI Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM
TL081I TL081I TL081I TL081I TL081I TL081IP TL081IP
082AC 082AC 082AC 082AC 082AC 082AC TL082ACP TL082ACP T082A
Addendum-Page 3
www.ti.com
24-Jan-2014
Orderable Device TL082ACPSRE4 TL082ACPSRG4 TL082BCD TL082BCDE4 TL082BCDG4 TL082BCDR TL082BCDRE4 TL082BCDRG4 TL082BCP TL082BCPE4 TL082CD TL082CDE4 TL082CDG4 TL082CDR TL082CDRE4 TL082CDRG4 TL082CJG TL082CP
Status
(1)
Package Type Package Pins Package Drawing Qty SO SO SOIC SOIC SOIC SOIC SOIC SOIC PDIP PDIP SOIC SOIC SOIC SOIC SOIC SOIC CDIP PDIP PS PS D D D D D D P P D D D D D D JG P 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 50 2000 2000 75 75 75 2500 2500 2500 50 50 75 75 75 2500 2500 2500
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp

(3)
Op Temp (C) 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70
Device Marking
(4/5)
Samples
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE
Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Pb-Free (RoHS)
CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU
Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI N / A for Pkg Type
T082A T082A 082BC 082BC 082BC 082BC 082BC 082BC TL082BCP TL082BCP TL082C TL082C TL082C TL082C TL082C TL082C
TL082CP
Addendum-Page 4
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24-Jan-2014
Orderable Device TL082CPE4 TL082CPSR TL082CPSRG4 TL082CPW TL082CPWE4 TL082CPWG4 TL082CPWLE TL082CPWR TL082CPWRE4 TL082CPWRG4 TL082ID TL082IDE4 TL082IDG4 TL082IDR TL082IDRE4 TL082IDRG4 TL082IJG TL082IP TL082IPE4
Status
(1)
Package Type Package Pins Package Drawing Qty PDIP SO SO TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP SOIC SOIC SOIC SOIC SOIC SOIC CDIP PDIP PDIP P PS PS PW PW PW PW PW PW PW D D D D D D JG P P 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 50 50 2000 2000 2000 75 75 75 2500 2500 2500 50 2000 2000 150 150 150
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp

(3)
Op Temp (C) 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 T082 T082 T082
Device Marking
(4/5)
Samples
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE
Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Pb-Free (RoHS) Pb-Free (RoHS)
CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU
N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI N / A for Pkg Type N / A for Pkg Type
TL082CP T082 T082 T082 T082 T082
TL082I TL082I TL082I TL082I TL082I TL082I
TL082IP TL082IP
Addendum-Page 5
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24-Jan-2014
Orderable Device TL082IPWR TL082IPWRE4 TL082IPWRG4 TL082MFK TL082MFKB
Status
(1)
Package Type Package Pins Package Drawing Qty TSSOP TSSOP TSSOP LCCC LCCC PW PW PW FK FK 8 8 8 20 20 1 2000 2000 2000
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp

(3)
Op Temp (C) -40 to 85 -40 to 85 -40 to 85 -55 to 125 -55 to 125 Z082 Z082 Z082
Device Marking
(4/5)
Samples
ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE
Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD TBD
CU NIPDAU CU NIPDAU CU NIPDAU Call TI POST-PLATE
Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI N / A for Pkg Type
59629851501Q2A TL082MFKB TL082MJG 9851501QPA TL082M TL084AC TL084AC TL084AC TL084AC TL084AC TL084AC TL084ACN TL084ACN TL084A TL084A TL084A
TL082MJG TL082MJGB TL084ACD TL084ACDE4 TL084ACDG4 TL084ACDR TL084ACDRE4 TL084ACDRG4 TL084ACN TL084ACNE4 TL084ACNSR TL084ACNSRE4 TL084ACNSRG4
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
CDIP CDIP SOIC SOIC SOIC SOIC SOIC SOIC PDIP PDIP SO SO SO
JG JG D D D D D D N N NS NS NS
8 8 14 14 14 14 14 14 14 14 14 14 14
1 1 50 50 50 2500 2500 2500 25 25 2000 2000 2000
TBD TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
A42 A42 CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU
N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
-55 to 125 -55 to 125 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70
Addendum-Page 6
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24-Jan-2014
Orderable Device TL084BCD TL084BCDE4 TL084BCDG4 TL084BCDR TL084BCDRE4 TL084BCDRG4 TL084BCN TL084BCNE4 TL084CD TL084CDE4 TL084CDG4 TL084CDR TL084CDRE4 TL084CDRG4 TL084CJ TL084CN TL084CNE4 TL084CNSLE TL084CNSR
Status
(1)
Package Type Package Pins Package Drawing Qty SOIC SOIC SOIC SOIC SOIC SOIC PDIP PDIP SOIC SOIC SOIC SOIC SOIC SOIC CDIP PDIP PDIP SO SO D D D D D D N N D D D D D D J N N NS NS 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 2000 25 25 50 50 50 2500 2500 2500 25 25 50 50 50 2500 2500 2500
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp

(3)
Op Temp (C) 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70
Device Marking
(4/5)
Samples
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE OBSOLETE ACTIVE
Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Pb-Free (RoHS) Pb-Free (RoHS) TBD Green (RoHS & no Sb/Br)
CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU Call TI CU NIPDAU
Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI N / A for Pkg Type N / A for Pkg Type Call TI Level-1-260C-UNLIM
TL084BC TL084BC TL084BC TL084BC TL084BC TL084BC TL084BCN TL084BCN TL084C TL084C TL084C TL084C TL084C TL084C
TL084CN TL084CN
TL084
Addendum-Page 7
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24-Jan-2014
Orderable Device TL084CNSRG4 TL084CPW TL084CPWE4 TL084CPWG4 TL084CPWLE TL084CPWR TL084CPWRE4 TL084CPWRG4 TL084ID TL084IDE4 TL084IDG4 TL084IDR TL084IDRE4 TL084IDRG4 TL084IJ TL084IN TL084INE4 TL084MFK TL084MFKB
Status
(1)
Package Type Package Pins Package Drawing Qty SO TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP SOIC SOIC SOIC SOIC SOIC SOIC CDIP PDIP PDIP LCCC LCCC NS PW PW PW PW PW PW PW D D D D D D J N N FK FK 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 20 20 25 25 1 1 2000 2000 2000 50 50 50 2500 2500 2500 2000 90 90 90
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp

(3)
Op Temp (C) 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -55 to 125 -55 to 125 T084 T084 T084
Device Marking
(4/5)
Samples
ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE
Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Pb-Free (RoHS) Pb-Free (RoHS) TBD TBD
CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU POST-PLATE POST-PLATE
Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type
TL084 T084 T084 T084
TL084I TL084I TL084I TL084I TL084I TL084I
TL084IN TL084IN TL084MFK 59629851503Q2A
Addendum-Page 8
www.ti.com
24-Jan-2014
Orderable Device
Status
(1)
Package Type Package Pins Package Drawing Qty
Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp

(3)
Op Temp (C)
Device Marking
(4/5)
Samples
TL084 MFKB TL084MJ TL084MJB ACTIVE ACTIVE CDIP CDIP J J 14 14 1 1 TBD TBD A42 A42 N / A for Pkg Type N / A for Pkg Type -55 to 125 -55 to 125 TL084MJ 5962-9851503QC A TL084MJB TL084Q TL084Q TL084Q TL084Q
TL084QD TL084QDG4 TL084QDR TL084QDRG4
ACTIVE ACTIVE ACTIVE ACTIVE
SOIC SOIC SOIC SOIC
D D D D
14 14 14 14
50 50 2500 2500
Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU
Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
-40 to 125 -40 to 125 -40 to 125 -40 to 125
(1)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(4)
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 9
www.ti.com
24-Jan-2014
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TL082, TL082M, TL084, TL084M :
Catalog: TL082, TL084 Automotive: TL082-Q1, TL082-Q1 Military: TL082M, TL084M

NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Military - QML certified for Military and Defense Applications
Addendum-Page 10
PACKAGE MATERIALS INFORMATION

www.ti.com 24-Jan-2014
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins Type Drawing SOIC SOIC SOIC SO SOIC SOIC SOIC SO SOIC SOIC SOIC TSSOP SOIC SOIC TSSOP SOIC SOIC SO D D D PS D D D PS D D D PW D D PW D D NS 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 14 14 14
SPQ
Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 12.4 12.4 12.4 16.4 12.4 12.4 12.4 16.4 12.4 12.4 12.4 12.4 12.4 12.4 12.4 16.4 16.4 16.4 6.4 6.4 6.4 8.2 6.4 6.4 6.4 8.2 6.4 6.4 6.4 7.0 6.4 6.4 7.0 6.5 6.5 8.2
B0 (mm) 5.2 5.2 5.2 6.6 5.2 5.2 5.2 6.6 5.2 5.2 5.2 3.6 5.2 5.2 3.6 9.0 9.0 10.5
K0 (mm) 2.1 2.1 2.1 2.5 2.1 2.1 2.1 2.5 2.1 2.1 2.1 1.6 2.1 2.1 1.6 2.1 2.1 2.5
P1 (mm) 8.0 8.0 8.0 12.0 8.0 8.0 8.0 12.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0 12.0
W Pin1 (mm) Quadrant 12.0 12.0 12.0 16.0 12.0 12.0 12.0 16.0 12.0 12.0 12.0 12.0 12.0 12.0 12.0 16.0 16.0 16.0 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1
TL081ACDR TL081BCDR TL081CDR TL081CPSR TL081IDR TL082ACDR TL082ACDR TL082ACPSR TL082BCDR TL082CDR TL082CDR TL082CPWR TL082IDR TL082IDR TL082IPWR TL084ACDR TL084ACDR TL084ACNSR
2500 2500 2500 2000 2500 2500 2500 2000 2500 2500 2500 2000 2500 2500 2000 2500 2500 2000
Pack Materials-Page 1

Device
Package Package Pins Type Drawing SOIC SOIC SOIC TSSOP SOIC SOIC SOIC D D D PW D D D 14 14 14 14 14 14 14
SPQ
Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 330.0 330.0 330.0 330.0 330.0 330.0 16.4 16.4 16.4 12.4 16.4 16.4 16.4 6.5 6.5 6.5 6.9 6.5 6.5 6.5
B0 (mm) 9.0 9.0 9.0 5.6 9.0 9.0 9.0
K0 (mm) 2.1 2.1 2.1 1.6 2.1 2.1 2.1
P1 (mm) 8.0 8.0 8.0 8.0 8.0 8.0 8.0
W Pin1 (mm) Quadrant 16.0 16.0 16.0 12.0 16.0 16.0 16.0 Q1 Q1 Q1 Q1 Q1 Q1 Q1
TL084BCDR TL084CDR TL084CDRG4 TL084CPWR TL084IDR TL084QDR TL084QDRG4
2500 2500 2500 2000 2500 2500 2500
*All dimensions are nominal
Device TL081ACDR TL081BCDR TL081CDR TL081CPSR TL081IDR TL082ACDR TL082ACDR TL082ACPSR TL082BCDR TL082CDR
Package Type SOIC SOIC SOIC SO SOIC SOIC SOIC SO SOIC SOIC
Package Drawing D D D PS D D D PS D D
Pins 8 8 8 8 8 8 8 8 8 8
SPQ 2500 2500 2500 2000 2500 2500 2500 2000 2500 2500
Length (mm) 340.5 340.5 340.5 367.0 340.5 367.0 340.5 367.0 340.5 340.5
Width (mm) 338.1 338.1 338.1 367.0 338.1 367.0 338.1 367.0 338.1 338.1
Height (mm) 20.6 20.6 20.6 38.0 20.6 35.0 20.6 38.0 20.6 20.6

Device TL082CDR TL082CPWR TL082IDR TL082IDR TL082IPWR TL084ACDR TL084ACDR TL084ACNSR TL084BCDR TL084CDR TL084CDRG4 TL084CPWR TL084IDR TL084QDR TL084QDRG4
Package Type SOIC TSSOP SOIC SOIC TSSOP SOIC SOIC SO SOIC SOIC SOIC TSSOP SOIC SOIC SOIC
Package Drawing D PW D D PW D D NS D D D PW D D D
Pins 8 8 8 8 8 14 14 14 14 14 14 14 14 14 14
SPQ 2500 2000 2500 2500 2000 2500 2500 2000 2500 2500 2500 2000 2500 2500 2500
Length (mm) 367.0 367.0 340.5 367.0 367.0 367.0 333.2 367.0 333.2 333.2 333.2 367.0 333.2 367.0 367.0
Width (mm) 367.0 367.0 338.1 367.0 367.0 367.0 345.9 367.0 345.9 345.9 345.9 367.0 345.9 367.0 367.0
Height (mm) 35.0 35.0 20.6 35.0 35.0 38.0 28.6 38.0 28.6 28.6 28.6 35.0 28.6 38.0 38.0
MECHANICAL DATA
MCER001A JANUARY 1995 REVISED JANUARY 1997
JG (R-GDIP-T8)
0.400 (10,16) 0.355 (9,00) 8 5
CERAMIC DUAL-IN-LINE
0.280 (7,11) 0.245 (6,22)
4 0.065 (1,65) 0.045 (1,14)
0.063 (1,60) 0.015 (0,38)
0.020 (0,51) MIN
0.310 (7,87) 0.290 (7,37)
0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN
0.023 (0,58) 0.015 (0,38) 0.100 (2,54) 0.014 (0,36) 0.008 (0,20)
015
4040107/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification. Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
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TL084 Datasheet

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TL084 Datasheet

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TL081, TL081A, TL081B, TL082, TL082A, TL082B TL084, TL084A, TL084B

www.ti.com SLOS081H FEBRUARY 1977 REVISED JANUARY 2014

TL08xx JFET-Input Operational Amplifiers

TL081, TL081A, TL081B D, P, OR PS PACKAGE (TOP VIEW)

TL082, TL082A, TL082B D, JG, P, PS, OR PW PACKAGE (TOP VIEW)

NC VCC + OUT OFFSET N2

1OUT 1IN 1IN + VCC

VCC + 2OUT 2IN 2IN +

1OUT 1IN 1IN + VCC + 2IN + 2IN 2OUT

4OUT 4IN 4IN + VCC 3IN + 3IN 3OUT

TL082M . . . FK PACKAGE (TOP VIEW)

TL084M . . . FK PACKAGE (TOP VIEW)

1IN + NC VCC + NC 2IN +

1IN 1OUT NC 4OUT 4IN

2IN 2OUT NC 3OUT 3IN

TL081, TL081A, TL081B, TL082, TL082A, TL082B TL084, TL084A, TL084B

Schematic (Each Amplifier)

1080 VCC OFFSET N1

Component values shown are nominal.

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TL081, TL081A, TL081B, TL082, TL082A, TL082B TL084, TL084A, TL084B

Absolute Maximum Ratings (1)

(1) (2) (3) (4) (5) (6) (7)

Dissipation Rating Table

Copyright 19772014, Texas Instruments Incorporated

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TL081, TL081A, TL081B, TL082, TL082A, TL082B TL084, TL084A, TL084B

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TL081, TL081A, TL081B, TL082, TL082A, TL082B TL084, TL084A, TL084B

VIO VIO IIO IIB VICR

VIrms = 6 V, AVD = 1, RS 1 k, RL 2 k, f = 1 kHz,

On products compliant to MIL-PRF-38535, this parameter is not production tested.

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TL081, TL081A, TL081B, TL082, TL082A, TL082B TL084, TL084A, TL084B

Parameter Measurement Information

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TL081, TL081A, TL081B, TL082, TL082A, TL082B TL084, TL084A, TL084B

MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY

MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY

RL = 2 k TA = 25C See Figure 2

10 k 100 k f Frequency Hz Figure 5.

10 k 100 k f Frequency Hz Figure 6.

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TL081, TL081A, TL081B, TL082, TL082A, TL082B TL084, TL084A, TL084B

15 VOM VOM Maximum Peak Output Voltage V

V VOM OM Maximum Peak Output Voltage V

MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY

MAXIMUM PEAK OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE

VCC = 15 V See Figure 2

40 k 100 k 400 k 1 M f Frequency Hz Figure 7.

TA Free-Air Temperature C Figure 8.

MAXIMUM PEAK OUTPUT VOLTAGE vs LOAD RESISTANCE

MAXIMUM PEAK OUTPUT VOLTAGE vs SUPPLY VOLTAGE

0 0 2 4 6 8 10 12 14 16 |VCC| Supply Voltage V Figure 10.

RL Load Resistance k Figure 9.

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TL081, TL081A, TL081B, TL082, TL082A, TL082B TL084, TL084A, TL084B