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Line harmonics on systems using reduced DC-link

capacitors
Hernan Miranda Delpino and Dinesh Kumar
Danfoss Power Electronics A/S
Ulsns 1, Gr sten, Denmark
a

AbstractAs in all industrial sectors, drives for AC motors


are constantly pushed for improvement. Drives using a reduced
capacitance for DC-link ltering have gather attention in recent
years as a way not only to increase the drives life-time but
also to improve the line harmonics while, due to the increased
computing capabilities, maintaining a reasonably good torque
control performance.
Several publications indicate that a drive using reduced DClink capacitance improves the line current and voltage harmonics.
This article will demonstrate that this is not necessarily true when
a large number of drives is used. Systems requiring several drives
(such as any normal industrial installation) will not only not see
any harmonic benet but the total harmonic distortion will be
worse than the one obtained with standard DC-link capacitors
drives.
The demonstration will be done through equations, simulation
of an industrial installation and experimental results using ve
9 [kW] drives running in parallel.
Index TermsPower electronics converters, power conversion
harmonics, power conversion, reduced DC-link

I. I NTRODUCTION
Power electronics are a core component of most manufacturing processes, they are involved in areas such as motion control, refrigeration, heating, ventilation, among others. The most
common power electronics device is a diode bridge rectier
tied to a three-phase inverter through a DC-link capacitor. A
regular industrial facility may have around a hundred of these
drives. This is why researchers are continuously looking for
improvements in terms of robustness, dynamic performance,
life-time, etc. One particular aspect of interest for this kind of
drives is the use of a large DC-capacitor to obtain a constant
DC-link voltage.
The available literature indicates that a reduction on the DClink capacitance value has benecial aspects such as increased
life-time, less power losses, volume reduction and better grid
performance due to lower current harmonic content [1], [2].
On the downside, a reduced DC-link capacitor affects the drive
stability margin when it comes to handle constant power loads
(negative resistance loads). Most research available is regarded
to increase the stability of the system [3]-[5] taking for granted
that the line harmonics are effectively reduced.
Based on the existing literature and the clear indications
that line harmonics are reduced by use of a reduced DC-link
capacitor a study was perform to assess the harmonics of
an industrial size installation. The installation was simulated

using Saber and the harmonics compared to standard DClink capacitors drives. The results of the comparison were
surprising since not only the reduced DC-capacitor did not
improve the system harmonics, but it actually made them
signicantly higher.
This article provides the simulation results comparing the
system harmonics produced by reduced and standard DC-link
capacitor drives. A theoretical explanation is provided on why
the line harmonic prole changes as the number of drives
connected increases. Experimental results are provided where
it is shown that already for a number of drives as little as
ve the harmonics pattern experiences drastic changes. The
harmonic pattern obtain for ve drives running in parallel
resembles the harmonics of a standard DC-link capacitor
drives. This leads to the conclusion that line harmonics in
large installations are not improved by use of reduced DC-link
capacitance.
II. S YSTEM DESCRIPTION
The system under study is composed of an arbitrary number
of drives connected in parallel to the same point of common
coupling (PCC). This is the primary side of a properly sized
step-down transformer. The drives are characterized by having
a diode bridge rectier at the line side, a reduced DC-link
capacitor and a standard two-level inverter on the motor side.
The drives can be loaded differently with output powers
ranging from 0 to 7.5 [kW].
The system impedance under consideration are the transformer impedance and the grid impedance. The primary side
voltage is rated at 3.3 [kV] and the secondary side voltage at
440 [V]. The system frequency is 60 [Hz]. The grid inductance
is 53.8 H, the transformer inductance 22.8 H and a threephase 230 H inductive lter has also been included to reduce
harmonics (these inductance values are 4.7%, 2% and 20 %
of the base impedance respectively).
Figure 1 shows a diagram of the system to be studied. An
total number Nd = 60 drives are connected in parallel to the
secondary side of the step-down transformer. The DC-link
capacitance of each drive is Cdc . The capacitance value of
a standard drive is Cdc = 500F, while a reduced DC cap
drive will have Cdc = 30F. The transformer will be modelled
as ideal, with no magnetic saturation and having a series
impedance Lt . The grid is modeled as an ideal three-phase
voltage source Vg and a line inductance of Lg . The inductive
lter impedance is named L f .

Table I: Working point for each group


Total drives: 60 total power 140.3 kW

Lg

Cdc
Nd
Cdc

Power [kW]
3.8
5.0
7.5
6.5
6.7
5,8

Nr. Drives
3
4
3
2
3
2

Power [kW]
1.6
1.1
1.0
0.4
0.9
0.3

of

drives.

Nr. Drives
9
11
9
2
3
4

Cdc

Voltage harmonics p.u.

Figure 1: System diagram

Standard DC cap -- THDv = 4.344%


Reduced DC cap -- THDv = 5.378%

0.04

0.02

10

15

20
25
30
Harmonic order

35

40

45

50

Current harmonics p.u.

(a) Voltage harmonics


Standard DC cap -- THDi = 50.780%
Reduced DC cap -- THDi = 65.66%

0.6
0.4
0.2
0

10

15

20
25
30
Harmonic order

35

40

45

50

(b) Current harmonics

Figure 2: Simulation results: System harmonics.

The drives can independently operate at any motoring


condition with output power between 0 to 7.5 [kW]. This will
allow to test the system performance at partial load conditions,
where it has been reported that reduced DC-link capacitance
has better harmonic performance [6].
III. L ARGE SYSTEM SIMULATION
A simulation with a large number of drives connected in
parallel to the same PCC has been made using Saber . The
total number of drives simulated is 60, with operating points
as indicated in table I. A special emphasis has been given to
drives operating in partial load conditions because it is where
the reduced DC capacitance drives are supposed to present a
much better harmonic performance than the standard drives.
In order to simplify the simulation and reduce the execution
time, it has been assumed that the drives are connected to the
PCC through a short cable making its impedance negligible.
The current and voltage harmonics in the primary side of stepdown transformer are logged and compared to a similar system
using standard DC-capacitor drives. The results are shown in
g. 2.

The primary side voltage harmonics are shown in g. 2(a).


The harmonic values are given in p.u. (fundamental component
equal to 1, out of scope of the gure). It is clear from the plot
that the system running reduced DC capacitance drives present
higher voltage harmonics. In fact, the voltage total harmonic
distortion (THDv) is 5.378%, against a 4.344% when using
standard capacitance drives. The THDv result is however not
unexpected since in the literature only current distortion is
mentioned as an advantage of reduced DC capacitance drives.
Since in theory reduced DC cap drives present lower current
harmonics but at higher frequencies, the voltage distortion
should be more or less comparable between standard and
reduced DC cap drives.
The reviewed literature indicates that reduced DC capacitance drives present lower current harmonics than their standard drives counterpart. However, the simulation results shown
in g. 2(b) indicate that the current distortion is worse when
using reduced DC cap drives. In fact, the current THD (THDi)
is 1.3 times higher than the harmonics produced by standard
drives. The simulated THDi for standard drives is 50.780%
and 65.66% for reduced DC capacitor drives. Furthermore, not
only the harmonics are higher but the spectrum shape is not
the one that is reported in literature. It is supposed that reduced
DC cap drives present low 5th and 7th harmonics and higher
harmonic current in the range of the 23rd to 35th harmonics.
The simulation results show that the harmonic patterns for
both standard and reduced capacitance drives are very similar.
IV. I MPEDANCE ANALYSIS
The unexpected results obtained from the large system
simulation indicating that the harmonic performance of reduced DC-capacitor drives is actually worse than standard DCcapacitor drives prompted a further analysis.
The harmonic current improvement that results of a reduced
DC-capacitance value is obtained because the characteristic
harmonics are shifted from the 5th and 7th when using a
standard drive [7], to higher frequencies. In a diode bridge
rectier the harmonics are produced by the natural commutation of the bridge diodes. An analysis of the rectier between
commutations shows that the input admittance Yin as seen from
the grid is given by (1).
1

jCdc
=
(1)
1
1 22 LgCdc
2 jLg +
jCdc
The system presents a resonance at a frequency r =
1/ 2LgCdc where it is expected that the current and voltage
Yin =

1 drive
10 drives

20

Lg

30 drives
60 drives
100 drives

10

Nd

Admittance [dB]

0
-10
-20

-30
-40

-50

10

100

1000
Frequency [Hz]

10000

(a) System impedance with drives using reduced DC-capacitance


Cdc = 30F, Lg = 1mH, R = 100m

Lg

1 drive
10 drives

20

Nd Cdc

30 drives
60 drives
100 drives

10

harmonics will have a higher value. In the case of a standard


drive, this resonance is located at a frequency well below the
5th harmonic so the harmonics present a declining amplitude
as the frequency increases. On the other, a reduced DCcapacitance moves the resonance to higher frequencies and
as a result, the harmonic magnitudes are reduced.
When connecting Nd drives in parallel, the impedance
between commutations is as shown in g. 3. It is possible
to represent the Nd parallel drives by the parallel impedance
value, i.e. a capacitor with value Cp = Nd Cdc
The system admittance as seen from the PCC is then given
by (2).
Yin =

jNd Cdc
1 22 Lg Nd Cdc

(2)

The resonance frequency of a system with Nd parallel drives


is now given by (3). As the number of drives increases the
resonance frequency decreases.
res =

1
2LgCdc Nd

(3)

The system admittance for various number of parallel drives


is shown in g. 4. It is clear how disregarding the DCcapacitance value, resonance frequency is reduced by
the
the same factor 1/ Nd , the difference in absolute terms is
however signicant. From this fact it is possible to assume
that the connection of a large number of standard drives will

0
Admittance [dB]

Figure 3: Equivalent system for a total of Nd drive connected


to the PCC, the darker lines indicate how the impedances are
connected within a commutation period.

-10
-20
-30
-40
-50

10

100

1000
Frequency [Hz]

10000

(b) System impedance with drives using standard DC-capacitance


Cdc = 600F, Lg = 1mH, R = 100m

Figure 4: System admittance variation with the number of


parallel drives.

not have a big impact in the harmonics behavior. When it


comes to the reduced DC-capacitance drives the connection of
several drives will clearly affect the harmonics pattern. When
comparing the admittances for each case shown in g. 4(a)
(reduced DC-cap) and 4(b) it can be seen that the harmonics
pattern of 10 parallel reduced DC capacitance should have a
pattern similar to a single standard drive.
From the admittance analysis it should also be possible
to predict the harmonics behavior. A higher admittance at a
specic frequency should result in a higher magnitude of the
corresponding harmonic. In this way, a system composed of
10 standard drives should have a better harmonic performance
than a system with 10 drives using reduced DC-capacitance
value since the admittance for the latter is always higher at

20

Lf
Cdc

Iload

total current A

Lg

10
0
-10
-20
-30 0

Figure 5: Single drive diagram including a three-phase inductor lter, the darker path indicates how the impedances are
connected within a commutation period.

A. Harmonic mitigation
An immediate reaction to solve harmonic problems is to add
a passive element that will lter the harmonics by increasing
the series or reducing the parallel impedances. The rst
alternative is normally realized by the introduction of a series
inductor. The second alternative is done in its simplest form by
adding a parallel capacitor. Of these two, the inductor solution
is usually preferred because it does not present the resonance
issue that appear with the use of capacitors.
Let us consider that in order to reduce the harmonics
produced by use of reduced DC-capacitance drives an inductor
L f is placed in front of each diode bridge rectier as shown in
g. 5. Using an choke inductor after the diode bridge is also
a good option, but for the analysis performed here, these two
solutions can be considered equivalent.
A series inductor has an impedance jL f that provides a
high impedance path to current harmonics. This impedance
will also reduce the voltage harmonics by a ratio close to
L f /Lg because it acts as a tension divider with the grid
impedance. It is expected then that the system harmonics will
be reduced with the use of this lter.
Let us analyze the inductance lter performance when used
in a system with Nd parallel drives. The admittance of a single
drive as seen from the grid will be given now by (4).
Yin =

1
1
2 jLg + 2 jL f +
jCdc

jCdc
(4)
1 22 (Lg + L f )Cdc

By following the same procedure as before, the system


admittance as seen from the PCC will be given by (5). Here, as
the drives are connecter in parallel, the equivalent inductance
lter impedance is divided by the number of drives and the
equivalent capacitance is multiplied by the same factor. This
leads to a much reduced inductance characteristic.
1
jNd Cdc
=
2 jL f
1
1 2 (Lg Nd + L f )Cdc
+
2 jLg +
Nd
Nd jCdc
(5)
The system resonance frequency is now given by (6).
Comparing with the resonance frequency in (3) (when not
Yin =

0.01

0.015

0.02
time s

0.025

0.03

0.035

(a) Current waveform


Harmonic current p.u.

the relevant frequencies (5th , 7th , 11th and so on).

0.005

0.3
0.2
0.1
0

500

1000

1500
2000
Frequency [Hz]

2500

(b) Current spectrum

Figure
6:
Experimental
result:
Single
drive
Ptotal = 5.8kW ,
Lg = 158H,
L f = 0,
Cdc = 30F,
fres = 1.635 kHz (theoretical)
using an inductor lter) we can see that for a sufciently large
number of drives, the resonance frequency, thus the voltage
and current harmonic patterns, will be almost the same.
res =

1
Lf
2 Lg +
Nd

(6)
Cdc Nd

This all means that a series inductor will not provide any
improvement to the harmonic performance in large systems
and we will only be left with the inductors size, power loss
and cost on the downside.
V. E XPERIMENTAL VERIFICATION
In order to verify that the admittance analysis is capable of
predicting the harmonics behavior thus supporting our statements on reduced DC-capacitance providing a worse system
harmonic performance than standard drives (as opposed to
the reviewed literature) a laboratory test was performed. Due
to practical limitations the total number of drives running in
parallel was reduced to 5, three of them working at a maximum
of 9kW, the other two at a maximum of 6kW.
The drives are connected in parallel to a 50Hz, 400Vrms grid,
with an estimated inductance of 30H. To model the stepdown transformer impedance, the drives have been connected
to a series inductance of 128H. This makes the total grid
impedance Lg = 158H.
The operation of a single drive with load power of 5.8kW
is shown in g. 6. The current waveform in 6(a) has the

50

total current A

total current A

50
0
-50
-100 0

0.005

0.01

0.015

0.02
time s

0.025

0.03

0.035

0
-50
-100

0.005

0.3
0.2
0.1
0

500

1000

1500
2000
Frequency [Hz]

0.015

0.02
time s

0.025

0.03

0.035

(a) Current waveform


Harmonic current p.u.

Harmonic current p.u.

(a) Current waveform

0.01

2500

0.3
0.2
0.1
0

500

1000

1500
2000
Frequency [Hz]

2500

(b) Current spectrum

(b) Current spectrum

Figure 7: Experimental result: 5 parallel drives Ptotal = 38kW ,


Lg = 158H,
L f = 0,
Cdc = 30F,
fres = 731 Hz (theoretical)

Figure 8: Experimental result: 5 parallel drives Ptotal = 39kW ,


Lg = 542H,
L f = 0,
Cdc = 30F,
fres = 395 Hz (theoretical)

characteristic decaying ripple of a reduced DC-capacitance


drive. It can be seen that after a commutation the current rises
fast exciting the resonance between the grid inductance Lg and
the DC-link capacitor Cdc .
The current spectrum in g. 6(b)presents as expected the
usual harmonics:5th , 7th , 11th , etc. with decaying magnitude.
It is relevant however, that around 32nd harmonic, the current
components become higher again. This indicates that there
is a resonance in the system. The resonance frequency using
eq. (3) using Nd = 1, Lg = 180H and Cdc = 30F equal to
r = 160Hz. This value is marked in the gure with a vertical
dashed line. It is clear that the theoretical resonance frequency
matches with the current harmonic behavior.
When connecting the other 4 drives it is expected that the
harmonics will present a signicantly different behavior. The
theoretical resonance frequency in this case can be calculated
using Nd = 5, Lg = 180H and Cdc = 30F and the result is
equal to r = 790Hz.
Figure 7 presents the results for this case. The current
waveform as shown in g. 6(a) is certainly different to the
single drive case shown in g. 6(a). It can be seen that
oscillations following the commutations are damped faster
now, also the frequency appears to be reduced.
The current harmonics in g. 7(b) present a signicant
change. The system resonance frequency, indicated by the
dashed line, is located low enough to make the 11th and 13th
current harmonics as high as the 5th and 7th . We can see that
the system harmonic characteristics start to look more similar
to a standard DC-capacitance drive.

The values used to model the grid and step-down transformer in the previous have a rather low per unit impedance,
the transformer impedance is 1% and the grid impedance 0.2%
of the base impedance (using as base the maximum system
power, 5 drives consuming 40kVA). To study the effect of a
higher inductance, representing a weaker grid a test was made
using a series inductance inductance of 524H. The results
are shown in g. 8.
It can be seen in g. 8(a) that the current presents hardly
any resonance after the commutation takes place. The current
spectrum in g. 8(b) strongly resembles the one of a drive
equipped with standard DC-capacitance value. This means
that for a weaker system the harmonic advantages of a
reduced DC-capacitance value are already lost and that the
strongest harmonic components are the 5th and 7th , resembling
a standard drive harmonic pattern.
The previous results come from tests where three of the
drives run at full capacity and two drives run at 5 kW (around
55% power load). A test with only three drives running full
load was done to test the effect on harmonics, the results are
shown in g. 9. It can be seen that the harmonic content is
even higher than in the case of ve drives with two running at
a reduced load shown in g. 7. This indicates that the reduced
DC capacitance drives do have better harmonic performance
when running on partial loads, since the harmonics, specially
the 5th harmonic, are certainly reduced (in per unit).

total current A

50
0
-50
-100

0.005

0.01

0.015

0.02
time s

0.025

0.03

0.035

Harmonic current p.u.

(a) Current waveform

0.3
0.2
0.1
0

500

1000

1500
2000
Frequency [Hz]

2500

(b) Current spectrum

Figure 9: Experimental result: 3 parallel drives Ptotal = 27kW ,


Lg = 158H,
L f = 0,
Cdc = 30F,
fres = 944 Hz (theoretical)
VI. C ONCLUSIONS
The harmonics of a system composed of several parallel
drives using reduced DC-capacitance value have been simulated. The resulting harmonic pattern present higher harmonics
than expected in fact, simulations indicate that contrary to
reported results for single drives, the harmonics in a large
system are lower when standard drives are used.
A method to analyze the problem based on the system
impedance has been used. The method indicates that the more
drives are connected in parallel, the more the system resembles
a large capacitor connected in series to the grid impedance.
This fact makes the use of reduced DC-link capacitance useless. It has been explained that the use of passive components
to lter harmonics, such as DC-chokes or series three-phase
inductors, are useless to reduce the harmonics (unless they
take extraordinary large values) because the inductance value
is divided due to the parallel connection by the number of
parallel drives.
Experimental results have been provided that support the
theory stated above: reduced DC-link capacitance drives
present the same behavior as a standard drive when several
drives are connected in parallel thus, the use of reduced DClink capacitance drives is not useful to reduce large system
harmonics.
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