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SPRING 2014, ASSIGNMENT

PROGRAM BSC IT
SEMESTER I
SUBJECT CODE & NAME - BT0064, LOGIC DESIGN
CREDIT 4
BK ID B0948
MAXIMUM MARKS 60
1. Convert each of the following hexadecimal numbers to binary, octal, and decimal formats.
(5+5 = 10)
i) (4FB2)16
Binary

: (100111110110010) 00010110

Octal

: (47662) 26

Decimal

: (20402) 22

ii) (DC4)16
Binary

:( 110111000100) 00010110

Octal

:( 6704)26

Decimal

: (3524)22

2. Construct the following gates using NAND (4x 2 = 10)


a) AND
Ans:

b) NOR
Ans :

c) XOR
Ans :

d) XNOR
Ans:

3. Expand the following Boolean functions into their canonical form: (5+5 = 10)

Ans:
xy+yz+Xz+XY
00+00+10+11
0+0+1+1
0+1
0
0+0=0
0+1=0

and

1+0=0
1+1=1
0*0=0

or

0*1=1
1*0=1
1*1=1
2) Let us suppose
x=0 y=0 z=0
Ans: xy+XY+Xyz
00+11+100
0+1+1
0+1
0
0+0=0

and

0+1=0
1+0=0
1+1=1
0*0=0

or

0*1=1
1*0=1
1*1=1
4. Simplify the following Boolean function:
F = AC + AB + ABC + BC, using K-map? 10 marks
Ans: The 3-variable K- map is an array of eight cells. as shown in Fig.below A. In this case, A,
B, and C are used for the variables although other letters could be used. Binary values of A and
B are along the left side (notice the sequence) and the values of C are across the top. The value
of a given cell is the binary values of A and B at the left in the same row combined with the
value of C at the top in the same column. For example, the cell in the upper left corner has a
binary value of 000 and the cell in the lower right corner has a binary value of 101. Fig. below B
shows the standard product terms that are represented by each cell in the K- map.

5. What are sequential circuits? Explain differences between sequential circuits and
combinational circuits. (4+6 = 10)
Ans: A combinational circuit neither contains a periodic clock signal nor has any provisions for
storage. There are no feedbacks involved and the output at all time is dependent on the inputs
provided. The name combinational is derived from the combinations of logic gates used for such
circuits.
A sequential circuit involves feedback and has memory (so it is employed for designing RAM).
It also has a periodic clock signal and hence the output is also a function of time in addition to
being a function of inputs and previous outputs. The name sequential is derived as the output is
produced in sequences as the clock circuit enables and disables the functioning. (A latch is also a
sequential circuit but has no clock signal and hence is a special case. It is also the basic building
block of any sequential circuit.)
Combinational Circuit does not depend on the previous and next state inputs but this seqential
circuit are dependent on those factors, sequential circuit uses Flipflops.. but combi dont.Clock
pulse transition plays a dominant role in sequential cicuit.

6. What are shift registers? Explain serial in serial out shift register. (4+6 = 10)
Ans: In digital circuits, a shift register is a cascade of flip flops, sharing the same clock, in which
the output of each flip-flop is connected to the "data" input of the next flip-flop in the chain,
resulting in a circuit that shifts by one position the "bit array" stored in it, shifting in the data
present at its input and shifting out the last bit in the array, at each transition of the clock input.
More generally, a shift register may be multidimensional, such that its "data in" and stage outputs
are themselves bit arrays: this is implemented simply by running several shift registers of the
same bit-length in parallel.
Shift registers can have both parallel and serial inputs and outputs. These are often
configured as serial-in, parallel-out (SIPO) or as parallel-in, serial-out (PISO). There are also
types that have both serial and parallel input and types with serial and parallel output. There are
also bi-directional shift registers which allow shifting in both directions: LR or RL. The
serial input and last output of a shift register can also be connected to create a circular shift
register.
Serial-in and serial-out (SISO)
These are the simplest kind of shift registers. The data string is presented at 'Data In', and is
shifted right one stage each time 'Data Advance' is brought high. At each advance, the bit on the
far left (i.e. 'Data In') is shifted into the first flip-flop's output. The bit on the far right (i.e. 'Data
Out') is shifted out and lost.
The data are stored after each flip-flop on the 'Q' output, so there are four storage 'slots' available
in this arrangement, hence it is a 4-Bit Register. To give an idea of the shifting pattern, imagine
that the register holds 0000 (so all storage slots are empty). As 'Data In' presents 1,0,1,1,0,0,0,0
(in that order, with a pulse at 'Data Advance' each timethis is called clocking or strobing) to
the register, this is the result. The left hand column corresponds to the left-most flip-flop's output
pin, and so on.
So the serial output of the entire register is 10110000. It can be seen that if data were to
be continued to input, it would get exactly what was put in, but offset by four 'Data Advance'

cycles. This arrangement is the hardware equivalent of a queue. Also, at any time, the whole
register can be set to zero by bringing the reset (R) pins high.
This arrangement performs destructive readout - each datum is lost once it has been
shifted out of the right-most bit.
0
1
0
1
1
0
0
0
0

0
0
1
0
1
1
0
0
0

0
0
0
1
0
1
1
0
0

0
0
0
0
1
0
1
1
0

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