CSC-121 Breaker Protection IED Technical Application Manual - V1.01

CSC-121
Breaker Protection IED

Technical Application Manual

2

VersionV1.01
Doc. Code: 0SF.455.058 (E)
Issued Date2012.8
Copyright owner: Beijing Sifang Automation Co., Ltd

Note: the company keeps the right to perfect the instruction. If equipments do not
agree with the instruction at anywhere, please contact our company in time. We will
provide you with corresponding service.

is registered trademark of Beijing Sifang Automation Co., Ltd.

We reserve all rights to this document, even in the event that a patent is issued and a different
commercial proprietary right is registered. Improper use, in particular reproduction and
dissemination to third parties, is not permitted.

This document has been carefully checked. If the user nevertheless detects any errors, he is
asked to notify us as soon as possible.

The data contained in this manual is intended solely for the IED description and is not to be
deemed to be a statement of guaranteed properties. In the interests of our customers, we
constantly seek to ensure that our products are developed to the latest technological standards
as a result it is possible that there may be some differences between the hardware/software
product and this information product.

Manufacturer:
Beijing Sifang Automation Co., Ltd.

Tel: +86 10 62962554, +86 10 62961515 ext. 8998
Fax: +86 10 82783625
Email: sf_sales@sf-auto.com
Website: http://www.sf-auto.com
Add: No.9, Shangdi 4th Street, Haidian District, Beijing, P.R.C.100085

Preface
Purpose of this manual
This manual describes the functions, operation, installation, and placing into
service of IED CSC-121. In particular, one will find:
Information on how to configure the IED scope and a description of the
IED functions and setting options;
Instructions for mounting and commissioning;
Compilation of the technical specifications;
A compilation of the most significant data for experienced users in the
Appendix.
Target Audience
Protection engineers, commissioning engineers, personnel concerned with
adjustment, checking, and service of selective protective equipment,
automatic and control facilities, and personnel of electrical facilities and power
plants.
Applicability of this Manual
This manual is valid for SIFANG Breaker Protection IED CSC-121; firmware
version V1.00 and higher
Indication of Conformity
Additional Support
In case of further questions concerning IED CSC-121 system, please contact
SIFANG representative.
Safety information
Strictly follow the company and international safety regulations.
Working in a high voltage environment requires serious approch to
aviod human injuries and damage to equipment

4
Do not touch any circuitry during operation. Potentially lethal
voltages and currents are present
Avoid to touching the circuitry when covers are removed. The IED
contains electirc circuits which can be damaged if exposed to static
electricity. Lethal high voltage circuits are also exposed when covers
are removed
Using the isolated test pins when measuring signals in open circuitry.
Potentially lethal voltages and currents are present
Never connect or disconnect wire and/or connector to or from IED
during normal operation. Dangerous voltages and currents are
present. Operation may be interrupted and IED and measuring
circuitry may be damaged
Always connect the IED to protective earth regardless of the
operating conditions. Operating the IED without proper earthing may
damage both IED and measuring circuitry and may cause injuries in
case of an accident.
Do not disconnect the secondary connection of current transformer
without short-circuiting the transformers secondary winding.
Operating a current transformer with the secondary winding open will
cause a high voltage that may damage the transformer and may
cause injuries to humans.
Do not remove the screw from a powered IED or from an IED
connected to power circuitry. Potentially lethal voltages and currents
are present
Using the certified conductive bags to transport PCBs (modules).
Handling modules with a conductive wrist strap connected to
protective earth and on an antistatic surface. Electrostatic discharge
may cause damage to the module due to electronic circuits are
sensitive to this phenomenon

Do not connect live wires to the IED, internal circuitry may be
damaged
When replacing modules using a conductive wrist strap connected to
protective earth. Electrostatic discharge may damage the modules
and IED circuitry
When installing and commissioning, take care to avoid electrical
shock if accessing wiring and connection IEDs
Changing the setting value group will inevitably change the IEDs
operation. Be careful and check regulations before making the
change

6
Contents
Chapter 1 Introduction ................................................................................................................. 1
1 Overview ................................................................................................................................... 2
2 Features .................................................................................................................................... 3
3 Functions ................................................................................................................................... 5
3.1 Protection functions ..................................................................................................... 5
3.2 Monitoring functions ................................................................................................... 6
3.3 Station communication ................................................................................................ 6
3.4 IED software tools ....................................................................................................... 6
Chapter 2 General IED application .............................................................................................. 9
1 Display information ................................................................................................................ 10
1.1 LCD screen display function ..................................................................................... 10
1.2 Analog display function ............................................................................................ 10
1.3 Report display function ............................................................................................. 10
1.4 Menu dispaly function ............................................................................................... 10
2 Report record ...........................................................................................................................11
3 Disturbance recorder ............................................................................................................. 12
3.1 Introduction ............................................................................................................... 12
3.2 Setting ........................................................................................................................ 12
4 Self supervision function ....................................................................................................... 14
4.1 Introduction ............................................................................................................... 14
4.2 Self supervision principle .......................................................................................... 14
4.3 Self supervision report ............................................................................................... 14
5 Time synchronization ............................................................................................................. 16
5.1 Introduction ............................................................................................................... 16
5.2 Synchronization principle .......................................................................................... 16
5.2.1 Synchronization from IRIG ....................................................................................... 17
5.2.2 Synchronization via PPS or PPM .............................................................................. 17
5.2.3 Synchronization via SNTP ........................................................................................ 17
6 Setting ...................................................................................................................................... 18
6.1 Introduction ............................................................................................................... 18
6.2 Operation principle .................................................................................................... 18
7 Authorization ........................................................................................................................... 19
7.1 Introduction ............................................................................................................... 19
Chapter 3 Overcurrent protection .............................................................................................. 21
1 Overcurrent protection .......................................................................................................... 22
1.1 Introduction ............................................................................................................... 22
1.2 Protection principle ................................................................................................... 22
1.2.1 Time characteristic .......................................................................................... 22
1.2.2 Inrush restraint feature ................................................................................... 23
1.2.3 Direciton determination feature ..................................................................... 24
1.2.4 Logic diagram .................................................................................................. 25
1.3 Input and output signals ............................................................................................ 26

1.4 Setting parameters ..................................................................................................... 27
1.4.1 Setting list ......................................................................................................... 27
1.5 Reports ...................................................................................................................... 29
1.6 Technical data............................................................................................................ 29
Chapter 4 Earth fault protection ................................................................................................. 31
1 Earth fault protection ............................................................................................................. 32
1.1 Introduction ............................................................................................................... 32
1.2.3 Direction determination feature ..................................................................... 34
1.2.4 Logic diagram .................................................................................................. 36
1.4.1 Setting lists ....................................................................................................... 40
1.5 Reports ...................................................................................................................... 42
1.6 Technical data............................................................................................................ 42
Chapter 5 Neutral earth fault protection .................................................................................... 45
1 Neutral earth fault protection ................................................................................................ 46
1.1 Introduction ............................................................................................................... 46
1.2.3 Direction determination .................................................................................. 48
1.2.4 Logic diagram .................................................................................................. 49
1.4.1 Setting lists ....................................................................................................... 50
1.5 Reports ...................................................................................................................... 51
1.6 Technical data............................................................................................................ 51
Chapter 6 Sensitive earth fault protection .................................................................................. 55
1 Sensitive earth fault protection ............................................................................................ 56
1.1 Introduction ............................................................................................................... 56
1.2.2 Direction determination feature ..................................................................... 57
1.2.3 Logic diagram .................................................................................................. 60
1.4.1 Setting list ......................................................................................................... 62
1.5 IED report .................................................................................................................. 64
1.6 Technical data............................................................................................................ 64
Chapter 7 Negative sequence overcurrent protection ................................................................ 67
1 Negative sequence overcurrent protection ........................................................................ 68

8
1.1 Introduction ............................................................................................................... 68
1.2.1 Protection function description ...................................................................... 68
1.2.2 Logic diagram .................................................................................................. 69
1.4.1 Setting lists ....................................................................................................... 71
1.5 Reports ...................................................................................................................... 72
1.6 Technical data............................................................................................................ 72
Chapter 8 Thermal overload protection ..................................................................................... 75
1 Thermal overload protection ................................................................................................ 76
1.1 Introduction ............................................................................................................... 76
1.2 Function principle...................................................................................................... 76
1.2.1 Function description ........................................................................................ 76
1.4.1 Setting lists ....................................................................................................... 78
1.5 Reports ...................................................................................................................... 79
1.6 Technical data............................................................................................................ 79
Chapter 9 Overload protection ................................................................................................... 81
1 Overload protection ............................................................................................................... 82
1.1.1 Function description ........................................................................................ 82
1.1.2 Logic diagram .................................................................................................. 82
1.3.1 Setting lists ....................................................................................................... 83
1.4 Reports ...................................................................................................................... 83
Chapter 10 Overvoltage protection .............................................................................................. 85
1 Overvoltage protection .......................................................................................................... 86
1.1 Introduction ............................................................................................................... 86
1.2.1 Phase to phase overvoltage protection ....................................................... 86
1.2.2 Phase to earth overvlotage protection ......................................................... 86
1.2.3 Logic diagram .................................................................................................. 87
1.4.1 Setting lists ....................................................................................................... 88
1.5 Reports ...................................................................................................................... 88
1.6 Technical data............................................................................................................ 89
Chapter 11 Undervoltage protection ............................................................................................ 91
1 Undervoltage protection ........................................................................................................ 92
1.1 Introduction ............................................................................................................... 92

1.2.1 Phase to phase underovltage protection ..................................................... 92
1.2.2 Phase to earth undervoltage protection ....................................................... 93
1.2.3 Depending on the VT location ....................................................................... 93
1.2.4 Logic diagram .................................................................................................. 94
1.4.1 Setting lists ....................................................................................................... 97
1.5 Reports ...................................................................................................................... 97
1.6 Technical data............................................................................................................ 98
Chapter 12 Displacement voltage protection ............................................................................... 99
1 Displacement voltage protection ....................................................................................... 100
1.1 Introduction ............................................................................................................. 100
1.2 Protection principle ................................................................................................. 100
1.2.1 Function description ...................................................................................... 100
1.2.2 Logic diagram ................................................................................................ 101
1.3 Input and output signals .......................................................................................... 101
1.4 Setting parameters ................................................................................................... 102
1.4.1 Setting lists ..................................................................................................... 102
1.5 Reports .................................................................................................................... 103
1.6 Technical data.......................................................................................................... 103
Chapter 13 Circuit breaker failure protection ............................................................................ 105
1 Circuit breaker failure protection ........................................................................................ 106
1.1 Introduction ............................................................................................................. 106
1.2 Function Description ............................................................................................... 107
1.2.1 Current criterion evaluation ......................................................................... 107
1.2.2 Circuit breaker auxiliary contact evaluation .............................................. 107
1.2.3 Logic diagram ................................................................................................ 108
1.3 Input and output signals ...........................................................................................113
1.4 Setting parameters ....................................................................................................114
1.4.1 Setting lists ......................................................................................................114
1.5 Reports .....................................................................................................................115
1.6 Technical data...........................................................................................................115
Chapter 14 Dead zone protection ................................................................................................117
1 Dead zone protection ...........................................................................................................118
1.1 Introduction ..............................................................................................................118
1.2 Protection principle ..................................................................................................118
1.2.1 Function description .......................................................................................118
1.2.2 Logic diagram ................................................................................................ 121
1.4.1 Setting lists ..................................................................................................... 123
1.5 Reports .................................................................................................................... 123
1.6 Technical data.......................................................................................................... 124
Chapter 15 STUB protection...................................................................................................... 125

10
1 STUB protection ................................................................................................................... 126
1.1 Introduction ............................................................................................................. 126
1.2.2 Logic diagram ................................................................................................ 127
1.4.1 Setting lists ..................................................................................................... 128
1.5 Reports .................................................................................................................... 128
1.6 Technical data.......................................................................................................... 128
Chapter 16 Poles discordance protection ................................................................................... 131
1 Poles discordance protection ............................................................................................. 132
1.1 Introdcution ............................................................................................................. 132
1.2.2 Logic diagram ................................................................................................ 132
1.4.1 Setting lists ..................................................................................................... 134
1.5 Reports .................................................................................................................... 135
1.6 Technical data.......................................................................................................... 135
Chapter 17 Synchro-check and energizing check function ........................................................ 137
1 Synchro-check and energizing check function ................................................................ 138
1.1 Introduction ............................................................................................................. 138
1.2 Function principle.................................................................................................... 138
1.2.1 Synchro-check mode .................................................................................... 138
1.2.2 Energizing check mode ................................................................................ 139
1.2.3 Override mode ............................................................................................... 140
1.2.4 Logic diagram ................................................................................................ 140
1.4.1 Setting lists ..................................................................................................... 142
1.5 Reports .................................................................................................................... 143
1.6 Technical data.......................................................................................................... 143
Chapter 18 Auto-reclosing function ........................................................................................... 145
1 Auto- reclosing...................................................................................................................... 146
1.1 Introduction ............................................................................................................. 146
1.2.1 Single-shot reclosing .................................................................................... 146
1.2.2 Multi-shot reclosing ....................................................................................... 148
1.2.3 AR coordination between tie CB and side CB .......................................... 150
1.2.4 Auto-reclosing operation mode ................................................................... 156
1.2.5 Auto-reclosing initiation ................................................................................ 157
1.2.6 Cooperating with external protection IED .................................................. 157

1.2.7 Auto-reclosing logic ...................................................................................... 157
1.2.8 AR blocked conditions .................................................................................. 159
1.2.9 Logic diagram ................................................................................................ 160
1.4.1 Setting lists ..................................................................................................... 164
1.5 Reports .................................................................................................................... 165
1.6 Technical data.......................................................................................................... 166
Chapter 19 Secondary system supervision ................................................................................. 168
1 Current circuit supervision .................................................................................................. 169
1.1 Function description ................................................................................................ 169
1.3.1 Setting lists ..................................................................................................... 170
1.4 Reports .................................................................................................................... 170
2 Fuse failure supervision ...................................................................................................... 171
2.1 Introduction ............................................................................................................. 171
2.2.1 Three phases (symmetrical) VT Fail .......................................................... 171
2.2.2 Single/two phases (asymmetrical) VT Fail ................................................ 172
2.2.3 Logic diagram ................................................................................................ 172
2.4.1 Setting list ....................................................................................................... 174
2.5 Reports .................................................................................................................... 175
2.6 Technical data.......................................................................................................... 175
Chapter 20 Monitoring ............................................................................................................... 176
1 Synchro-check reference voltage supervision ................................................................. 177
2 Check auxiliary contact of circuit breaker......................................................................... 177
Chapter 21 Station communication ............................................................................................ 178
1 Overview ............................................................................................................................... 179
1.1 Protocol ................................................................................................................... 179
1.1.1 IEC61850-8 communication protocol ......................................................... 179
1.1.2 IEC60870-5-103 communication protocol ................................................. 179
1.2 Communication port ................................................................................................ 180
1.2.1 Front communication port ............................................................................ 180
1.2.2 RS485 communication ports ....................................................................... 180
1.2.3 Ethernet communication ports .................................................................... 180
1.3 Technical data.......................................................................................................... 180
1.4 Typical substation communication scheme ............................................................. 183
1.5 Typical time synchronizing scheme ........................................................................ 183
Chapter 22 Hardware ................................................................................................................. 186
1 Introduction ........................................................................................................................... 187
1.1 IED structure ........................................................................................................... 187

12
1.2 IED module arrangement ........................................................................................ 187
2 Local human-machine interface ........................................................................................ 188
2.1 Introduction ............................................................................................................. 188
2.2 Liquid crystal display (LCD) .................................................................................. 189
2.3 LED ......................................................................................................................... 189
2.4 Keyboard ................................................................................................................. 190
2.5 IED menu ................................................................................................................ 191
2.5.1 Menu construction ......................................................................................... 191
2.5.2 Operation status ............................................................................................ 193
2.5.3 Reports search .............................................................................................. 194
2.5.4 Set time ........................................................................................................... 194
2.5.5 Contrast .......................................................................................................... 195
2.5.6 Settings ........................................................................................................... 195
2.5.7 IED setting ...................................................................................................... 195
2.5.8 Test binary output .......................................................................................... 196
2.5.9 Testing operation ........................................................................................... 196
3 Analog input module ............................................................................................................ 197
3.1 Introduction ............................................................................................................. 197
3.2 Terminals of analog input module ........................................................................... 197
3.3 Technical data.......................................................................................................... 200
4 Communication module ...................................................................................................... 201
4.1 Introduction ............................................................................................................. 201
4.2 Terminals of Communication module ..................................................................... 201
4.3 Substaion communication port ................................................................................ 202
4.3.3 Ethernet communication ports .................................................................... 202
4.3.4 Time synchronization port ............................................................................ 203
4.4 Technical data.......................................................................................................... 203
5 Binary input module ............................................................................................................. 205
5.1 Introduction ............................................................................................................. 205
5.2 Terminals of Binary Input Module .......................................................................... 205
5.3 Technical data.......................................................................................................... 206
6 Binary output module .......................................................................................................... 208
6.1 Introduction ............................................................................................................. 208
6.2 Terminals of Binary Output Module ....................................................................... 208
6.3 Technical data.......................................................................................................... 213
7 Power supply module .......................................................................................................... 214
7.1 Introduction ............................................................................................................. 214
7.2 Terminals of Power Supply Module........................................................................ 214
7.3 Technical data.......................................................................................................... 216
8 Techinical data ..................................................................................................................... 217
8.1 Type tests ................................................................................................................. 217
8.1.1 Product safety-related tests ......................................................................... 217

8.1.2 Electromagnetic immunity tests .................................................................. 218
8.1.3 DC voltage interruption test ......................................................................... 220
8.1.4 Electromagnetic emission test .................................................................... 220
8.1.5 Mechanical tests ............................................................................................ 220
8.1.6 Climatic tests .................................................................................................. 221
8.2 CE Certificate .......................................................................................................... 222
8.3 IED design ............................................................................................................... 222
Chapter 23 Appendix ................................................................................................................. 224
1 General setting list ............................................................................................................... 225
1.1 Function setting list ................................................................................................. 225
1.2 Binary setting list..................................................................................................... 230
2 General report list ................................................................................................................ 238
3 Typical connection ............................................................................................................... 244
4 Time inverse characteristic ................................................................................................. 247
4.1 11 kinds of IEC and ANSI inverse time characteristic curves ................................ 247
4.2 User defined characteristic ...................................................................................... 247
4.3 Typical inverse curves ............................................................................................. 248
5 CT requirement .................................................................................................................... 261
5.1 Overview ................................................................................................................. 261
5.2 Current transformer classification ........................................................................... 261
5.3 Abbreviations (according to IEC 60044-1, -6, as defined)...................................... 262
5.4 General current transformer requirements ............................................................... 263
5.4.1 Protective checking current ......................................................................... 263
5.4.2 CT class .......................................................................................................... 264
5.4.3 Accuracy class ............................................................................................... 265
5.4.4 Ratio of CT ..................................................................................................... 265
5.4.5 Rated secondary current .............................................................................. 266
5.4.6 Secondary burden ......................................................................................... 266
5.5 Rated equivalent secondary e.m.f requirements ...................................................... 267
5.5.1 Line differential protection ............................................................................ 267
5.5.2 Transformer differential protection .............................................................. 268
5.5.3 Busbar differential protection ....................................................................... 269
5.5.4 Distance protection ....................................................................................... 269
5.5.5 Definite time overcurrent protection and earth fault protection .............. 270
5.5.6 Inverse time overcurrent protection and earth fault protection .............. 271
Chapter 1 Introduction
1

About this chapter
This chapter gives an overview of SIFANG Breaker Protection
IED CSC-121.

2
1 Overview
The CSC-121 is selective, reliable and high speed breaker management and
backup protection IED (Intelligent Electronic Device), which is used as
backup protection cooperating with main protection in different applications
such as overhead line, cable, transformer, reactor and busbar protection. It
can also work as a dedicated breaker management relay for circuit breaker.
The IED has powerful capabilities to cover following applications:
Used in a wide range of voltage levels, up to 1000kV
Applied to overhead lines and cables, as backup protection IED
Applicable in subtransmission network and distribution network
Applied to transformer as backup protection IED
Breaker management protection for any substation arrangement such as
one and half breakers arrangement, double bus arrangement, etc.
Work as a dedicated breaker protection for single circuit breaker
Suitable for single pole/three poles tripping and closing conditions
Communication with station automation system
The IED provides a completely protection functions library, including current
protection, voltage protection, auto-reclosing, breaker failure protection,
thermal overload protection, etc., to cover most of the requirements of
different applications.

3
2 Features
Protection and monitoring IED with extensive functional library, user
configuration possibility and expandable hardware design to meet with
users special requirements
A complete protection functions library, include:
Overcurrent protection (50, 51, 67)
Earth fault protection (50N, 51N, 67N)
Neutral earth fault protection (50G, 51G, 67G)
Sensitive earth fault protection (50Ns, 51Ns, 67Ns)
Negative-sequence overcurrent protection (46)
Thermal overload protection (49)
Overload protection (50OL)
Overvoltage protection (59)
Undervoltage protection (27)
Displacement voltage protection (64)
Circuit breaker failure protection (50BF)
Poles discordance protection (50PD)
Dead zone protection (50SH-Z)
STUB protection (50STUB)
Synchro-check and energizing check (25)
Auto-recloser function for single- and/or three-phase reclosing (79)
Voltage transformer secondary circuit supervision (97FF)
Current transformer secondary circuit supervision
Self-supervision to all modules in the IED
Complete information recording: tripping reports, alarm reports, startup
reports and general operation records. Any kind of reports can be stored
up to 2000 and be memorized in case of power disconnection
Up to three electric/optical Ethernet ports can be selected to
communicate with substation automation system by IEC61850 or
IEC60870-5-103 protocols
Up to two electric RS-485 ports can be selected to communicate with
4
substation automation system by IEC60870-5-103 protocol
Time synchronization via network(SNTP), pulse and IRIG-B mode
Configurable LEDs (Light Emitting Diodes) and output relays satisfied
users requirement
Versatile human-machine interface
Multifunctional software tool CSmart for setting, monitoring, fault
recording analysis, configuration, etc.

5
3 Functions
3.1 Protection functions
Description ANSI Code
IEC 61850
Logical Node
Name
IEC 60617
graphical
symbol
Current protection
Overcurrent protection 50,51,67 PTOC
3I
INV
>
3I >>
3I >>>
Earth fault protection 50N, 51N, 67N PEFM
I
0INV
>
I
0
>>
I
0
>>>
Neutral earth fault protection 50G, 51G, 67G
Sensitive earth fault protection
50Ns, 51Ns,
67Ns

3I
NE
>
3I
NE
>>
Negative-sequence overcurrent
protection
46
Thermal overload protection 49 PTTR Ith
Overload protection 50OL PTOC 3I >OL
Voltage protection
Overvoltage protection 59 PTOV
3U>
3U>>
Undervoltage protection 27 PTUV
3U<
3U<<
Displacement voltage protection 64 V
E
>
Breaker control function
Breaker failure protection 50BF RBRF
3I> BF
I
0
>BF
I
2
>BF
Dead zone protection 50SH-Z
STUB protection 50STUB PTOC 3I>STUB
Poles discordance protection 50PD RPLD
3I< PD
I
0
>PD
I
2
>PD
Synchro-check and energizing check 25 RSYN
Auto-recloser 79 RREC OI
6
Description ANSI Code
IEC 61850
Logical Node
Name
IEC 60617
graphical
symbol
Single- and/or three-pole tripping 94-1/3 PTRC
Secondary system supervision
CT secondary circuit supervision
VT secondary circuit supervision 97FF
3.2 Monitoring functions
Description
Synchro-check reference voltage supervision
Auxiliary contacts of circuit breaker supervision
Self-supervision
Fault recorder
3.3 Station communication
Description
Front communication port
Isolated RS232 port
Rear communication port
0-2 isolated electrical RS485 communication ports
0-3 Ethernet electrical/optical communication ports
Time synchronization port
Communication protocols
IEC 61850 protocol
IEC 60870-5-103 protocol
3.4 IED software tools
Functions
7
Functions
Reading measuring value
Reading IED report
Setting
IED testing
Disturbance recording analysis
IED configuration
Printing

8

Chapter 2 General IED application
9

About this chapter
This chapter describes the use of the included software
functions in the IED. The chapter discusses general application
possibilities.

10
1 Display information
1.1 LCD screen display function
The LCD screen displays measured analog, report ouputs and menu.
1.2 Analog display function
The analog display includes measured Ia, Ib, Ic, 3I0, I5, Ua, Ub, Uc, U4
1.3 Report display function
The report display includes tripping, alarm and operation recording.
1.4 Menu dispaly function
The menu dispaly includes main menu and debugging menu, see chapter
Chapter 22 for detail.

11
2 Report record
The report record includes tripping, alarm and operation reports. See Chapter
23 General report list for detail.

12
3 Disturbance recorder
3.1 Introduction
To get fast, complete and reliable information about fault current, voltage,
binary signal and other disturbances in the power system is very important.
This is accomplished by the disturbance recorder function and facilitates a
better understanding of the behavior of the power system and related primary
and secondary equipment during and after a disturbance. An analysis of the
recorded data provides valuable information that can be used to explain a
disturbance, basis for change of IED setting plan, improvement of existing
equipment etc.
The disturbance recorder, always included in the IED, acquires sampled data
from measured analogue quantities, calculated analogue quantity, binary
input and output signals.
The function is characterized by great flexibility and is not dependent on the
operation of protection functions. It can even record disturbances not tripped
by protection functions.
The disturbance recorder information is saved for each of the recorded
disturbances in the IED and the user may use the local human machine
interface or dedicated tool to get some general information about the
recordings. The disturbance recording information is included in the
disturbance recorder files. The information is also available on a station bus
according to IEC 61850 and IEC 60870-5-103.
Fault wave recorder with great capacity, can record full process of any fault,
and can save the corresponding records. Optional data format or wave format
is provided, and can be exported through serial port or Ethernet port by
COMTRADE format.
3.2 Setting
Abbr. Explanation Default Unit Min. Max.
T_Pre Fault
Time setting for recording time
before fault occurred
0.05 s 0.05 0.3
T_Post Fault
Time setting for recording time
after fault occurred
1 s 0.50 4.50
DR_Sample Rate Sample rate for fault recording 0 0 1
13
(0: 600 sample/cycle, 1:1200
sample/cycle)

14
4 Self supervision function
4.1 Introduction
The IED may test all hardware components itself, including loop out of the
relay coil. Watch can find whether or not the IED is in fault through warning
LED and warning characters which show in liquid crystal display and display
reports to tell fault type.
The method of fault elimination is replacing fault board or eliminating external
fault.
4.2 Self supervision principle
Measuring the resistance between analog circuits and ground
Measuring the output voltage in every class
Checking the zero drift and scale
Verifying alarm circuit
Verifying binary input
Checking actual live tripping including circuit breaker
Checking the setting values and parameters
4.3 Self supervision report
Table 1 Self supervision report
Abbr.(LCD Display) Description
Sample Err AI sampling data error
Soft Version Err Soft Version error
EquipPara Err Equipment parameter error
ROM Verify Err CRC verification for ROM error
Setting Err Setting value error
Set Group Err Pointer of setting group error
BO No Response Binary output (BO) no response
15
Abbr.(LCD Display) Description
BO Breakdown Binary output (BO) breakdown
SRAM Check Err SRAM check error
FLASH Check Err FLASH check error
BI Config Err BI configuration error
BO Config Err BO configuration error
BI Comm Fail BI communication error
BO Comm Fail BO communication error
Test BO Un_reset Test BO unreset
BI Breakdown BI breakdown
DI Input Err BI input error
NO/NC Discord NO/NC discordance
BI Check Err BI check error
BI EEPROM Err BI EEPROM error
BO EEPROM Err BO EEPROM error
Sys Config Err System Configuration Error
Battery Off Battery Off
Meas Freq Alarm Measurement Frequency Alarm
Not Used Not used
Trip Fail Trip fail
PhA CB Open Err PhaseA CB position BI error
PhB CB Open Err PhaseB CB position BI error
PhC CB Open Err PhaseC CB position BI error
3Ph Seq Err Three phase sequence error
AI Channel Err AI channel error
3I0 Reverse 3I0 reverse
3I0 Imbalance 3I0 imbalance

16
5 Time synchronization
5.1 Introduction
Use the time synchronization source selector to select a common source of
absolute time for the IED when it is a part of a protection system. This makes
comparison of events and disturbance data between all IEDs in a SA system
possible.
5.2 Synchronization principle
Time definitions
The error of a clock is the difference between the actual time of the clock, and
the time the clock is intended to have. The rate accuracy of a clock is
normally called the clock accuracy and means how much the error increases,
i.e. how much the clock gains or loses time. A disciplined clock is a clock that
knows its own faults and tries to compensate for them, i.e. a trained clock.
Synchronization principle
From a general point of view synchronization can be seen as a hierarchical
structure. A module is synchronized from a higher level and provides
synchronization to lower levels.

A module is said to be synchronized when it periodically receives
synchronization messages from a higher level. As the level decreases, the
accuracy of the synchronization decreases as well. A module can have
17
several potential sources of synchronization, with different maximum errors,
which gives the module the possibility to choose the source with the best
quality, and to adjust its internal clock from this source. The maximum error of
a clock can be defined as a function of:
The maximum error of the last used synchronization message
The time since the last used synchronization message
The rate accuracy of the internal clock in the module.
5.2.1 Synchronization from IRIG
The built in GPS clock module receives and decodes time information from
the global positioning system. The module is located on the Communication
Module (MASTER). The GPS interfaces to the IED supply two possible
synchronization methods, IRIGB and PPS (or PPM).
5.2.2 Synchronization via PPS or PPM
The IED accepts PPS or PPM to the GPS interfaces on the Communication
Module. These pulses can be generated from e.g. station master clock. If the
station master clock is not synchronized from a world wide source, time will
be a relative time valid for the substation. Both positive and negative edges
on the signal can be accepted. This signal is also considered as a fine signal.
5.2.3 Synchronization via SNTP
SNTP provides a Ping-Pong method of synchronization. A message is sent
from an IED to an SNTP-server, and the SNTP-server returns the message
after filling in a reception time and a transmission time. SNTP operates via the
normal Ethernet network that connects IEDs together in an IEC61850
network. For SNTP to operate properly, there must be a SNTP-server present,
preferably in the same station. The SNTP synchronization provides an
accuracy that will give 1ms accuracy for binary inputs. The IED itself can be
set as a SNTP-time server.

18
6 Setting
6.1 Introduction
Settings are divided into separate lists according to different functions. The
printed setting sheet consists of two parts -setting list and communication
parameters.
6.2 Operation principle
The setting procedure can be ended at the time by the key SET or QUIT. If
the key SET is pressed, the display shows the question choose setting
zone. The range of setting zone is from 1 to 16. After confirming with the
setting zone-key SET, those new settings will be valid. If key QUIT is
pressed instead, all modification which have been changed will be ignored.

19
7 Authorization
7.1 Introduction
To safeguard the interests of our customers, both the IED and the tools that
are accessing the IED are protected, subject of authorization handling. The
concept of authorization, as it is implemented in the IED and the associated
tools is based on the following facts:
There are two types of points of access to the IED:
local, through the local HMI
remote, through the communication ports
There are different levels (or types) of guest, super user and protection
engineer that can access or operate different areas of the IED and tools
functionality.

20

Chapter 3 Overcurrent protection
21

About this chapter
This chapter describes the protection principle, input and output
signals, parameter, IED report and technical data used for
overcurrent protection.
22
1 Overcurrent protection
1.1 Introduction
The directional/non-directional overcurrent protection function can be applied
as backup protection functions in various applications for transmission lines.
The directional overcurrent protection can be used based on both the
magnitude of the fault current and the direction of power flow to the fault
location such as parallel lines. Main features of the overcurrent protection are
as follows:
Two definite time stages
One inverse time stage
11 kinds of IEC and ANSI inverse time characteristic curves as well as
optional user defined characteristic
Selectable directional element characteristic angle to satisfy the different
network conditions and applications
Each stage can be set individually as directional/non-directional,
Directional element can be set to be forward toward the protected object
or reverse toward system for all stages
Each stage can be set individually for inrush restraint
Cross blocking function for inrush detection
Settable maximum inrush current
VT secondary circuit supervision for directional protection. Once VT
failure happens, the directional stage can be set to be blocked or to be
non-directional stage
1.2 Protection principle
1.2.1 Time characteristic
The IED is designed with three overcurrent protection stages of which two
23
stages operate as definite overcurrent stages and the other one operates with
inverse time-current characteristic. 11 kinds of inverse time characteristics
are available. It is also possible to create a user defined time characteristic.
Each stage can operate in conjunction with the integrated inrush restraint,
directional functions and operate based on measured phase current.
Furthermore, each stage is independent from each other and can be
combined as desired.
Pickup value for the definite stage can be set in setting value. Each phase
current is compared with the corresponding setting value with delay time. If
currents exceed the associated pickup value, after expiry of the time delay,
the trip command is issued.
The pickup value for inverse time stage can be set in setting value. The
measured phase currents are compared with corresponding setting value and
if any phase exceeds that setting, the protection will issue a trip command
with corresponding delay time.
The time delay of inverse time characteristic is calculated based on the type
of the set characteristic, the magnitude of the current and a time multiplier.
For the inverse time characteristic, both ANSI and IEC based standard curves
are available, and any user-defined characteristic can be defined using the
following equation:
t =
A_OC
i
I_OC
p_OC
1
+B_OCK_OC
Equation 1
where:
A_OC: Time factor for inverse time stage
B_OC: Delay time for inverse time stage
P_OC: index for inverse time stage
K_OC: Time multiplier
1.2.2 Inrush restraint feature
The IED may detect large magnetizing inrush currents during transformer
energizing. Inrush current comprises large second harmonic current which
24
does not appear in short circuit current. Therefore, inrush current may affect
the protection functions which will operate based on the fundamental
component of the measured current. Accordingly, inrush restraint logic is
provided to prevent overcurrent protection from maloperation.
The inrush restraint feature operates based on evaluation of the 2
nd
harmonic
content which is present in measured current. The inrush condition is
recognized when the ratio of second harmonic current to fundamental
component exceeds the corresponding setting value for each phase. The
setting value is applicable for both definite time stage and inverse time stage.
The inrush restraint feature will be performed as soon as the ration exceeds
the set threshold.
Furthermore, by recognition of the inrush current in one phase, it is possible
to set the protection in a way that not only the phase with the considerable
inrush current, but also the other phases are blocked for a certain time. This is
achieved by cross-blocking feature integrated in the IED.
The inrush restraint function has a maximum inrush current setting. Once the
measuring current exceeds the setting, the overcurrent protection will not be
blocked any longer.
1.2.3 Direciton determination feature
The direction detection is performed by determining the position of current
vector in directional characteristic. In other word, it is done by comparing
phase angle between the fault current and the reference voltage. Figure 1
illustrates the direction detection characteristic for phase A element.
Two operation areas are provided for direction determination, the forward
area toward the protected object and the reverse area toward the system,
which are shown in Figure 1.
Forward
Reverse
UBC_Ref
Ph_Char
I A
I A
0
90

25
Figure 1 Direction detection characteristic of overcurrent protection directional element
where:
Ph
_Char: The settable characteristic angle
The assignment of the applied measuring values used in direction
determination shows in Table 2 for different types of faults.
Table 2 Assignment of current and reference voltage for directional element
Phase Current Voltage
A
a
I

bc
U

B
b
I

ca
U

C
c
I

ab
U

For three-phase short-circuit fault, without any healthy phase, memory
voltage values are used to determine direction clearly if the measured voltage
values are not sufficient. The detected direction is based on the memory
voltage of previous power cycles.
If VT fail happen (a short circuit or broken wire in the voltage transformer's
secondary circuit or voltage transformer fuse), the protection can be set to be
blocked or to be applied as non-directional overcurrent protection.
1.2.4 Logic diagram
The following logic diagram is applicable for phase A. Phase B and phase C
logic diagrams are similar with the phase A logic.
26
Func_OC1
0
OC1InrushBlockOn
OC_InrushBlockOff
OC_InrushBlockOn
AND OC1DirectionOn
0
OC1InrushBlockOff
AND
AND
T_OC1
AND
OR
AND
Ia>I_OC1
OCDirToSys
VTfail
<Imax_2H_UnBlk
Ia2/Ia1>
Crossblocking
Ia2/Ia1>
Ib2/Ib1>
Ic2/Ic1>
T2h_Cross_Blk<
Trip
Crossblocking
OC1DirectionOff
1
OCDirToEquip
VTfail
OR
AND

Figure 2 Logic diagram for phase A of overcurrent protection
1.3 Input and output signals
27
IP1
IP2
IP3
RelayStartup
OC1_Trip
OC2_Trip
OCInvTrip
UP1
UP2
UP3

Table 3 Analog input list
Signal Description
IP1 Signal for current input 1
UP1 Signal for voltage input 1
Table 4 Binary output list
Signal Description
Relay Startup Relay startup
Trip 3Ph Trip three phases
OC1_Trip Overcurrent protection stage 1 trip
OC2_Trip Overcurrent protection stage 2 trip
OC Inv Trip Overcurrent protection inverse time stage trip
1.4 Setting parameters
1.4.1 Setting list
Table 5 Overcurrent protection function setting list
Parameter Description Default Unit Min. Max.
I_OC1 Current setting for stage 1 2In A 0.05 100.0
T_OC1 Time setting for stage 1 0.1 s 0.00 60.00
I_OC2 Current setting for stage 2 1.2In A 0.05 100.0
Curve_OC Inv Inverse time curve 1 1 12
I_OC Inv Current setting for inverse time 1.2In A 0.05 100.0
28
stage
K_OC Inv
Time multiplier for inverse time
stage
1 0.05 999.0
A_OC Inv
Time factor for inverse time
stage
0.14 s 0.005 200.0
B_OC Inv Delay time for inverse time stage 0 s 0.00 60.00
P_OC Inv Index for inverse time stage 0.02 0.005 10.00
Angle_OC Direction characteristic angle 60 Degree 0.00 90.00
Imax_2H_UnBlk Maximum inrush current setting 5In A 0.10 100.0
Ratio_I2/I1
Ratio for second harmonic
current to fundamental
component
0.2 0.07 0.50
T2h_Cross_Blk Time for cross blocking 1 s 0.00 60.00
Table 6 Overcurrent protection binary setting list
Name Description Default Unit Min. Max.
Func_OC1
Overcurrent stage 1 enabled or
disabled
1 0 1
OC1 Direction
Direction of overcurrent stage 1
enabled or disabled
1 0 1
OC1 Dir To Sys
Direction toward system (0) or toward
equipment (1) for stage 1
0 0 1
OC1 Inrush
Block
Inrush restraint for overcurrent stage 1
enabled or disabled
1 0 1
Func_OC2
disabled
1 0 1
OC2 Direction
enabled or disabled
1 0 1
OC2 Dir To Sys
equipment (1) for stage 2
0 0 1
OC2 Inrush
Block
Inrush restraint for overcurrent stage 2
enabled or disabled
1 0 1
Func_OC Inv
Inverse time stage for overcurrent
enabled or disabled
1 0 1
OC Inv Direction
Direction of inverse time stage enabled
or disabled
0 0 1
OC Inv Dir To
Sys
equipment (1) for inverse time stage
0 0 1
OC Inv Inrush
Block
Inrush restraint for inverse time stage
enabled or disabled
0 0 1
Blk OC at VT VT failure block overcurrent protection 1 0 1
29
Fail enabled or disabled
OC Init CBF
Overcurrent protection initiate CBF
protection enabled or disabled
1 0 1
1.5 Reports
Table 7 Event report list
Information Description
OC1 Trip Overcurrent stage 1 trip
OC2 Trip Overcurrent stage 2 trip
OC Inv Trip Inverse time stage of overcurrent protection trip
1.6 Technical data
NOTE:
Ir: CT rated secondary current, 1A or 5A;
In: nominal current of the reference side of transformer;
Table 8 Overcurrent protection technical data
Item Rang or Value Tolerance
Definite time characteristics
Current 0.08 Ir to 20.00 Ir 3% setting or 0.02Ir
Time delay 0.00 to 60.00s, step 0.01s
1% setting or +40ms, at
200% operating setting
Reset time approx. 40ms

Reset ratio Approx. 0.95 at I/In 0.5

Inverse time characteristics
IEC standard Normal inverse;
Very inverse;
Extremely inverse;
Long inverse
5% setting + 40ms, at 2
<I/I
SETTING
< 20, in accordance
with IEC60255-151
ANSI Inverse;
Short inverse;
Long inverse;
Moderately inverse;
Very inverse;
Extremely inverse;
<I/ISETTING < 20, in
accordance with ANSI/IEEE
C37.112,

30
Definite inverse
user-defined characteristic
T=
A
(
i
I_SET
)
P
1
+ Bk
<I/I
SETTING
< 20, in accordance
with IEC60255-151
Time factor of inverse time,
A
0.005 to 200.0s, step 0.001s
Delay of inverse time, B 0.000 to 60.00s, step 0.01s
Index of inverse time, P 0.005 to 10.00, step 0.005
set time Multiplier for step n:
k
0.05 to 999.0, step 0.01
Minimum operating time 20ms

Maximum operating time 100s

Reset mode instantaneous
Reset time approx. 40ms,

Directional element
Operating area range 170
3, at phase to phase
voltage >1V
Characteristic angle 0 to 90, step 1
Table 9 Inrush restraint function
Item Range or value Tolerance
Upper function limit
Max current for inrush
restraint
0.25 Ir to 20.00 Ir 3% setting value or
0.02Ir
Ratio of 2
nd
harmonic current
to fundamental component
current
0.10 to 0.45, step 0.01
Cross-block (IL1, IL2, IL3)
(settable time)
0.00s to 60.00 s, step 0.01s 1% setting or +40ms

Chapter 4 Earth fault protection
31

About this chapter
signals, parameter, IED report and technical data used for earth
fault protection.

32
1 Earth fault protection
1.1 Introduction
The earth fault protection can be used to clear phase to earth faults as system
back-up protection. The earth fault protection is can also be applied for
coordination based on both magnitude of earth fault current and the direction
of power flow to the fault location.
The protection provides the following features:
11 kinds of the IEC and ANSI inverse time characteristic curves as well
as optional user defined characteristic
Zero sequence directional element
Negative sequence directional element can be applied as a supplement
to zero sequence directional element. It can be enabled/disabled by
setting
Each stage can be set individually as directional/non-directional
or reverse toward system for all stages
Settable directional element characteristic angle to satisfy the different
Each stage can be set individually for inrush restraint
VT secondary circuit supervision for directional protection function. Once
VT failure happens, the directional stage can be set to be blocked or to
be non-directional
Zero-sequence current is calculated using summation of 3 phase
currents or measured from 4
th
phase CT (selectable)
33
Zero-sequence voltage calculated by summation of 3 phase voltage or
measured from earth phase VT selectable
The IED is designed with three earth fault protection stages of which two
stages operate as definite earth fault stages and the other one operates with
inverse time-current characteristic. All stages can operate in conjunction with
the integrated inrush restraint and directional functions. This protection
function can operate based on the zero-sequence current which is calculated
by summation of three phase currents or measured from earth phase CT
Furthermore, the stages are independent from each other and can be
combined as desired. They can be enabled or disabled by dedicated binary
setting.
Individual pickup value for each definite stage can be defined in setting value.
By applying the settings, the measured zero sequence current is compared
separately with the setting value for each stage. If zero-sequence current
exceed the associated pickup value, after expiry of the time delay, the trip
command is issued.
following equation:
t =
A_EF
i
I_EF
p_EF
1
+B_EFK_EF
Equation 2
where:
A_EF: Time factor for inverse time stage
B_EF: Delay time for inverse time stage
P_EF: index for inverse time stage
34
K_EF: Time multiplier
The time is set to count up for a user-defined time delay. The time delay can
be set for each definite stage individually through corresponding settings.
After the user-defined time delays elapsed, a trip command is issued.
The IED may detect large magnetizing inrush currents during transformer
energizing. Inrush current comprises large second harmonic current which
does not appear in short circuit current. Therefore, inrush current may affect
the protection functions which will operate based on the fundamental
component of the measured current. Accordingly, inrush restraint logic is
provided to prevent earth fault protection from maloperation.
nd
harmonic
recognized when the ratio of second harmonic current to fundamental
component exceeds the corresponding setting value for each phase. The
condition for phase current inrush or zero sequence current inrush can be
selected by binary setting. The setting value is applicable for both definite
time stage and inverse time stage. The inrush restraint feature will be
performed as soon as the ratio exceeds the set threshold.
measuring current exceeds the setting, the earth fault protection will not be
blocked any longer.
1.2.3 Direction determination feature
The integrated directional function can be applied to each stage of earth fault
element via binary setting. There are two direction elements for direction
determination of earth faults. The first is based on zero sequence
components and the second is based on negative sequence components.
During direction determination by directional function (using zero or negative
sequence components), a VT fail condition may result in false or undesired
tripping by directional earth fault element. Therefore, under the VT failure
situation, it can be set to block directional earth fault protection or to apply
non-directional earth fault protection.
The following subsections go on to demonstrate basic principle of these two
direction element.
35
1.2.3.1 Zero sequence directional element
In this method, the direction determination is performed by comparing the
zero sequence quantities. In current path, the zero sequence current is
calculated from the sum of the three phase currents or measured from earth
CT. In the voltage path, the zero sequence voltage (3U
0
) is used as reference
voltage if it is connected. Otherwise, the zero sequence voltage, is calculated
from the sum of the three phase voltages.
In order to satisfy different network conditions and applications, the reference
voltage can be rotated by adjustable angle between 0 and 90 in clockwise
direction (negative sign). It should be noted that the settings affect all the
directional stages of earth fault element. In this way, the vector of rotated
reference voltage can be closely adjusted to the vector of fault current -3I0
which lags the fault voltage 3V
0
by the fault angle
0
_Char. This would
provide the best possible result for the direction determination. The rotated
reference voltage defines the forward and reverse area.
Figure 3 shows an example of direction determination.
Forward
Reverse
0_Char
Bisector
Bisector
0_Ref 3U
0
-3I 0
-3I0
90

Figure 3 Direction detection characteristic of earth fault protection directional element
1.2.3.2 Negative sequence directional element
This method is particularly suitable in case of too low zero sequence voltage
due to some fault condition e.g. when a considerable zero sequence mutual
coupling exists between parallel lines or there is an unfavorable zero
sequence impedance. In such cases it may be desirable to determine
direction of fault current by using negative sequence components. To do so, it
is required to enable the negative sequence directional element in setting
36
value. By applying this setting, the default direction determination of earth
fault current is performed by the zero sequence element. However, when the
magnitude of zero sequence voltage falls below permissible threshold of 1V
and negative sequence voltage is larger than 2V, the negative sequence
element is in service for direction determination. On the contrary, if the
negative sequence directional element is disabled, the direction of earth fault
current is only determined by using the zero sequence element. In this regard,
if the zero sequence voltage has a magnitude larger than 1V, proper
determination of fault direction is performed. However, for the condition that
zero sequence voltages below 1V, no direction determination would be
possible. Thus, the fault is assumed to be in reverse direction. Accordingly, for
the negative sequence element, the direction determination is performed by
comparing the negative sequence system quantities. To do so, three times of
the calculated negative sequence current 3I
2
(3I
2
=I
A
+a
2
I
B
+aI
C
) is compared
with three times of the calculated negative sequence voltage 3V
2

(3V
2
=V
A
+a
2
V
B
+aV
C
) as reference voltage, where a is equal to e
j120
.
The fault current -3I
2
is opposite to the fault current 3I
2
and lags from the
voltage 3V
2
by the fault angle, which is a setting value defined in setting value.
In order to satisfy different applications, the reference voltage can be rotated
by adjustable angle between 0 and 90 in clockwise direction (negative sign)
to be closely adjusted to the vector of fault current -3I
2
. This would provide the
best possible result for the direction determination. The rotated reference
voltage defines the forward and reverse area. Figure 4 shows an example of
direction determination.
Forward
Reverse
2_Char
I -3 2
I -3 2
3 Ref U2_
0
90
Bisector
Bisector

Figure 4 Direction detection characteristic of negative sequence directional element
1.2.4 Logic diagram
37
Three stage tripping logics of earth fault protection are shown as following
figures. As shown, earth fault protection tripping will be affected individually
by inrush and direction criteria for each stage. Whenever the zero sequence
current exceeds the related setting value and other mentioned criteria is
satisfied, corresponding timer will be started and tripping command will be
generated by expiring the setting time.
AND
OR
OR
AND
3I0measured
InrushChkI02/I01
1
1
I02/I01>RatioI02/I01
3I01>3I0max_2H_UNBLK
Ia2/Ia1>RatioI2/I1
Ib2/Ib1>RatioI2/I1
Ic2/Ic1>RatioI2/I1
Ia1>Imax_2H_UNBLK
Ib1>Imax_2H_UNBLK
Ic1>Imax_2H_UNBLK
InrushBLKEF
3I0calculated
InrushChkI2/I1
1
1
OR
AND
OR
3I0measured
1
AND

Figure 5 Logic diagram for inrush restraint
38
AND
AND
OR
OR
AND
OR
UnBlkEFatVTFail
BlkEFatVTFail
3U0Calculated
AND
AND
OR
OR
AND
OR
3U0Measured
VTFail
U0/I0-
3U0>1V
VTFail
U2/I2-
V1pVTFail
U0/I0-
3U0>1V
VTFail
U2/I2-
DirectionMeet
BlkEFatVTFail
UnBlkEFatVTFail
UnBlkEFatVTFail
BlkEFatVTFail
UnBlkEFatVTFail
BlkEFatVTFail
EFU2/I2DirOn
EFU2/I2DirOn
1
1
DirectionMeet

Figure 6 Logic diagram for direction determination
39
EF1DirectionOn
AND
T_EF1
EF1InrushBlockOn
Func_EF1On
1
BlkEFatCTFail
EF2DirectionOn
AND
EF2InrushBlockOn
Func_EF2On
1
EFINVDirectionOn
AND
EFINVInrushBlockOn
Func_EFINVOn
1
CTFail
3I0>3I0_EF1
InrushBLKEF
3I0>3I0_EF2
InrushBLKEF
3I0>3I0_EFInv
InrushBLKEF
EFINVTrip
EF1Trip
EF2Trip
T_EF2
DirectionMeet
DirectionMeet
DirectionMeet

Figure 7 Tripping logic diagram for earth fault protection
IP1
IP2
IP3
UP1
UP2
UP3
EF1Trip
EF2Trip
EFInvTrip IP0
UP4
RelayStartup

Signal Description
40
Signal Description
EF1 Trip Earth fault protection stage 1 trip
EF2 Trip Earth fault protection stage 2 trip
EF Inv Trip Earth fault protection inverse time stage trip
Relay Startup Relay Startup
1.4.1 Setting lists
Table 12 EF protection function setting list
Parameter Explanation Default Unit Min. Max.
3I0_EF1
Zero sequence current
setting for stage 1
0.5In A 0.05 100
T_EF1 Time setting for stage 1 0.1 s 0.00 60.00
3I0_EF2
setting for stage 2
0.2In A 0.05 100
T_EF2 Time setting for stage 2 0.3 s 0.00 60.00
Curve_EF Inv
Inverse time curve of
zero-sequence current
1 1 12
3I0_EF Inv
setting for inverse time
stage
0.2In A 0.05 100
K_EF Inv
Time Multiplier setting for
zero-sequence inverse
time stage
1 0.05 999.0
A_EF Inv
Coefficient setting for
time stage
0.14 s 0.005 200.0
41
B_EF Inv
Time delay setting for
time stage
0 s 0.00 60.00
P_EF Inv
Index for zero-sequence
inverse time current
0.02 0.005 10.00
Angle_EF
Direction characteristic
angle for zero-sequence
direction
70 Degree 0.00 90.00
Angle_Neg
Direction characteristic
angle for
negative-sequence
direction
70 Degree 0.00 90.00
Ratio_I2/I1
component
0.2 0.07 0.50
Imax_2H_UnBlk
Maximum inrush current
setting
5In A 0.10 100.0
Ratio_I02/I01
Ratio for zero sequence
second harmonic current
to zero sequence
fundamental component
0.2 0.07 0.50
3I0max_2H_UnBlk
Maximum zero sequence
inrush current setting
5In A 0.10 100.0
Table 13 EF protection binary setting list
Func_EF1
Earth fault stage 1 enabled or
disabled
1 0 1
EF1 Direction
Direction of earth fault stage 1
enabled or disabled
1 0 1
EF1 Dir To Sys
Point to system or point to equipment
is defined as forward direction for
stage 1
0 0 1
EF1 Inrush Block
Inrush restraint for earth fault stage 1
enabled or disabled
1 0 1
Func_EF2
disabled
1 0 1
EF2 Direction
enabled or disabled
1 0 1
EF2 Dir To Sys
stage 2
0 0 1
42
EF2 Inrush Block
Inrush restraint for earth fault
protection stage 2 enabled or
disabled
1 0 1
Func_EF Inv
Inverse time stage for earth fault
1 0 1
EF Inv Direction
Direction of inverse time stage
enabled or disabled
0 0 1
EF Inv Dir To Sys
inverse time stage
0
EF Inv Inrush Block
enabled or disabled
0 0 1
Inrush Chk I02/I01
Inrush checking of zero sequence
current enabled or disabled
0 0 1
EF U2/I2 Dir
Negative sequence directional
element for EF protection enabled or
disabled
0 0 1
Blk EF at VT Fail
Block or unblock EF protection when
VT fail happens
0 0 1
Blk EF at CT Fail
Block or unblock EF protection when
CT fail happens
0 0 1
3I0 Calculated
3I0 is calculated or measured from
earth fault CT
0 0 1
3U0 Calculated
3U0 is calculated or measured from
earth fault VT
1 0 1
EF Init CBF
EF protection initiate CBF protection
or not
1 0 1
1.5 Reports
EF1 Trip Earth fault stage 1 trip
EF2 Trip Earth fault stage 2 trip
EF Inv Trip Inverse time stage of earth fault protection trip
1.6 Technical data
NOTE:
43
Table 15 Technical data for earth fault protection
Item Rang or value Tolerance
Definite time characteristic
Time delay
0.00 to 60.00s, step
0.01s
1% setting or +40ms, at 200%
operating setting

Reset ratio Approx. 0.95 at I/Ir 0.5

Very inverse;
Extremely inverse;
Long inverse
IEC60255-151
<I/I
SETTING
< 20
ANSI Inverse;
Short inverse;
Long inverse;
Moderately inverse;
Very inverse;
Extremely inverse;
Definite inverse
ANSI/IEEE C37.112,
<I/I
SETTING
< 20
T=
A
(
i
I_SET
)
P
1
+ Bk
IEC60255-151
<I/I
SETTING
< 20
Time factor of inverse time, A 0.005 to 200.0s, step
0.001s

Delay of inverse time, B 0.000 to 60.00s, step
0.01s

Index of inverse time, P 0.005 to 10.00, step
0.005

set time Multiplier for step n: k 0.05 to 999.0, step 0.01
Directional element
Operating area range of zero
sequence directional element
160
3, at 3U01V
44
Operating area range of
negative sequence directional
element
160
3, at 3U22V

Chapter 5 Neutral earth fault protection
45
Chapter 5 Neutral earth fault
protection

About this chapter
signals, parameter, IED report and technical data included in
neutral earth fault protection.
46
1 Neutral earth fault protection
1.1 Introduction
The neutral earth fault protection focus on phase to earth faults. The
measuring current is the one from dedicated neutral CT.
The following features are provided:
11 kinds of the IEC and ANSI inverse time characteristic curves as well
as optional user defined characteristic
Each stage can be set to be directional/non-directional independently
Zero sequence directional element is applied.
or reverse toward system for all stage
Inrush restraint function can be set for each stage separately
VT secondary circuit supervision for directional protection function
Neutral current is measured from dedicated neutral CT
The neutral earth fault protection is provided with three stages from which two
stages operate as definite neutral earth fault stages and the other one
operates with inverse time-current characteristic. 11 kinds of inverse time
characteristics are available. It is also possible to create a user defined time
characteristic. Each stage can operate in conjunction with the integrated
inrush restraint and operate based on measured phase current.
combined as desired. They can be enabled or disabled by dedicated binary
setting.
47
Pickup value for the definite stage can be set in setting value. The neutral
current measured from the neutral CT is compared with the corresponding
setting value with delay time. If the neutral current exceeds the associated
pickup value, after expiry of the time delay, the trip command or alarm signal
is issued.
The pickup value for inverse time stage can be set in setting value. The
measured neutral current compare with corresponding setting value and if
any phase exceeds that, the protection will issue a trip command with delay
time.
following equation:
t =
A_NOC
i
I_NOC
p_NOC
1
+B_NOCK_NOC
Equation 3
where:
A_NOC: Time factor for inverse time stage
B_NOC: Delay time for inverse time stage
P_NOC: index for inverse time stage
K_NOC: Time multiplier
By applying proper setting of the aforementioned parameters, the IED
calculates the tripping or alarming time from the measured current in each
phase separately. Once the calculated time has been elapsed, the trip signal
or alarm signal is issued.
The protection IED may detect large magnetizing inrush currents during
transformer energizing. In addition to considerable unbalance fundamental
current, inrush current comprises large second harmonic current which does
not appear in short circuit current. Therefore, the inrush current may affect the
protection functions which operate based on the fundamental component of
the measured current. Accordingly, inrush restraint logic is provided to
prevent neutral earth fault protection from maloperation.
48
nd
harmonic
recognized when the ratio of the second harmonic current to the fundamental
component exceeds the corresponding setting value for one phase. The
setting value is applicable for both definite time stage and inverse time stage.
The inrush restraint feature will be performed as soon as the ratio exceeds
the set threshold.
measuring current exceeds the setting, the protection will not be blocked any
longer.
1.2.3 Direction determination
The direction determination is performed by comparing the zero sequence
quantities. In current path, the neutral current is measured from the dedicated
neutral CT. In the voltage path, the calculated or measured zero sequence
voltage (3V
0
) can be used as reference voltage.
voltage can be rotated by adjustable angle between 0 and 90 in clockwise
direction (negative sign). It should be noted that the settings affect all the
directional stages of earth fault element. In this way, the vector of rotated
reference voltage can be closely adjusted to the vector of fault current -3I0
which lags the fault voltage 3V
0
by the fault angle
0
_Char. This would
reference voltage defines the forward and reverse area.
Figure 8 shows an example of direction determination.
Forward
Reverse
0_Char
Bisector
Bisector
0_Ref 3U
0
-3I 0
-3I0
90

49
Figure 8 Direction detection characteristic of earth fault protection directional element
1.2.4 Logic diagram
NOC1InrushBlockOn
AND NOC1DirectionOn
0
NOC1InrushBlockOff
AND
AND
T_NOC1
Func_NOC1
>3I0_NOC1
NOC1DirToSys
VTfail
<3I0max_2H_UnBlk
I02/I01>
Trip
OR
AND
NOC1DirToEquip
VTfail
NOC1DirectionOff
1

Figure 9 Logic diagram for stage 1 of neutral earth fault protect ion
I5 RelayStartup
NOC1_Trip
NOC2_Trip
NOCInvTrip
UP1
UP2
UP3
UP4

Signal Description
I5 Signal for neutral current input
50
Signal Description
NOC1 Trip Neutral earth fault protection stage 1 trip
NOC Inv Trip
Neutral earth fault protection inverse time
stage trip
1.4.1 Setting lists
Table 18 Neutral earth fault protection function setting list
3I0_NOC1 Neutral current setting for stage 1 0.5In A 0.05 100.0
T_NOC1 Time setting for stage 1 0.1 s 0.00 60.00
3I0_NOC2 Neutral current setting for stage 2 0.2In A 0.05 100.0
Curve_NOC Inv Inverse time curve 1 1 12
3I0_NOC Inv
Current setting for inverse time
stage
0.2In A 0.05 100.0
K_NOC Inv
stage
1 0.05 999.0
A_NOC Inv Time factor for inverse time stage 0.14 s 0.005 200.0
B_NOC Inv Delay time for inverse time stage 0 s 0.00 60.00
P_NOC Inv Index for inverse time stage 0.02 0.005 10.00
Angle_NOC Direction characteristic angle 70 Degree 0.00 90.00
3I0max_2H_UnBlk Maximum inrush current setting 2In A 0.10 100.0
Ratio_I02/I01
component
0.2 0.07 0.50
Table 19 Neutral earth fault protection binary setting list
Func_NOC1
Neutral earth fault stage 1 enabled or
disabled
1 0 1
NOC1 Direction
Direction of neutral earth fault stage 1
enabled or disabled
1 0 1
51
NOC1 Dir To
Sys
Direction toward the system (0) or
toward the object (1) for stage 1
0 0 1
NOC1 Inrush
Block
Inrush restraint for neutral earth fault
stage 1 enabled or disabled
1 0 1
Func_NOC2
Neutral earth fault stage 2 enabled or
disabled
1 0 1
NOC2 Direction
Direction of neutral earth fault stage 2
enabled or disabled
1 0 1
NOC2 Dir To
Sys
toward the object (1) for stage 2
0 0 1
NOC2 Inrush
Block
Inrush restraint for neutral earth fault
1 0 1
Func_NOC Inv
Inverse time stage for neutral earth
fault enabled or disabled
1 0 1
NOC Inv
Direction
Direction of inverse time stage enabled
or disabled
0 0 1
NOC Inv Dir To
Sys
toward the object (1) for inverse time
stage
0 0 1
NOC Inv Inrush
Block
enabled or disabled
0 0 1
Blk NOC at VT
Fail
VT failure block neutral earth fault
1 0 1
3U0 Calculated 3U0 calculated or measured from VT 1
NOC Init CBF
Neutral earth fault protection initiate
CBF protection enabled or disabled
1 0 1
1.5 Reports
NOC Inv Trip Neutral earth fault protection inverse time stage trip
1.6 Technical data
NOTE:
52
Table 21 T Technical data for neutral earth fault protection
Item Rang or value Tolerance
Time delay
0.00 to 60.00s, step
0.01s
1% setting or +40ms, at 200%
operating setting

Reset ratio Approx. 0.95 at I/Ir 0.5

Very inverse;
Extremely inverse;
Long inverse
<I/I
SETTING
< 20, in accordance
with IEC60255-151
ANSI Inverse;
Short inverse;
Long inverse;
Moderately inverse;
Very inverse;
Extremely inverse;
Definite inverse
C37.112,
T=
A
(
i
I_SET
)
P
1
+ Bk
<I/I
SETTING
< 20, in accordance
with IEC60255-151
Time factor of inverse time, A 0.005 to 200.0s, step
0.001s

Delay of inverse time, B 0.000 to 60.00s, step
0.01s

Index of inverse time, P 0.005 to 10.00, step
0.005

Directional element
Operating area range 160 3, at 3U01V
Operating area range 160 3, at 3U22V
53

54

Chapter 6 Sensitive earth fault
protection
55
protection

About this chapter
sensitive earth fault protection.

protection
56
1 Sensitive earth fault protection
1.1 Introduction
In power networks with high impedance earthing, the phase to earth fault
current is significantly smaller than the short circuit currents. Another difficulty
for earth fault protection is that the magnitude of the phase to earth fault
current is almost independent of the fault location in the network.
Sensitive earth fault protection can be used to detect and give selective trip of
phase to earth faults in isolated or compensated networks. The protection
function also can be applied to detect high impedance earth faults in solidly or
low-resistance earthed networks.
Sensitive earth fault protection integrated in the IED provides following
features:
Sensitive earth fault directional element with U
0
/I
0
- principle
Sensitive earth fault directional element with Cos principle
Each stage can be set to be directional, or non-directional independently
Each stage can be set individually to alarm or trip
Displacement voltage can be checked to increase function reliability
Dedicated sensitive CT
VT secondary circuit supervision for directional protection function
The IED is provided with three sensitive earth fault protection stages of which
protection
57
two stages operate as definite sensitive earth fault stages and the other one
operates with inverse time-current characteristic. 11 kinds of inverse time
characteristics are available. It is also possible to create a user defined time
characteristic. Each stage can operate in conjunction with the integrated
directional functions and operate based on measured phase current which is
input from the dedicated sensitive current transformer.
Pickup value for the definite stage can be set in setting value. The measured
current from sensitive CT input is compared with the corresponding setting
value with delay time. If the measured current exceeds the associated pickup
value, after expiry of the time delay, the trip command or alarm signal is
issued.
following equation:
t =
A_SEF
i
I_SEF
p_SEF
1
+B_SEFK_SEF
Equation 4
where:
A_SEF: Time factor for inverse time stage
B_SEF: Delay time for inverse time stage
P_SEF: index for inverse time stage
K_SEF: Time multiplier
1.2.2 Direction determination feature
protection
58
The integrated directional function can be applied to each stage of sensitive
earth fault element via specified binary setting. In order to discriminate
forward or reverse short circuits, the IED provides two methods for sensitive
earth fault direction detection which should be utilized to cover all network
configurations according to the type of grounding. Based on U
0
/I
0
-
measurement and based on Cos measurement respectively.
In directional sensitive earth fault protection (using U
0
/I
0
- or Cos
elements), the VT failure condition may result in false or undesired tripping or
alarming. In such situation, it is possible to set operation state for each stage
of sensitive earth fault protection which operates in conjunction with direction
feature by binary setting to block the function or operate without direction
detection. When binary setting Blk SEF at VT Fail is disabled, corresponding
sensitive earth fault stages would not consider direction in case of VT failure.
On the contrary, if the binary setting Blk SEF at VT Fail is enabled, the
function will be blocked when VT failure happens. It is noted that the binary
setting affects all the stages of sensitive earth fault element.
Pay attention to that direction determination based on measured
displacement voltage will not be blocked in case of failure detection in the
three-phase connected to voltage transformer. Similarly, if the direction
determination is based on the calculated displacement voltage, the protection
function will not be blocked as a result of failure detection in U
4
voltage
transformer. However, in case of a failure in U
4
voltage transformer, the
direction determination based on measured value of displacement voltage will
be blocked depend on the binary setting.
1.2.2.1 U
0
/I
0
- measurement
In this method, the direction determination is performed by comparing the
displacement angle between zero sequence system quantities. In current
path, the measured current I
s
from the sensitive input is applied. In the
voltage path, the displacement voltage V
N
is used as reference voltage, if it is
connected. Otherwise the IED calculates the zero sequence voltage 3V
0
from
the summation of the three phase voltages. The condition for direction
determination with 3V
0
quantity is that the magnitude of 3V
0
is larger than the
setting value.
Contrary to the directional phase elements, which work with the un-faulted
voltage as reference voltage, for the sensitive earth fault protection, the zero
sequence voltage is used as the reference voltage for direction determination.
Depending on the connection of voltage transformer, the corresponding
reference voltage is V
N
or 3V
0
(3V
0
=V
A
+V
B
+V
C
).
protection
59

Forward
Bisector
NS_Char
I
-
NS
INS
3 Ref U0_
0
90

Figure 10 Direction detection characteristic of the sensitive earth fault
directional element by U0/I0-
where:
NS
_Char: The settable characteristic angle
voltage can be rotated by adjustable angle between 0 and 90 in
anticlockwise direction (positive sign). It should be noted that the settings
affect all the directional stages of sensitive earth fault element. In this way, the
vector of rotated reference voltage can be closely adjusted to the vector of
fault current -I
s
which leads the fault voltage 3V
0
by the fault angle. This would
reference voltage defines the forward area.
1.2.2.2 Cos measurement
Similar to U
0
/I
0
- method, the direction determination is performed in cos
method by using the measured current I
s
from sensitive current input together
with the measured or calculated displacement voltage. In this context, the
measured displacement voltage is used if it is connected. Otherwise the IED
calculates the zero sequence voltage 3V
0
from the summation of the three
phase voltages. The condition for direction determination with 3V
0
quantity is
that the magnitude of 3V
0
is larger than the setting value.
Unlike to U
0
/I
0
- method, direction determination is performed in Cos
method by using those component of the residual current which is
perpendicular to the directional characteristic (axis of symmetry). Figure 11
shows how the IED adopts complex vector diagram for direction
determination. As can be seen, displacement voltage 3V
0
is the reference
protection
60
magnitude quantity. The axis of symmetry is defined as a line perpendicular to
this quantity. The sensitive earth fault protection would issue a trip command
or an alarm signal if the active component of I
s
is in the opposite direction of
the reference voltage and has a magnitude exceeds corresponding setting.
Forward
3 Ref U0_
I
-
S
IS
0
90

Figure 11 Direction detection characteristic of the sensitive earth fault
directional element by Cos
1.2.3 Logic diagram
AND
SEFChkU0/I0On
U0/I0-
3U0>
Forward

Figure 12 Logic diagram for direction determination based on U0/I0- measurement
AND
SEFChkU0/I0Off
Forward
IsCOS
3U0>

Figure 13 Logic diagram for direction determination based on Cos measurement
protection
61
AND
OR
OR
AND
OR
BlkSEFatVTFailOn
3U0CalculatedOn
BlkSEFatVTFailOff
3U0CalculatedOff
BlkSEFatVTFailOn
BlkSEFatVTFailOff
VTFail
Forward
V1pVTFail
ForwardRelease

Figure 14 Influence of VT failure on direction determination of sensitive earth fault protection
AND
SFF1DirectionOff
1
SEF1DirectionOn
Func_SEF1
T_SEF1
Is>
ForwardRelease
Trip/Alarm

Figure 15 Logic diagram for the first definite stage of sensitive earth fault protection
AND
SFFInvDirectionOff
1
SEFInvDirectionOn
Func_SEFInv
T
ForwardRelease
IsInverse
Trip/Alarm

Figure 16 Logic diagram for the inverse time stage of sensitive earth fault protection
protection
62
IS
RelayStartup
SEF1Trip UP1
UP2
UP3
SEF1Alarm
SEF2Trip
SEF2Alarm
SEFInvTrip
SEFInvAlarm
UP4

Signal Description
Is Signal for sensitive current input
Signal Description
SEF1 Trip Sensitive earth fault protection stage 1 trip
SEF1 Alarm Sensitive earth fault protection stage 1 alarm
SEF Inv Trip
Sensitive earth fault protection inverse time
stage trip
SEF Inv Alarm
Sensitive earth fault protection inverse time
stage alarm
1.4.1 Setting list
Table 24 Sensitive earth fault protection function setting list
protection
63
I_SEF1
Sensitive current setting for
stage 1
0.2 A 0.005 1.00
T_SEF1 Time setting for stage 1 0.1 s 0.00 60.00
I_SEF2
Sensitive current setting for
stage 2
0.1 A 0.005 1.00
T_SEF2 Time setting for stage 2 0.5 s 0.00 60.00
Curve_SEF Inv Inverse time curve 1 1 12
I_SEF Inv
stage
0.5 A 0.00 1.00
K_SEF Inv
stage
1 0.05 999.0
A_SEF Inv
stage
0.14 s 0.005 200.0
B_SEF Inv
Delay time for inverse time
stage
0 s 0.00 60.00
P_SEF Inv Index for inverse time stage 0.02 0.005 10.00
Angle_SEF Direction characteristic angle 70 0.00 90.00
IsCOS_SEF
Cos measurement for
direction determination
0.2 A 0.005 1.00
U_SEF Voltage setting for SEF 5 V 2.00 100.0
Table 25 Sensitive earth fault protection binary setting list
Func_SEF1
Sensitive earth fault stage 1 enabled or
disabled
1 0 1
SEF1 Trip
Sensitive earth fault stage 1 trip or
alarm
1
SEF1 Direction
Direction of sensitive earth fault stage 1
enabled or disabled
1 0 1
Func_SEF2
Sensitive earth fault stage 2 enabled or
disabled
1 0 1
SEF2 Trip
alarm
1
SEF2 Direction
Direction of sensitive earth fault stage 2
enabled or disabled
1 0 1
Func_SEF Inv
Sensitive earth fault inverse time stage
enabled or disabled
1 0 1
SEF Inv Trip
Sensitive earth fault inverse time stage
trip or alarm
1
SEF Inv Direction of sensitive earth fault inverse 0 0 1
protection
64
Direction time stage enabled or disabled
SEF Chk U0/I0
U0/I0 measurement or Cos
measurement for direction
determination
1 0 1
Blk SEF at VT
Fail
VT failure block sensitive earth fault
1 0 1
3U0 Calculated 3U0 calculated or measured from VT 1 0 1
SEF Init CBF
Sensitive earth fault protection initiate
1 0 1
1.5 IED report
SEF Inv Trip Sensitive earth fault protection inverse time stage 2 trip
Table 27 Alarm report list
SEF Inv Alarm Sensitive earth fault protection inverse time stage alarm
1.6 Technical data
NOTE:
Table 28 Technical data for sensitive earth fault protection
Item Range or value Tolerance
Current from sensitive CT
input
0.005 to 1.000 A , step 0.001 A 3 % setting value or 1
mA
Current from neutral CT input 0.08 Ir to 20.00 Ir 3 % setting value or 0.02
Ir
protection
65
Time delay 0.00 to 60.00, step 0.01 s 1.5 % setting value or
+40 ms, at 200% operating
setting
Reset ratio Approx. 0.95 when I/In 0.5
Reset time Approx. 40 ms
Current from sensitive input 0.005 to 1.000 A , step 0.001 A 3 % setting value or 1
mA
Current from normal input 0.08 Ir to 20.00 Ir 3 % setting value or 0.02
Ir
Very inverse;
Extremely inverse;
Long inverse
<I/I
SETTING
< 20, in
accordance with
IEC60255-151
ANSI Inverse;
Short inverse;
Long inverse;
Moderately inverse;
Very inverse;
Extremely inverse;
Definite inverse
C37.112,
T=
A
(
i
I_SET
)
P
1
+B k
<I/I
SETTING
< 20, in
accordance with
IEC60255-151
Time factor of inverse time, A 0.005 to 200.0s, step 0.001s
Directional element for sensitive earth-fault protection
principles I cos
(V0 / I0)

Direction measurement IE and VE measured
or 3V0 calculated

3U0 Minimum voltage
threshold
2.00 to 100.00 V, step 0.01 V 3 % setting for measured
voltage;
5 % setting for
protection
66
calculated voltage
Characteristic angle
_SEFChar
0.0 to 90.0, step 1 3
Operating area range 160 3

Chapter 7 Negative sequence
overcurrent protection
67

About this chapter
negative sequence overcurrent protection.

68
1 Negative sequence overcurrent
protection
1.1 Introduction
Negative-sequence overcurrent protection detects unbalanced loads on the
system. It is especially useful to monitor the unbalanced load of motors. This
is due to the fact that unbalanced loads result in counter-rotating fields in
three-phase induction motors, which cause overheating in rotor end zones. In
addition, the protection function may be used to detect interruptions, short
circuits and polarity problems with current transformers. Furthermore, it is
suitable for detecting single-phase and two-phase faults with fault currents
lower than load currents.
The protection provide following features:
The first definite stage and inverse stage can be set individually as alarm
or trip stage
1.2.1 Protection function description
The IED provides three negative-sequence overcurrent protection stages
from which two stages operate as definite time stages and the other one
operates with inverse time-current characteristic. The negative-sequence
overcurrent protection operates based on negative sequence current
calculated from three phase currents, as the following formula shown:
3I
2
= I
A
+ a
2
I
B
+ aI
C

Equation 5
69
Individual pickup value for each definite stage can be set in setting value. The
calculated negative sequence current from Equation 5 is compared
separately with the corresponding setting value with delay time. If the
calculated negative-sequence current exceeds the associated pickup value,
after expiry of the time delay, the trip command or alarm signal is issued.
following equation:
t =
A_NSOC
i
I_NSOC
p_NSOC
1
+B_NSOCK_NSOC
Equation 6
where:
A_NSOC: Time factor for inverse time stage
B_NSOC: Delay time for inverse time stage
P_NSOC: index for inverse time stage
K_NSOC: Time multiplier
1.2.2 Logic diagram
70
AND
T_NSOC1
Func_NSOC1On
AND
Func_NSOC2On
AND
Func_NSOCInv
CTFail
3I2>3I2_NSOC1
3I2>3I2_NSOC2
3I2>3I2_NSOCInv
NS1Trip/Alarm
NS2Trip
NSINVTrip/Alarm
T_NSOC2

Figure 17 Logic diagram for negative sequence overcurrent protection
IP1
IP2
IP3
RelayStartup
NSOC1Trip
NSOC2Trip
NSOCInvTrip
NSOC1Alarm
NSOCInvAlarm

Signal Description
Signal Description
NSOC1 Trip
Negative sequence overcurrent protection
stage 1 trip
71
NSOC1 Alarm
stage 1 alarm
NSOC2 Trip
stage 2 trip
NSOC Inv Trip
inverse time stage trip
NSOC Inv Alarm
inverse time stage alarm
1.4.1 Setting lists
Table 31 Negative sequence overcurrent protection function setting list
3I2_NSOC1
Negative sequence current
setting for stage 1
0.5In A 0.05 100.0
T_NSOC1 Time setting for stage 1 0.1 s 0.00 60.00
3I2_NSOC2
Negative sequence setting for
stage 2
0.2In A 0.05 100.0
T_NSOC2 Time setting for stage 2 0.3 s 0.00 60.00
Curve_NOC Inv Inverse time curve 1 1 12
3I2_NSOC Inv
stage
0.2In A 0.05 100.0
K_NSOC Inv
stage
1 0.05 999.0
A_NSOC Inv
stage
0.14 s 0.005 200.0
B_NSOC Inv
Delay time for inverse time
stage
0 s 0.00 60.00
P_NSOC Inv Index for inverse time stage 0.02 0.005 10.00
Table 32 Negative sequence overcurrent protection binary setting list
Func_NSOC1
Negative sequence overcurrent
protection stage 1 enabled or disabled
1 0 1
NSOC1 Trip
Negative sequence overcurrent stage 1
trip or alarm
0 0 1
Func_NSOC2 Negative sequence overcurrent 1 0 1
72
protection stage 2 enabled or disabled
Func_NSOC Inv
Inverse time stage of negative
sequence overcurrent protection
enabled or disabled
0 0 1
NSOC Inv Trip
Inverse time stage negative sequence
overcurrent trip or alarm
0 0 1
NSOC Init CBF
protection initiate CBF protection
0 0 1
1.5 Reports
NSOC1 Trip Negative sequence overcurrent protection stage 1 trip
NSOC2 Trip Negative sequence overcurrent protection stage 2 trip
NSOC Inv Trip Negative sequence overcurrent protection inverse time stage trip
NSOC1 Alarm Negative sequence overcurrent protection stage 1 alarm
NSOC Inv Alarm Negative sequence overcurrent protection Inverse time stage alarm
1.6 Technical data
NOTE:
Table 35 T Technical data for negative sequence overcurrent protection
Current 0.08 Ir to 20.00 Ir
3% setting value or
0.02Ir
Time delay 0.00 to 60.00, step 0.01 s
1% setting or +40ms, at
Reset time 40 ms
Reset ratio Approx. 0.95 for I2 /Ir > 0.5
73
Very inverse;
Extremely inverse;
Long inverse
<I/I
SETTING
< 20, in
accordance with
IEC60255-151
ANSI Inverse;
Short inverse;
Long inverse;
Moderately inverse;
Very inverse;
Extremely inverse;
Definite inverse
C37.112,
T=
A
(
i
I_SET
)
P
1
+B k
<I/I
SETTING
< 20, in
accordance with
IEC60255-151
Time factor of inverse time,
A
0.005 to 200.0s, step 0.001s
set time Multiplier for step
n: k
0.05 to 999.0, step 0.01



74

Chapter 8 Thermal overload protection
75
Chapter 8 Thermal overload
protection

About this chapter
thermal overload protection.
76
1 Thermal overload protection
1.1 Introduction
The thermal overload protection represents an essential requirement to
prevent protected equipment from thermal damaging due to overloads.
Thermal damage mostly affects the insulating material surrounding the phase
current conductors in transformers, cables or any other power equipment. As
a matter of fact, the insulation material ages too rapidly if the equipment
temperature exceeds the design limit value. Thus, a special protection is
needed to prevent over-temperature condition for the protected object. Since
severity of over-temperature condition is directly proportional to current
squared, the thermal protection operates based on the square of measured
current flowing through the protected object. Furthermore, because the
cumulative nature of over-temperature condition, it is necessary to integrate
previous thermal history of equipment in the protection. This is achieved in
the IED by providing a comprehensive thermal replica of the protected object.
In this regard the IED provides an overload protection with memory capability
by taking into account both the previous history of an overload and the heat
loss to the environment.
1.2 Function principle
1.2.1 Function description
The thermal overload protection in the IED is provided with one trip stage as
well as one alarm stage. It is possible to set the alarm stage at a certain
percentage of the setting value applied at the trip stage. The protection
function operates based on an approximate replica of the protected object in
the event of temperature rise caused by overload. The thermal replica is
implemented based on thermal models (Cold or Hot Curve) of IEC60255-8
standard. The temperature rise is calculated separately for each phase in a
thermal replica from the square of the respective phase current. The
maximum calculated temperature rise of the three phases is decisive for
evaluation of the thresholds.
The IED calculates the temperature rise of the protected equipment in each
phase, based on following differential equation:
+ =
2

77
Equation 7
where:
: is thermal time constant of heating for the protected object, in seconds. It is usually
determined by manufacturer of the protected object. This parameter can be set in
setting value.
I: is the measured fundamental current flowing through each phase of the protected
object.
I
: is the maximum permissible continuous thermal overload current. It is usually

specified by manufacturer of the protected object. This parameter can be set in
setting value.
: is temperature rise of the protected object in per unit of the final temperature rise
at maximum allowed phase current I
.
According to Equation 7, the tripping time for thermal overload protection is
calculated by the following equation based on Hot Curve in IEC60255-8
standard:
t = ln
2
1

Equation 8
where:
I
P
: is steady state current previous to the overload.
The IED is capable to calculate tripping time of thermal overload protection
not only based on the Hot Curve, but also based on Cold Curve as defined in
IEC60255-8 standard and equation as following:
t = ln
2
1

Equation 9
From the Equation 8 and Equation 9 can be seen, the cold curve provides
78
no memory regarding to previous thermal condition of the protected object,
whereas, by using the hot curve, the protection function is able to represent a
memorized thermal profile of the protected object. It is possible to set which
curve should be considered for thermal overload protection by binary setting
Hot Curve/Cold Curve. If Hot Curve is enabled, tripping time of thermal
overload protection would be calculated based on Equation 8. In contrast, if
applying Cold Curve, Equation 9 would be used for calculation process. It is
noted that binary setting Hot Curve/Cold Curve affects both the alarm and
trip stages.
IP1
IP2
IP3
ThermalOLTrip
RelayStartup
ThermalOLAlarm

Signal Description
Signal Description
Thermal OL Trip Thermal overload protection trip
Thermal OL Alarm Thermal overload protection alarm
1.4.1 Setting lists
Table 38 Thermal overload protection function setting list
I_Thermal OL Trip Thermal overload current setting 1.1In A 0.10 25.00
79
for tripping
I_Thermal OL Alarm
Thermal overload current setting
for alarming
1.1In A 0.10 25.00
T_Const Thermal
Time constant for thermal
overload protection
60 s 1.00 9999
T_Const Cool Down Time constant for cool down 60 s 1.00 9999
Table 39 Thermal overload protection binary setting list
Func_Thermal OL
Thermal overload protection
enabled or disabled
1 0 1
Cold Curve Cold Curve or Hot Curve 0 0 1
Thermal OL Init CBF
initiate CBF protection
1 0 1
1.5 Reports
Thermal OL Trip Thermal overload protection trip
Thermal OL Alarm Thermal overload protection alarm
1.6 Technical data
NOTE:
Table 42 Technical data for thermal overload protection
Thermal heating time
constant
1 to 9999 s
80
Thermal cooling time
constant
1 to 9999 s
IEC cold curve
=
2 2
2
ln
u
t
I I
I
t
eq
eq

IEC 602558,
5% setting or +40ms
IEC hot curve
=
2 2
2 2
ln
u
t
I I
I I
t
eq
P eq

IEC 602558,
5% setting or +40ms

Chapter 9 Overload protection
81

About this chapter
overload protection.

82
1 Overload protection
The IED supervises load flow in real time. If each phase current is greater
than the dedicated setting for a set delay time, the protection will alarm.
1.1.2 Logic diagram
T_OLAlarm
OR
AND
Func_OL
Ia>I_OLAlarm
Ib>I_OLAlarm
Ic>I_OLAlarm
Alarm

Figure 18 Logic diagram for overload protection
IP1
IP2
IP3
OverloadAlarm

Signal Description
Signal Description
Overload Alarm Overload function alarm
83
1.3.1 Setting lists
Table 45 Function setting list for overload protection
I_OL Alarm Current setting for overload protection 2In A 0.05 100.0
T_OL Alarm Time setting for overload protection 60 s 0.00 6000
Table 46 Binary setting list for overload protection
Func_OL
Overload function enabled or
disabled
1 0 1
1.4 Reports
Table 47 Alarm information list
Overload Alarm Overload protection alarm

84

Chapter 10 Overvoltage protection
85

About this chapter
overvoltage protection.

86
1 Overvoltage protection
1.1 Introduction
The overvoltage protection detects abnormal network and machine high
voltage conditions. Overvoltage conditions may occur possibly in the power
system during abnormal conditions such as no-load, light load, or open line
end on long line. The protection can be used as open line end detector or as
system voltage supervision normally.
The protection provides following features:
Each stage can be set to alarm or trip
Measuring voltage between phase-earth voltage and phase-phase
selectable
Settable dropout ratio
1.2.1 Phase to phase overvoltage protection
All the three phase voltages are measured continuously, and compared with
the corresponding setting value. If the phase to phase voltage exceeds the
set threshold and after expiry of the time delay, the protection IED will issue
alarm signal or trip command according to the users requirement.
There are two stages included in overvoltage protection, each stage can be
set to alarm or trip separately in binary setting, and the time delay for each
stage can be individually set. Thus, the alarming or tripping can be
time-coordinated based on how severe the voltage increase, e.g. in case of
high overvoltage, the trip command will be issued with a short time delay,
whereas for the less severe overvoltage, trip or alarm signal can be issued
with a longer time delay.
1.2.2 Phase to earth overvlotage protection
87
The phase to earth overvoltage protection operates just like the phase to
phase protection except that it detects phase to earth voltages.
1.2.3 Logic diagram
T_OV
OVChkPEEnabled
OVChkPEDisabled
OR
OVTripEnabled
OVTripDisabled
OR
OR
Ua>
Ub>
Uc>
Uab>
Ubc>
Uca>
Trip
Alarm

Figure 19 Logic diagram for overvoltage protection
UP1
UP2
UP3
RelayStartup
OV1Alarm
OV2Alarm
OV1_Trip
OV2_Trip

Signal Description
Signal Description
88
OV1 Alarm Overvoltage protection stage 1 alarm
OV2 Alarm Overvoltage protection stage 2 alarm
OV1_Trip Overvoltage protection stage 1 trip
OV2_Trip Overvoltage protection stage 2 trip
1.4.1 Setting lists
Table 50 Function setting list for overvoltage protection
U_OV1
Voltage setting for overvoltage
protection stage 1
65 V 40.00 200.0
T_OV1
Time setting for overvoltage protection
stage 1
0.3 s 0.00 60.00
U_OV2
Voltage setting for overvoltage
protection stage 2
63 V 40.00 200.0
T_OV2
Time setting for overvoltage protection
stage 2
0.6 s 0.00 60.00
Dropout_OV Dropout ratio for overvoltage protection 0.95 0.90 0.99
Table 51 Binary setting list for overvoltage protection
Func_OV1
Overvoltage stage 1 enabled or
disabled
1 0 1
OV1 Trip Overvoltage stage 1 trip or alarm 0 0 1
Func_OV2
disabled
1 0 1
OV2 Trip Overvoltage stage 2 trip or alarm 0 0 1
OV Chk PE
Phase to phase voltage or phase
to earth measured for overvoltage
protection
1 0 1
OV Init CBF
Overvoltage protection initiate
CBF enabled or disabled
0 0 1
1.5 Reports
89
OV1 Trip Overvoltage stage 1 trip
OV2 Trip Overvoltage stage 2 trip

OV1 Alarm Overvoltage stage 1 alarm
OV2 Alarm Overvoltage stage 2 alarm
1.6 Technical data
Table 54 Technical data for overvoltage protection
Voltage connection Phase-to-phase voltages or
phase-to-earth voltages
3 % setting or 1 V
Phase to earth voltage 40 to 100 V, step 1 V 3 % setting or 1 V
Phase to phase voltage 80 to 200 V, step 1 V 3 % setting or 1 V
Reset ratio 0.90 to 0.99, step 0.01 3 % setting
Time delay 0.00 to 60.00 s, step 0.01s 1 % setting or +50 ms, at
Reset time <40ms

90

Chapter 11 Undervoltage protection
91

About this chapter
undervoltage protection.

92
1 Undervoltage protection
1.1 Introduction
Undervoltage protection has the function to protect electrical equipment
against undervoltage. It can detect voltage collapses on transmission lines,
power transformer and electrical machines and prevents inadmissible
operation condition and a possible stability problem.
The protection provides following features:
Measuring voltage between phase-earth and phase-phase voltage
selectable
Current criteria supervision
Circuit breaker aux. contact supervision
VT secondary circuit supervision, the undervoltage function will be
blocked when VT failure happens
Settable dropout ratio
1.2.1 Phase to phase underovltage protection
All the three phase voltages are measured continuously, and compared with
the corresponding setting value. If phase to phase voltage falls below the set
threshold and after expiry of the time delay, the protection IED will issue
alarm signal or trip command according to the users requirement.
There are two stages included in undervoltage protection, each stage can be
set to alarm or trip separately in binary setting, and the time delay for each
stage can be individually set. Thus, the alarming or tripping can be
time-coordinated based on how severe the voltage collapse, e.g. in case of
severe undervoltage happens, the trip command will be issued with a short
93
time delay, whereas for the less severe undervoltage, trip or alarm signal can
be issued with a longer time delay.
Furthermore, for the undervoltage protection, it is possible to set the IED to
operate either when all the measured phase-to-earth or phase-to-phase
voltages falls below the setting or when at least one of the phase-to-earth or
phase-to-phase voltage falls below the respective setting, which can be set in
binary setting.
1.2.2 Phase to earth undervoltage protection
The phase to earth undervoltage protection operates just like the phase to
phase protection except that it detects phase to earth voltages.
1.2.3 Depending on the VT location
Depending on the application, the voltage transformers are located on the
busbar side or on the line side. This results in a different behaviour of the
undervoltage protection.
Protection
IED
A
B
C
N
A
B
C

Figure 20 VT located at busbar side
Protection
IED
A
B
C
N
A
B
C

94
Figure 21 VT located at line side
When a tripping command is issued and the circuit breaker is open, full
voltage remains on the source side while the line side voltage drops to zero.
In this case, undervoltage protection may remain pickup which can be solved
in the IED by integrating additional current criterion. With the current criterion,
undervoltage protection can be maintained only when the undervoltage
criterion satisfied and a minimum current are exceeded. The undervoltage
protection would dropout as soon as the current fall below the corresponding
setting. If the voltage transformer is installed on the busbar side and it is not
desired to check the current flow, this criterion can be disabled by binary
setting.
When the VT located at line side, there is another circuit breaker auxiliary
contact supervision criterion for more security. With this feature, the IED
would issue a trip command when the circuit breaker is closed. This criterion
can be enabled or disabled via binary setting. If the voltage transformer is
installed on the line side and it is not desired to supervise the circuit breaker
position for undervoltage protection, the criterion can be disabled in binary
setting.
1.2.4 Logic diagram
95
OR
UVChkAllPhasedisabled
AND
UVChkAllPhaseenabled
OR
UVChkPEenabled
OR
UVChkAllPhasedisabled
AND
UVChkAllPhaseenabled
OR
UVChkPEdisabled
OR
UVChkCBstatusdisabled
OR
UVChkCBstatusenabled
UVChkCurrentdisabled
OR
UVChkCurrentenabled
AND
Func_UV
T_UV
UVTripenabled
UVTripdisabled
Ua<
Ub<
Uc<
Ua<
Ub<
Uc<
Uab<
Ubc<
Uca<
Uab<
Ubc<
Uca<
PhA(B,C)
CBOpen
IA(IB,IC)>
VTfail
Trip
Alarm

Figure 22 Logic diagram for undervoltage protection
96
UP1
UP2
UP3
RelayStartup
UV1Alarm
UV2Alarm
UV1Trip
UV2Trip
IP1
IP2
IP3
PhACBOpen
PhBCBOpen
PhCCBOpen

Signal Description
UP1 signal for voltage input 1
IP1 signal for current input 1
Table 56 Binary input list
Signal Description
Ph A CB Open Phase A open status of CB
Ph B CB Open Phase B open status of CB
Ph C CB Open Phase C open status of CB
Signal Description
UV1 Alarm Undervoltage protection stage 1 alarm
UV2 Alarm Undervoltage protection stage 2 alarm
UV1_Trip Undervoltage protection stage 1 trip
UV2_Trip Undervoltage protection stage 2 trip
97
1.4.1 Setting lists
Table 58 Undervoltage protection function setting list
U_UV1
Voltage setting for undervoltage
protection stage 1
40 V 5.00 150.0
T_UV1
Time setting for undervoltage protection
stage 1
0.3 s 0.00 120.00
U_UV2
Voltage setting for undervoltage
protection stage 2
45 V 5.00 150.0
T_UV2
Time setting for undervoltage protection
stage 2
0.6 s 0.00 120.00
Dropout_UV
Dropout ratio for undervoltage
protection
1.05 1.01 2.00
I_UV_Chk Current setting for undervoltage 0.1In A 0.05 10.00
Table 59 Undervoltage protection binary setting list
Func_UV1
Undervoltage stage 1 enabled or
disabled
1 0 1
UV1 Trip
Undervotage stage 1 tripping
enabled or disabled
0 0 1
Func_UV2
disabled
1 0 1
UV2 Trip
enabled or disabled
0 0 1
UV PE
Phase to phase or phase to earth
measured for undervoltage
protection
1 0 1
UV Chk All Phase
Checking three phase voltage for
undervoltage protection
1 0 1
UV Chk Current
Checking current for
1 0 1
UV Chk CB
Checking CB aux. contact for
0 0 1
1.5 Reports
98
UV1 Trip Undervoltage stage 1 trip
UV2 Trip Undervoltage stage 2 trip
UV1 Alarm Undervoltage stage 1 alarm
UV2 Alarm Undervoltage stage 2 alarm
1.6 Technical data
Table 62 Technical data for undervoltage protection
Voltage connection Phase-to-phase voltages or
phase-to-earth voltages
3 % setting or 1 V
Phase to earth voltage 5 to 75 V , step 1 V 3 % setting or 1 V
Phase to phase voltage 10 to 150 V, step 1 V 3 % setting or 1 V
Reset ratio 1.01 to 2.00, step 0.01 3 % setting
Time delay 0.00 to 120.00 s, step 0.01 s 1 % setting or +50 ms, at
Current criteria 0.08 to 2.00 Ir 3% setting or 0.02Ir
Reset time 50 ms

Chapter 12 Displacement voltage
protection
99
protection

About this chapter
displacement voltage protection.

protection
100
1 Displacement voltage protection
1.1 Introduction
The displacement voltage protection is able to monitor the displacement
voltage to detect the earth fault in power system. It is usually applied in
non-solidly earthed networks where the earth fault current is limited.
The protection provide following features:
3U
0
based on calculated summation of 3 phase voltage or measured
injected residual voltage
The displacement voltage 3U
0
can be either directly measured from VT or
calculated based on connected three phases to earth voltages (3V
0
= V
A
+ V
B
+
V
C
). In the latter case, the three voltages transformers input must be
connected in an earth-wye configuration.
If the displacement voltage is directly applied to the IED and binary setting
3U0 Calculated is disabled, the protection is not affected by VT fail detection
on three-phase connected voltage. Similarly, if the displacement voltage is
calculated based on the three-phase voltages and binary setting 3U0
Calculated is enabled, it would not be blocked as a result of failure detection
in U
4
voltage transformer. However, in case of a failure in U
4
voltage
transformer and the displacement voltage protection based on measured
value 3V
0
would be blocked.
Two definite time stages are provided by the displacement voltage protection
for detecting earth faults. The provided stages can be set to issue an alarm
signal or a trip command. This can be achieved by binary setting. Generally,
stage 1 is applied to monitor light earth faults and hence is usually used as
the alarm stage. However, stage 2 is applied to detect heavy earth faults and
therefore is set for trip stage.
protection
101
Individual pickup value for the each definite stage can be set in setting value.
The measured or calculated displacement voltage is compared separately
with the corresponding setting value with delay time. If the displacement
voltage exceeds the associated pickup value, after expiry of the time delay,
the trip command is issued.
1.2.2 Logic diagram
AND
AND
Func_3V01
T_3V01
T_3V02
Func_3V02
3U0>U_3V01
3U0>U_3V02
Trip/Alarm
Trip/Alarm
3U0Calculated
1
U3PVTFail
CBOpenA
CBOpenB
CBOpenC
OR
AND

Figure 23 Logic diagram for displacement voltage protection
UP1
UP2
UP3
RelayStartup
3V01Alarm
3V02Alarm
3V01_Trip
3V02_Trip
UP4

protection
102
Signal Description
Signal Description
3V01 Alarm
Displacement voltage protection stage 1
alarm
3V02 Alarm
Displacement voltage protection stage 2
alarm
3V01_Trip Displacement voltage protection stage 1 trip
3V02_Trip Displacement voltage protection stage 2 trip
1.4.1 Setting lists
Table 65 Function setting list for displacement voltage protection
U_3V01
Voltage setting for displacement voltage
protection stage 1
20 V 2.00 100.0
T_3V01
Time setting for displacement voltage
protection stage 1
0.1 s 0.00 60.00
U_3V02
Voltage setting for displacement voltage
protection stage 2
10 V 2.00 100.0
T_3V02
Time setting for displacement voltage
protection stage 2
1 s 0.00 60.00
Table 66 Binary setting list for displacement voltage protection
Func_3V01
Displacement voltage stage 1
enabled or disabled
1 0 1
3V01 Trip
Displacement voltage stage 1 trip
or alarm
0 0 1
protection
103
Func_3V02
enabled or disabled
1 0 1
3V02 Trip
Displacement voltage stage 2 trip
or alarm
0 0 1
3U0 Calculated
Displacement voltage is
calculated or measured form VT
1 0 1
3V0 Init CBF
Displacement voltage protection
initiate CBF enabled or disabled
0 0 1
1.5 Reports
3V01 Trip Displacement voltage stage 1 trip
3V02 Trip Displacement voltage stage 2 trip
3V01 Alarm Displacement voltage stage 1 alarm
3V02 Alarm Displacement voltage stage 2 alarm
1.6 Technical data
Table 69 Technical data for displacement voltage protection
Pickup threshold 3V0
(calculated)
2 to 100 V, step 1 V 5 % setting value or 1 V
Time delay 0.00 to 60.00 s, step 0.01s 1 % setting or +50 ms, at
Reset ratio Approx. 0.95

protection
104

Chapter 13 Circuit breaker failure
protection
105
protection

About this chapter
signals, parameter, IED report and technical data used for circuit
breaker failure protection.

protection
106
1 Circuit breaker failure protection
1.1 Introduction
The circuit breaker failure (CBF) protection function monitors proper tripping
of the relevant circuit breaker. Normally, the circuit breaker should be tripped
and therefore interrupt the fault current whenever a short circuit protection
function issues a trip command. Circuit breaker failure protection provides
rapid back-up fault clearance, in the event of circuit breaker malfunction to
respond to a trip command.
Bus
IFAULT
Trip
Line2 Line3
LineN

Figure 24 Simplified function diagram of circuit breaker failure protection
The main features of CBF protection is as following:
Two trip stages (local and surrounding breaker tripping)
Transfer trip command to the remote line end in second stage
Internal/ external initiation
Single/three phase CBF initiation
Selectable CB Aux contacts checking
Current criteria checking (including phase current, zero and negative
sequence current)
protection
107
1.2 Function Description
Circuit breaker failure protection can be enabled or disabled in the IED by
binary setting. If the CBF protection is enabled, by operation of a protection
function and subsequent CBF initiation by respective protection function or
externally, a programmed timer will run toward a preset time delay limit. This
time delay is set by settings T_CBF1. If the circuit breaker has not been
opened after expiration of the preset time limit, the IED issues a command to
trip circuit breaker (e.g. via a second trip coil). If the circuit breaker doesnt
respond to the repeated trip command, until another preset delay time which
is set to T_CBF2, the protection will issue a trip command to isolate the fault
by tripping other surrounding backup circuit breakers (e.g. the other CBs
connected to the same bus section as the faulty CB).
Initiation of CBF protection can be performed by both internal and external
protection functions. If CBF protection is desired to be initiated by means of
external protection functions, specified binary inputs (BI) should be
marshaled. This IED provides 4 binary inputs for externally initiation of
integrated CBF function. One of them is 3-phase CBF initiation and other
three are for phase selective CBF initiation in the case of single phase
tripping when single phase AR is allowed.
There are two criteria for breaker failure detection: the first one is to check
whether the actual current flow effectively disappeared after a tripping
command had been issued. The second one is to evaluate the circuit breaker
auxiliary contact status.
1.2.1 Current criterion evaluation
Since circuit breaker is supposed to be open when current disappears from
the circuit, the first criterion (current monitoring) is the most reliable way for
IED to be informed about proper operation of circuit breaker. Therefore,
current monitoring is applied to detect circuit breaker failure condition. In this
context, the monitored current of each phase is compared with the
pre-defined setting. Furthermore, it is possible to implement current checking
in case of zero-sequence (3I
0
= I
A
+I
B
+I
C
) and negative-sequence
(3I
2
=I
A
+a
2
I
B
+aI
C
) currents via binary setting. If the zero-sequence and
negative-sequence current checking are enabled, zero sequence and
negative-sequence current are compared separately with the corresponding
threshold.
1.2.2 Circuit breaker auxiliary contact evaluation
protection
108
For protection functions where the tripping criterion is not dependent on
current, current flow is not a suitable criterion for proper operation of the
breaker. In this case, the position of the circuit breaker auxiliary contact
should be used to determine if the circuit breaker properly operated. It is
possible to evaluate the circuit breaker operation from its auxiliary contact
status. A precondition for evaluating circuit breaker auxiliary contact is that
open status of CB should be marshaled to binary inputs.
1.2.3 Logic diagram
CBFChk3I0/3I2Off
CBFChk3I0/3I2
OR
AND
OR
OR
CBFChk3I0/3I2Off
CBFChk3I0/3I2
OR
AND
OR
CBFChk3I0/3I2Off
CBFChk3I0/3I2
OR
AND
OR
Ia>I_CBF
3I0>3I0_CBF
3I2>3I2_CBF
Ib>I_CBF
Ic>I_CBF
Ib>I_CBF
3I0>3I0_CBF
3I2>3I2_CBF
Ic>I_CBF
Ia>I_CBF
Ic>I_CBF
3I0>3I0_CBF
3I2>3I2_CBF
Ia>I_CBF
Ib>I_CBF
CBFCurr.Crit.
A
CBFCurr.Crit.
B
CBFCurr.Crit.
C
CBFCurr.Crit.
3P

Figure 25 Logic diagram for current criterion of CBF protection
protection
109
OR
AND
AND
OR
AND
AND
OR
AND
AND
OR
AND
AND
CBFChkBI_3PhCB
Close
AND
1
BI_PhACB
Open
PhAInitCBF
CBFCurr.Crit.
3P
BI_PhBCBOpen
PhBInitCBF
CBFCurr.Crit.
3P
BI_PhCCBOpen
PhCInitCBF
CBFCurr.Crit.
3P
BI_PhACBOpen
BI_PhBCBOpen
BI_PhCCBOpen
BI_3PhCBClose
3PhInitCBF
CBFCurr.Crit.
3P
CBAis
closed
CBBis
closed
CBCis
closed
CB1Pisclosed

Figure 26 Logic diagram for circuit breaker auxiliary contact evaluation
protection
110
OR
Talm
AND
OR
AND
OR
AND
OR
AND
AND
AND OR
AND
BI_PhAInit
CBF
BI_PhBInitCBF
BI_PhCInit
CBF
BI_3PhInitCBF
BI_PhAInitCBF
InterPhAInit
CBF
BI_PhBInitCBF
InterPhBInit
CBF
BI_PhCInit
CBF
InterPhCInit
CBF
BI_3PhInitCBF
Inter3PhInitCBF
BI_CBFErr
PhAInitCBF
PhBInitCBF
PhCInitCBF
3PhInitCBF

Figure 27 Logic diagram for internal and external initiation
protection
111
AND
OR
CBFChkCBStatus
AND
OR
CBFChkCBStatus
AND
OR
CBFChkCBStatus
AND
OR
CBFChkCBStatus
CBAisclosed
CBFCurr.Crit.
A
PhAInitCBF
CBBisclosed
CBFCurr.Crit.
B
PhBInitCBF
CBCisclosed
CBFCurr.Crit.
C
PhCInitCBF
CB1Pisclosed
CBFCurr.Crit.
3P
3PhInitCBF
CBFAStartup
CBFBStartup
CBFCStartup
CBF3PStartup

Figure 28 Logic diagram for CBF protection startup
protection
112
AND
Func_CBFOn
T_CBF1
AND
AND
OR
OR
OR
OR
Func_CBFOn
Func_CBFOn
Func_CBFOn
CBFAStartup
CBFBStartup
CBFCStartup
CBF3PStartup
CBF1TripPhA
CBF1TripPhB
CBF1TripPhC
CBF1Trip3Ph
T_CBF1
T_CBF1
T_CBF1

Figure 29 Logic diagram for first stage of CBF
AND
AND
AND
Func_CBF
On
T_CBF1PTrip3P
Func_CBF
On
Func_CBF
On
OR
CBF1PTrip3POn
CBF1PTrip3POn
CBF1PTrip3POn
CBFAStartup
CBFBStartup
CBFCStartup
CBF1Trip3Ph
CBF11PTrip
3P
T_CBF1PTrip3P
T_CBF1PTrip3P

Figure 30 Logic diagram for three-phase trip initiated by single phase startup
Func_CBFOn
T_CBF2
Func_CBFOn
Func_CBFOn
Func_CBFOn
OR
CBFAStartup
CBFBStartup
CBFCStartup
CBF3PStartup
CBF2Trip
T_CBF2
T_CBF2
T_CBF2

protection
113
Figure 31 Logic diagram for second stage of CBF
IP1
CBF1Trip
IP2
IP3
PhAInitCBF
PhBInitCBF
PhCInitCBF
3PhInitCBF
CBF2Trip
PhACBOpen
PhBCBOpen
PhCCBOpen
TripPhA
TripPhB
TripPhC
Trip3Ph
RelayStartup
3PhCBClose
IN

Signal Description
IN signal for zero sequence current input
Signal Description
PhA Init CBF PhaseA initiate CBF
PhB Init CBF PhaseB initiate CBF
PhC Init CBF PhaseC initiate CBF
3Ph Init CBF Three phase initiate CBF
PhA CB Open PhaseA CB open
PhB CB Open PhaseB CB open
PhC CB Open PhaseC CB open
3Ph CB Close Three phase CB close
Signal Description
Trip PhA Trip phase A
protection
114
Trip PhB Trip phase B
Trip PhC Trip phase C
CBF1 Trip Circuit breaker failure protection stage 1 trip
1.4.1 Setting lists
Table 73 CBF protection function setting list
I_CBF
Phase current setting for circuit breaker
fail startup
0.5In A 0.05 100.0
3I0_CBF
Zero sequence current setting for
circuit breaker fail startup
0.2In A 0.05 100.0
3I2_CBF
Negative sequence current setting for
circuit breaker fail startup
0.2In A 0.05 100.0
T_CBF1
Delay time setting for stage 1 of circuit
breaker fail startup
0 s 0.00 32.00
T_CBF 1P Trip 3P
Time setting for single phase to trip
three phase for stage 1 of circuit
breaker fail
0.1 s 0.05 32.00
T_CBF2
0.2 s 0.10 32.00
Table 74 CBF protection binary setting list
Func_CBF CBF protection enabled or disabled 1 0 1
CBF 1P Trip 3P
Three pole trip by one pole failure
for CBF protection enabled or
disabled
0 0 1
CBF Chk 3I0/3I2
zero- and negative-sequence
current checked by CBF protection
1 0 1
CBF Chk CB Status
CB auxiliary contact checked for
CBF protection
0 0 1
CBF Chk
BI_3Ph_CB_Close
Checking three phase CB close
status via binary input for CBF
protection
0 0 1
protection
115
1.5 Reports
1.6 Technical data
NOTE:
Table 76 Technical data for circuit breaker failure protection
phase current
Negative sequence current
zero sequence current
0.08 Ir to 20.00 Ir 3% setting or 0.02Ir
Time delay of stage 1 0.00s to 32.00 s, step 0.01s 1% setting or +25 ms, at
200% operating setting Time delay of stage 2 0.00s to 32.00 s, step 0.01s
Reset ratio >0.95
Reset time of stage 1 < 20ms

protection
116

Chapter 14 Dead zone protection
117

About this chapter
signals, parameter, IED report and technical data used for dead
zone protection.

118
1 Dead zone protection
1.1 Introduction
The IED provides this protection function to protect dead zone, namely the
area between circuit breaker and CT in the case that CB is open. Therefore,
by occurrence of a fault in dead zone, the short circuit current is measured by
protection IED while CB auxiliary contacts indicate the CB is open.
This protection can be enabled or disabled by dedicated binary setting. If the
protection function is enabled, by operation of a protection function, and
subsequent CBF initiation by respective protection function, a programmed
timer runs toward a preset time delay limit. This time delay is set by user in
setting. If the fault current has not been disappeared after expiration of the
preset time limit even now the circuit breaker has been opened, the dead
zone protection would issue a trip command to isolate the fault by tripping
other surrounding backup circuit breakers (e.g. the other CBs connected to
the same bus section as the faulty CB).
When one bus side CT of feeder or transformer is applied, once a fault occurs
in the dead zone, the IED trips the relevant busbar zone. Tripping logic is
illustrated in Figure 32.
119
Bus
IFAULT
Trip
Line1 Line2 LineN
Opened CB
Closed CB
Legend:

Figure 32 Tripping logic when applying bus side CT
When one line side CT is applied and a fault occurs in the dead zone,
protection IED sends a transfer trip to remote end relay to isolate the fault.
Tripping logic is illustrated in Figure 33.
120
Bus
IFAULT
Relay
Inter trip
Line1 Line2 LineN
Trip
Opened CB
Closed CB
Legend:

Figure 33 Tripping logic when applying line side CT
When one transformer side CT is applied and a fault occurs in the dead zone,
protection relay trip the circuit breakers of the others transformer winding.
Tripping logic is illustrated in Figure 34.

121
Bus2
IFAULT
trip
T1
L1 Ln
Bus1
Bus3
OpenedCB
ClosedCB
Legend:

Figure 34 Tripping logic when applying transformer side CT
1.2.2 Logic diagram
122
OR
OR
AND
AND
AND
Func_DeadZoneOn
T_DeadZone
PhAInitCBF
PhBInitCBF
PhCInitCBF
3PhInitCBF
CBFCurr.Crit.
A
CBFCurr.Crit.
B
CBFCurr.Crit.
C
BI_PhACB
Open
BI_PhBCB
Open
BI_PhCCB
Open
BI_3PhCB
Close
DeadZoneTrip

Figure 35 Logic diagram for dead zone protection logic
IP1
DeadZoneTrip IP2
IP3
PhAInitCBF
PhBInitCBF
PhCInitCBF
3PhInitCBF
PhACBOpen
PhBCBOpen
PhCCBOpen
RelayStartup
3PhCBClose

Signal Description
123
Signal Description
PhA Init CBF PhaseA initiate CBF
PhB Init CBF PhaseB initiate CBF
PhC Init CBF PhaseC initiate CBF
3Ph Init CBF Three phase initiate CBF
3Ph CB Close Three phase CB Close
Signal Description
DeadZone_Trip Dead Zone protection trip
1.4.1 Setting lists
Table 80 Dead zone protection function setting list
T_Dead Zone
Time delay setting for dead zone
protection
1 s 0.00 32.00
Table 81 Dead zone protection binary setting list
Func_Dead Zone
Dead Zone protection operating
mode
1 0 1
1.5 Reports
Dead Zone Trip Dead zone trip
124
1.6 Technical data
NOTE:
Table 83 Technical data for dead zone protection
Time delay 0.00s to 32.00s, step 0.01s 1% setting or +40 ms, at
Reset ratio >0.95

Chapter 15 STUB protection
125

About this chapter
signals, parameter, IED report and technical data used for STUB
protection.

126
1 STUB protection
1.1 Introduction
The VT is mostly installed at line side of transmission lines. Therefore, for the
cases that transmission line is taken out of service and the line disconnector
is opened, the distance protection will not be able to operate and must be
blocked.
The STUB protection protects the zone between the CTs and the open
disconnector. The STUB protection is enabled when the open position of the
disconnector is connected to IED binary input. The function supports one
definite stage which related concept is shown in Figure 36.
Stubfault
CB1
CB3
CB3
CT1-1
CT3-1
CT3-2
CT2-2
Disconnector1
Disconnector2
Feeder1
Feeder2
BusbarA
BusbarB
CT1-2
CT2-1

Figure 36 STUB fault at circuit breaker arrangement
If a short circuit current flows while the line disconnector is open, this implies
that a fault in the STUB range between the current transformers and the line
127
disconnector occurs. The circuit breakers CB1 and CB2 that carry the
short-circuit current can be tripped without delay time.
The STUB protection is an overcurrent protection which is only in service
when the state of the line disconnector indicates the open condition via a
binary input. The binary input must therefore be operated via an auxiliary
contact of the disconnector. In the case of a closed line disconnector, the
STUB protection is out of service. The STUB protection stage provides one
definite time overcurrent stage with settable delay time. This protection
function can be enabled or disabled via the binary setting.
1.2.2 Logic diagram
T_STUB
AND
Func_STUB
Ia(b,c)>I_STUB
STUBEnable
Permanenttrip

Figure 37 Logic diagram for STUB protection
IP1
STUBTrip IP2
IP3
RelayStartup
STUBEnable

Signal Description
128
Signal Description
STUB Enable STUB Enable
Signal Description
STUB Trip STUB Trip
1.4.1 Setting lists
Table 87 Setting value list for STUB protection
I_STUB Current setting of STUB protection 1.2In A 0.05 100.0
T_STUB Time setting of STUB protection 1 s 0.00 60.00
Table 88 Binary setting list for STUB protection
Func_STUB STUB protection enabled or disabled 1 0 1
STUB Init CBF STUB protection initiate CBF protection 1 0 1
1.5 Reports
STUB Trip STUB protection trip
1.6 Technical data
NOTE:
Table 90 Technical data for STUB protection
129
Reset ratio >0.95

130

Chapter 16 Poles discordance
protection
131
protection

About this chapter
signals, parameter, IED report and technical data for poles
discordance protection.

protection
132
1 Poles discordance protection
1.1 Introdcution
Under steady-state operating condition, all three poles of circuit breaker must
be closed or open at the same time. The phase separated operating circuit
breakers can be in different positions (close-open) due to electrical or
mechanical failures. This can cause negative and zero sequence currents
which gives thermal stress on rotating machines and can cause unwanted
operation of zero sequence or negative sequence current functions.
The pole discordance function operates based on information from auxiliary
contacts of the circuit breaker for the three phases with additional criteria from
unsymmetrical phase current.
The CB position signals are connected to IED via binary input in order to
monitor the CB state. Poles discordance condition is established when at
least one pole is closed and at the same time not all three poles are closed.
Additionally, the current criteria are processed. Pole discordance can be
detected when current is not flowing through all three poles, i.e. through only
one or two poles. When current is flowing through all three poles, all three
poles must be closed even if the breaker auxiliary contacts indicate a different
status.
1.2.2 Logic diagram
protection
133
AND
AND
AND
OR
AND
AND
AND
AND
OR
AND
OR
AND
5s
500ms
Func_PDOn
T
PhACBOpen
Ia>0.06IN
PhBCBOpen
Ib>0.06IN
PhCCBOpen
Ic>0.06IN
PhACBOpen
PhBCBOpen
PhCCBOpen
PhACBOpen
Ia<0.06IN
PhBCBOpen
Ib<0.06IN
PhCCBOpen
Ic<0.06IN
3I2>3I2_PD
3I0>3I0_PD
CBErrBlkPD
PDTrip
PDChk3I0/3I2OFF
PDChk3I0/3I2ON
BI_ARInProgress1

Figure 38 Logic diagram for poles discordance protection
protection
134
IP1
IP2
IP3
PhACBOpen
PhBCBOpen
PhCCBOpen
PDTrip
RelayStartup
IN

Signal Description
IN Signal for zero sequence current input
Signal Description
Signal Description
Trip 3Ph Trip three phase
PD_Trip Poles discordance protection trip
1.4.1 Setting lists
Table 94 Function setting list for poles discordance protection
3I0_PD
Zero sequence current setting value for
PD protection
0.4In A 0.05 100.0
protection
135
3I2_PD
Negative sequence current setting value
for PD protection
0.4In A 0.05 100.0
T_PD Time setting value for PD protection 2 s 0.00 60.00
Table 95 Binary setting list for poles discordance protection
Func_PD
Enable or disable poles discordance
protection
1 0 1
PD Chk 3I0/3I2
Enable or disable 3I0/3I2 checking
criteria
0 0 1
PD Init CBF PD protection initiate CBF protection 1 0 1
1.5 Reports
PD Trip Poles discordance protection trip
1.6 Technical data
NOTE:
Table 97 Technical data for poles discordance protection
Reset ratio >0.95

protection
136

Chapter 17 Synchro-check and
energizing check function
137

About this chapter
signals, parameter, IED report and technical data used in
synchro-check and energizing check function.

138
1 Synchro-check and energizing check
function
1.1 Introduction
The synchronism and voltage check function ensures that the stability of the
network is not endangered when switching a line onto a busbar. The voltage
of the feeder to be energized is compared to that of the busbar to check
conformances in terms of magnitude, phase angle and frequency within
certain tolerances.
The synchro-check function checks whether the voltages on both sides of the
circuit breaker are synchronizing, or at least one side is dead to ensure
closing can be done safely.
When comparing the two voltages, the synchro check uses the voltages from
busbar and outgoing feeder. If the voltage transformers for the protective
functions are connected to the outgoing feeder side, the reference voltage
has to be connected to a busbar voltage.
If the voltage transformers for the protective functions are connected to the
busbar side, the reference voltage has to be connected to a feeder voltage.
Note:
For synchro-check function properly operating, the reference voltage
(single phase voltage) must be phase to earth voltage.
The voltage phase for synchro-ckeck and energizing check can be
identified automatically by protection IED and not need be set.
1.2.1 Synchro-check mode
The voltage difference, frequency difference and phase angle difference
values are measured in the IED and are available for the synchro-check
function for evaluation.
By any synchronization request, the synchronization conditions will be
139
checked continuously. If the line voltages and busbar voltages are larger than
the value of U
min
_Syn and meet the synchronization conditions,
synchronized reclosing can be performed.
At the end of the dead time, synchronization request will be initiated and the
synchronization conditions are continuously checked to be met for a certain
time during maximal extended time T_MaxSynExt. By satisfying
synch-check condition in this period, the monitor timer will stop and close
command will be issued for AR.
Before releasing a close command at synchronization conditions, all of the
following conditions should be satisfied:
All three phases voltage U(a,b,c) should be above the setting value
Umin_Syn.
The reference voltage should be above the setting value Umin_Syn.
The voltage difference should be within the permissible deviation U_Syn
Diff
The angle difference should be within the permissible deviation
Angle_Syn Diff
The frequency difference should be within the permissible deviation
Freq_Syn Diff
1.2.2 Energizing check mode
In this mode of operation, the low voltage (dead) condition is checked
continuously whenever synchronization check is requested. If the line
voltages are less than Umax_Energ, reclosing can be performed. If the line
voltages and busbar voltages are all larger than Umin_Syn, the check mode
will automatically turn to full synchronization check mode.
In auto-recloser procedure, synchronization check request is triggered at the
end of the dead time. If the low voltage conditions are continuously met for a
certain numbers and during maximum extended time T_MaxSynExt, the
monitor timer will stop and close command will be issued for AR.
Before releasing a close command in low voltage conditions, one of the
following conditions need to be checked according to requirement:
140
Energizing check for dead line and live bus for AR enabled or disabled,
when the control word AR_EnergChkDLLB is on
Energizing check for live line and live bus for AR enabled or disabled,
when the control word AR_EnergChkLLDB is on
Energizing check for dead line and dead bus for AR enabled or disabled,
when the control word AR_EnergChkDLDB is on
1.2.3 Override mode
In this mode, auto-reclosing will be released without any check.
1.2.4 Logic diagram
141
AR_EnergChkDLLBon
VT_Lineoff
T_MaxSynExt
Ua(Ub,Uc)>U
min
_Syn
U4>U
min
_Syn
Angle
diff
<Angle_SynDiff
Freq
diff
<Freq_SynDiff
U
diff
<U_SynDiff
AND
AND T_SynCheck
Synchr-check
meet
Synchr-checkfail
AND
U4<Umax_Energ
Ua(Ub,Uc)>Umin_Syn
AR_EnergChkLLDBon
VT_Lineoff
AND
U4>Umin_Syn
Ua(Ub,Uc)
<Umax_Energ
AR_EnergChkDLDBon
AND
U4<Umax_Energ
Ua(Ub,Uc)
<Umax_Energ
AR_EnergChkDLLBon
VT_Lineon
AND
U4>Umin_Syn
Ua(Ub,Uc)
<Umax_Energ
AR_EnergChkLLDBon
VT_Lineon
AND
U
4
<Umax_Energ
Ua(Ub,Uc)
>Umin_Syn
OR
Energizingcheckmeet

Figure 39 Logic diagram for synchro-check function
142
UP1
UP2
UP3
UP4

Signal Description
1.4.1 Setting lists
Table 99 Synchro-check function setting list
Angle_Syn Diff
Angle difference for synchronization
check
30 Degree 1.00 80.00
U_Syn Diff
Voltage difference for synchronization
check
10 V 1.00 40.00
Freq_Syn Diff
Frequency difference for
synchronization check
0.05 Hz 0.02 2.00
T_Syn Check Time for synchronization check 0.05 s 0.00 60.00
T_MaxSynExt
Maximum time for exiting
10 s 0.05 60.00
Umin_Syn
Minimum voltage for synchronization
check
40 V 30.00 65.00
Umax_Energ
Maximum voltage for Energizing
check
30 V 10.00 50.00
Table 100 Synchro-check binary setting list
AR_Override
Override mode for AR enabled or
disabled
1 0 1
AR_EnergChkDLLB Dead line live bus of energizing 0 0 1
143
check for AR enabled or disabled
AR_EnergChkLLDB
Live line dead bus of energizing
0 0 1
AR_EnergChkDLDB
Dead line dead bus of energizing
0 0 1
AR_Syn check
Synchronization check for AR
enabled or disabled
0 0 1
1.5 Reports
Syn Request Begin to synchronization check
AR_EnergChk OK Energizing check OK
Syn Failure Synchronization check timeout
Syn OK Synchronization check OK
Syn Vdiff fail Voltage difference for synchronization check fail
Syn Fdiff fail Frequency difference for synchronization check fail
Syn Angdiff fail Angle difference for synchronization check fail
EnergChk fail Energizing check fail
SYN Voltage Err Voltage abnormity for synchronization check

1.6 Technical data
NOTE:
Table 103 Synchro-check and voltage check technical data
Operating mode
Synchronization check:
Synch-check
Energizing check, and

144
synch-check if
energizing check failure
Override
Energizing check:
Dead V4 and dead V
3Ph

Dead V4 and live V
3Ph

Live V4 and dead V
3Ph

Voltage threshold of dead line
or bus
10 to 50 V (phase to earth),
step 1 V
3 % setting or 1 V
Voltage threshold of live line
or bus
30 to 65 V (phase to earth),
step 1 V
3 % setting or 1 V
V-measurement Voltage
difference
1 to 40 V (phase-to-earth),
steps 1 V
1V
f-measurement (f2>f1;
f2<f1)
0.02 to 2.00 Hz, step, 0.01
Hz,
20 mHz
-measurement (2>1;
2<1)
1 to 80 , step, 1 3
Minimum measuring time 0.05 to 60.00 s, step,0.01 s, 1.5 % setting value or +60
ms
Maximum synch-check
extension time
0.05 to 60.00 s, step,0.01 s, 1 % setting value or +50
ms

Chapter 18 Auto-reclosing function
145

About this chapter
auto-reclosing function.

146
1 Auto- reclosing
1.1 Introduction
For restoration of the normal service after a fault, an auto-reclosing attempt is
mostly made for overhead lines. Experiences show that about 85% of faults
are transient and can disappear when an auto-reclosing attempt is performed.
This means that the line can be connected again; the reconnection is
accomplished after a dead time via the automatic reclosing system. If the fault
still exists after auto-reclosing, for example, arc has not been cleared, the
protection will re-trip the circuit breaker (hereinafter is referred as CB).
Auto-reclosing is only permitted on overhead lines because a short circuit arc
can be extinguished only in overhead lines and not cable feeders. Main
features of the auto-reclosing function (hereinafter is referred as AR) are as
following:
4 shots auto-reclosing (selectable)
Individually settable dead time for three phase and single phase fault and
for each zone
External AR initiation
Single/three phase AR operation
CB ready supervision
CB Aux. interrogation
Cooperation with internal synch-check function for reclosing command
Applicable for one and a half breaker arrangement
The AR is able to cooperate with single-pole operated CB as well as
three-pole operated CB. The function provides up to 4 auto-reclosing shots
that can be determined by setting, Times_AR. Moreover, since the time
required for extinguishing short circuit arc is different for single or three phase
faults, the different dead time settings, T_1P ARn and T_3P ARn ( n
represents 1, 2, 3, or 4), AR have been provided to set single-pole tripping
dead time and three-pole tripping dead time of each shot separately.
1.2.1 Single-shot reclosing
147
When an external trip command initiates AR function, the reclosing program
is being executed. Dead time will be started by falling edge of the external
initiation signal. When dead time interval T_1P AR1 or T_3P AR1 has
elapsed, monitoring time T_MaxSynExt is started. During this period,
whenever synchronization condition is continuously met for T_Syn Check, a
closing pulse signal is issued. At the same time, reclaim time T_Reclaim is
started. If a new fault occurs before the reclaim time elapses, AR function is
blocked and cause final tripping of CB. However, if no fault occurs in reclaim
time, AR is reset and therefore will be ready for future reclosing attempts.
The typical tripping-reclosing procedure of single shot reclosing scheme, is
illustrated in time sequence diagrams,
, and is described as following:
1) After trip command issued, CB will be opened in a short time.
2) The auto-reclosing is initiated when the current is cleared.
3) After the auto-reclosing delay time, T_1P AR1 (or T_3P AR1), elapses,
the reclosing command is issued if all reclosing conditions (e.g. synchro-
-check for 3-pole tripping) are satisfied without any blocking reclosing
input.
4) The AR pulse lasts for T_Action.
5) At the moment that the closing signal is issued, reclaim timer T_Reclaim
is started. By the end of this period, T_Reclaim, If there is not fault
happening, auto-reclosing operation is successful and then the report,
AR Success, is issued.
6) From the end of reclaim time, auto-reclosing function is blocked for the
AR reset time T AR reset.
7) If another fault occurs after the time, T_AR Reset, elapses, the auto-
-reclosing is ready now, and then a new tripping-reclosing procedure is
started and performed in same way.
148
TripCommand
CBOpenPosItion
ARInitiate
ClosingCommand
T_Reclaim
T_Action
Fault
Synchro-checkor
voltagecheckOK
T_Reset
T_3PAR1
T_Action

Figure 40 Two transient three-phase faults, two tripping-reclosing procedures
1.2.2 Multi-shot reclosing
The first reclosing shot is, in principle, the same as the single-shot
auto-reclosing. If the first reclosing is unsuccessful, it doesnt result in a final
trip, if multi-shot reclosing is set to be performed. In this case, if a fault occurs
during reclaim time of the first reclosing shot, it would result in the start of the
next reclose shot with dead time T_1pAR1, T_1p AR2, T_1p AR3, T_1p
AR4, T_3P AR2, T_3P AR3 or T_3P AR4. This procedure can be
repeated until the whole reclosing shots which are set inside the device is
performed. Different dead times can be set to various shots of AR function.
This can be performed through settings T_1pAR1, T_1p AR2, T_1p AR3,
T_1p AR4, T_3p AR1, T_3p AR2, T_3p AR3, T_3p AR4. However, if
none of reclosing shots is successful, i.e. the fault doesnt disappear after the
last programmed shot, a final trip is issued, and reclosing attempts are
announced to be unsuccessful.
The typical tripping-reclosing procedure of two shots reclosing scheme, is
illustrated in time sequence diagrams,
, and is described as following:
1) After trip command issued, CB will be opened in a short time.
2) The auto-reclosing is initiated when the current is cleared.
149
3) After the auto-reclosing delay time, T_1P AR1 (or T_3P AR1), elapses,
the reclosing command is issued if all reclosing conditions (e.g. synchro-
-check for 3-pole tripping) are satisfied without any blocking reclosing
input.
4) The AR pulse lasts for T_Action.
5) At the moment that the closing signal is issued, reclaim timer T_Reclaim
is started.
6) If the circuit breaker is closed on a fault during the period between the
dropout of closing command and the end of T_Reclaim, second tripping-
-reclosing procedure for second shot is started and performed like the
first tripping-reclosing procedure.
7) In this way, following shots will be performed in sequence if applied.
8) If none of the reclosing is successful, in other words, the fault is still
remained after the last shot reclosing, the final trip takes place, and the
result is AR Fail and AR should be blocked for AR reset time.
9) If one of the preset reclosing shots is successful, meaning that, by the
end of this period, T_Reclaim, there is not fault happening again, the
report, AR Success, is issued.
10) From the end of reclaim time, auto-reclosing function is blocked for the
AR reset time T AR Reset.
11) If another fault occurs after the time, T_AR Reset, elapses, the auto-
-reclosing is ready now, and then a new multi shots tripping-reclosing
procedure is started and performed in same way.
150
TripCommand
CBOpenPosItion
ARInitiate
ClosingCommand
T_Reclaim
T_Action
Fault
Synchro-checkor
voltagecheckOK
T_Reset
T_3PAR1
T_Action

Figure 41 A permanent three-phase fault, two reclosing shots and final tripping
1.2.3 AR coordination between tie CB and side CB
When the AR function for side breaker is initiated, the protection IED will
issue the signal [WaitToSlave] to block the AR function for tie breaker. If the
AR for side breaker is successful, the signal [WaitToSlave] will dropout, and
the tie breaker will be reclosed immediately. If the AR for side breaker fails,
the AR for side breaker will send the signal AR_Fail and the signal
[WaitToSlave] will be kept during the time of the T_AR Reset. If the AR for
tie breaker receives the signal AR_Fail or the signal [WaitToSlave]
continuously for [T_WaitMaster], the AR for tie breaker will be blocked.
The following figure illustrates the key connection between AR for side CB
(CB 1 in figure) and tie CB (CB 3 in figure) for AR coordination.
151
CB1
CB3
CB2
CT1-2
CT3-2
CT3-1
CT2-1
Feeder1
BusbarA
BusbarB
BO:ARFail
BI:MC/ARBlock
BO:ARWaitToSlave
BI:ARWait
Feeder2
CT2-2
CT1-1
Figure 42 Connection of AR for tie CB blocked by AR for side CB
The typical tripping-reclosing procedure of single shot reclosing scheme for
coordination between side CB and tie CB of 3/2 breaker arrangement, is
illustrated in following two time sequence diagrams, and are described as
following:
The first diagram shows that:
1) After trip command issued, side CB and tie CB are opened in a short
time.
2) The auto-reclosing for side CB and for tie CB are initiated when the fault
current is cleared.
3) At the moment of side CB initiation, the binary output, AR_Wait to Slave,
is transmitted to AR for tie CB as the binary input, AR_Wait. As soon as
the BI is received, the timer, T_WaitMater of AR for tie CB is started.
4) The AR for tie CB can wait only and cannot issue the reclosing command,
until the binary input, AR_Wait dropout before the timer, T_WaitMater
of AR for tie CB elapses, even if the timer, T_1P AR1 (or T_3P AR1) of
AR for tie CB has elapsed.
5) After the auto-reclosing delay time, T_1P AR1 (or T_3P AR1) of AR for
152
side CB, elapses, the reclosing command is issued if all reclosing
conditions (e.g. synchro- -check for 3-pole tripping) are satisfied without
any blocking reclosing input. The side CB is reclosed.
6) At the moment that the closing signal for side CB is issued, reclaim timer
T_Reclaim of AR for side CB is started.
7) By the end of the period, T_Reclaim, if there is not fault happening,
auto-reclosing operation of side CB is successful. At the end of
T_Reclaim, the binary output, AR_Wait to Slave, of AR for side CB, is
dropped out. It means that, the binary input, AR_Wait of AR for tie CB is
dropped out.
8) The AR for tie CB will do synchronization check or voltage check
according the setting, as soon as the BI, AR_Wait of AR for tie CB is
dropped out.
9) If the auto-reclosing delay time, T_1P AR1 (or T_3P AR1) of AR for side
CB, has elapsed, the reclosing command is issued at once if all reclosing
any blocking reclosing input. The tie CB is reclosed.

153
TripCommand
SideCBOpenPosItion
ARforsideCB:ARInitiate
ARforsideCB:Closingcommand
ARfortieCB:T_Reclaim
T_Action
Fault
ARforsideCB:Synchro-check
orvoltagecheckOK
ARforsideCB:T_3PAR1
ARfortieCB:T_3PAR1
ARfortieCB:Closingcommand
T_Action
ARforsideCB:T_Reclaim
ARfortieCB:Synchro-check
orvoltagecheckOK
TieCBOpenPosItion
ARfortieCB::T_WaitMaster
BOofARforsideCB:WaittoSlave
BIofARfortieCB:ARWait
Figure 43 A transient fault, single shot scheme, coordination between AR for tie
CB and AR for side CB

154
The second diagram shows that:
1) After trip command issued, side CB and tie CB are opened in a short
time.
2) The auto-reclosing for side CB and for tie CB are initiated when the fault
current is cleared.
3) At the moment of side CB initiation, the binary output, AR_Wait to Slave,
is transmitted to AR for tie CB as the binary input, AR_Wait. As soon as
the BI is received, the timer, T_WaitMater of AR for tie CB is started.
4) The AR for tie CB can wait only and cannot issue the reclosing command,
until the binary input, AR_Wait dropout before the timer, T_WaitMater
of AR for tie CB elapses, even if the timer, T_1P AR1 (or T_3P AR1) of
AR for tie CB has elapsed.
5) After the auto-reclosing delay time, T_1P AR1 (or T_3P AR1) of AR for
side CB, elapses, the reclosing command is issued if all reclosing
any blocking reclosing input. The side CB is reclosed.
6) At the moment that the closing signal for side CB is issued, reclaim timer
T_Reclaim of AR for side CB is started.
7) During the reclaim timer T_Reclaim of AR for side CB, if the side CB is
reclosed on a permanent fault, the protection IED will trip the CB
instantaneously. At same time, the binary output, AR Failure is
transmitted to AR for tie CB as the binary input, MC/AR Block.
8) The AR for tie CB is blocked. The tie CB will keep open.
155
TripCommand
SideCBOpenPosItion
ARforsideCB:ARInitiate
ARforsideCB:Closingcommand
T_Action
Fault
ARforsideCB:Synchro-
checkorvoltagecheckOK
ARforsideCB:T_3PAR1
ARfortieCB:T_3PAR1
BOofARforsideCB:WaitToSlave
BIofARfortieCB:ARWAIT
ARforsideCB:T_Reclaim
TieCBOpenPosItion
ARfortieCB::T_WaitMaster
BOofARforsideCB:ARFailure
BIofARfortieCB:MC/ARBlock
ARforsideCB:T_Reset
ARfortieCB:T_Reset
ARfortieCB:ARInitiate
Figure 44 A permanent fault, single shot scheme, coordination between AR for
tie CB and AR for side CB

156
1.2.4 Auto-reclosing operation mode
For the IED, whether single-pole tripping operation or three-pole tripping
operation and whether AR is active or not is determined by following binary
settings and related binary inputs.
The relevant binary settings are described as following,
AR_1p mode
In this mode of operation, auto-reclosing function will be initiated by
single phase tripping condition as well as using the external single pole
binary input initiation. If the three-phase AR initiation binary input, 3Ph
Init AR, is active, the closing function will be blocked.
AR_3p mode
In this mode of operation, auto-reclosing function only operates for
three pole closing.
AR_1p(3p) mode
In this mode of operation, auto-reclosing function operates for both
single pole tripping as well as three pole tripping.
AR_Disable
By setting this binary setting to 1, auto-reclosing function will be off or
out of service.
Note: If any illegal setting has been done, AR FUNC Alarm is
reported.
Relay Trip 3pole
When AR is disabled, by setting this binary setting to 0, IED perform s
single- pole tripping at single phase fault and perform three-pole
tripping at multi-phase fault. Setting this binary setting to 1 will result in
three-pole tripping at any faults.
AR Final Trip
By setting this binary setting to 1, auto-reclosing function generates
a three pole trip command for an unsuccessful single pole reclosing.
In the AR_1P mode, after a single pole tripping, if auto- -reclosing
function is blocked suddenly during the dead time of a 1-pole reclosing
cycle, the circuit breaker will be kept in poles discordance state. To
avoiding this state, by binary setting AR Final Trip at 1, the IED will
issue a 3-pole trip command to open the rest of circuit breaker poles.
This binary setting is always used in the situation without pole
157
discordance protection applied.
1.2.5 Auto-reclosing initiation
AR can be initiated by external functions via four binary inputs:
PhA Init AR
External phase A tripping output initiates AR
PhB Init AR
External phase B tripping output initiates AR
PhC Init AR
External phase C tripping output initiates AR
3Ph Init AR
External three-phase tripping output initiates AR
1.2.6 Cooperating with external protection IED
The AR can cooperate with external protection IED. The AR can be initiated
or blocked by external protection IED via dedicated binary inputs.
Figure 45 shows the typical connect between AR binary inputs and external
protection IED binary outputs.
Protection
IED
Protection
IEDwithAR
BO-TripPhA
BO-TripPhB
BO-TripPhC
BI-PhAInitAR
BI-PhBInitAR
BI-PhCInitAR
BORelayBlockAR BI-MC/ARBlock
BI-AROFF
Off On
+
BO-Trip3Ph BI-3PhInitAR

Figure 45 Typical connection between two protection IEDs with/without AR
1.2.7 Auto-reclosing logic
Some important points regarded to auto-reclosing logic are described as
158
following:
In the case of blocking of auto-reclosing via MC/AR block, blocking will
be started by rising edge of MC/AR block and will be extended by
AR_Reset Time after falling edge of this binary input.
In the case of three phase reclosing with sychro-check requesting, dead
time can last for T_3P AR + T_MaxSynExt at most, from the
auto-reclosing initiation input end. In this condition, IED starts to check
synchronization conditions at the end of T_3P AR. Before the end of
period, T_MaxSynExt, if the synchronization conditions are
continuously met for the time,T_Syn Check at least, the close command
will be issued. After the end of period, T_MaxSynExt, if synchronization
conditions are still not continuously met, the report, AR Failure, will be
issued and the auto-reclosing function will be blocked for time, T_AR
Reset. The logic is illustrated in flowing time sequence diagram
TripCommand
CBOpenPosItion
ARInitiate
ClosingCommand
T_Reclaim
T_Action
Fault
Synchro-checkor
voltagecheckOK
T_SynCheck
T_MaxSynExt
T_3PAR1
t1 t3 t2 t4 t5 t6
T_Reset
Note:
T_SynCheck>t1,t2,t4,t5,t6;
T_SynCheckt3

Figure 46 A permanent three-phase fault, successful synchronizing for first
shot, fail synchronizing for second shot
159
Close command pulse lasts for T_Action at most. During this time, it
does not check synchronization conditions any longer. Before the end of
close command pulse, if any function tripping happen, the close
command is terminated.
TripCommand
CBOpenPosition
ARforCB:ARInitiate
ARforCB:Closingcommand
T_Action
Fault
ARforCB:Synchro-checkor
voltagecheckOK
ARforCB:T_3PAR1
ARforCB:T_Reclaim
ARforCB:T_Reset

Figure 47 A permanent three-phase fault, single shot. unsuccessful reclosing
To prevent automatic reclosing during feeder dead status (CB Open), for
example, in the IED testing, AR is initiated at first shot only when the CB
has been closed for more than setting time, T_AR Reset.
1.2.8 AR blocked conditions
If binary input AR Off is present, auto-reclosing function will be out of
service
Whenever the binary input MC/AR Block is received, auto-reclosing
function will be blocked for setting T_AR Reset.
Whenever circuit breaker abnormal condition is detected, auto-reclosing
160
function will be blocked.
In order to avoid auto-reclosing in the case of CB faulty, for example, CB
spring charge faulty, a binary input, CB Faulty, is considered to receive
CB ready status. Therefore, after synchronization check condition meets,
the input CB Faultywill be checked. If it doesnt disappear before time
period T_CB Faulty finishing, auto-reclosing will be blocked for T_AR
Reset.
1.2.9 Logic diagram
BI_PhAInitAR1-0
APhasenocurrent
BI_PhBInitAR1-0
AND
BPhasenocurrent
BI_PhCInitAR1-0
AND
CPhasenocurrent
OR
BI_PhAInitAR1-0
AND
BI_PhBInitAR1-0
3Phasenocurrent
BI_PhBInitAR1-0
AND
BI_PhCInitAR1-0
3Phasenocurrent
BI_PhCInitAR1-0
AND
BI_PhAInitAR1-0
3Phasenocurrent
OR
BI_3PhInitAR1-0
AND
3Phasenocurrent
SinglephaseStartupAR
AND
3phaseStartupAR
AND
Figure 48 Logic diagram 1 for auto-reclosing startup
Besides, auto-reclosing startup could also be triggered by circuit breaker
opening as following figure:
161
BI_PhACBOpen0-1
AND
OR
AND
BI_PhACBOpen0-1
AND
BI_PhBCBOpen0-1
OR
SinglephaseStartupAR
AND
3phaseStartupAR
3PCBOpenInitARon
BI_PhBCBOpen0-1
BI_PhCCBOpen0-1
3PCBOpenInitARon
AND
BI_PhCCBOpen0-1
BI_PhACBOpen0-1
3PCBOpenInitARon
1PCBOpenInitARon
BI_PhBCBOpen0-1
AND
1PCBOpenInitARon
BI_PhCCBOpen0-1
AND
1PCBOpenInitARon

Figure 49 Logic diagram 2 for auto-reclosing startup
AR_Chk3PVol=1
Ua(Ub,Uc)>Umin_Syn
OR
2)
t
AR_Chk3PVol=0
Note:
1)t=T_SynCheck
2)t=T_3PAR
3)t=T_MaxSynExt
AND
3)
0
1)
t 0
AND Check3PhVoltageOK
Check3Phfailure
t 0
Figure 50 Logic diagram of Checking 3 phase voltage
162
3PhTripping:0-1
PhATripping:0-1
BI_MC/ARblock:0-1
Backupprotectiontripping
Alarm:Relayfault
PhBTripping:0-1
PhBTripping:0-1
SinglephaseinitiateAR
NOcheck
AR_1pmode=1
AR_1p(3p)mode=1
EnergizingcheckOK
Synchro-checkOK
BI_CBFaulty
ARClosing
Check3PhVoltageOK
AND
OR
1)
AND
AR_1pmode=1
AR_1p(3p)mode=1
AND
OR
3phaseinitiateAR
AND
OR
2)
OR
AND
5)
Note:
1)t=T_1PAR;2)t=T_3PAR;3)t=T_MaxSynExt;4)t=T_CBFaulty;5)t=T_WaitMaster
ARfail
AR_3pmode=1
OR
Relaytrip3Ph=1
AR_1pmode=1
AND
OR
AND
ARLockout
BI_ARoff:0-1
AR_Disable=1
CB_Master=0
OR
AND
t 0
t 0
t 0
t 0
3)
BI_ARWait:0-1
t 0
4)
OR
AND
RelayTrip3pole=1
Mode_3/2CB=1
Mode_3/2CB=0
AND
OR
CB_Master=1
Mode_3/2CB=1
AND

Figure 51 Logic diagram of auto-reclosing
163
IP1
IP2
IP3
PhAInitAR
ARoff
PhBInitAR
PhCInitAR
3PhInitAR
MC/ARBlock
ARClose
ARLockout
ARNotReady
ARFinalTrip
ARInProgress
ARSuccessful
ARFail
CBFaulty
UP1
UP2
UP3
PhACBOpen
PhBCBOpen
PhCCBOpen
3PhCBClose
ARWaitToSlave
ARWait
UP4
V1PMCBFail

Signal Description
Signal Description
AR Off AR function off
MC/AR Block AR block
PhA Init AR PhaseA initiate AR
PhB Init AR PhaseB initiate AR
PhC Init AR PhaseC initiate AR
3Ph Init AR Three phase initiate AR
AR Wait AR Wait
164
CB Faulty CB faulty
PhA CB Open Phase A CB Open
PhB CB Open Phase B CB Open
PhC CB Open Phase C CB Open
3Ph CB Close Three phase CB close
V1P MCB Fail Single phase MCB VT fail
Signal Description
AR Close AR Close
AR Lockout AR Lockout
AR Not Ready AR Not Ready
AR Final Trip AR Final Trip
AR In Progress AR In Progress
AR Successful AR Successful
AR Fail AR Fail
AR WaitToSlave
AR for tie breaker blocked by AR for side
breaker
1.4.1 Setting lists
Table 107 Auto-reclosing function setting list
T_1P AR1
Time delay setting 1 for single phase
auto-reclosing
0.6 s 0.05 10.00
T_1P AR2
auto-reclosing
0.7 s 0.05 10.00
T_1P AR3
auto-reclosing
0.8 s 0.05 10.00
T_1P AR4
auto-reclosing
0.9 s 0.05 10.00
T_3P AR1
Time delay setting 1 for three phase
auto-reclosing
1.1 s 0.05 60.00
T_3P AR2
auto-reclosing
1.2 s 0.05 60.00
T_3P AR3
auto-reclosing
1.3 s 0.05 60.00
165
T_3P AR4
auto-reclosing
1.4 s 0.05 60.00
T_Action pulse length setting for auto-reclosing 80 s 80.00 500.0
T_Reclaim
Time setting for successful auto-reclosing
determination
3 s 0.05 60.00
T_CB Faulty Time setting for spring charging 1 s 0.50 60.00
Times_AR auto-reclosing number 1 1 4
T_Syn Check Time setting for synchronization check 0.05 s 0.00 60.00
T_MaxSynExt
time setting for exiting synchronization
check
10 s 0.05 60.00
T_AR Reset
Time setting for preparing for future
reclosing
3 s 0.50 60.00
T_WaitMaster
Time setting for blocking AR of tie breaker
by AR of side breaker
20 s 0.01 60.00
Table 108 Auto-reclosing binary setting list
Abbr. Description Default Unit Min. Max.
AR_1p mode
Single phase mode for auto-reclosing
function
1 0 1
AR_3p mode
Three phase mode for auto-reclosing
function
0 0 1
AR_1p(3p) mode
One and three phase mode for
auto-reclosing function
0 0 1
AR_Disable auto-reclosing function disabled 0 0 1
AR_Override
disabled
1 0 1
AR_EnergChkDLLB Checking dead line live bus for AR 0
AR_EnergChkLLDB Checking live line dead bus for AR 0
AR_EnergChkDLDB Checking dead line dead bus for AR 0
AR_Syn check
enabled or disabled
0 0 1
AR_Chk3PVol
Three phase voltage check for single
phase AR
0 0 1
AR Final Trip Final trip by AR 0 0 1
1P CBOpen Init AR AR initiated by single phase CB open 0 0 1
3P CBOpen Init AR AR initiated by three phase CB open 0 0 1
Mode_3/2CB One and a half breaker arrangement 0 0 1
CB_Master Side breaker or tie breaker 0 0 1
1.5 Reports
166
1st Reclose First reclose
2nd Reclose Second reclose
3rd Reclose Third reclose
4th Reclose Fourth reclose
1Ph Trip Init AR Auto-reclose by one phase trip
1Ph CBO Init AR Auto-reclose by one phase breaker opening
1Ph CBO Blk AR Auto-reclose blocked by one phase breaker opening
3Ph Trip Init AR Auto-reclose initiated by three phase trip
3Ph CBO Init AR Auto-reclose initiated by three phase breaker opening
3Ph CBO Blk AR Auto-reclose blocked by three phase trip
AR Block Auto-reclose blocked
BI MC/AR BLOCK Auto-reclose BI blocked
AR Success Auto-reclose success
AR Final Trip Final trip for auto-reclose
AR in progress Auto-reclose is in progress
AR Failure Auto-reclosing failed
Relay Reset Relay reset
AR Mode Alarm Auto-reclosing mode alarm
1.6 Technical data
NOTE:
Table 111 Technical data for auto-reclosing function
Number of reclosing shots Up to 4
Shot 1 to 4 is individually
selectable

AR initiating functions Internal protection functions
External binary input

Dead time, separated setting 0.05 s to 60.00 s, step 0.01 s 1 % setting value or +50
167
for shots 1 to 4 ms
Reclaim time 0.50 s to 60.00s, step 0.01 s
Blocking duration time (AR
reset time)
0.05 s to 60.00s, step 0.01 s
Circuit breaker ready
supervision time
0.50 s to 60.00 s, step 0.01 s
Dead time extension for
synch-check (Max. SYNT
EXT)
0.05 s to 60.00 s, step 0.01 s

Chapter 19 Secondary system
supervision
168
supervision

About this chapter
secondary system supervision function.

supervision
169
1 Current circuit supervision
1.1 Function description
Open or short circuited current transformer cores can cause unwanted
operation of many protection functions such as, earth fault current and
negative sequence current functions.
It must be remembered that a blocking of protection functions at an occurring
open CT circuit will mean that the situation will remain and extremely high
voltages will stress the secondary circuit.
To prevent IED from wrong trip, interruptions in the secondary circuits of
current transformers is detected and reported by the device. When the
zero-sequence current is always larger than the setting value of 3I0_CT Fail
for 12s, CT Fail will be reported and each zone of zero-sequence current
protection will be blocked.
IP1
IP2
IP3
CTFail
IN

Signal Description
IN signal for zero sequence current input
Signal Description
CT Fail CT Fail
supervision
170
1.3.1 Setting lists
Table 114 CT failure function setting list
3I0_CT Fail
Maximum zero-sequence current of CT
fail to detect ct fail
0.2In A 0.05 10.00
Table 115 CT failure binary setting list
Func_CT Fail
CT fail function enabled or
disabled
1 0 1
3I0 Calculated_CT Fail
CT for CT fail function
0 0 1
1.4 Reports
CT Fail CT fail

supervision
171
2 Fuse failure supervision
2.1 Introduction
In the event of a measured voltage failure due to a broken conductor or a
short circuit fault in the secondary circuit of voltage transformer, those
protection functions which are based on voltage criteria may be mistakenly
considered as a voltage of zero. VT failure supervision function is provided to
inform those functions about a voltage failure. VT supervision can be used to
monitor the voltage transformer circuit, single-phase VT failures, two-phase or
three-phase VT failures. Its main features are as:
Symmetrical/Asymmetrical VT fail detection
3-phase AC voltage MCB monitoring
1-phase AC voltage MCB monitoring
Applicable in solid, compensated or isolated networks
VT failure supervision function can be enabled or disabled through binary
setting VT Fail. By applying setting 1 to the binary setting, VT failure
supervision function would monitor the voltage transformer circuit. As
mentioned, the function is able to detect single-phase broken, two-phase
broken or three-phase broken faults in secondary circuit of voltage
transformer, if a three-phase connection is applied.
There are three main criteria for VT failure detection; the first is dedicated to
detect three-phase broken faults. The second and third ones are to detect
single or two-phase broken faults in solid earthed and isolated/resistance
earthed systems, respectively. A precondition to meet these three criteria is
that IED should not be picked up and the calculated zero sequence and
negative sequence currents should be less than setting of 3I02_ VT Fail.
The criteria are as follows:
2.2.1 Three phases (symmetrical) VT Fail
The calculated zero sequence voltage 3U0 as well as maximum of three
phase-to-earth voltages is less than the setting of Upe_VT Fail and at the
same time, maximum of three phase currents is higher than setting of I_ VT
supervision
172
Fail. This condition may correspond to three phase broken fault in secondary
circuit of the voltage transformer if no startup element has been detected.
2.2.2 Single/two phases (asymmetrical) VT Fail
The calculated zero sequence voltage 3U0 is more than the setting of
Upe_VT Fail. This condition may correspond to single or two-phase broken
fault in secondary circuit of the voltage transformer, if the system starpoint is
solidly earthed and no startup element has been detected.
The calculated zero sequence voltage 3U0 is more than the setting of
Upe_VT Fail, and at the same time, the difference between the maximum
and minimum phase-to-phase voltages is more than the setting of Upp_VT
Fail. This condition may correspond to single or two-phase broken fault in
secondary circuit of the voltage transformer, if the system starpoint is isolated
or resistance earthed and no startup element has been detected.
In addition to the mentioned conditions, IED has the capability to be informed
about the VT MCB failure through its binary inputs V3p MCB Fail and V1p
MCB Fail. In this context, VT fail is detected, if the respective digital input is
active.
2.2.3 Logic diagram
If VT failure supervision detects a failure in voltage transformer secondary
circuit, either by means of the above mentioned criteria or reception of a VT
MCB fail indication, all the protection functions, which are based on direction
component or low voltage criteria, will be blocked. Furthermore, Alarm report
VT fail is issued after 10s delay time. The blocking condition would be
removed if one of the following conditions is met within the 10 sec delay time
(previous to Alarm VT fail).
Without IED pickup, minimum phase voltage becomes more than setting of
Upe_VT Normal for 500ms.
Without IED pickup, minimum phase voltage becomes more than setting of
Upe_VT Normal and at the same time, the calculated zero sequence and
negative sequence current of corresponding side becomes more than the
setting of 3I02_ VT Fail.
Subsequent to VT fail alarm, the blocking condition of respective protection
functions would be removed if without IED pickup, the minimum phase
voltage becomes more than the setting of Upe_VT Normal for a duration
supervision
173
more than 10 sec.
10S Alarm
AND
AND
OR
AND
OR
VTFail
block
AND
AND
VTFail
unblock
AND 500ms
AND
AND AND 10S
OR
Isolated
Solidearthed
Max(Ia,Ib,Ic)>I_VTFail
max{Ua,Ub,Uc}<
Upe_VTFail
3U0<(Upe_VTFail-1)
3U0>=(Upe_VTFail-1)
Max{Uab,Ubc,Uca}-
Min{Uab,Ubc,Uca}>
Upp_VTFail
RelayStartup
VTFailblock
min{Ua,Ub,Uc}>
Upe_VTNormal
RelayStartup
3I0>3I02_VTFailor
3I2>3I02_VTFail
min{Ua,Ub,Uc}>
Upe_VTNormal
RelayStartup
VTFail
BIMCBFail

Figure 52 VT fail blocking/unblocking logic
IP1
IP2
IP3
UP1
UP2
UP3
VTFail
V3PMCBFail
IN

supervision
174
Signal Description
IN Signal for zero sequence current input
Signal Description
V3P MCB Fail Three phase MCB VT fail
Signal Description
VT Fail VT Fail
2.4.1 Setting list
Table 120 Fuse failure supervision function setting list
I_VT Fail
Maximum current of VT fail to detect
VT fail
0.1In A 0.05 1.00
3I02_VT Fail
Maximum zero- and negative-
sequence current of VT fail to detect
VT fail
0.1In A 0.05 1.00
Upe_VT Fail
Maximum phase to earth voltage of
VT fail to detect VT fail
8 V 7.00 20.00
Upp_VT Fail
Maximum phase to phase voltage
of VT fail to detect VT fail
16 V 10.00 30.00
Upe_VT Normal
Minimum normal phase to earth
voltage of VT normal to detect VT
fail
40 V 40.00 65.00
Table 121 Fuse failure supervision function setting list
supervision
175
VT Fail VT failure enabled or disabled 1 0 1
Solid Earthed The system is solid earthed system 1 0 1
2.5 Reports
VT Fail VT fail
V3P_MCB VT Fail Three phase MCB VT fail
2.6 Technical data
NOTE:
Table 123 Technical data for VT secondary circuit supervision
Item Range or value Tolerances
Minimum current 0.08Ir to 0.20Ir, step 0.01A 3% setting or 0.02Ir
Minimum zero or negative
sequence current
0.08Ir to 0.20Ir, step 0.01A 5% setting or 0.02Ir
Maximum phase to earth
voltage
7.0V to 20.0V, step 0.01V 3% setting or 1 V
Maximum phase to phase
voltage
Normal phase to earth
voltage

Chapter 20 Monitoring
176

About this chapter
monitoring function.

177
1 Synchro-check reference voltage
supervision
If the automatic reclosing is set for synchronization check or energizing check,
during the automatic reclosing period, the synchronization condition of the
voltages between both sides of CB cannot be met, an alarm will be issued
after default time delay.
2 Check auxiliary contact of circuit
breaker
Current flowing through the transmission line and connected CB aux.
contacts are monitored in phase segregated. Therefore, the conflict condition
is reported as alarm. For example, If CB aux. contacts indicate that CB is
open in phase A and at the same time flowing current is measured in this
phase, related alarm is reported
Chapter 21 Station communication
178

About this chapter
This chapter describes the communication possibilities in a
SA-system.

179
1 Overview
Each IED is provided with a communication interface, enabling it to connect to
one or many substation level systems or equipment.
Following communication protocols are available:
IEC 61850-8-1 communication protocol
60870-5-103 communication protocol
The IED is able to connect to one or more substation level systems or
equipments simultaneously, through the communication ports with
communication protocols supported.
1.1 Protocol
1.1.1 IEC61850-8 communication protocol
IEC 61850-8-1 allows two or more intelligent electronic devices (IEDs) from
one or several vendors to exchange information and to use it in the
performance of their functions and for correct co-operation.
GOOSE (Generic Object Oriented Substation Event), which is a part of IEC
61850-8-1 standard, allows the IEDs to communicate state and control
information amongst themselves, using a publish-subscribe mechanism. That
is, upon detecting an event, the IED(s) use a multi-cast transmission to notify
those devices that have registered to receive the data. An IED can, by
publishing a GOOSE message, report its status. It can also request a control
action to be directed at any device in the network.
1.1.2 IEC60870-5-103 communication protocol
The IEC 60870-5-103 communication protocol is mainly used when a
protection IED communicates with a third party control or monitoring system.
This system must have software that can interpret the IEC 60870-5-103
communication messages.
The IEC 60870-5-103 is an unbalanced (master-slave) protocol for coded-bit
serial communication exchanging information with a control system. In IEC
terminology a primary station is a master and a secondary station is a slave.
180
The communication is based on a point-to-point principle. The master must
have software that can interpret the IEC 60870-5-103 communication
messages. For detailed information about IEC 60870-5-103, refer to the
IEC60870 standard part 5: Transmission protocols, and to the section 103:
Companion standard for the informative interface of protection equipment.
1.2 Communication port
1.2.1 Front communication port
There is a serial RS232 port on the front plate of all the IEDs. Through this
port, the IED can be connected to the personal computer for setting, testing,
and configuration using the dedicated Sifang software tool.
1.2.2 RS485 communication ports
Up to 2 isolated electrical RS485 communication ports are provided to
connect with substation automation system. These two ports can work in
parallel for IEC60870-5-103.
1.2.3 Ethernet communication ports
Up to 3 electrical or optical Ethernet communication ports are provided to
connect with substation automation system. These two out of three ports can
work in parallel for protocol, IEC61850 or IEC60870-5-103.
1.3 Technical data
Item Data
Number 1
Connection Isolated, RS232; front panel,
9-pin subminiature connector, for software
tools
Communication speed 9600 baud
Max. length of communication cable 15 m
181
RS485 communication ports
Item Data
Number 0 to 2
Connection 2-wire connector
Rear port in communication module
Max. length of communication cable 1.0 km
Test voltage 500 V AC against earth
For IEC 60870-5-103 protocol
Communication speed Factory setting 9600 baud,
Min. 1200 baud, Max. 19200 baud
Ethernet communication port
Item Data
Electrical communication port
Number 0 to 3
Connection RJ45 connector
Max. length of communication cable 100m
For IEC 61850 protocol
Communication speed 100 Mbit/s
Optical communication port ( optional )
Number 0 to 2
Connection SC connector
Optical cable type Multi-mode
Max. length of communication cable 2.0km
IEC 61850 protocol

182
Time synchronization
Item Data
Mode Pulse mode
IRIG-B signal format IRIG-B000
Voltage levels differential input

183
1.4 Typical substation communication scheme
Gateway
or
converter
Work Station 3
Server or
Work Station 1
Server or
Work Station 2
Work Station 4
Net 2: IEC61850/IEC103,Ethernet Port B
Net 3: IEC103, RS485 Port A
Net 4: IEC103, RS485 Port B
Net 1: IEC61850/IEC103,Ethernet Port A
Gateway
or
converter
Switch
Switch Switch
Switch
Switch
Switch

Figure 53 Connection example for multi-networks of station automation system
1.5 Typical time synchronizing scheme
All IEDs feature a permanently integrated electrical time synchronization port.
It can be used to feed timing telegrams in IRIG-B or pulse format into the
IEDs via time synchronization receivers. The IED can adapt the second or
minute pulse in the pulse mode automatically.
Meanwhile, SNTP network time synchronization can be applied.
Figure 54 illustrates the optional time synchronization modes.
184
SNTP
IRIG-B Pulse
Ethernet port IRIG-B port Binary input

Figure 54 Time synchronizing modes

185

Chapter 22 Hardware
186
Chapter 22 Hardware

About this chapter
This chapter describes the IED hardware.

Chapter 22 Hardware
187
1 Introduction
1.1 IED structure
The enclosure for IED is 19 inches in width and 4U in height.
The equipment is flush mounting with panel cutout and cabinet.
Connection terminals to other system on the rear.
The front panel of equipment is aluminum alloy by founding in integer
and overturn downwards. LCD, LED and setting keys are mounted
on the panel. There is a serial interface on the panel suitable for
connecting a PC.
Draw-out modules for serviceability are fixed by lock component.
The modules can be combined through the bus on the rear board.
Both the equipment and the other system can be combined through
the rear interfaces.
1.2 IED module arrangement
Testport
X3
COM
X6 X7 X8 X9 X1
AIM
X10
PSM
Ethernetports
X5 X4
ForBIMandBOM

Figure 55 Rear view of the protection IED

Chapter 22 Hardware
188
2 Local human-machine interface
2.1 Introduction
The HMI is simple and easy to be used for routine operation, the front
panel of the HMI consists of LCD, LED and keyboard. As shown in the
following picture, the setting, configuration, monitoring, maintenance and
fault analysis can be performed in HMI.
2
1
3
4
5
6
8
7
CSC-121

Figure 56 IED front plate with 8 LEDs
2
1
3
4
5
6
8
7
CSC-121

Figure 57 IED front plate with 20 LEDs

Chapter 22 Hardware
189
1. Liquid crystal display (LCD)
2. LEDs
3. Shortcut function keys
4. Arrow keys
5. Reset key
6. Quit key
7. Set key
8. RS232 communication port
2.2 Liquid crystal display (LCD)
The LCD back light of HMI is blue, 8 lines with up to 28 characteristics per
line can be displayed.
When operating keys or IED alarming or operating, the back light will turn
on automatically until the preset time delay elapse of latest operation or
alarm.
2.3 LED
The definitions of the LEDs are fixed and described below for 8 LEDs.
Table 124 Definition of 8 LEDs
No LED Color Description
1 Run Green
Steady lighting: Operation normally
Flashing: IED startup
8 Alarm Red
Steady lighting: Alarm II, meaning abnormal situation,
only the faulty function is out of service. Power supply
for tripping output is not blocked.
Flashing: Alarm I, meaning severe internal fault, all
protections are out of service. And power supply for
Chapter 22 Hardware
190
tripping outputs is blocked as well.
The definitions of the LEDs are fixed and described below for 20 LEDs.
Table 125 Definition of 20 LEDs
1 Run Green
Steady lighting: Operation normally
Flashing: IED startup
11 Alarm Red
Steady lighting: Alarm II, meaning abnormal situation,
only the faulty function is out of service. Power supply
for tripping output is not blocked.
Flashing: Alarm I, meaning severe internal fault, all
protections are out of service. And power supply for
tripping outputs is blocked as well.
The other LEDs which are not described above can be configured.
2.4 Keyboard
The keyboard is used to monitor and operate IED. The keyboard has the
same look and feel in CSC family. As shown in Figure 56, keyboard is
divided into Arrow keys, Reset key, Quit key, Set key and shorcut function
keys. The specific instructions on the keys as the following table
described:
Table 126 HMI keys on the front of the IED
Key Function
Up arrow key Move up in menu
Page up between screens
Increase value in setting
Down arrow key Move down in menu
Page down between screens
Decrease value in setting
Left arrow key Move left in menu
Right arrow key Move Right in menu
Chapter 22 Hardware
191
Key Function
Reset key Reset the LEDs
Return to normal scrolling display state directly
Set key Enter main menu or submenu
Confirm the setting change
Quit key Back to previous menu
Cancel the current operation and back to previous menu
Return to scrolling display state
Lock or unlock current display in the scrolling display state (the
lock state is indicated by a key type icon on the upright corner of
the LCD)

2.5 IED menu
2.5.1 Menu construction
Chapter 22 Hardware
192
Status
Reports
SetTime
Contrast
Settings
Setup
TestBO
Testing
AI
Version
BI
Status
EquipCode
Measure
EventRpt AlarmRpt
Log
CurTime SetTime
TestEffect
Protocol
ModifyPW
SOE_Reset
SetPrint
103Type
ProtSet
EquipPara
SimuReSig SwSetGr
ViewDrift
AdjDrift
ViewScale AdjScale
PrtSample
CommuPara
ProtContWd
MainMenu
StartRpt

Chapter 22 Hardware
193
Table 127 Full name for the menu
Sub-menu Full name Sub-sub-sub menu Full name
Status Operation status
AI Analog input
Version IED version
BI Binary input
Status Operation status
EquipCode Equipment code
Measure Measurement quantity
Reports Reports search
EventRpt Event reports
AlarmRpt Alarm reports
StartRpt Startup Rpt
Log Operation logging
Set time Setting time
Cur Time Current time
Set Time Set time
Contrast LCD contrast TestEffect Test effect
Settings Setting value
CommuPara Communication parameter
ProtSet Protection setting
EquipPara Equipment parameter
PortContwd Protection binary setting
Setup IED setting
SOE_Reset SOE reset selection
ModifyPW Modify password
SetPrint Setting the print
Protocol Protocol selection
103Type 103 function type
Test BO Test binary output
Testing Testing operation
SimuReSig Simulation remote signalization
ViewDrift View zero drift
ViewScale View scale
PrtSample Print sample value
SwSetGr Switch setting group
AdjDrift Adjust zero drift
AdjScale Adjust scale
2.5.2 Operation status
Sub menu Sub-sub
menu
Sub-sub-sub
menu
Explanation
Status
AI Read the secondary analogure of the
selected CPU module
Version Read the IED type, date and CPU version
BI Read the current status of binary inputs,
Chapter 22 Hardware
194
Sub menu Sub-sub
menu
Sub-sub-sub
menu
Explanation
Off or On
Status Read the monitoring value of hardware,
Including:
Current temperature of IED
Voltage of binary input 1
Voltage of binary input 2
Voltage of binary output
EquipCode Read the versions, released time and CSC
code of all modules
Measure Read the analogure value and calculation
value
2.5.3 Reports search
Sub
menu
Sub-sub menu Sub-sub-sub
menu
Explanation
Reports
EventRpt
Latest Rpt
Search the latest event report, press the Set
key to see the report
Last 6 Rpts
Search the latest six event reports, press the
Set key to see the report
Search by
Date
Search the reports by date
AlarmRpt
Last 6 Rpts
Search the latest six alarm reports, press the
Search by
Date
StartRpt
Latest Rpt
Query the latest event report, press the Set
key to see the report
Last 6 Rpts
Query the latest six event reports, press the
QueryRpt by
Date
Query the reports by date
Log
Last 6 Rpts
Search the latest six operation reports, press
the Set key to see the report
Search by
Date
2.5.4 Set time
Chapter 22 Hardware
195
Sub
menu
menu
Explanation
Set time
Cur Time
Modify the time with arrow keys
Set Time
2.5.5 Contrast
Sub
menu
menu
Explanation
Contrast TestEffect Modify the contrast with arrow keys
2.5.6 Settings
Sub
menu
menu
Explanation
Settings

CommuPara
BayName Enter into the line name
TimeMode NetworkTimeMode
PulseTimeMode
IRIG-B TimeMode
EquipAddr
BaudR485 Selection with up or down buttons
Voltage
Reclose
Common
Current
CBF
EquipPara
PortContwd
2.5.7 IED setting
Sub
menu
menu
Explanation
Setup
SOE_Reset
Manual Reset
Automatic
Reset

ModifyPW The fatory password: 8888
103Type IEC60870-5-103 code
Protocol If communication with automation system
via RS485 port, this item can be ignored
Chapter 22 Hardware
196
2.5.8 Test binary output
Sub
menu
menu
Explanation
Test BO
2.5.9 Testing operation
Sub
menu
menu
Explanation
Testing
SimuReSig
Simu Alarm
Using or X to select the simulation point
Simu Linker
TransRecData
Simu Trip
Simu BI
Simu MST
Alarm
ViewDrift
Enter into the CPU number
ViewScale
PrtSample
SwSetGr
AdjDrift
AdjScale

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197
3 Analog input module
3.1 Introduction
The AI module functions are to transform the secondary signals, from
voltage and current transformers in power system, into weak electric
signals, and perform isolation and anti-interference.
3.2 Terminals of analog input module
Terminals of Analogue Input Module B
b01 a01
b02 a02
b03 a03
a04 b04
a05 b05
a06 b06
a07 b07
a08 b08
a09 b09
a10 b10
a11 b11
a b
a12 b12

Figure 58 Terminals arrangement of AIM B
Table 128 Description of terminals of AIM B
Terminal Analogue
Input
Remark
a01 I
A
Star point
b01 I
A

a02 I
B
Star point
Chapter 22 Hardware
198
b02 I
B

a03 I
C
Star point
b03 I
C

a04 I
N

b04 I
N
Star point
a05 Null
b05 Null
a06 Null
b06 Null
a07 Null
b07 Null
a08 Null
b08 Null
a09 Null
b09 Null
a10 Null
b10 Null
a11 Null
b11 Null
a12 Null
b12 Null
Terminals of Analogue Input Module E
Chapter 22 Hardware
199
b01 a01
b02 a02
b03 a03
a04 b04
a05 b05
a06 b06
a07 b07
a08 b08
a09 b09
a10 b10
a11 b11
a b
a12 b12

Figure 59 Terminals arrangement of AIM E
Table 129 Description of terminals of AIM E
Terminal Analogue
Input
Remark
a01 I
A
Star point
b01 I
A

a02 I
B
Star point
b02 I
B

a03 I
C
Star point
b03 I
C

a04 I
N

b04 I
N
Star point
a05 I
5

b05 I
5
Star point
a06 Null
b06 Null
a07 Null
b07 Null
a08 Null
Chapter 22 Hardware
200
b08 Null
a09 Null
b09 Null
a10 U
4
Star point
b10 U
4

a11 U
B
Star point
b11 U
C
Star point
a12 U
A
Star point
b12 U
N

3.3 Technical data
Internal current transformer
Item Standard Data
Rated current I
r
IEC 60255-1 1 or 5 A
Nominal current range 0.05 I
r
to 30 I
r

Nominal current range of
sensitive CT
0.005 to 1 A
Power consumption (per
phase)
0.1 VA at I
r
= 1 A;
0.5 VA at I
r
= 5 A
0.5 VA for sensitive CT
Thermal overload capability IEC 60255-1
IEC 60255-27
100 I
r
for 1 s
4 I
r
continuous
Thermal overload capability for
sensitive CT
IEC 60255-27
DL/T 478-2001
100 A for 1 s
3 A continuous
Internal voltage transformer
Item Standard Data
Rated voltage V
r
(ph-ph) IEC 60255-1 100 V /110 V
Nominal range (ph-e) 0.4 V to 120 V
Power consumption at V
r
= 110
V
IEC 60255-27
DL/T 478-2001
0.1 VA per phase
Thermal overload capability
(phase-neutral voltage)
IEC 60255-27
DL/T 478-2001
2 V
r
, for 10s
1.5 V
r
, continuous

Chapter 22 Hardware
201
4 Communication module
4.1 Introduction
The communication module performs communication between the internal
protection system and external equipments such as HMI, engineering
workstation, substation automation system, RTU, etc., to transmit remote
metering, remote signaling, SOE, event reports and record data.
4.2 Terminals of Communication module
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
EthernetportB
EthernetportA
EthernetportC

Figure 60 Terminals arrangement of COM
Table 130 Definition of terminals of COM
Terminal Definition
01 Null
02 Null
03 Null
04 Null
05 Optional RS485 port - 2B
Chapter 22 Hardware
202
06 Optional RS485 port - 2A
07 Optional RS485 port - 1B
08 Optional RS485 port - 1A
09 Time synchronization
10 Time synchronization GND
11 Null
12 Null
13 Null
14 Null
15 Null
16 Null
Ethernet
Port A
Optional optical fiber or RJ45
port for station automation
system
Ethernet
Port B
system
Ethernet
Port C
system
4.3 Substaion communication port
There is a serial RS232 port on the front plate of all the IEDs. Through
this port, the IED can be connected to the personal computer for setting,
testing, and configuration using the dedicated Sifang software tool.
Up to 2 isolated electrical RS485 communication ports are provided to
connect with substation automation system. These two ports can work in
parallel for IEC60870-5-103.
4.3.3 Ethernet communication ports
Chapter 22 Hardware
203
Up to 3 electrical or optical Ethernet communication ports are provided to
connect with substation automation system. Two out of these three ports
can work in parallel for protocol, IEC61850 or IEC60870-5-103.
4.3.4 Time synchronization port
All IEDs feature a permanently integrated electrical time synchronization
port. It can be used to feed timing telegrams in IRIG-B or pulse format
into the IEDs via time synchronization receivers. The IED can adapt the
second or minute pulse in the pulse mode automatically.
Meanwhile, SNTP network time synchronization can also be applied.
4.4 Technical data
Item Data
Number 1
Connection Isolated, RS232; front panel,
9-pin subminiature connector, for software
tools
Communication speed 9600 baud
Max. length of communication cable 15 m
RS485 communication port
Item Data
Number 0 to 2
Max. length of communication cable 1.0 km
Test voltage 500 V AC against earth
Communication speed Factory setting 9600 baud,
Min. 1200 baud, Max. 19200 baud
Ethernet communication port
Chapter 22 Hardware
204
Item Data
Electrical communication port
Number 0 to 3
Connection RJ45 connector
Max. length of communication cable 100m
For IEC 61850 protocol
Optical communication port ( optional )
Number 0 to 2
Connection SC connector
Optical cable type Multi-mode
Max. length of communication cable 2.0km
IEC 61850 protocol
Time synchronization
Item Data
Mode Pulse mode
IRIG-B signal format IRIG-B000
Voltage levels differential input

Chapter 22 Hardware
205
5 Binary input module
5.1 Introduction
The binary input module is used to connect the input signals and alarm
signals such as the auxiliary contacts of the circuit breaker (CB), etc.
5.2 Terminals of Binary Input Module
c02 a02
c04 a04
c06 a06
a08 c08
a10 c10
a12 c12
a14 c14
a16 c16
a18 c18
a20 c20
a22 c22
a24 c24
a26 c26
a28 c28
a30 c30
a32 c32
a c
DC- DC-

Figure 61 Terminals arrangement of BIM A
Table 131 Definition of terminals of BIM A
Terminal Definition Remark
a02 BI1 BI group 1
c02 BI2 BI group 2
a04 BI3 BI group 1
Chapter 22 Hardware
206
c04 BI4 BI group 2
a06 BI5 BI group 1
c06 BI6 BI group 2
a08 BI7 BI group 1
c08 BI8 BI group 2
a10 BI9 BI group 1
c10 BI10 BI group 2
a12 BI11 BI group 1
c12 BI12 BI group 2
a14 BI13 BI group 1
c14 BI14 BI group 2
a16 BI15 BI group 1
c16 BI16 BI group 2
a18 BI17 BI group 1
c18 BI18 BI group 2
a20 BI19 BI group 1
c20 BI20 BI group 2
a22 BI21 BI group 1
c22 BI22 BI group 2
a24 BI23 BI group 1
c24 BI24 BI group 2
a26 BI25 BI group 1
c26 BI26 BI group 2
a28 BI27 BI group 1
c28 BI28 BI group 2
a30 BI29 BI group 1
c30 BI30 BI group 2
a32 DC - Input
Common
terminal of BI
group 1
c32 DC - Input
Common
terminal of BI
group 2
5.3 Technical data
Chapter 22 Hardware
207
Item Standard Data
Input voltage range IEC60255-1 110/125 V
220/250 V
Threshold1: guarantee
operation
IEC60255-1 154V, for 220/250V
77V, for 110V/125V
Threshold2: uncertain
operation
IEC60255-1 132V, for 220/250V ;
66V, for 110V/125V
Response time/reset time IEC60255-1 Software provides de-bounce
time
Power consumption,
energized
IEC60255-1 Max. 0.5 W/input, 110V
Max. 1 W/input, 220V

Chapter 22 Hardware
208
6 Binary output module
6.1 Introduction
The binary output modules mainly provide tripping output contacts,
initiating output contacts and signaling output contacts. All the tripping
output relays have contacts with a high switching capacity and are blocked
by protection startup elements.
Each output relay can be configured to satisfy the demands of users.
6.2 Terminals of Binary Output Module
Binary Output Module A
The module provides 16 output relays for tripping or initiating, with total
16 contacts.
Chapter 22 Hardware
209
a02
R
1
a04
a06
a08
a10
a12
a14
a16
a18
a20
a22
a24
a26
a28
a30
a32
a c
c02
c04
c06
c08
c10
c12
c14
c16
c18
c20
c22
c24
c26
c28
c30
c32
R
3
R
5
R
7
R
9
R
11
R
13
R
15
R
16
R
2
R
4
R
6
R
8
R
10
R
12
R
14

Figure 62 Terminals arrangement of BOM A

Chapter 22 Hardware
210
Table 132 Definition of terminals of BOM A
Terminal Definition Related relay
a02 Trip contact 1-0 Output relay 1
c02 Trip contact 1-1 Output relay 1

Chapter 22 Hardware
211
Binary Output Module C
The module provides 16 output relays for signal, with total 19 contacts.
a02
a04
a06
a08
a10
a12
a14
a16
a18
a20
a22
a24
a26
a28
a30
a32
a c
c02
c04
c06
c08
c10
c12
c14
c16
c18
c20
c22
c24
c26
c28
c30
c32
R
4
R
5
R
1
R
2
R
3
R
6
R
7
R
16
R
9
R
10
R
11
R
12
R
13
R
14
R
15
R
8

Figure 63 Terminals arrangement of BOM C
Chapter 22 Hardware
212
Table 133 Definition of terminals of BOM C
Terminal Definition Related relay
a02 Signal 1-0, Common terminal of signal contact group 1
c02 Signal 2-0, Common terminal of signal contact group 2
a04 Signal contact 1-1 Output relay 1
c04 Signal contact 2-1 Output relay 1
a10 Signal 3-0, Common terminal of signal contact group 3
c10 Signal 4-0, Common terminal of signal contact group 4

Chapter 22 Hardware
213
6.3 Technical data
Item Standard Data
Max. system voltage IEC60255-1 250V /~
Current carrying capacity IEC60255-1 5 A continuous,
30A200ms ON, 15s OFF
Making capacity IEC60255-1 1100 W( ) at inductive load
with L/R>40 ms
1000 VA(AC)
Breaking capacity IEC60255-1 220V , 0.15A, at L/R40 ms
110V , 0.30A, at L/R40 ms
Mechanical endurance,
Unloaded
IEC60255-1 50,000,000 cycles (3 Hz
switching frequency)
Mechanical endurance, making IEC60255-1 1000 cycles
Mechanical endurance,
breaking
IEC60255-1 1000 cycles
Specification state verification IEC60255-1
IEC60255-23
IEC61810-1
UL/CSATV
Contact circuit resistance
measurement
IEC60255-1
IEC60255-23
IEC61810-1
30m
Open Contact insulation test
(AC Dielectric strength)
IEC60255-1
IEC60255-27
AC1000V 1min
Maximum temperature of parts
and materials
IEC60255-1 55

Chapter 22 Hardware
214
7 Power supply module
7.1 Introduction
The power supply module is used to provide the correct internal voltages and
full isolation between the terminal and the battery system.
7.2 Terminals of Power Supply Module
c02 a02
c04 a04
c06 a06
a08 c08
a10 c10
a12 c12
a14 c14
a16 c16
a18 c18
a20 c20
a22 c22
a24 c24
a26 c26
a28 c28
a30 c30
a32 c32
a c
DC 24V +
OUTPUTS
DC 24V -
OUTPUTS
AUX.DC +
INPUT
AUX. DC -
INPUT

Figure 64 Terminals arrangement of PSM
Chapter 22 Hardware
215
Table 134 Definition of terminals of PSM
Terminal Definition
a02 AUX.DC 24V+ output 1
c02 AUX.DC 24V+ output 2
a04 AUX.DC 24V+ output 3
c04 AUX.DC 24V+ output 4
a06 Isolated terminal, not wired
c06 Isolated terminal, not wired
a08 AUX.DC 24V- output 1
c08 AUX.DC 24V- output 2
a14 Alarm contact A1, for
AUX.DC power input failure
c14 Alarm contact A0, for
a16 Alarm contact B1, for
c16 Alarm contact B0, for
a20 AUX. power input 1, DC +
c20 AUX. power input 2, DC +
a22 AUX. power input 3, DC +
c22 AUX. power input 4, DC +
a26 AUX. power input 1, DC -
c26 AUX. power input 2, DC -
a28 AUX. power input 3, DC -
c28 AUX. power input 4, DC -
Chapter 22 Hardware
216
a32 Terminal for earthing
c32 Terminal for earthing
7.3 Technical data
Item Standard Data
Rated auxiliary voltage U
aux
IEC60255-1 110 to 250V
Permissible tolerance IEC60255-1 %20 U
aux

Power consumption at
quiescent state
IEC60255-1 50 W per power supply
module
Power consumption at
maximum load
IEC60255-1 60 W per power supply
module
Inrush Current IEC60255-1 T 10 ms/I 25 A per power
supply module,

Chapter 22 Hardware
217
8 Techinical data
8.1 Type tests
8.1.1 Product safety-related tests
Item Standard Data
Over voltage category IEC60255-27 Category III
Pollution degree IEC60255-27 Degree 2
Insulation IEC60255-27 Basic insulation
Degree of protection (IP) IEC60255-27
IEC 60529
Front plate: IP40
Rear, side, top and bottom: IP
30
Power frequency high voltage
withstand test
IEC 60255-5
EN 60255-5
ANSI C37.90
GB/T 15145-2001
DL/T 478-2001
2KV, 50Hz
2.8kV
between the following circuits:
auxiliary power supply
CT / VT inputs
binary inputs
binary outputs
case earth
500V, 50Hz
between the following circuits:
Communication ports to
case earth
time synchronization
terminals to case earth
Impulse voltage test IEC60255-5
IEC 60255-27
EN 60255-5
ANSI C37.90
GB/T 15145-2001
DL/T 478-2001
5kV (1.2/50s, 0.5J)
If U
i
63V
1kV if U
i
<63V
Tested between the following
circuits:
CT / VT inputs
binary inputs
binary outputs
case earth
Note: U
i
: Rated voltage
Chapter 22 Hardware
218
Item Standard Data
Insulation resistance IEC60255-5
IEC 60255-27
EN 60255-5
ANSI C37.90
GB/T 15145-2001
DL/T 478-2001
100 M at 500 V
Protective bonding resistance IEC60255-27 0.1
Fire withstand/flammability IEC60255-27 Class V2
8.1.2 Electromagnetic immunity tests
Item Standard Data
1 MHz burst immunity test IEC60255-22-1
IEC60255-26
IEC61000-4-18
EN 60255-22-1
ANSI/IEEE C37.90.1
Class III
2.5 kV CM ; 1 kV DM
Tested on the following circuits:
CT / VT inputs
binary inputs
binary outputs
1 kV CM ; 0 kV DM
communication ports
Electrostatic discharge IEC 60255-22-2
IEC 61000-4-2
EN 60255-22-2
Level 4
8 kV contact discharge;
15 kV air gap discharge;
both polarities; 150 pF; R
i
= 330

Radiated electromagnetic field
disturbance test
IEC 60255-22-3
EN 60255-22-3
Frequency sweep:
80 MHz 1 GHz; 1.4 GHz 2.7 GHz
spot frequencies:
80 MHz; 160 MHz; 380 MHz;
450 MHz; 900 MHz; 1850 MHz;
2150 MHz
10 V/m
AM, 80%, 1 kHz
Radiated electromagnetic field
disturbance test
IEC 60255-22-3
EN 60255-22-3
Pulse-modulated
10 V/m, 900 MHz; repetition rate
200 Hz, on duration 50 %
Chapter 22 Hardware
219
Item Standard Data
Electric fast transient/burst
immunity test
IEC 60255-22-4,
IEC 61000-4-4
EN 60255-22-4
ANSI/IEEE C37.90.1
Class A, 4KV
CT / VT inputs
binary inputs
binary outputs
Class A, 1KV
communication ports
Surge immunity test IEC 60255-22-5
IEC 61000-4-5
4.0kV L-E
2.0kV L-L
CT / VT inputs
binary inputs
binary outputs
500V L-E
communication ports
Conduct immunity test IEC 60255-22-6
IEC 61000-4-6
Frequency sweep: 150 kHz 80
MHz
spot frequencies: 27 MHz and
68 MHz
10 V
AM, 80%, 1 kHz
Power frequency immunity test IEC60255-22-7 Class A
300 V CM
150 V DM
Power frequency magnetic field
test
IEC 61000-4-8 Level 4
30 A/m cont. / 300 A/m 1 s to 3 s
100 kHz burst immunity test IEC61000-4-18 2.5 kV CM ; 1 kV DM
CT / VT inputs
binary inputs
binary outputs
1 kV CM ; 0 kV DM
communication ports
Chapter 22 Hardware
220
8.1.3 DC voltage interruption test
Item Standard Data
DC voltage dips IEC 60255-11 100% reduction 20 ms
60% reduction 200 ms
30% reduction 500 ms
DC voltage interruptions IEC 60255-11 100% reduction 5 s
DC voltage ripple IEC 60255-11 15%, twice rated frequency
DC voltage gradual shutdown
/start-up
IEC 60255-11 60 s shut down ramp
5 min power off
60 s start-up ramp
DC voltage reverse polarity IEC 60255-11 1 min
8.1.4 Electromagnetic emission test
Item Standard Data
Radiated emission IEC60255-25
EN60255-25
CISPR22
30MHz to 1GHz ( IT device may
up to 5 GHz)
Conducted emission IEC60255-25
EN60255-25
CISPR22
0.15MHz to 30MHz
8.1.5 Mechanical tests
Item Standard Data
Sinusoidal Vibration response
test
IEC60255-21-1
EN 60255-21-1
Class 1
10 Hz to 60 Hz: 0.075 mm
60 Hz to 150 Hz: 1 g
1 sweep cycle in each axis
Relay energized
Sinusoidal Vibration
endurance test
IEC60255-21-1
EN 60255-21-1
Class 1
10 Hz to 150 Hz: 1 g
20 sweep cycle in each axis
Relay non-energized
Shock response test IEC60255-21-2
EN 60255-21-2
Class 1
5 g, 11 ms duration
Chapter 22 Hardware
221
3 shocks in both directions of 3
axes
Relay energized
Shock withstand test IEC60255-21-2
EN 60255-21-2
Class 1
15 g, 11 ms duration
3 shocks in both directions of 3
axes
Relay non-energized
Bump test IEC60255-21-2 Class 1
10 g, 16 ms duration
1000 shocks in both directions of
3 axes
Relay non-energized
Seismic test IEC60255-21-3 Class 1
X-axis 1 Hz to 8/9 Hz: 7.5 mm
X-axis 8/9 Hz to 35 Hz :2 g
Y-axis 1 Hz to 8/9 Hz: 3.75 mm
Y-axis 8/9 Hz to 35 Hz :1 g
1 sweep cycle in each axis,
Relay energized
8.1.6 Climatic tests
Item Standard Data
Cold test - Operation IEC60255-27
IEC60068-2-1
-10C, 16 hours, rated load
Cold test Storage IEC60255-27
IEC60068-2-1
-25C, 16 hours
Dry heat test Operation [IEC60255-27
IEC60068-2-2
+55C, 16 hours, rated load
Dry heat test Storage IEC60255-27
IEC60068-2-2
+70C, 16 hours
Change of temperature IEC60255-27
IEC60068-2-14
Test Nb, figure 2, 5 cycles
-10C / +55C
Damp heat static test IEC60255-27
IEC60068-2-78
+40C, 93% r.h. 10 days, rated
load
Damp heat cyclic test IEC60255-27
IEC60068-2-30
+55C, 93% r.h. 6 cycles, rated
load
Chapter 22 Hardware
222
8.2 CE Certificate
Item Data
EMC Directive
EN 61000-6-2 and EN61000-6-4 (EMC
Council Directive 2004/108/EC)
Low voltage directive
EN 60255-27 (Low-voltage directive 2006/95
EC).
8.3 IED design
Item Data
Case size 4U19inch
Weight 10kg

Chapter 22 Hardware
223

Chapter 23 Appendix
224
Chapter 23 Appendix

About this chapter
This chapter describes the appendix.

Chapter 23 Appendix
225
1 General setting list
1.1 Function setting list
No Parameter Description Unit Min. Max.
1 U_Primary Primary rated voltage kV 100.0 800.0
2 U_Secondary Secondary rated voltage V 100.0 120.0
3 CT_Primary Primary rated current kA 0.05 5.00
4 CT_Secondary Secondary rated current A 1.00 5.00
5 3I0_Primary Primary zero sequence rated current kA 0.05 5.00
6 3I0_Secondary
Secondary zero sequence rated
current
A 1.00 5.00
7 I5_Primary Primary I5 current kA 0.05 5.00
8 I5_Secondary Secondary I5 current A 1.00 5.00
9 T_Relay Reset Time delay for startup element to reset s 0.50 10.00
10 I_VT Fail
Maximum current of VT fail to detect
VT fail
A 0.05 1.00
11 3I02_VT Fail
Maximum zero- and negative-
sequence current of VT fail to detect
VT fail
A 0.05 1.00
12 Upe_VT Fail
Maximum phase to earth voltage of VT
fail to detect VT fail
V 7.00 20.00
13 Upp_VT Fail
Maximum phase to phase voltage of
VT fail to detect VT fail
V 10.00 30.00
14 Upe_VT Normal
Minimum normal phase to earth
voltage of VT normal to detect VT fail
V 40.00 65.00
15 3I0_CT Fail
Maximum zero-sequence current of ct
fail to detect CT fail
A 0.05 10.00
16 I_OL Alarm Current setting for overload alarming A 0.05 100.0
17 T_OL Alarm Time setting for overload alarming s 0.10 6000.
18 I_OC1
Phase current setting of overcurrent
stage 1
A 0.05 100.0
19 T_OC1 Delay time of overcurrent stage 1 s 0.00 60.00
20 I_OC2
Phase current setting of overcurrent
stage 2
A 0.05 100.0
21 T_OC2 Delay time of overcurrent stage 2 s 0.00 60.00
22 Curve_OC Inv Inverse time curve of overcurrent 1 12
23 I_OC Inv
Phase current setting for inverse time
overcurrent
A 0.05 100.0
24 K_OC Inv
Time multiplier setting for inverse time
overcurrent
0.05 999.0
25 A_OC Inv Coefficient setting for inverse time s 0.005 200.0
Chapter 23 Appendix
226
overcurrent
26 B_OC Inv
Time delay setting for inverse time
overcurrent
s 0.00 60.00
27 P_OC Inv Index for inverse time overcurrent 0.005 10.00
28 Angle_OC
Directional sensitive angle for
overcurrent
0.00 90.00
29 Ratio_I2/I1 Second harmonic wave ratio 0.07 0.50
30 Imax_2H_UnBlk
The maximum current setting for the
second harmonic unblock
A 0.10 100.0
31 T2h_Cross_Blk
Delay time for the second harmonic
cross block
s 0.00 60.00
32 3I0_EF1 First stage zero-sequence current A 0.05 100.0
33 T_EF1
Delay time for first stage
s 0.00 60.00
34 3I0_EF2 Second stage zero-sequence current A 0.05 100.0
35 T_EF2
Delay time for second stage
s 0.00 60.00
36 Curve_EF Inv
Inverse time curve of zero-sequence
current
1 12
37 3I0_EF Inv
Current setting for zero-sequence
A 0.05 100.0
38 K_EF Inv
Time multiplier setting for
zero-sequence inverse time current
0.05 999.0
39 A_EF Inv
Coefficient setting for zero-sequence
s 0.005 200.0
40 B_EF Inv
Time delay setting for zero-sequence
s 0.00 60.00
41 P_EF Inv
Index for zero-sequence inverse time
current
0.005 10.00
42 Angle_EF
Sensitive angle for zero-sequence
direction
0.00 90.00
43 Angle_Neg
Sensitive angle for negative-sequence
direction
0.00 90.00
44 Ratio_I2/I1 Second harmonic wave ratio 0.07 0.50
45 Imax_2H_UnBlk
The maximum current setting for the
second harmonic unblock
A 0.10 100.0
46 Ratio_I02/I01
Second zero sequence harmonic
wave ratio
0.07 0.50
47 3I0max_2H_UnBlk
The maximum zero sequence current
setting for the second harmonic
unblock
A 0.10 100.0
48 3I0_NOC1 First stage neutral current A 0.05 100.0
Chapter 23 Appendix
227
49 T_NOC1
Delay time for first stage neutral
current
s 0.00 60.00
50 3I0_NOC2 Second stage neutral current A 0.05 100.0
51 T_NOC2
Delay time for second stage neutral
current
s 0.00 60.00
52 Curve_NOC Inv Inverse time curve of neutral current 1 12
53 3I0_NOC Inv
Current setting for neutral inverse time
current
A 0.05 100.0
54 K_NOC Inv
Time multiplier setting for neutral
0.05 999.0
55 A_NOC Inv
Coefficient setting for neutral inverse
time current
s 0.005 200.0
56 B_NOC Inv
Time delay setting for neutral inverse
time current
s 0.00 60.00
57 P_NOC Inv Index for neutral inverse time current 0.005 10.00
58 Angle_NOC Sensitive angle for neutral direction 0.00 90.00
59 Ratio_I02/I01
Second zero sequence harmonic
wave ratio
0.07 0.50
60 3I0max_2H_UnBlk
The maximum zero sequence current
setting for the second harmonic
unblock
A 0.10 100.0
61 I_SEF1
First stage sensitive zero-sequence
current
A 0.005 1.00
62 T_SEF1
Delay time for first stage sensitive
s 0.00 60.00
63 I_SEF2
Second stage sensitive zero-sequence
current
A 0.005 1.00
64 T_SEF2
Delay time for second stage sensitive
s 0.00 60.00
65 Curve_SEF Inv
Inverse time curve of sensitive
1 12
66 I_SEF Inv
Current setting for sensitive
A 0.00 1.00
67 K_SEF Inv
Time multiplier setting for sensitive
0.05 999.0
68 A_SEF Inv
Coefficient setting for sensitive
s 0.005 200.0
69 B_SEF Inv
Time delay setting for sensitive
s 0.00 60.00
70 P_SEF Inv
Index for zero-sequence sensitive
0.005 10.00
71 Angle_SEF Sensitive angle for sensitive zero 0.00 90.00
Chapter 23 Appendix
228
sequence direction
72 IsCOS_SEF
Sensitive angle for sensitive zero
sequence direction based on Cos
A 0.005 1.00
73 U_SEF Voltage setting for SEF V 2.00 100.0
74 3I2_NSOC1 First stage negative sequence current A 0.05 100.0
75 T_NSOC1
Delay time for first stage negative
sequence current
s 0.00 60.00
76 3I2_NSOC2
Second stage negative sequence
current
A 0.05 100.0
77 T_NSOC2
Delay time for second stage negative
sequence current
s 0.00 60.00
78 Curve_NSOC Inv
Inverse time curve of negative
sequence current
1 12
79 3I2_NSOC Inv
Current setting for negative sequence
A 0.05 100.0
80 K_NSOC Inv
Time multiplier setting for negative
sequence inverse time current
0.05 999.0
81 A_NSOC Inv
Coefficient setting for negative
s 0.005 200.0
82 B_NSOC Inv
Time delay setting for negative
s 0.00 60.00
83 P_NSOC Inv
Index for negative sequence inverse
time current
0.005 10.00
84 I_STUB Current setting for STUB protection A 0.05 100.0
85 T_STUB Time setting for STUB protection s 0.00 60.00
86 I_Thermal OL Trip
Current setting for thermal overload
protection tripping
A 0.10 25.00
87 I_Thermal OL Alarm
Current setting for thermal overload
protection alarming
A 0.10 25.00
88 T_Const Thermal
Time constant for thermal overload
protection
s 1.00 9999.
89 T_Const Cool Down Time constant for cool down s 1.00 9999.
90 U_3V01
First stage voltage setting for
displacement voltage protection
V 2.00 100.0
91 T_3V01
First stage time setting for
s 0.00 60.00
92 U_3V02
Second stage voltage setting for
V 2.00 100.0
93 T_3V02
Second stage time setting for
s 0.00 60.00
94 U_OV1
Voltage setting for first stage
overvoltage protection
V 40.00 200.0
Chapter 23 Appendix
229
95 T_OV1
Time delay setting for first stage
s 0.00 60.00
96 U_OV2
Voltage setting for second stage
V 40.00 200.0
97 T_OV2
Time delay setting for second stage
s 0.00 60.00
98 Dropout_OV
Dropout coefficient for overvoltage
protection
0.90 0.99
99 U_UV1
Voltage setting for first stage
V 5.00 150.0
100 T_UV1
Time delay setting for first stage
s 0.00 120.0
101 U_UV2
Voltage setting for second stage
V 5.00 150.0
102 T_UV2
Time delay setting for second stage
s 0.00 120.0
103 Dropout_UV
Dropout coefficient for undervoltage
protection
1.01 2.00
104 I_UV Chk Current setting for undervoltage check A 0.05 10.00
105 I_CBF
Phase current setting for circuit
A 0.05 100.0
106 3I0_CBF
circuit breaker fail protection
A 0.05 100.0
107 3I2_CBF
circuit breaker fail protection
A 0.05 100.0
108 T_CBF1
breaker fail protection
s 0.00 32.00
109 T_CBF 1P Trip 3P
Prolonged three trip
Time for stage 1 of circuit breaker fail
s 0.05 32.00
110 T_CBF2
breaker fail protection
s 0.10 32.00
111 3I0_PD
three pole discordance
A 0.05 100.0
112 3I2_PD
three pole discordance
A 0.05 100.0
113 T_PD
Time delay setting for three pole
discordance
s 0.00 60.00
114 T_Dead Zone
Time delay setting for dead zone
protection
s 0.00 32.00
115 T_1P AR1
auto-reclosing
s 0.05 10.00
116 T_1P AR2 Time delay setting 2 for single phase s 0.05 10.00
Chapter 23 Appendix
230
auto-reclosing
117 T_1P AR3
auto-reclosing
s 0.05 10.00
118 T_1P AR4
auto-reclosing
s 0.05 10.00
119 T_3P AR1
auto-reclosing
s 0.05 60.00
120 T_3P AR2
auto-reclosing
s 0.05 60.00
121 T_3P AR3
auto-reclosing
s 0.05 60.00
122 T_3P AR4
auto-reclosing
s 0.05 60.00
123 Angle_Syn Diff
Angle difference setting for
1.00 80.00
124 U_Syn Diff
Voltage difference setting for
V 1.00 40.00
125 Freq_Syn Diff
Frequency difference setting for
Hz 0.02 2.00
126 T_Action Pulse length setting for auto-reclosing ms 80.00 500.0
127 T_Reclaim
Time setting for successful
auto-reclosing determination
s 0.05 60.00
128 T_CB Faulty Time setting for spring charging s 0.50 60.00
129 Times_AR auto-reclosing number 1 4
130 T_Syn Check Time setting for synchronization check s 0.00 60.00
131 T_MaxSynExt Time setting for exiting AR checking s 0.05 60.00
132 T_AR Reset
Time setting for preparing for future
reclosing
s 0.50 60.00
133 Umin_Syn
Minimu voltage setting for
V 30.00 65.00
134 Umax_Energ Maximum voltage for Energizing check V 10.00 50.00
135 T_WaitMaster Time setting for Master waitting s 0.01 60.00
1.2 Binary setting list
No Setting Description Unit Min. Max.
1 VT_Line
VT installed at line side or source
side
0 1
2 BI SetGrp Switch
Enable or disable the function of
switch the setting group by binary
input
0 1
Chapter 23 Appendix
231
3 Relay Test Mode Enable or disable the test mode 0 1
4 Blk Remote Access
Blocking remote access function
enabled or disabled
0 1
5 I5 for SEF I5 is used as SEF function or other 0 1
6 Func_VT Fail VT fail function enabled or disabled 0 1
7 Solid Earth Solid earth or not 0 1
8 Func_CT Fail CT fail function enabled or disabled 0 1
9 3I0 Calculated_CT Fail
3I0 is calculated or measured for
CT fail function
0 1
10 Func_OL
Enable or disable the overload
function
0 1
11 Func_OC1
disabled
0 1
12 OC1 Direction
enabled or disabled
0 1
13 OC1 Dir To Sys
Point to system or point to
equipment is defined as forward
direction for stage 1
0 1
14 OC1 Inrush Block
Inrush restraint for overcurrent
0 1
15 Func_OC2
disabled
0 1
16 OC2 Direction
enabled or disabled
0 1
17 OC2 Dir To Sys
0 1
18 OC2 Inrush Block
Inrush restraint for overcurrent
0 1
19 Func_OC Inv
Inverse time stage for overcurrent
enabled or disabled
0 1
20 OC Inv Direction
enabled or disabled
0 1
21 OC Inv Dir To Sys
direction for inverse time stage
0 1
22 OC Inv Inrush Block
Inrush restraint for inverse time
stage enabled or disabled
0 1
23 Blk OC at VT Fail
VT failure block overcurrent
0 1
24 OC Init CBF Overcurrent protection initiate CBF 0 1
Chapter 23 Appendix
232
25 Func_EF1
disabled
0 1
26 EF1 Direction
enabled or disabled
0 1
27 EF1 Dir To Sys
0 1
28 EF1 Inrush Block
Inrush restraint for earth fault stage
1 enabled or disabled
0 1
29 Func_EF2
disabled
0 1
30 EF2 Direction
enabled or disabled
0 1
31 EF2 Dir To Sys
0 1
32 EF2 Inrush Block
Inrush restraint for earth fault
disabled
0 1
33 Func_EF Inv
Inverse time stage for earth fault
0 1
34 EF Inv Direction
enabled or disabled
0 1
35 EF Inv Dir To Sys
0 1
36 EF Inv Inrush Block
0 1
37 EF U2/I2 Dir
Negative sequence directional
element for EF protection enabled
or disabled
0 1
38 Inrush Chk I02/I01
Inrush checking of zero sequence
current enabled or disabled
0 1
39 Blk EF at VT Fail
Block or unblock EF protection
when VT fail happens
0 1
40 Blk EF at CT Fail
Block or unblock EF protection
when CT fail happens
0 1
41 3I0 Calculated
earth fault CT
0 1
42 3U0 Calculated
3U0 is calculated or measured from
earth fault VT
0 1
Chapter 23 Appendix
233
43 EF Init CBF
EF protection initiate CBF
protection or not
0 1
44 Func_NOC1
Neutral earth fault stage 1 enabled
or disabled
0 1
45 NOC1 Direction
Direction of neutral earth fault stage
0 1
46 NOC1 Dir To Sys
0 1
47 NOC1 Inrush Block
Inrush restraint for neutral earth
fault stage 1 enabled or disabled
0 1
48 Func_NOC2
Neutral earth fault stage 2 enabled
or disabled
0 1
49 NOC2 Direction
Direction of neutral earth fault stage
0 1
50 NOC2 Dir To Sys
0 1
51 NOC2 Inrush Block
Inrush restraint for neutral earth
fault stage 2 enabled or disabled
0 1
52 Func_NOC Inv
Inverse time stage for neutral earth
fault enabled or disabled
0 1
53 NOC Inv Direction
enabled or disabled
0 1
54 NOC Inv Dir To Sys
0 1
55 NOC Inv Inrush Block
0 1
56 Blk NOC at VT Fail
VT failure block neutral earth fault
0 1
57 3U0 Calculated
3U0 calculated or measured from
VT
0 1
58 NOC Init CBF
Neutral earth fault protection initiate
0 1
59 Func_SEF1
Sensitive earth fault stage 1
enabled or disabled
0 1
60 SEF1 Trip
alarm
0 1
61 SEF1 Direction
Direction of sensitive earth fault
0 1
62 Func_SEF2
Sensitive earth fault stage 2
enabled or disabled
0 1
Chapter 23 Appendix
234
63 SEF2 Trip
alarm
0 1
64 SEF2 Direction
0 1
65 Func_SEF Inv
Sensitive earth fault inverse time
0 1
66 SEF Inv Trip
Sensitive earth fault inverse time
stage trip or alarm
0 1
67 SEF Inv Direction
inverse time stage enabled or
disabled
0 1
68 SEF Chk U0/I0
U0/I0 measurement or Cos
measurement for direction
determination
0 1
69 Blk SEF at VT Fail
VT failure block sensitive earth fault
0 1
70 3U0 Calculated
3U0 calculated or measured from
VT
0 1
71 SEF Init CBF
Sensitive earth fault protection
initiate CBF protection enabled or
disabled
0 1
72 Func_NSOC1
disabled
0 1
73 NSOC1 Trip
stage 1 trip or alarm
0 1
74 Func_NSOC2
disabled
0 1
75 Func_NSOC Inv
Inverse time stage of negative
sequence overcurrent protection
enabled or disabled
0 1
76 NSOC Inv Trip
Inverse time stage negative
sequence overcurrent trip or alarm
0 1
77 NSOC Init CBF
protection initiate CBF protection
0 1
78 Func_STUB
STUB protection enabled or
disabled
0 1
79 STUB Init CBF
STUB protection initiate CBF
protection
0 1
80 Func_Thermal OL
enabled or disabled
0 1
Chapter 23 Appendix
235
81 Cold Curve Cold Curve or Hot Curve 0 1
82 Thermal OL Init CBF
Thermal overload protection initiate
CBF protection
0 1
83 Func_3V01
enabled or disabled
0 1
84 3V01 Trip
Displacement voltage stage 1 trip or
alarm
0 1
85 Func_3V02
enabled or disabled
0 1
86 3V02 Trip
Displacement voltage stage 2 trip or
alarm
0 1
87 3U0 Calculated
Displacement voltage is calculated
or measured form VT
0 1
88 3V0 Init CBF
Displacement voltage protection
initiate CBF enabled or disabled
0 1
89 Func_OV1
disabled
0 1
90 OV1 Trip Overvoltage stage 1 trip or alarm 0 1
91 Func_OV2
disabled
0 1
92 OV2 Trip Overvoltage stage 2 trip or alarm 0 1
93 OV Chk PE
Phase to phase voltage or phase to
earth measured for overvoltage
protection
0 1
94 OV Init CBF
Overvoltage protection initiate CBF
enabled or disabled
0 1
95 Func_UV1
disabled
0 1
96 UV1 Trip
enabled or disabled
0 1
97 Func_UV2
disabled
0 1
98 UV2 Trip
enabled or disabled
0 1
99 UV Chk Current
Checking current for undervoltage
protection
0 1
100 UV Chk CB Status
Checking CB aux. contact for
0 1
101 UV Chk PE
Phase to phase or phase to earth
measured for undervoltage
protection
0 1
Chapter 23 Appendix
236
102 UV Chk All Phase
Checking three phase voltage for
0 1
103 Func_CBF CBF protection enabled or disabled 0 1
104 CBF 1P Trip 3P
Three pole trip by one pole failure
for CBF protection enabled or
disabled
0 1
105 CBF Chk 3I0/3I2
zero- and negative-sequence
current checked by CBF protection
0 1
106 CBF Chk CB Status
CB auxiliary contact checked for
CBF protection
0 1
107 CBF Chk BI_3Ph_CB_Close
Checking three phase CB close
status via binary input for CBF
protection
0 1
108 Func_PD
Poles discordance protection
enabled or disabled
0 1
109 PD Chk 3I0/3I2
Checking 3I0/3I2 criteria for PD
0 1
110 PD Init CBF
PD protection initiate CBF
protection
0 1
111 Func_Dead Zone
Dead zone protection enabled or
disabled
0 1
112 AR_1p mode
Single phase mode for
0 1
113 AR_3p mode
Three phase mode for
0 1
114 AR_1p(3p) mode
One and three phase mode for
0 1
115 AR_Disable auto-reclosing function disabled 0 1
116 AR_Override
disabled
0 1
117 AR_EnergChkDLLB Checking dead line live bus for AR 0 1
118 AR_EnergChkLLDB Checking live line dead bus for AR 0 1
119 AR_EnergChkDLDB Checking dead line dead bus for AR 0 1
120 AR_Syn check
enabled or disabled
0 1
121 AR_Chk3PVol
Three phase voltage check for
single phase AR
0 1
122 AR Final Trip Final trip by AR 0 1
123 1P CBOpen Init AR
AR initiated by single phase CB
open
0 1
Chapter 23 Appendix
237
124 3P CBOpen Init AR
AR initiated by three phase CB
open
0 1
125 Mode_3/2CB
One and a half breaker
arrangement
0 1
126 CB_Master Side breaker or tie breaker 0 1

Chapter 23 Appendix
238
2 General report list
Table 135 event report list
No Abbr. (LCD Display) Description
1 Relay Startup Protection startup
2 BI Change Binary input change
3 BI SetGroup Mode Binary input setting group mode
4 Not Used Not used
5 OC1 Trip Overcurrent protection stage 1 trip
6 OC2 Trip Overcurrent protection stage 2 trip
7 OC Inv Trip Overcurrent protection inverse time stage trip
8 Inrush Blk OC Inrush blocking overcurrent protection
9 Not Used Not used
10 EF1 Trip Earth fault protection stage 1 trip
11 EF2 Trip Earth fault protection stage 2 trip
12 EF Inv Trip Earth fault protection inverse time stage trip
13 Inrush Blk EF Inrush blocking earth fault protection
14 Not Used Not used
15 NOC1 Trip Neutral overcurrent protection stage 1 trip
16 NOC2 Trip Neutral overcurrent protection stage 2 trip
17 NOC Inv Trip Neutral overcurrent protection inverse time stage trip
18 Inrush Blk NOC Inrush blocking neutral overcurrent protection
20 SEF1 Trip Sensitive earth fault protection stage 1 trip
21 SEF2 Trip Sensitive earth fault protection stage 2 trip
22 SEF Inv Trip Sensitive earth fault protection inverse time stage trip
24 NSOC1 Trip Negative sequence overcurrent protection stage 1 trip
25 NSOC2 Trip Negative sequence overcurrent protection stage 2 trip
26 NSOC Inv Trip
Negative sequence overcurrent protection inverse time
stage trip
27 STUB Trip STUB protection trip
28 Therm OL Startup Thermal overload protection startup
29 Thermal OL Trip Thermal overload protection trip
30 3V01 Trip Displacement voltage protection stage 1 trip
31 3V02 Trip Displacement voltage protection stage 2 trip
32 OV1 Trip Overvoltage protection stage 1 trip
33 OV2 Trip Overvoltage protection stage 1 trip
34 UV1 Trip Undervoltage protection stage 1 trip
35 UV2 Trip Undervoltage protection stage 2 trip
36 CBF Startup Circuit breaker failure protection startup
Chapter 23 Appendix
239
37 CBF1 Trip Circuit breaker failure protection stage 1 trip
38 CBF 1P Trip 3P
Circuit breaker failure protection single phase trip three
phase
39 CBF2 Trip Circuit breaker failure protection stage 2 trip
40 PD Trip Poles discordance protection trip
42 Dead Zone Trip Dead zone protection trip
43 1st Reclose First shot reclose
44 2nd Reclose Second shot reclose
45 3rd Reclose Third shot reclose
46 4th Reclose Fourth shot reclose
47 1Ph Trip Init AR Single phase trip to initiate auto-reclosing
48 1Ph CBO Init AR
Single phase circuit breaker open to initiate
auto-reclosing
49 1Ph CBO Blk AR
Single phase circuit breaker open to block
auto-reclosing
50 3Ph Trip Init AR Three phase trip to initiate auto-reclosing
51 3Ph CBO Init AR
Three phase circuit breaker open to block
auto-reclosing
52 3Ph CBO Blk AR
Three phase circuit breaker block to block
auto-reclosing
53 Syn Phase Change Synchro-check phase change
54 AR Block Auto-reclosing blocking
55 Not Used Not Used
56 Syn Request Synchro-check request
57 AR_EnergChk OK Energizing check for Auto-reclosing ok
58 Syn Failure Synchro-check failure
59 Syn OK Synchro-check ok
60 Syn Vdiff fail Voltage difference check failure for synchro-check
61 Syn Fdiff fail Frequency difference check failure for synchro-check
62 Syn Angdiff fail Phase difference check failure for synchro-check
63 EnergChk fail Energizing check failure
64 AR Success Auto-reclosing success
65 AR Final Trip Auto-reclosing final trip
66 AR in progress Auto-reclosing in progress
67 AR Failure Auto-reclosing failure
68 AR Wait Auto-reclosing wait
Table 136 alarming report list
1 3V0 Trip Fail Displacement voltage protection trip fail
Chapter 23 Appendix
240
2 3V01 Alarm Displacement voltage protection stage 1 alarm
3 3V02 Alarm Displacement voltage protection stage 2 alarm
4 AI Channel Err Analog input error
5 AR Mode Alarm Auto-reclosing mode alarm
6 Battery Off Battery off
7 BI Breakdown Binary input breakdown
8 BI Check Err Binary input check error
9 BI Comm Fail Binary input communication fail
10 BI Config Err Binary input configuration error
11 BI EEPROM Err Binary input EEPROM error
12 BI Input Err Binary input input error
13 BI_Init CBF Err Binary input for initiation CBF error
14 BI_V1P_MCB Err Binary input of single phase MCB error
15 BI_V3P_MCB Err Binary input of three phase MCB error
16 BO Breakdown Binary output breakdown
17 BO Comm Fail Binary output communication fail
18 BO Config Err Binary output configuration error
19 BO EEPROM Err Binary output EEPROM error
20 BO No Response Binary output response
21 CB Err Blk PD CB error blocking poles discordance protection
22 CT Fail CT fail
23 EF Trip Fail Earth fault protection trip fail
24 EquipPara Err Equipment parameter error
25 FLASH Check Err FLASH check error
26 NO/NC Discord NO/NC discord
27 NOC Trip Fail Neutral overcurrent protection trip fail
28 NSOC Inv Alarm
Negative sequence overcurrent protection inverse time
stage alarm
29 NSOC Trip Fail Negative sequence overcurrent protection trip fail
30 NSOC1 Alarm
Negative sequence overcurrent protection stage 1
alarm
31 OC Trip Fail Overcurrent protection trip fail
32 OV Trip Fail Overvoltage protection trip fail
33 OV1 Alarm Overvoltage protection stage 1 alarm
34 OV2 Alarm Overvoltage protection stage 2 alarm
35 Overload Alarm Overload protection alarm
36 PD Trip Fail Poles discordance protection trip fail
37 PhA CB Open Err Phase A CB Open error
38 PhB CB Open Err Phase B CB Open error
39 PhC CB Open Err Phase C CB Open error
40 ROM Verify Err ROM verify error
41 Sampling Err Sampling error
Chapter 23 Appendix
241
42 SEF Inv Alarm
Sensitive earth fault protection inverse time stage
alarm
43 SEF Trip Fail Sensitive earth fault protection trip fail
44 SEF1 Alarm Sensitive earth fault protection stage 1 alarm
45 SEF2 Alarm Sensitive earth fault protection stage 2 alarm
46 SetGroup Err Setting group Error
47 Setting Err Setting error
48 Soft Version Err Software version error
49 SRAM Check Err SRAM check error
50 STUB Trip Fail STUB protection trip fail
51 Syn Voltage Err Voltage for synchro-check error
52 SysConfig Err System configuration error
53 Test BO Un_reset Unreset after testing binary output
54 Therm Trip Fail Thermal overload protection trip fail
55 Thermal OL Alarm Thermal overload protection alarm
56 UV Trip Fail Undervoltage protection trip fail
57 UV1 Alarm Undervoltage protection stage 1 alarm
58 UV2 Alarm Undervoltage protection stage 2 alarm
59 V1P_MCB VT Fail Single phase MCB VT Fail
60 V3P_MCB VT Fail Three phase MCB VT Fail
61 VT Fail VT fail
Table 137 operation report list
1 SwSetGroup OK Switch setting group OK
2 Write Set OK Write setting value OK
3 WriteEquipParaOK Write equipment parameter OK
4 WriteConfig OK Write configuration OK
5 AdjScale OK Adjust scale OK
6 Not Used Not used
7 Not Used Not used
8 ClrConfig OK Clear configuration OK
9 Reset Config Reset configuration
10 Test BO OK Test binary output OK
11 AdjDrift OK Adjust zero drift OK
12 Clear All Rpt OK Clear all report OK
13 Syn Phase Change Synchro-check phase change
14 VT Recovery VT recovery
15 CaluFreqOK Calculation frequency OK
16 Test mode On Test mode On
17 Test mode Off Test mode Off
Chapter 23 Appendix
242
18 Func_OC On Function of overcurrent protection on
19 Func_OC Off Function of overcurrent protection off
20 Func_EF On Function of earth fault protection on
21 Func_EF Off Function of earth fault protection off
22 Func_NOC On Function of neutral overcurrent protection on
23 Func_NOC Off Function of neutral overcurrent protection off
24 Func_SEF On Function of sensitive earth fault protection on
25 Func_SEF Off Function of sensitive earth fault protection off
26 Func_NSOC On
Function of negative sequence overcurrent protection
on
27 Func_NSOC Off
Function of negative sequence overcurrent protection
off
28 Func_STUB On Function of STUB protection on
29 Func_STUB Off Function of STUB protection off
30 Func_Therm OL On Function of thermal overload protection on
31 Fun_Therm OL Off Function of thermal overload protection off
32 Func_OL On Function of overload protection on
33 Func_OL Off Function of overload protection off
34 Func_3V0 On Function of displacement voltage protection on
35 Func_3V0 Off Function of displacement voltage protection off
36 Func_OV On Function of overvoltage protection on
37 Func_OV Off Function of overvoltage protection off
38 Func_UV On Function of undervoltage protection on
39 Func_UV Off Function of undervoltage protection off
40 Func_CBF On Function of circuit breaker failure protection on
41 Func_CBF Off Function of circuit breaker failure protection off
42 Func_PD On Function of poles discordance protection on
43 Func_PD Off Function of poles discordance protection off
44 Func_DZ On Function of dead zone protection on
45 Func_DZ Off Function of dead zone protection off
46 Func_AR On Function of auto-reclosing protection on
47 Func_AR Off Function of auto-reclosing protection off
48 AR Syn On Synchro-check for AR on
49 AR Syn Off Synchro-check for AR off
50 AR EnergChk On Energizing check for AR on
51 AR EnergChk Off Energizing check for AR of
52 AR Override On Override for AR on
53 AR Override Off Override for AR off
54 Func_VT Fuse On Function of VT fuse supervision on
55 Func_VT Fuse Off Function of VT fuse supervision off
56 Func_CT Fail On Function of CT fail on
57 Func_CT Fail Off Function of CT fail off
Chapter 23 Appendix
243
58 CPU Reset CPU reset

Chapter 23 Appendix
244
3 Typical connection
A. Application for line
IA
IB
IC
UB
UA
UC
U4
IN
UN
Protection IED
A
B
C
* * *
a01
a02
a03
a04
b01
b02
b03
b04
a12
a11
b11
b12
a10
b10

Figure 65 Typical connection of feeder backup protection for VT in bus side
Chapter 23 Appendix
245
B. Application for transformer
* * *
A
B
C
A
B
C
*
A B C
b05
a05
I
IA
IB
IC
UB
UA
UC
IN
UN
Protection IED
a01
a02
a03
a04
b01
b02
b03
b04
a12
a11
b11
b12
5

Figure 66 Typical connection of transformer backup protection
Chapter 23 Appendix
246
C. Application for sensitive earth fault protection
A
B
C
* * *
b05
a05
*
I
IA
IB
IC
UB
UA
UC
IN
UN
Protection IED
a01
a02
a03
a04
b01
b02
b03
b04
a12
a11
b11
b12
5

Figure 67 Typical connection of sensitive earth fault protection
Chapter 23 Appendix
247
4 Time inverse characteristic
4.1 11 kinds of IEC and ANSI inverse time
characteristic curves
In the setting, if the curve number is set for inverse time characteristic, which
is corresponding to the characteristic curve in the following tabel. Both IEC
and ANSI based standard curves are available.
Table 138 11 kinds of IEC and ANSI inverse time characteristic
Curves No. IDMTL Curves Parameter A Parameter P Parameter B
1 IEC INV. 0.14 0.02 0
2 IEC VERY INV. 13.5 1.0 0
3 IEC EXTERMELY INV. 80.0 2.0 0
4 IEC LONG INV. 120.0 1.0 0
5 ANSI INV. 8.9341 2.0938 0.17966
6 ANSI SHORT INV. 0.2663 1.2969 0.03393
7 ANSI LONG INV. 5.6143 1 2.18592
8 ANSI MODERATELY
INV.
0.0103 0.02 0.0228
9 ANSI VERY INV. 3.922 2.0 0.0982
10 ANSI EXTERMELY INV. 5.64 2.0 0.02434
11 ANSI DEFINITE INV. 0.4797 1.5625 0.21359
4.2 User defined characteristic
For the inverse time characteristic, also can be set as user defined
characteristic if the setting is set to 12.
t =
A
i
I
p
1
+ BK
Equation 10
Chapter 23 Appendix
248
where:
A: Time factor for inverse time stage
B: Delay time for inverse time stage
P: index for inverse time stage
K: Time multiplier
4.3 Typical inverse curves

Chapter 23 Appendix
249
The typical 11 curves where K=0.025 is shown in the following figure:

Figure 68 Typical curves for IEC and ANSI standard

0.0001
0.001
0.01
0.1
1
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s
I
d
/I_Inv
IEC & ANSI Curve
(K=0.025)
IEC INV.
IEC VERY INV.
IEC EXTE INV.
IEC LONG INV.
ANSI INV.
ANSI SHORT INV.
ANSI LONG INV.
ANSI MODE INV.
ANSI VERY INV.
ANSI EXTE INV.
ANSI DEFI INV.
Chapter 23 Appendix
250
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the IEC INV. Curve in the
following figure:

Figure 69 Typical IEC INV. Curves

0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s
I/Is
IEC INV. Curve
K=0.025
K=0.2
K=0.5
K=1.0
K=1.25
Chapter 23 Appendix
251
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the IEC VERY INV. Curve in
the following figure:

Figure 70 Typical IEC VERY INV. Curves

0.001
0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s
I/Is
IEC VERY INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 23 Appendix
252
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the IEC EXTREMELY INV.
Curve in the following figure:

Figure 71 Typical IEC EXTREMELY INV. Curve

0.001
0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s
I/Is
IEC EXTREMELY INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 23 Appendix
253
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the IEC LONG INV. Curve in

Figure 72 Typical IEC LONG INV. Curve

0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s
I/Is
IEC LONG INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 23 Appendix
254
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ASNI INV. Curve in the
following figure:

Figure 73 Typical ANSI INV. Curves

0.001
0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s
I/Is
ANSI INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 23 Appendix
255
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSI SHOTR INV. Curve
in the following figure:

Figure 74 Typical ANSI SHORT INV. Curves

0.0001
0.001
0.01
0.1
1
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s
I/Is
ANSI SHORT INV.Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 23 Appendix
256
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSI LONG INV. Curve in

Figure 75 Typical ANSI LONG INV. Curves

0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s
I/Is
ANSI LONG INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 23 Appendix
257
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSI MODETATELY INV.

Figure 76 Typical ANSI MODETATELY INV. Curve

0.001
0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s
I/Is
ANSI MODERATELY INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 23 Appendix
258
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSIVERY INV. Curve in

Figure 77 Typical ANSI VERY INV. Curves

0.001
0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s
I/Is
ANSI VERY INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 23 Appendix
259
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSI EXTREMELY INV.

Figure 78 Typical ANSI EXTREMELY INV. Curves

0.0001
0.001
0.01
0.1
1
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s
I/Is
ANSI EXTREMELY INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 23 Appendix
260
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSI DEFINITE INV.

Figure 79 Typical ANSI DEFINITE INV. Curves

0.001
0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s
I/Is
ANSI DEFINITE INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 23 Appendix
261
5 CT requirement
5.1 Overview
In practice, the conventional magnetic- core current transformer (hereinafter
as referred CT) is not able to transform the current signal accurately in whole
fault period of all possible faults because of manufactured cost and
installation space limited. CT Saturation will cause distortion of the current
signal and can result in a failure to operate or cause unwanted operations of
some functions. Although more and more protection IEDs have been
designed to permit CT saturation with maintained correct operation, the
performance of protection IED is still depended on the correct selection of CT.
5.2 Current transformer classification
The conventional CTs are usually manufactured in accordance with the
standard, IEC 60044, ANSI / IEEE C57.13, ANSI / IEEE C37.110 or other
comparable standards, which CTs are specified in different protection class.
Currently, the CT for protection are classified according to functional
performance as follows:
Class P CT
Accuracy limit defined by composite error with steady symmetric primary
current. No limit for remanent flux.
Class PR CT
CT with limited remanence factor for which, in some cased, a value of the
secondary loop time constant and/or a limiting value of the winding resistance
may also be specified.
Class PX CT
Low leakage reactance for which knowledge of the transformer secondary
excitation characteristic, secondary winding resistance, secondary burden
resistance and turns ratio is sufficient to assess its performance in relation to
the protective relay system with which it is to be used.
Class TPS CT
Low leakage flux current transient transformer for which performance is
defined by the secondary excitation characteristics and turns ratio error limits.
No limit for remanent flux
Class TPX CT
Chapter 23 Appendix
262
Accuracy limit defined by peak instantaneous error during specified transient
duty cycle. No limit for remanent flux.
Class TPY CT
Accuracy limit defined by peak instantaneous error during specified transient
duty cycle. Remanent flux not to exceed 10% of the saturation flux..
Class TPZ CT
Accuracy limit defined by peak instantaneous alternating current component
error during single energization with maximum d.c. offset at specified
secondary loop time constant. No requirements for d.c. component error limit.
Remanent flux to be practically negligible.
TPE class CT (TPE represents transient protection and electronic type
CT)
5.3 Abbreviations (according to IEC 60044-1, -6, as
defined)
Abbrev. Description
Esl Rated secondary limiting e.m.f
Eal Rated equivalent limiting secondary e.m.f
Ek Rated knee point e.m.f
Uk Knee point voltage (r.m.s.)
Kalf Accuracy limit factor
Kssc Rated symmetrical short-circuit current factor
Kssc
Kssc
Effective symmetrical short-circuit current factor
based on different Ipcf
Kpcf Protective checking factor
Ks Specified transient factor
Kx Dimensioning factor
Ktd Transient dimensioning factor
Ipn Rated primary current
Isn Rated secondary current
Ipsc Rated primary short-circuit current
Ipcf protective checking current
Isscmax Maximum symmetrical short-circuit current
Rct Secondary winding d.c. resistance at 75 C /
167 F (or other specified temperature)
Rb Rated resistive burden
Rb = Rlead + Rrelay = actual connected resistive
burden
Rs Total resistance of the secondary circuit,
inclusive of the secondary winding resistance
Chapter 23 Appendix
263
corrected to 75, unless otherwise specified,
and inclusive of all external burden connected.
Rlead Wire loop resistance
Zbn Rated relay burden
Zb Actual relay burden
Tp Specified primary time constant
Ts Secondary loop time constant
5.4 General current transformer requirements
5.4.1 Protective checking current
The current error of CT should be within the accuracy limit required at
specified fault current.
To verify the CT accuracy performance, Ipcf, primary protective checking
current, should be chose properly and carefully.
For different protections, Ipcf is the selected fault current in proper fault
position of the corresponding fault, which will flow through the verified CT.
To guarantee the reliability of protection relay, Ipcf should be the maximum
fault current at internal fault. E.g. maximum primary three phase short-circuit
fault current or single phase earth fault current depended on system
sequence impedance, in different positions.
Moreover, to guarantee the security of protection relay, Ipcf should be the
maximum fault current at external fault.
Last but not least, Ipcf calculation should be based on the future possible
system power capacity
Kpcf, protective checking factor, is always used to verified the CT
performance

To reduce the influence of transient state, Kalf, Accuracy limit factor of CT,
should be larger than the following requirement
>
+ +
+ +

Ks, Specified transient factor, should be decided based on actual operation
state and operation experiences by user.
Chapter 23 Appendix
264
=

5.4.2 CT class
The selected CT should guarantee that the error is within the required
accuracy limit at steady symmetric short circuit current. The influence of short
circuit current DC component and remanence should be considered, based
on extent of system transient influence, protection function characteristic,
consequence of transient saturation and actual operating experience. To fulfill
the requirement on a specified time to saturation, the rated equivalent
secondary e.m.f of CTs must higher than the required maximum equivalent
secondary e.m.f that is calculated based on actual application.
For the CTs applied to transmission line protection, transformer differential
protection with 330kV voltage level and above, and 300MW and above
generator-transformer set differential protection, the power system time
constant is so large that the CT is easy to saturate severely due to system
transient state. To prevent the CT from saturation at actual duty cycle, TP
class CT is preferred.
For TPS class CT, Eal (rated equivalent secondary limiting e.m.f) is generally
determined as follows:
= ( +)
Where
Ks: Specified transient factor
Kssc: Rated symmetrical short-circuit current factor
For TPX, TPY and TPZ class CT, Eal (rated equivalent secondary limiting
e.m.f) is generally determined as follows:
= ( +)
Where
Ktd: Rated transient dimensioning factor
Considering at short circuit current with 100% offset
For C-t-O duty cycle,
K
td
=
T
p
T
s
T
p
T
s
e
t
T
P
e
t
T
s
+1
t: duration of one duty cycle;
For C-t-O-t
fr
-C-t-O duty cycle,
Chapter 23 Appendix
265
K
td
=
T
p
T
s
T
p
T
s
e
T
P
e
T
s
e
t
fr
+t
T
s
+
T
p
T
s
T
p
T
s
e
t
"
T
P
e
t
"
T
s
+1
t: duration of first duty cycle;
t: duration of second duty cycle;
t
fr
: duration between two duty cycle;
For the CTs applied to 110 - 220kV voltage level transmission line protection,
110 - 220kV voltage level transformer differential protection, 100-200MW
generator-transformer set differential protection, and large capacity motor
differential protection, the influence of system transient state to CT is so less
that the CT selection is based on system steady fault state mainly, and leave
proper margin to tolerate the negative effect of possible transient state.
Therefore, P, PR, PX class CT can be always applied.
For P class and PR class CT, Esl (the rated secondary limited e.m.f) is
generally determined as follows:
= ( +)
Kalf: Accuracy limit factor
For PX class CT, Ek (rated knee point e.m.f) is generally determined as
follows:
= ( +)
Kx: Demensioning factor
For the CTs applied to protection for110kV voltage level and below system,
the CT should be selected based on system steady fault state condition. P
class CT is always applied.
5.4.3 Accuracy class
The CT accuracy class should guarantee that the protection relay applied is
able to operate correctly even at a very sensitive setting, e.g. for a sensitive
residual overcurrent protection. Generally, the current transformer should
have an accuracy class, which have an current error at rated primary current,
that is less than 1% (e.g. class 5P).
If current transformers with less accuracy are used it is advisable to check the
actual unwanted residual current during the commissioning.
5.4.4 Ratio of CT
Chapter 23 Appendix
266
The current transformer ratio is mainly selected based on power system data
like e.g. maximum load. However, it should be verified that the current to the
protection is higher than the minimum operating value for all faults that are to
be detected with the selected CT ratio. The minimum operating current is
different for different functions and settable normally. So each function should
be checked separately.
5.4.5 Rated secondary current
There are 2 standard rated secondary currents, 1A or 5A. Generally, 1 A
should be preferred, particularly in HV and EHV stations, to reduce the
burden of the CT secondary circuit. Because 5A rated CTs, i.e. I
2
R is 25x
compared to only 1x for a 1A CT. However, in some cases to reduce the CT
secondary circuit open voltage, 5A can be applied.
5.4.6 Secondary burden
Too high flux will result in CT saturation. The secondary e.m.f is directly
proportional to linked flux. To feed rated secondary current, CT need to
generate enough secondary e.m.f to feed the secondary burden.
Consequently, Higher secondary burden, need Higher secondary e.m.f, and
then closer to saturation. So the actual secondary burden Rb must be less
than the rated secondary burden Rb of applied CT, presented
Rb > Rb
The CT actual secondary burden Rb consists of wiring loop resistance Rlead
and the actual relay burdens Zb in whole secondary circuit, which is
calculated by following equation
Rb = Rlead + Zb
The rated relay burden, Zbn, is calculated as below:
=
2

Where
Sr: the burden of IED current input channel per phase, in VA;
For earth faults, the loop includes both phase and neutral wire, normally twice
the resistance of the single secondary wire. For three-phase faults the neutral
current is zero and it is just necessary to consider the resistance up to the
point where the phase wires are connected to the common neutral wire. The
most common practice is to use four wires secondary cables so it normally is
sufficient to consider just a single secondary wire for the three-phase case.
Chapter 23 Appendix
267
In isolated or high impedance earthed systems the phase-to-earth fault is not
the considered dimensioning case and therefore the resistance of the single
secondary wire always can be used in the calculation, for this case.
5.5 Rated equivalent secondary e.m.f requirements
To guarantee correct operation, the current transformers (CTs) must be able
to correctly reproduce the current for a minimum time before the CT will
begin to saturate.
5.5.1 Line differential protection
The protection is designed to accept CTs with same characteristic but
different CT ratios between two terminals of feeder. The difference of ratio
should not be more than 4 times.
Because the operating characteristic of the line differential protection is based
on the calculation of fundamental component of current, the CT saturation will
result in too much error of the calculation of differential current and reduce the
security of the protection. The CT applied should meet following requirement.
For 330kV and above transmission line protection, TPY CT is preferred. To
guarantee the accuracy, Kssc should be satisfied following requirement:
>
, ", 20
Where

" =
"

Ipcf: Maximum primary fundamental frequency fault current at internal faults
(A)
Ipcf: Maximum primary fundamental frequency fault current at external
faults (A)
Considering auto-reclosing operation, Eal should meet the following
requirement, at C-O-C-O duty cycle
> ( +)
Where
Ktd: Recommended transient dimensioning factor for verification, 1.2.
recommended
Chapter 23 Appendix
268
To 220kV transmission line protection, Class 5P20 CT is preferred. Because
the system time constant is less relatively, and then DC component is less,
the probability of CT saturation due to through fault current at external fault is
reduced more and more.
Esl can be verified as below:
> = +
Where
Ks: Specified transient factor, 2 recommended
Only at special case, e.g. short output feeder of large power plant, the PX
class CT is recommended. Ek should be verified based on below equation.
> = +
Where
5.5.2 Transformer differential protection
It is recommended that the CT of each side could be same class and with
same characteristic to guarantee the protection sensitivity.
For the CTs applied to 330kV voltage level and above step-down transformer,
TPY class CT is preferred for each side.
For the CTs of high voltage side and middle voltage side, Eal should be
verified at external fault C-O-C-O duty cycle.
For the CT of low voltage side in delta connection, Eal should be verified at
external three phase short circuit fault C-O duty cycle.
Eal must meet the requirement based on following equations:
> ( +)
Where
Ktd: Recommended transient dimensioning factor for verification, 3
recommended
For 220kV voltage level and below transformer differential protection, P Class,
PR class and PX class is able to be used. Because the system time constant
is less relatively, and then DC component is less, the probability of CT
saturation due to through fault current at external fault is reduced more and
more.
For P Class, PR class CT, Esl can be verified as below:
Chapter 23 Appendix
269
> = +
Where
For PX class CT, Ek can be verified as below:
> = +
Where
5.5.3 Busbar differential protection
The busbar differential protection is able to detect CT saturation in extremely
short time and then block protection at external fault. The protection can
discriminate the internal or external fault in 2-3 ms before CT saturation. So
the currents from different class CT of different feeders are permitted to inject
into the protection relay. The rated secondary e.m.f of CTs is verified by
maximum symmetric short circuit current at external fault.
For P Class, PR class CT,
>
+
+

For TP class CT,
>

Ipcf: Maximum primary short circuit current at external faults (A)
5.5.4 Distance protection
For 330kV and above transmission line protection, TPY CT is preferred. To
guarantee the accuracy, Kssc should be satisfied following requirement:
>
, ", 20
Where

" =
"

Ipcf: Maximum primary fundamental frequency current at close-in forward
and reverse faults (A)
Ipcf: Maximum primary fundamental frequency current at faults at the end of
zone 1 reach (A)
Chapter 23 Appendix
270
> ( +)
Where
Ktd: Recommended transient dimensioning factor for verification, 3.
recommended for line which length is shorter than 50kM, 5 recommended for
line which length is longer than 50kM
To 220kV voltage and below transmission line protection, P Class CT is
preferred, e.g. 5P20.
> = +
Where
Only at special case, e.g. short output feeder of large power plant, the PX
class CT is recommended. Ek should be verified based on below equation.
> = +
Where
5.5.5 Definite time overcurrent protection and earth fault
protection
For TPY CT,
Kssc should be satisfied following requirement:
>
, ", 20
Where

" =
"

Ipcf: Maximum applied operating setting value (A)
> ( +)
Chapter 23 Appendix
271
Where
Ktd: Recommended transient dimensioning factor for verification, 1.2
recommended
For P Class and PR class CT,
Kalf should be satisfied following requirement:
>
+
+

Where
=
, ", 20

" =
"

Ipcf: Maximum applied operating setting value (A)
> = +
Where
For PX class CT,
Ek should be verified based on below equation.
> = +
Where
5.5.6 Inverse time overcurrent protection and earth fault
protection
For TPY CT,
Kssc should be satisfied following requirement:
> 20
Where

Chapter 23 Appendix
272
Ipcf: Maximum applied primary startup current setting value (A)
requirement, at C-O duty cycle
> ( +)
Where
Ktd: Recommended transient dimensioning factor for verification, 1.2
recommended
For P Class and PR class CT,
Kalf should be satisfied following requirement:
>
+
+

Where

= 20

Ipcf: Maximum applied primary startup current setting value (A)
> = +
Where
For PX class CT,
Ek should be verified based on below equation.
> = +
Where

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CSC-121

Breaker Protection IED

: is the maximum permissible continuous thermal overload current. It is usually

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