Study of a Battery Energy Storage System Based on a Multilevel Cascade PWM Converter With Star Configuration

Study of a Battery Energy Storage
System Based on a Multilevel

Cascade PWM Converter
With Star Conguration
A DISSERTATION SUBMITTED TO
THE DEPARTMENT OF ELECTRICAL ENGINEERING
AND THE COMMITTEE ON GRADUATE STUDIES
OF TOKYO INSTITUTE OF TECHNOLOGY
IN PARTIAL FULFILLMENT OF THE REQUIREMENTS
FOR THE DEGREE OF DOCTOR OF ENGINEERING
Supervisor : Prof. Hirofumi Akagi
By
Laxman Maharjan
Student Number: 07D13107
March 2010
i
Acknowledgements
First of all, I would like to express my deepest gratitude to academic supervisor,
Prof. Hirofumi Akagi for his generous guidance, constant support and continuous en-
couragement during my study at the Tokyo Institute of Technology. His knowledge,
wisdom and commitment to the highest standards inspired and motivated me. The work
presented in the dissertation could not have been completed without his meaningful
advice and invaluable suggestions.
I am grateful to Assoc. Prof. Hideaki Fujita for his wise guidance and insightful
comments. He was always there to ask me good questions to help me think and improve
my work.
My profound appreciation goes to Prof. Shozo Ishii, Prof. Koichi Yasuoka, Assoc.
Prof. Koji Takahashi, Visiting Prof. Hiroaki Urushibata, Visiting Assoc. Prof. Shinji
Tominaga, and Visiting Assoc. Prof. Yoshihiko Kataoka for their careful reviewing of
the manuscript and constructive comments.
I owe my sincere thanks to external examiner Prof. Yoichi Hori from Tokyo University
for going through the manuscript. His insightful comments and suggestions helped me
improve the manuscript.
I would like to thank Prof. Tadashi Fukao, Dr. Suzuo Saito (Toshiba Corporation),
and Dr. Noriko Kawakami (Toshiba Mitsubishi-Electric Industrial Systems Corporation)
for their meaningful comments as mentors.
I am greatly indebted to Panasonic Corporation, especially Mr. Jun Asakura. This
work would not have been possible without their collaboration.
Appreciation is due to all the members of Akagi-Fujita Laboratory for their friendship.
I would also like to thank Asst. Prof. Makoto Hagiwara for his kind interest in my work.
I owe my sincere thanks to Mr. Tsukasa Yamagishi for his excellent cooperation in the
ii
experiments. I would also like to thank previous members of the laboratory, especially
Dr. Shigenori Inoue (presently at Hitachi, Ltd.) and Mr. Tsurugi Yoshii (presently at
Railway Technical Research Institute) for their valuable counsel.
I would like to thank my family in Nepal: my father, my mother, my sister, my brother
and my nephews for their support and encouragement. I would like to thank my wife
Anju, who is a constant and active source of support.
Finally, I am thankful to the Ministry of Education, Culture, Sports, Science and
Technology (MEXT) of Japan for supporting me with Monbukagakusho Scholarship.
iii
Contents
Chapter 1 Introduction 1
1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1.1 Trend of Power Electronics . . . . . . . . . . . . . . . . . . . . . . 1
1.1.2 Power Electronics For Renewable Energy Resources . . . . . . . . 6
1.1.2.1 Renewable Energy Resources . . . . . . . . . . . . . . . 6
1.1.2.2 Battery Energy Storage Systems . . . . . . . . . . . . . 8
1.2 Research Objective . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.3 Dissertation Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Chapter 2 Trend of Medium-Voltage Power Converters 15
2.1 Medium-Voltage Power Converters . . . . . . . . . . . . . . . . . . . . . 15
2.2 Two-Level Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3 Multilevel Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.3.1 Diode-Clamped Converter . . . . . . . . . . . . . . . . . . . . . . 18
2.3.2 Flying-Capacitor Converter . . . . . . . . . . . . . . . . . . . . . 20
2.3.3 Cascade Converter . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.3.4 Comparison of Multilevel Converters . . . . . . . . . . . . . . . . 22
2.4 Emerging Multilevel Converters . . . . . . . . . . . . . . . . . . . . . . . 23
2.4.1 Hybrid/Asymmetrical Converters . . . . . . . . . . . . . . . . . . 23
2.4.2 Modular Multilevel Converters . . . . . . . . . . . . . . . . . . . . 26
2.4.3 Multilevel Converters With Multiple Three-Phase Converters . . . 27
2.4.4 Soft-Switched Multilevel Converters . . . . . . . . . . . . . . . . . 29
2.5 Modulation Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.5.1 Sinusoidal Pulsewidth Modulation . . . . . . . . . . . . . . . . . . 30
Contents iv
2.5.2 Space Vector PWM . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.5.3 Selective Harmonic Elimination . . . . . . . . . . . . . . . . . . . 33
2.5.4 Space Vector Control . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.6 Applications of Multilevel Converters . . . . . . . . . . . . . . . . . . . . 34
2.6.1 Medium-Voltage Motor Drives . . . . . . . . . . . . . . . . . . . . 34
2.6.2 Applications in Power Systems . . . . . . . . . . . . . . . . . . . 38
2.7 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Chapter 3 Battery Energy Storage Systems 41
3.1 Conventional Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
3.2 Modern Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.3 Design Concept Based on a Cascade Converter . . . . . . . . . . . . . . 46
3.3.1 Transformer-Based System . . . . . . . . . . . . . . . . . . . . . . 46
3.3.2 Transformerless System . . . . . . . . . . . . . . . . . . . . . . . . 48
3.4 Practical Issues for the 6.6-kV System . . . . . . . . . . . . . . . . . . . 50
3.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Chapter 4 The 200-V, 10-kW, 3.6-KWh Experimental System 53
4.1 System Conguration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
4.2 Overview of the Control System . . . . . . . . . . . . . . . . . . . . . . . 56
4.3 Sampling Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
4.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Chapter 5 Active-Power Control and SOC-Balancing Control 61
5.1 Active-Power Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
5.2 SOC-Balancing Control . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
5.2.1 Clustered SOC-Balancing Control . . . . . . . . . . . . . . . . . . 66
5.2.2 Individual SOC-Balancing Control . . . . . . . . . . . . . . . . . 72
5.3 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5.3.1 Startup Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5.3.2 Charging and Discharging Waveforms . . . . . . . . . . . . . . . . 76
5.3.3 Battery-Unit Voltage and Current Waveforms . . . . . . . . . . . 78
Contents v
5.3.4 Transient Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . 79
5.3.5 Eectiveness of the SOC-Balancing Control . . . . . . . . . . . . 80
5.3.6 Ride-Through Capability of Voltage Sags . . . . . . . . . . . . . . 82
5.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Chapter 6 Fault-Tolerant Control 85
6.1 Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
6.2 Fault Tolerance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
6.3 Literature Review . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
6.4 SOC Balancing During Fault-Tolerant Operation . . . . . . . . . . . . . 88
6.5 Methods of Bypassing a Faulty Converter Cell . . . . . . . . . . . . . . . 90
6.6 Fault-Tolerant Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
6.8 SOC Balancing During Fault-Tolerant Operation . . . . . . . . . . . . . 102
6.9 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
6.10 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Chapter 7 Active-Power Control of Individual Converter Cells 108
7.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
7.2 Control Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
7.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Chapter 8 Conclusion and Future Research 119
8.1 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
8.2 Future Research . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
References 122
List of Publications 139
vi
List of Tables
2.1 Voltage levels and corresponding switching states of a ve-level diode-
clamped converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.2 Possible combinations of voltage levels and corresponding switching states
of a ve-level ying-capacitor converter . . . . . . . . . . . . . . . . . . . 21
2.3 Possible combinations of voltage levels and corresponding switching states
of a ve-level cascade converter . . . . . . . . . . . . . . . . . . . . . . . 23
2.4 Comparison of power component requirements per phase leg among three
m-level converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2.5 Commercial medium-voltage motor drives based on multilevel converters 39
3.1 Major battery energy storage system installations throughout the world . 42
4.1 Circuit parameters of the experimental battery energy storage system . . 55
7.1 Five modes of operation, each of which has a dierent set of converter-cell
power commands, and its corresponding theoretical zero-sequence voltage 112
vii
List of Figures
1.1 Power electronics as a combination of technologies of electronics, power
and control [9]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 Approximate development timeline of major high-power semiconductor
devices [15]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Voltage and current ratings of major high-power semiconductor devices
commercially available [16]. . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4 Global cumulative installed wind power capacity 1996-2008 [37]. . . . . . 6
1.5 A battery energy storage system installed in the vicinity of renewable
energy resources for power leveling. . . . . . . . . . . . . . . . . . . . . . 7
1.6 Practical demonstration of power leveling of a 500-kW wind turbine gen-
erator by a 400-kW NaS battery energy storage system [40]. . . . . . . . 7
1.7 Approximate scale of energy storage systems installed by mid-2006 ex-
cluding pumped hydro storage and compressed-air energy storage [41]. . . 8
1.8 A battery energy storage system. (a) Schematic, and (b) Possible operat-
ing modes for active- and reactive-power generation. . . . . . . . . . . . . 9
1.9 A battery energy storage system. (a) Equivalent circuit, and (b) Phasor
diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.10 Unity power-factor operation of the battery energy storage system. (a)
Discharging, and (b) Charging. . . . . . . . . . . . . . . . . . . . . . . . 10
2.1 Simplied classication of medium-voltage high-power converters. . . . . 16
2.2 A two-level converter. (a) One phase leg schematic, and (b) Converter
phase voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
List of Figures viii
2.3 A ve-level diode-clamped converter. (a) One phase leg schematic, and
(b) Converter phase voltage. . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.4 A ve-level ying-capacitor converter. (a) One phase leg schematic, and
(b) Converter phase voltage. . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.5 A ve-level cascade converter. (a) One phase leg schematic, and (b) Con-
verter phase voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.6 A seven-level asymmetrical cascade converter. . . . . . . . . . . . . . . . 24
2.7 Nine-level hybrid asymmetrical converter consisting of a three-phase NPC
converter, with a three-level H-bridge in series with each phase. (a) Main
circuit, and (b) Converter voltages. . . . . . . . . . . . . . . . . . . . . . 25
2.8 A nine-level converter using a ve-level full-bridge diode-clamped con-
verter as the H-bridge in the cascade converter. . . . . . . . . . . . . . . 26
2.9 Modular multilevel converter. (a) Main circuit, and (b) Chopper cell. . . 27
2.10 Multilevel converter using three standard three-phase converter cells along
with an output transformer. (a) System conguration, and (b) Vector
diagram of the system with the fundamental voltages. . . . . . . . . . . . 28
2.11 Classication of multilevel modulation methods. . . . . . . . . . . . . . . 29
2.12 Phase-disposition modulation for a ve-level diode-clamped converter. (a) One
phase leg schematic of the converter, and (b) Phase-disposition modulation. 31
2.13 Phase-shifted sinusoidal PWM for a ve-level cascade converter. (a) One
phase leg schematic of the converter, and (b) Phase-shifted sinusoidal PWM. 31
2.14 Space vector diagram for a ve-level converter. . . . . . . . . . . . . . . . 32
2.15 Generalized stepped-voltage waveform. . . . . . . . . . . . . . . . . . . . 33
2.16 Space vector control of an 11-level converter. (a) Load voltage space
vectors generated by the converter, and (b) Reference and output voltage
vectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.17 Power circuits and line currents of multipulse diode rectiers. (a) 12-pulse,
and (b) 18-pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.18 A typical medium-voltage motor drive based on an NPC inverter with
12-pulse diode rectier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
List of Figures ix
2.19 A medium-voltage motor drive based on a cascade PWM inverter with
non-regenerative frond end [46]. . . . . . . . . . . . . . . . . . . . . . . . 36
2.20 A typical medium-voltage adjustable-speed motor drive with NPC rectier
as an active front end. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.21 A neutral-point-clamped converter based motor drive of Type N700 bullet
train in Japan [22]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.22 A medium-voltage motor drive based on a cascade PWM inverter with
regenerative three-phase active frond end [101]. . . . . . . . . . . . . . . 38
2.23 The 80-MVA GCT STATCOM using NPC converters at Kanzaki sub-
station, Japan [115]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.1 The 10-MW 40-MWh battery energy storage system based on an 18-pulse
power converter in Chino, CA, USA [42]. . . . . . . . . . . . . . . . . . . 43
3.2 The 5-MVA 2.5-MWh battery energy storage system based on a 12-pulse
power converter in Vernon, CA,USA [58]. . . . . . . . . . . . . . . . . . . 44
3.3 The 600-kW 200-kWh battery energy storage system based on a neutral-
point clamped converter in UK. . . . . . . . . . . . . . . . . . . . . . . . 45
3.4 Feasible circuit conguration of the 6.6-kV transformer-based battery en-
ergy storage system based on combination of a cascade PWM converter
with a cascade number N = 6, and 18 NiMH battery units with a nominal
voltage of 288 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.5 Charge/discharge characteristic of a typical NiMH battery cell [130]. . . . 48
3.6 Feasible circuit conguration of the 6.6-kV transformerless battery energy
storage system based on combination of a cascade PWM converter with
a cascade number N = 10, and 30 NiMH battery units with a nominal
voltage of 660 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
4.1 Experimental system conguration of the 200-V, 10-kW, 3.6-kWh down-
scaled battery energy storage system based on combination of a three-
phase cascade PWM converter with a cascade number N = 3, and nine
NiMH battery units with a nominal voltage of 72 V. . . . . . . . . . . . . 54
4.2 Control system for the battery energy storage system. . . . . . . . . . . . 56
List of Figures x
4.3 Snapshot of the cascade converter. (a) Front view, and (b) Rear view. . . 57
4.4 Control block diagram for the 200-V system with a cascade number N = 3. 58
4.5 Sampling method showing three phase-shifted carriers and three reference
signals for a cluster of three converter cells of one phase. . . . . . . . . . 59
5.1 Active-power control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
5.2 Block diagram of the d-axis current control, excluding the eect of a one-
sampling delay. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
5.3 Switching-pattern swapping scheme for SOC balancing of multiple battery
units in an 11-level cascade SCM converter. . . . . . . . . . . . . . . . . 65
5.4 Clustered SOC-balancing control based on zero-sequence voltage injection. 69
5.5 Three-phase to two-phase transformation of SOC errors in the u-, v-, and
w-clusters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
5.6 Illustration of the injection of zero-sequence voltage and the resulting neu-
tral shift. (a) Phasor diagram before the injection of zero-sequence voltage,
and (b) Phasor diagram after the injection of zero-sequence voltage. . . . 71
5.7 Clustered SOC-balancing control, taking the u-phase as an example. . . . 72
5.8 Individual SOC-balancing control between three cascaded converter cells
inside each cluster, paying attention to the n-th converter cells. . . . . . 73
5.9 Individual SOC-balancing control, taking the u-phase n-th converter cell
as an example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
5.10 Experimental waveforms when the battery energy storage system was
started. (a) CB1 was turned on at t = 0, (b) CB2 was turned on at
t = 30 s, and (c) Controller was started at t = 2 min. . . . . . . . . . . . 75
5.11 Experimental waveforms when the battery bank was charged at 10 kW
with a mean SOC window between 40 and 45%. . . . . . . . . . . . . . . 76
5.12 Experimental waveforms when the battery bank was discharged at 10 kW
with a mean SOC window between 40 and 45%. . . . . . . . . . . . . . . 77
5.13 Experimental waveforms with repetitive charging and discharging of the
battery bank, where a mean SOC window was kept between 25 and 75%. 78
List of Figures xi
5.14 Battery voltage and current waveforms. (a) During charging at 10 kW,
and (b) During discharging at 10 kW. The mean SOC value was 65%. . . 79
5.15 Experimental waveforms when p
was changed from 10 kW to 10 kW in

30 ms with a mean SOC value of 70%. . . . . . . . . . . . . . . . . . . . 80
5.16 Experimental waveforms when p
was changed from 10 kW to 10 kW in

30 ms with a mean SOC value of 30%. . . . . . . . . . . . . . . . . . . . 81
5.17 Experimental waveforms to verify the eectiveness of the SOC-balancing
control, where a mean SOC value was kept between 30 and 70% with
p
= 10 kW and q
= 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
5.18 Voltage-sag generator used to simulate a single-phase voltage sag in the
laboratory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
5.19 Experimental waveforms when a voltage sag of 25% occurred in the u-
phase and lasted for 100 ms during charging at 10 kW with a mean SOC
value of 75%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
5.20 Experimental waveforms when a voltage sag of 25% occurred in the u-
phase and lasted for 100 ms during discharging at 10 kW with a mean
SOC value of 75%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
6.1 A 4.16-kV 7.2-MVA STATCOM based on a ve-level cascade converter
with one redundant converter cell in each phase. . . . . . . . . . . . . . . 87
6.2 Space vector diagram of a seven-level cascade converter. (a) Normal con-
dition, and (b) With one faulty cell in the u-phase. Dots with a circle
around represent faulty space vectors. . . . . . . . . . . . . . . . . . . . . 88
6.3 A 4.16-kV motor drive based on a cascade PWM inverter [154]. (a) Power
circuit, (b) Normal operation with no faulty converter cell, and (c) Bal-
anced operation with one faulty converter cell in u-phase. . . . . . . . . . 89
6.4 Methods for bypassing a faulty converter cell. (a) Using thyristor switches,
and (b) Using a bypass contactor. . . . . . . . . . . . . . . . . . . . . . . 90
6.5 Method for bypassing a faulty converter cell used in the dissertation, which
exploits the failure state of the power switching device. . . . . . . . . . . 91
List of Figures xii
6.6 Block diagram of the fault-tolerant control riding through a single-converter-
cell fault. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
6.7 Phasor diagrams of converter-cell voltages with a cascade number N = 3.
(a) During normal operation, (b) During a fault in the u-phase converter
cell numbered 1 without zero-sequence voltage injection, and (c) During
a fault in the u-phase converter cell numbered 1 with the injection of
zero-sequence voltage. Note that the modulation indices of the u-phase
converter cells were increased by a factor of 1.5 in (b) and (c). They,
however, got reduced in (c) due to the injection of zero-sequence voltage. 93
6.8 Experimental waveforms when the u-phase converter cell numbered 1 was
bypassed while the remaining eight battery units were being charged or
discharged. (a) Charged at 10 kW with a mean SOC value at 65 %, and
(b) Discharged at 10 kW with a mean SOC value at 69%. . . . . . . . . . 98
6.9 Transient waveforms during charging at 10 kW. (a) When the u-phase
converter cell numbered 1 was bypassed with a mean SOC value of 67%,
and (b) When the u-phase converter cell numbered 1 was restored with a
mean SOC value of 69%. . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
6.10 Experimental voltage waveforms at the ac side of the cascade converter
during normal operation at 10 kW in discharging. (a) Four converter-cell
ac voltages, (b) Three line-to-neutral voltages, and (c) Three line-to-line
voltages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
6.11 Experimental voltage waveforms at the ac side of the cascade converter
during fault-tolerant operation at 10 kW in discharging. (a) Four converter-
cell ac voltages, (b) Three line-to-neutral voltages, and (c) Three line-to-
line voltages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
6.12 Experimental SOC waveforms with no fault-tolerant control, when the u-
phase converter cell numbered 1 was bypassed while the remaining eight
battery units were charged at 10 kW. . . . . . . . . . . . . . . . . . . . . 103
6.13 Experimental SOC waveforms with the fault-tolerant control, when the u-
phase converter cell numbered 1 was bypassed while the remaining eight
battery units were repetitively charged and discharged at 10 kW. . . . . 103
List of Figures xiii
6.14 Simulation waveforms during charging at 10 kW. (a) When the u-phase
converter cell numbered 1 was bypassed, and (b) When the u-phase con-
verter cell numbered 1 was restored. . . . . . . . . . . . . . . . . . . . . . 104
6.15 Simulation voltage waveforms at the ac side of the cascade converter dur-
ing normal operation at 10 kW in discharging. (a) Four converter-cell
ac voltages, (b) Three line-to-neutral voltages, and (c) Three line-to-line
voltages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
6.16 Simulation voltage waveforms at the ac side of the cascade converter dur-
ing fault-tolerant operation at 10 kW in discharging. (a) Four converter-
cell ac voltages, (b) Three line-to-neutral voltages, and (c) Three line-to-
line voltages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
7.1 Block diagram of the active-power control of individual converter cells
(represented by solid lines). The part represented by dashed lines is the
active-power control of the whole converter cells. For simplicity, the SOC-
balancing control and the fault-tolerant control are not included. . . . . . 109
7.2 Feedback loop (taking u-phase as an example) used in the experiment to
make the converter-cell powers at the dc side (P
un
) equal to the respective
commands at the ac side (P
un
) regardless of the converter-cell losses. . . 111
7.3 Experimental power waveforms of the nine battery units during ve modes
of operation of Table 7.1. . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
7.4 Experimental waveforms during mode I. . . . . . . . . . . . . . . . . . . 113
7.5 Experimental waveforms during mode II. . . . . . . . . . . . . . . . . . . 114
7.6 Experimental waveforms during mode III. . . . . . . . . . . . . . . . . . 114
7.7 Experimental waveforms during mode IV. . . . . . . . . . . . . . . . . . 115
7.8 Experimental waveforms during mode V. . . . . . . . . . . . . . . . . . . 115
7.9 Modulating signals (normalized by respective battery-unit voltages) of u-
phase converter cells numbered 1 and 3. (a) Mode I, (b) Mode II, (c)
Mode III, (d) Mode IV, and (e) Mode V. . . . . . . . . . . . . . . . . . . 116
List of Figures xiv
7.10 Experimental waveforms of the battery current in the u-phase converter-
cell numbered 1. (a) Mode I, (b) Mode II, (c) Mode III, (d) Mode IV, and
(e) Mode V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
1
Chapter 1
Introduction
1.1 Background
1.1.1 Trend of Power Electronics
Modern era of power electronics began with the development of commercial silicon-
controlled rectier (SCR) or thyristor by the General Electric Company in 1958 [1][3].
The thyristor is a three-junction device, which is triggered into conduction by a short
gate-current pulse. However, once it is in conduction mode, the gate circuit has no con-
trol. Therefore, force-commutated inverters such as McMurray inverter and McMurray-
Bedford inverter played the central role in 1960-70s [4], [5].
In many respects, thyristor is nearly the ideal switch for power electronic applications.
It can block high voltages in the o state and conduct large currents in the on state with
only a small on-state voltage drop. However, its inability to turn o by a gate pulse
prevents its use in switch-mode applications.
In the 1970s, gate turn-o (GTO) thyristor was developed [6][8]. The GTO is a
thyristor-like latching device that can be turned o by a short gate-current pulse. Al-
though the inclusion of a turn-o capability in a thyristor required some compromises in
the operational capabilities of the device, the gate turn-o capability provided increased
exibility in circuit applications and eliminated the use of elaborate commutation cir-
cuitry.
In 1974, William E. Newell from Westinghouse Research Laboratories, Pittsburgh
called for the need of communication and cooperation between specialists in electronics,
Power
electronics
E
l
e
c
t
r
o
n
i
c
s
Control
P
o
w
e
r
D
e
v
i
c
e
s
C
i
r
c
u
i
t
s
Continuous Discrete
S
t
a
t
i
c
e
q
u
i
p
m
e
n
t
R
o
t
a
t
i
n
g
e
q
u
i
p
m
e
n
t
Fig. 1.1: Power electronics as a combination of technologies of
electronics, power and control [9].
power and control to help power electronics emerge from limbo [9]. Fig. 1.1 illustrates his
vision of power electronics. During 1980s and 1990s, there were signicant advancement
in the key areas of power electronics, such as power semiconductor devices, control and
converter circuits.
In the late 1970s, the power metal-oxide-semiconductor eld-eect transistor (MOS-
FET) appeared, providing the rst switching device having a high input impedance.
Its evolution represents the convergence of power semiconductor technology with main-
stream complementary metal-oxide-semiconductor (CMOS) technology for the rst time.
Being a voltage-controlled device, the MOSFET has the advantage over the power
bipolar-junction transistor (BJT) of requiring very low switching power. In addition,
being a majority carrier device, it has the advantage of much enhanced speed and has
replaced the power BJT in many applications.
The development of power semiconductor devices took an important turn in the 1980s
when new process technology was developed that allowed integration of MOS and BJT
technologies on the same chip. From this emerged the insulated-gate bipolar transis-
tor (IGBT) in which bipolar current conduction was controlled by using an MOS-gate
structure [10]. It is an important milestone in the history of power electronics.
In the late 1980s, Mitsubishi Electric introduced the concept of intelligent power mod-
ule (IPM) [11], [12]. The IPM integrates the dedicated drive and protection circuitry
Transistor-based devices
Thyristor-based devices
Diode
SCR GTO GCT/IGCT
Symmetrical gate
commutated thyristor
(SGCT)
Power BJT
Low-voltage (LV)
IGBT
Medium-voltage
(MV) IGBT
Injection enhanced
gate transistor
(IEGT)
1955 1965 1975 1985 1995 2005
Fig. 1.2: Approximate development timeline of major high-power
semiconductor devices [15].
with the IGBT in an appropriate packaging to overcome the IGBTs inherent parasitic
limitations and maximize system performance and reliability. It also helps to reduce
system size and cost.
In 1996, gate-commutated thyristor (GCT), also known as integrated gate-commutated
thyristor (IGCT), was developed from the GTO strucure [13], [14]. Due to its features
such as snubberless operation and low switching loss, the GCT has continuously replaced
the GTO thyristor in medium-voltage (MV) drives.
Fig. 1.2 gives the approximate development timeline of major high-power semiconduc-
tor devices [15], while Fig. 1.3 shows the voltage and current ratings of major high-power
semiconductor devices commercially available today [16].
With achievements made by several generations of power semiconductor devices, silicon
is considered to be approaching limit in terms of performance improvement. In 1999,
Siemens AG introduced a new high-voltage power MOSFET, namely CoolMOS, that
virtually combined the low switching loss of a MOSFET with the on-state loss of an
IGBT [17].
Today, extensive research is being carried out to replace silicon-based devices by those
based on wide bandgap materials like silicon carbide (SiC). SiC Schottky diodes rated at
V [kV]
0
2
4
6
8
10
12
12 kV/1.5 kA
(Mitsubishi)
7.5 kV/1.65 kA
(Eupec)
6 kV/3 kA
(ABB)
6.5 kV/4.2 kA
(ABB)
4.8 kV/5 kA
(Westcode)
6.5 kV/0.6 kA
(Eupec)
4.5 kV/0.9 kA
(Mitsubishi)
6.5 kV/1.5 kA
(Eupec)
3.3 kV/1.2 kA
(Eupec)
2.5 kV/1.8 kA
(Fuji)
6 kV/6 kA
(Mitsubishi)
1.7 kV/3.6 kA
(Eupec)
I [kA] 0 1 2 3 4 5 6
SCR
IGBT
GTO/GCT
Fig. 1.3: Voltage and current ratings of major high-power semicon-
ductor devices commercially available [16].
300-1200 V are already available in the market [18], [19]. Moreover, Mitsubishi Electric
Corporation has reported a successful development of 1.2-kV SiC MOSFETs and built a
prototype 400-V 3.7-kW motor drive using SiC MOSFETs and SiC Schottky diodes [20].
Although the evolution of power electronics has generally followed the evolution of
power semiconductor devices, the advent of digital signal processors (DSPs) and eld
programmable logic arrays (FPGAs) in 1980s brought tremendous size and cost reduc-
tion to the controller accompanied by improved performance, increased reliability and
exibility of control. Over the last two decades, digital control methods and digital con-
trollers based on general-purpose or dedicated microprocessors, DSPs, or programmable
logic devices have become pervasive in applications such as motor drives and three-phase
power converters for utility interfaces.
Topologically, multilevel converters have been developed. In 1981, Nabae et al. [21]
proposed the pioneering neutral-point clamped (NPC) voltage-source converter (VSC).
The topology oered a simple solution to extend voltage and power ratings of the ex-
isting two-level VSC technology, which were severely limited by the blocking voltages of
the existing power switching devices with active turn-on and turn-o capabilities. More-
over, due to the increased number of voltage levels, the harmonic voltages and the total
harmonic distortion (THD) are lower than that of a comparable two-level VSC. The
three-level NPC-VSC was soon introduced to the market by leading manufacturers and
is currently the most widely used topology in MV drive applications including Type N700
bullet trains in Japan [22]. An alternative multilevel topology known as ying-capacitor
converter, where the voltage across an open switch is constrained by clamping capacitors
instead of clamping diodes, has been proposed in 1992 [23].
Another development in multilevel converter topology occurred in the mid-1990s when
Hammond [24] and Peng et al. [25] led two major patents extending the idea of cas-
cade converter in [26] for medium-voltage adjustable-speed motor drives and static syn-
chronous compensators (STATCOMs), respectively. Besides its applications in motor
drives and STATCOMs, the cascade converter is also suitable for grid integration of
renewable energy resources such as fuel cells, photovoltaics and wind turbine genera-
tors [27][29]. It has also gained interests in energy storage systems based on electric
double-layer capacitors (EDLCs) and batteries.
Other developments in converter topologies include the introduction of resonant dc-link
inverter in 1986 [30]. This was an attempt in reducing switching losses by modifying the
switching environment. Before this, increase in switching frequency and improvement
in switching losses had been mainly as a result of improvements in device speed and
safe operating area (SOA) ratings, although use of snubbers [31][33] and high-frequency
(HF) link converter [34], [35] had already been investigated.
Finally, the trend in power electronics today is toward the improvement of eciency
and reliability, and the elimination/size-reduction of transformers and inductors/capacitors
based on power semiconductor technology, converter topologies and control methods.
1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008
0
30,000
60,000
90,000
120,000
150,000
MW
6,100
7,600
10,200
13,600
17,400
31,100
23,900
39,431
47,620
59,091
74,052
93,835
120,798
Fig. 1.4: Global cumulative installed wind power capacity 1996-2008 [37].
1.1.2 Power Electronics For Renewable Energy Resources
1.1.2.1 Renewable Energy Resources
Depletion of fossil fuels, environmental considerations and security of supply concerns
have spurred signicant interests in renewable energy resources such as wind power and
solar power [36].
Fig. 1.4 shows the global cumulative installed capacity of wind power [37]. Over the
past ten years, the global wind power capacity has grown by an average rate of over 30%
annually, reaching more than 120 GW by the end of 2008. Global Wind Energy Coun-
cil (GWEC) predicts that wind power will supply 10-12% of global electricity demand
by 2020.
However, renewable energy resources including wind power are intermittent in na-
ture. Their power varies under the inuence of meteorological uctuations. Therefore,
a large amount of renewable energy may have an undesirable eect on power system
voltage/frequency stability [38]. Energy storage systems (ESS) [39] are indispensable for
successful integration of renewable energy resources into power systems.
Fig. 1.5 shows a battery energy storage system (BESS) installed in the vicinity of
renewable energy resources. The energy storage system stores the excess power from grid
when the renewable energy resources produces a larger power than an average power over
Wind power
0 12 24h
P
o
w
e
r
Solar power
Battery energy
storage system
Grid
4 12 24h
P
o
w
e
r
Fig. 1.5: A battery energy storage system installed in the vicinity
of renewable energy resources for power leveling.
a period of time, and releases the shortage of power back to the grid when they produce
a smaller power. The process is referred to as power leveling.
Fig. 1.6 shows results from a practical demonstration of power leveling at Hachijojima
wind power station, Japan, which was jointly carried out by Tokyo Electric Power Com-
pany, Inc. (TEPCO) and NGK Insulators, Ltd. [40]. A 400-kW sodium sulphur (NaS)
P
o
w
e
r
(
k
W
)
Time (s)
-300
-200
-100
0
100
200
300
400
500
600
0 60 120 180 240 300
`
`
`
Total power
`
``
Wind power
`
NaS Battery
Fig. 1.6: Practical demonstration of power leveling of a 500-kW
wind turbine generator by a 400-kW NaS battery energy storage
system [40].
battery energy storage system was integrated with a 500-kW wind turbine generator.
The net output was almost constant, verifying the eectiveness of the battery energy
storage system in power leveling of renewable energy resources.
1.1.2.2 Battery Energy Storage Systems
Fig. 1.7 shows the approximate scale of energy storage systems installed by mid-2006
excluding pumped hydro storage and compressed-air energy storage [41]. Battery sys-
tems make up a large proportion compared to ywheels, electric double-layer capacitors
(EDLCs) and superconducting magnetic energy storage (SMES) systems.
EDLC/
Flywheel
SMES
Conventional
(lead-acid,
NiCd, NiMH)
NaS
Lithium
Flow
Seconds Minutes
Hours
10 kWh 1 MWh 100 MWh
1
0
k
W
1
M
W
1
0
0
M
W
Energy
P
o
w
e
r
Fig. 1.7: Approximate scale of energy storage systems installed
by mid-2006 excluding pumped hydro storage and compressed-air
energy storage [41].
Conventional battery technologies include lead acid, nickel cadmium (NiCd), and nickel
metal hydride (NiMH), while advanced battery technologies include:
Lithium (Li)-based batteries, e.g. Li-ion
High-temperature batteries, e.g. NaS
Flow batteries, e.g. vanadium redox batteries (VRB) and zinc bromine (ZnBr).
Converter
C
Coupling
transformer
Grid
V
S
Battery
`
I
` I
DC
At ac terminal
V
D
C
(a) (b)
At dc terminal
V
DC
I
DC
I
DC
I
V
S
Discharging Charging
Capacitive
Inductive
Discharging Charging
Fig. 1.8: A battery energy storage system. (a) Schematic, and (b)
Possible operating modes for active- and reactive-power generation.
Fig. 1.8(a) shows schematic of a battery energy storage system, composed of a voltage-
source converter and a battery. The battery energy storage system can exchange both
active and reactive power with the grid. The active and reactive power, generated or
absorbed by the system, can be controlled independently of each other, and any combi-
nation of active-power generation/absorption with reactive-power generation/absorption
is possible, as illustrated in Fig. 1.8(b). The active power that the converter exchanges
at its ac terminals with the grid must, of course, be supplied to, or absorbed from, its
dc terminals by the battery. By contrast, the reactive power exchanged is internally
generated by the converter, without the battery playing any signicant part in it.
The battery energy storage system in Fig. 1.8 can be considered as an ideal sinusoidal
synchronous voltage source behind a coupling reactance provided by the leakage induc-
tance of the coupling transformer as shown in Fig. 1.9(a). Since the generated voltage
(V ) is completely controllable, the ac current (I) can be supplied at any phase angle
relative to the grid voltage (V
S
). Fig. 1.9(b) shows the phasor diagram. The active and
L
AC
Grid
V
S
`
I
(a)
V
S
V
jL
AC
I
(b)
Fig. 1.9: A battery energy storage system. (a) Equivalent circuit,
and (b) Phasor diagram.
I V
S
V
jL
AC
I
(a)
V
I V
S
jL
AC
I
(b)
Fig. 1.10: Unity power-factor operation of the battery energy stor-
age system. (a) Discharging, and (b) Charging.
reactive power supplied by the battery energy storages system to the grid are given by:
P =
V V
S
L
AC
sin (1.1)
Q =
V V
S
L
AC
cos
V
2
S
L
AC
. (1.2)
In the dissertation, the reactive power (Q) is always considered zero and therefore, the
battery energy storage system operates in two modes:
discharging at unity power factor, where the converter voltage (V ) leads the grid
voltage (V
S
) by an angle , as shown in Fig. 1.10(a), and
charging at unity power factor, where the converter voltage (V ) lags the grid
voltage (V
S
) by an angle , as shown in Fig. 1.10(b).
Conventional Systems Topologically, conventional battery energy storage sys-
tems are based on a multipulse converter employing complicated zigzag transformer.
For example, the 10-MW 40-MWh system in Chino, California is based on an 18-pulse
converter with complicated multiwinding transformer to synthesize a staircase voltage
waveform [42]. The multi-winding transformer is expensive, bulky, lossy, and prone to
failure.
Modern multilevel converters such as diode-clamped, ying capacitor, and cascade
converters are preferred to traditional transformer-based multipulse converters [21][26],
[43], [44]. Although cascade converters have been primarily investigated for STATCOMs
and motor drives [45][50], their unique structure makes them suitable for energy storage
systems using batteries.
Multilevel Cascade Converter Based Systems Multilevel cascade converters
have become an attractive topology for medium-voltage high-power applications [29],
[44], [47][50], [51], [52]. They are simple and modular in structure, and can reach
medium/high voltages with low voltage/current harmonics without using step-up trans-
formers or switching devices connected in series.
Although the concept of cascade converters has existed for more than three decades [26],
it was in the mid-1990s that they grabbed the attention of power electronics research
scientists and engineers. In 1997, two major patents [24], [25] were led that indicated
the advent of the cascade converters for motor drives and utility applications.
Peng et al. [45] presented transformerless STATCOMs based on cascade staircase-
modulated (SCM) converters. Robicon Corporation commercialized cascade pulsewidth-
modulated (PWM) inverters for medium-voltage adjustable-speed motor drives [46],
while Alstom T&D commercialized large-rated cascade-converter-based STATCOMs [53].
More recently, with advancement in batteries, integration of cascade converters with
batteries have gained interests. Tolbert et al. [54] described a three-phase cascade SCM
converter using batteries for a motor drive. Ertl et al. [55] discussed a single-phase cas-
cade PWM converter using batteries for a switch-mode power amplier. This dissertation
discusses a three-phase cascade PWM converter for a battery energy storage system.
1.2 Research Objective
The aim of the research is to study a battery energy storage system based on a multi-
level cascade PWM converter and investigate three important issues indispensable for its
practical use, namely state-of-charge (SOC) balancing of battery units, fault tolerance of
the system, and active-power control of individual converter cells.
SOC Balancing The SOC of a battery is its available capacity, expressed as a
percentage of the rated capacity. Due to asymmetric battery units, unequal converter-
cell losses, and so on, SOC imbalance may occur among multiple battery units in a battery
energy storage system based on a cascade converter. This may result in the reduction of
total available capacity of the battery units, and may also cause overcharge/overdischarge
of a particular battery unit. The research aims to propose an SOC-balancing control and
verify its eectiveness based on a 200-V laboratory system.
Fault Tolerance Medium-voltage battery energy storage system is a high-power
equipment. When it fails, the downtime can be very expensive. Therefore, reliability is
an important issue. However, the use of multilevel cascade converter increases its chances
of failure because the multilevel converter employs a large number of power switching
devices. The research aims to present, and verify based on the 200-V laboratory system,
a fault-tolerant control that, during a converter-cell or battery-unit failure, enables the
battery energy storage system to maintain continuous operation by producing a three-
phase balanced line-to-line voltage and achieving SOC balancing of remaining healthy
battery units.
Active-Power Control of Individual Converter Cells In the cascade-converter-
based battery energy storage system, power-handling capacities of the multiple battery
units may dier due to manufacturing tolerances and operating conditions or when one
or more of the battery units are replaced by the new ones. For maximum utilization
of battery energy, it would then be necessary to operate one or more battery units at
reduced or increased power levels. The research aims to present, and verify based on
the 200-V laboratory system, an active-power control of individual converter cells that
enables the multiple battery units to operate at dierent power levels while producing a
three-phase balanced line-to-line voltage.
1.3 Dissertation Outline
The dissertation has been organized into 8 chapters as follows:
Chapter 1 Introduction (Current Chapter) Chapter 1 briey reviews the trend
in power electronics. The chapter explains how battery energy storage systems can be
used for grid integration of renewable energy resources like wind power that produce uc-
tuating/intermittent output. It also talks about the drawbacks of conventional topologies
and discusses the suitability of multilevel topologies, especially cascade converters, for
the battery energy storage systems.
Chapter 2 Trend of Medium-Voltage Power Converters Chapter 2 provides
an overview of medium-voltage high-power converters with focus on multilevel voltage-
source converters such as diode-clamped, ying-capacitor, and cascade converters, and
their modulation strategies. Emerging topologies like hybrid/asymmetrical converters
and modular multilevel converters are also reviewed. Finally, applications of the multi-
level converters in industries and power distribution systems are discussed.
Chapter 3 Battery Energy Storage Systems Chapter 3 reviews the conven-
tional battery energy storage systems which are based on multipulse converters with
complicated zigzag transformers. The chapter discusses the present trend towards the
use of multilevel converters for the battery energy storage systems. Basic design concept
of the 6.6-kV system based on a multilevel cascade converter is presented, and issues for
its practical use are discussed.
Chapter 4 The 200-V, 10-kW, 3.6-kWh Experimental System Chapter 4
describes the experimental battery energy storage system based on a combination of a
multilevel cascade PWM converter and NiMH battery units. The chapter discusses the
system conguration and gives an overview of the control system including the sampling
method.
Chapter 5 Active-Power Control and SOC-Balancing Control Chapter 5
describes an active-power control for the battery energy storage system, which is based
on the synchronous dq reference frame and provides decoupling control of the active
and reactive current components. The chapter proposes an SOC-balancing control for
eective utilization of battery energy and stable operation of the system. Theoretical
analysis is done and experimental results are presented to verify the eectiveness of the
presented control methods.
Chapter 6 Fault-Tolerant Control Chapter 6 reviews fault-tolerant controls for
cascade converters that enable them to maintain continuous operation during a converter-
cell failure. The chapter presents a new fault-tolerant control for the battery energy
storage system that, during the converter-cell or battery-unit failure, not only produces
a three-phase balanced line-to-line voltage but also achieves SOC balancing of remaining
healthy battery units. Theoretical analysis is done and experimental results are presented
to verify the control method.
Chapter 7 Active-Power Control of Individual Converter Cells Chapter 7
presents an active-power control of individual converter cells for the cascade-converter-
based battery energy storage system. The control enables the multiple battery units
to operate at dierent power levels while producing a three-phase balanced line-to-line
voltage. This is particularly advantageous when power-handling capacities of multiple
battery units dier. Theoretical analysis is done and experimental results are presented
to verify the control method.
Chapter 8 Conclusion and Future Research Chapter 8 summarizes the achieve-
ment of the research and discusses the work to be done.
15
Chapter 2
Trend of Medium-Voltage Power
Converters
This chapter discusses an overview of medium-voltage high-power converters. At-
tention is paid to well-established and emerging topologies of multilevel voltage-source
converters as well as their modulation strategies and applications in industries and power
distribution systems.
2.1 Medium-Voltage Power Converters
Fig. 2.1 presents a simplied classication of medium-voltage high-power converters.
They are broadly categorized as current-source (CS) and voltage-source (VS) converters.
Two types of current-source inverters are commonly used: the load-commutated inverter
(LCI) and the PWM current-source inverter. For a higher power rating up to 100 MW,
the LCI is a preferred choice, with which the voltage-source inverters normally cannot
compete in terms of cost and energy eciency. Its main drawbacks include low input
power factor and distorted input current waveforms, which can be overcome by the
PWM current-source inverter. The power rating of the PWM current source inverters is
normally in the range of 1-10 MW and can be further increased with parallel inverters.
Over the last 10-15 years, the voltage-source converters have experienced a higher
market penetration and a more noticeable development in comparison to current-source
converters. Topologically, the classical two-level voltage-source converter is suited to
low- or medium-power applications due to switching-device voltage limits. Nevertheless,
Medium-voltage
high-power converters
Current source
Voltage source
Load
commutated
PWM
current source
High-power
two level
Multilevel
Diode-
clamped
Flying
capacitor
Cascade
H-bridge
Fig. 2.1: Simplied classication of medium-voltage high-power converters.
the series connection of switching devices enables it to be used for medium-voltage high-
power applications.
Multilevel voltage-source converters were originally evolved from the need for reducing
the harmonic content in the converter output voltage. Subsequently, it has been practi-
cally implemented to serve the need for realizing converters driven from high-voltage dc
bus. By using multilevel topologies, medium-voltage high-power converters can be real-
ized without using bulky and lossy step up/down transformers or series-connected switch-
ing devices. The diode clamped [21], ying capacitor [23], and cascade converter [26],
are the most popular topologies and have been commercialized by major manufacturers.
2.2 Two-Level Converter
Two-level converter is the simplest and most commonly used topology in low-voltage
applications. In order to apply this topology to medium-voltage systems, a series connec-
tion of power switching devices is required due to their blocking voltage limitation. Thus,
a converter leg is composed by two groups of power switching devices, each consisting of
two or more devices in series, depending on the dc voltage.
Fig. 2.2 shows (a) one phase leg schematic, and (b) phase voltage of a two-level con-
verter. The main advantages of the two-level converter are as follows:
u
M
V
DC
2
V
DC
2
(a)
V
DC
2
V
DC
2
uM
(Reference)
v
uM
(b)
Fig. 2.2: A two-level converter. (a) One phase leg schematic, and
(b) Converter phase voltage.
Simple and proven topology
Same converter design over supply-voltage range
Standard fully-developed PWM control
Provision for series redundancy of power switching devices in each phase arm.
The possible disadvantages are:
Static and dynamic voltage sharing of series-connected power switching devices
High dv/dt
Poor device voltage utilization
High switching-frequency harmonic content in converter output voltage.
To get around the limitations of the standard two-level six-pulse converter, the two-
level converters are connected together in ways which reduce their harmonic content and
combine their output power. Transformer-coupled six-pulse converters have been used to
create pseudo 12-, 18-, 24-, 36-, or 48-pulse arrangements for motor drives, STATCOMs
and battery energy storage systems [42], [56][59].
2.3 Multilevel Converters
Early interest in multilevel converters was triggered by the introduction of so-called
neutral-point clamped inverter by Nabae et al. [21] in 1981. Since then, numerous topolo-
gies have been introduced and widely studied [23], [60][67]. The multilevel converters
attempt to address the limitations of the standard two-level converter. Their key prop-
erties are:
Harmonics decrease as the number of levels increases
Increasing output voltage and power does not require an increase in rating of
individual devices
Reduced dv/dt and common-mode voltage.
2.3.1 Diode-Clamped Converter
The diode-clamped topology was rst proposed in the early 1980s [21], [43] as a three-
level neutral-point clamped inverter. It has been shown that the resultant three-level
PWM waveform has considerably better spectral performance compared to that of a
u
M
V
DC
2
V
DC
4
V
DC
4
V
DC
2
Q
1
Q
2
Q
3
Q
4
Q
1
Q
2
Q
3
Q
4
(a)
V
DC
2
V
DC
4
0
V
DC
4
V
DC
2
v
uM
uM
(Reference)
(b)
Fig. 2.3: A ve-level diode-clamped converter. (a) One phase leg
schematic, and (b) Converter phase voltage.
Table 2.1: Voltage levels and corresponding switching states of a
ve-level diode-clamped converter
Voltage
v
uM
Switch state
Q
4
Q
3
Q
2
Q
1
Q
4
Q
3
Q
2
Q
1
V
DC
/2 1 1 1 1 0 0 0 0
V
DC
/4 0 1 1 1 1 0 0 0
0 0 0 1 1 1 1 0 0
V
DC
/4 0 0 0 1 1 1 1 0
V
DC
/2 0 0 0 0 1 1 1 1
conventional PWM voltage-source inverter. Subsequently, the original NPC topology
has been extended to higher number of levels [68].
Since the diode-clamped topology oers a simple solution to extend voltage and power
ratings, it is of particular interest for medium-voltage applications, and has been intro-
duced to the market by leading manufacturers [69].
Fig 2.3 shows (a) one phase leg schematic and (b) phase voltage of a ve-level diode-
clamped converter. The dc link consists of four capacitors. For a dc-link voltage of
V
DC
, the voltage across each capacitor is V
DC
/4, and each device stress is limited to one
capacitor voltage, V
DC
/4, through clamping diodes. The clamping diodes distinguish
this circuit from the conventional two-level converter.
Table 2.1 lists the ve levels (V
DC
/2, V
DC
/4, 0, V
DC
/4, and V
DC
/2) of converter
voltage v
uM
and their corresponding switch states. State condition 1 means the switch
is on, and 0 means it is o. Note that there exists four complementary switch pairs
(Q
1
, Q
1
), (Q
2
, Q
2
), (Q
3
, Q
3
), and (Q
4
, Q
4
) such that turning on one of the switches of
the pair requires that the other complementary switch be turned o.
The major drawbacks of the diode-clamped voltage-source converters are the require-
ment of clamping diodes, the lack of modularity, the unequal semiconductor-loss distri-
bution [70], and the voltage balancing problem.
u
M
V
DC
2
V
DC
4
V
DC
4
V
DC
2
Q
4
Q
3
Q
2
Q
1
Q
1
Q
2
Q
3
Q
4
(a)
V
DC
2
V
DC
4
0
V
DC
4
V
DC
2
v
uM
uM
(Reference)
(b)
Fig. 2.4: A ve-level ying-capacitor converter. (a) One phase leg
2.3.2 Flying-Capacitor Converter
Meynard et al. [23] proposed a multilevel structure, known as ying-capacitor con-
verter, where the device o-state voltage clamping was achieved by using clamping ca-
pacitors rather than clamping diodes.
Fig. 2.4 shows (a) one phase leg schematic and (b) phase voltage of a ve-level
ying-capacitor converter. Table 2.2 lists all the possible combinations of ve levels
(V
DC
/2, V
DC
/4, 0, V
DC
/4, and V
DC
/2) of converter voltage v
uM
and the correspond-
ing switch states. The voltage synthesis in the ying capacitor converter has more
exibility than that in the diode-clamped converter. The converters major problem is
the additional expense of ying capacitors, particularly at low and medium switching
frequencies.
2.3.3 Cascade Converter
The concept of cascade converters has existed for more than three decades [26]. How-
ever, it was in the mid-1990s that they grabbed the attention of power electronics research
scientists and engineers. In 1997, two major patents [24], [25] were led that indicated
Table 2.2: Possible combinations of voltage levels and correspond-
ing switching states of a ve-level ying-capacitor converter
Voltage
v
uM
Switch state
Q
4
Q
3
Q
2
Q
1
Q
1
Q
2
Q
3
Q
4
V
DC
/2 1 1 1 1 0 0 0 0
(No redundancy)
V
DC
/4 = V
DC
/2 V
DC
/4 1 1 1 0 1 0 0 0
V
DC
/4 = 3V
DC
/4 V
DC
/2 0 1 1 1 0 0 0 1
V
DC
/4 = V
DC
/2 3V
DC
/4 +V
DC
/2 1 0 1 1 0 0 1 0
(2 redundancies)
0 = V
DC
/2 V
DC
/2 1 1 0 0 1 1 0 0
0 = V
DC
/2 V
DC
/2 0 0 1 1 0 0 1 1
0 = V
DC
/2 3V
DC
/4 +V
DC
/2 V
DC
/4 1 0 1 0 1 0 1 0
0 = V
DC
/2 3V
DC
/4 +V
DC
/4 1 0 0 1 0 1 1 0
0 = 3V
DC
/4 V
DC
/2 +V
DC
/4 V
DC
/2 0 1 0 1 0 1 0 1
0 = 3V
DC
/4 V
DC
/4 V
DC
/2 0 1 1 0 1 0 0 1
(5 redundancies)
V
DC
/4 = V
DC
/2 3V
DC
/4 1 0 0 0 1 1 1 0
V
DC
/4 = V
DC
/4 V
DC
/2 0 0 0 1 0 1 1 1
V
DC
/4 = V
DC
/2 V
DC
/4 V
DC
/2 0 0 1 0 1 0 1 1
(2 redundancies)
V
DC
/2 0 0 0 0 1 1 1 1
(No redundancy)
the advent of the cascade converters for motor drives and utility applications.
The cascade converter is composed by a series connection of single-phase H-bridge
converter cells. Each converter cell can generate three voltage levels, +V
DC
, 0, and
V
DC
. The output voltage is synthesized by the sum of the converter-cell voltages, i.e.,
v
uM
= v
u1
+ v
u2
+ v
uN
, where N is the number of converter cells in the phase, also
called the cascade number.
u
V
DC
V
DC
v
u1
v
u2
M
`
`
Q
11
Q
12
Q
11
Q
12
Q
21
Q
22
Q
21
Q
22
(a)
2V
DC
V
DC
0
V
DC
2V
DC
v
uM
uM
(Reference)
(b)
Fig. 2.5: A ve-level cascade converter. (a) One phase leg
Fig. 2.5 shows (a) one phase leg schematic and (b) phase voltage of a ve-level cascade
converter. Table 2.3 lists all the possible combinations of ve levels (2V
DC
, V
DC
, 0, V
DC
,
and 2V
DC
) of converter voltage v
uM
and the corresponding switch states.
2.3.4 Comparison of Multilevel Converters
Table 2.4 compares the power component requirements per phase leg among the three
multilevel converters mentioned above. The comparison assumes the same voltage rating
for all devices, but not necessarily the same current rating. It also assumes that the
cascade converter uses a full bridge in each level as compared to the half-bridge version
used in the diode-clamped and ying-capacitor converters. It is seen that the cascade
converter requires the least number of components.
Table 2.3: Possible combinations of voltage levels and correspond-
ing switching states of a ve-level cascade converter
Voltage
v
uM
Switch state
Q
11
Q
12
v
u1
Q
21
Q
22
v
u2
2V
DC
(No redundancy) 1 0 V
DC
1 0 V
DC
V
DC
(3 redundancies) 1 0 V
DC
0 0 0
1 0 V
DC
1 1 0
0 0 0 1 0 V
DC
1 1 0 1 0 V
DC
0 (5 redundancies) 0 0 0 0 0 0
0 0 0 1 1 0
1 1 0 0 0 0
1 1 0 1 1 0
1 0 V
DC
0 1 V
DC
0 1 V
DC
1 0 V
DC
V
DC
(3 redundancies) 0 1 V
DC
1 1 0
0 1 V
DC
0 0 0
0 0 0 0 1 V
DC
1 1 0 0 1 V
DC
2V
DC
(No redundancy) 0 1 V
DC
0 1 V
DC
2.4 Emerging Multilevel Converters
2.4.1 Hybrid/Asymmetrical Converters
Asymmetrical Cascade Converter Cascade converter having N identical dc
voltage sources per phase can oer 2N + 1 distinct voltage levels at the phase output.
It has been shown that the performance attributes of the output waveforms in terms of
number of levels can be further enhanced by using unequal dc voltage levels [61][65].
Manjrekar et al. [61] reported that it is possible to achieve 2
N+1
1 distinct voltage
levels with dc voltage levels varying in binary fashion (V, 2V, 4V, 2
N1
V ). Based
Table 2.4: Comparison of power component requirements per phase
leg among three m-level converters
Converter type Diode clamped Flying capacitor Cascade
Main switching devices 2 (m1) 2 (m1) 2 (m1)
Main diodes 2 (m1) 2 (m1) 2 (m1)
Clamping diodes (m1)(m2) 0 0
DC capacitors (m1) (m1)
1
2
(m1)
Balancing capacitors 0
1
2
(m1)(m2) 0
2v
DC
v
DC
M
Fig. 2.6: A seven-level asymmetrical cascade converter.
on this approach, the authors have proposed a seven-level 4.5-kV 500-hp motor drive
shown in Fig. 2.6. The topology is a combination of a GTO converter cell with 3-
kV bus and an IGBT converter with 1.5-kV bus. In addition, the authors have used
hybrid modulation strategy in which the GTO converter is modulated to switch only at
fundamental frequency while the IGBT converter uses PWM.
The asymmetrical cascade converters reduce the size and cost of the converters, and
improve reliability, because fewer semiconductors and capacitors are used. An additional
advantage is that the converter can be controlled appropriately to reduce the switching
losses. The major drawback is the fact that the modularity of converter is lost.
M
(a)
0
V
DC
3V
DC
0
4V
DC
>
>.
>
>.
Converter output
NPC converter output
H-bridge output
(b)
Fig. 2.7: Nine-level hybrid asymmetrical converter consisting of a
three-phase NPC converter, with a three-level H-bridge in series
with each phase. (a) Main circuit, and (b) Converter voltages.
Other Hybrid/Asymmetric Converters Steimer et al. [71] presented a nine-
level hybrid asymmetrical converter for medium-voltage motor drives that consists of a
three-phase IGCT NPC converter (main converter), with a three-level IGBT H-bridge
(sub-converter) in series with each phase. Fig. 2.7 shows (a) the circuit diagram and (b)
v
DC
v
DC
u
M
Fig. 2.8: A nine-level converter using a ve-level full-bridge diode-
clamped converter as the H-bridge in the cascade converter.
the corresponding output voltage as well as main-converter and sub-converter voltages.
To obtain a maximum of output voltage levels, the ratio of capacitor voltage of the main
converter and that of the sub-converter is three. Veenstra el al. [72] presented a control
method to stabilize the capacitor voltages of the non-supplied H-bridge sub converters
in Fig. 2.7(a).
For high-voltage high-power applications, it is possible to adopt multilevel diode-
clamped or ying-capacitor converters to replace the full-bridge cell in the cascade con-
verter [73]. Fig. 2.8 shows a nine-level converter using ve-level full-bridge diode-clamped
converter cell as the building block of the cascade converter.
2.4.2 Modular Multilevel Converters
Fig. 2.9(a) shows a basic circuit conguration of a three-phase modular multilevel
converter (MMC) [74], [75]. Each phase leg consists of two stacks of multiple bidirectional
chopper cells and two non-coupled buer inductors. Fig. 2.9 (b) shows the chopper cell.
The MMC is suitable for medium-/high-voltage high-power applications.
Cell
u
1
Cell
u
N
Cell
u
N+1
Cell
u
2N
Cell
v
1
Cell
v
N
Cell
v
N+1
Cell
v
2N
Cell
w
1
Cell
w
N
Cell
w
N+1
Cell
w
2N
Common
dc link
(a) (b)
Fig. 2.9: Modular multilevel converter. (a) Main circuit, and (b)
Chopper cell.
2.4.3 Multilevel Converters With Multiple Three-Phase Con-
verters
Multiple low-power three-phase converters have been used in utility applications through
multipulse converter congurations. These converters achieve multilevel voltage output
through phase shifting of multiple two-level waveforms which are added together vectori-
ally using series-connected transformer windings [56], [57], [76]. The approach, however,
becomes dicult as the number of levels increases due to the requirement of increased
number of multiple transformer windings.
Fig. 2.10(a) shows an alternative approach of combining three three-phase converters
to obtain a multilevel output [77]. The phase shifting is realized by using an output
transformer. Fig. 2.10(b) shows the vector diagram representing the complete converter
system. Each three-phase inverter generating balanced three-phase output voltages is
represented by a delta. For example, u
1
, v
1
, and w
1
in Fig. 2.10(b) represent the inverter 1
in Fig. 2.10(a). Three transformers of 1:1 turn ratio are connected to the inverter output.
M
20
+ 20
U
V
W
u
1
v
1
w
1
u
2
v
2
w
2
u
3
v
3
w
3
K
L
M
1
2
3
Inv. 1
Inv. 2
Inv. 3
(a)
w
1
u
3
w
3
u
1
v
1
u
2
v
2
w
2
v
3
K
L
M
Inv. 1
Inv. 2 Inv. 3
(b)
Fig. 2.10: Multilevel converter using three standard three-phase
converter cells along with an output transformer. (a) System con-
guration, and (b) Vector diagram of the system with the funda-
mental voltages.
The purpose of the output transformer is to generate the vectors w
1
u
3
, v
3
w
2
, and u
2
v
1
from inverter output voltage vectors u
2
w
2
, w
1
v
1
, and v
3
u
3
, respectively. The output
transformer, therefore, increases the output voltage and also eliminates any circulating
current within the loop by ensuring that the addition of voltage vectors w
1
v
1
, v
1
u
2
, u
2
w
2
,
w
2
v
3
, v
3
u
3
, and u
3
w
1
is zero at any switching instant.
Multilevel
modulation
Fundamental
switching frequency
High
switching frequency
Space
vector
control
Selective
harmonic
elimination
Space
vector
PWM
Sinusoidal
PWM
Fig. 2.11: Classication of multilevel modulation methods.
2.4.4 Soft-Switched Multilevel Converters
There are numerous ways of implementing soft-switching methods to reduce the switch-
ing loss and increase eciency of dierent multilevel converters [78][81].
For the cascade converter, because each converter cell is a two-level circuit, the im-
plementation of soft switching is not at all dierent from that of conventional two-level
converters.
For ying capacitor and diode-clamped converters, the choices of soft-switching circuit
can be found with dierent circuit combinations. Most literatures proposed zero-voltage-
switching types including auxiliary resonant commutated pole, coupled inductor with
zero-voltage transition, and their combinations.
2.5 Modulation Methods
The modulation methods in multilevel converters can be classied into two major cat-
egories according to the switching frequency, as shown in Fig. 2.11 [82], [83]. The method
with the highest industrial application is the classical carrier-based sinusoidal PWM with
triangular carriers. Another popular method is the space vector PWM. Methods with
low switching frequency include selective harmonic elimination [54], [73], [84] and space
vector control introduced in [82].
2.5.1 Sinusoidal Pulsewidth Modulation
Sinusoidal pulsewidth modulation (SPWM) (also referred to as subharmonic PWM)
techniques are the most popular modulation methods in industrial applications and have
been reviewed extensively. This method involves a comparison of a reference input, which
is basically a sinusoidal waveform, against a triangular carrier waveform and detection
of crossover instances to determine switching events.
Several techniques have been developed based on the classical SPWM with triangular
carriers. Some use carrier disposition and the others use phase shifting of multiple carrier
signals [85][89].
Most carrier-based PWM methods for diode-clamped converters derive from the carrier
disposition strategy presented by Carrara et al. [85]. For an m-level diode-clamped
converter, this method arranges m 1 triangular carriers with the same frequency and
amplitude so that they fully occupy contiguous bands over the range +V
DC
/2 to V
DC
/2.
A single reference is then compared with each carrier to determine the switched output
voltages for the converter.
Three alternative carrier disposition PWM methods are commonly used, namely
Alternative phase opposition disposition (APOD), where each carrier is phase
shifted by 180
out of phase with those below the zero point;

Phase opposition disposition (POD), where the carriers above the sinusoidal ref-
erence zero point are 180
out of phase with those below the zero point;

Phase disposition (PD), where all the carriers are in phase.
Fig. 2.12 illustrates the carrier and reference waveforms for PD modulation of a ve-level
diode-clamped converter. The PD modulation has been well accepted as achieving the
lowest line-to-line harmonic voltage distortion.
For the cascade converter, the phase-shifted carrier PWM is the most common method
[88], with an improved harmonic performance being achieved when each single-phase
converter cell is controlled using three-level modulation [89]. Using this method, the
sinusoidal reference waveforms for the two phase legs of each converter cell are phase
shifted by 180
, while each converter-cells carrier is phase-shifted by 180
/N, where N
u
M
V
DC
2
V
DC
4
V
DC
4
V
DC
2
Q
1
Q
2
Q
3
Q
4
Q
1
Q
2
Q
3
Q
4
(a)
v
uM
0
V
DC
2
V
DC
2
>
>.
Triangular carriers
Reference v
uM
(b)
Fig. 2.12: Phase-disposition modulation for a ve-level diode-
clamped converter. (a) One phase leg schematic of the converter,
and (b) Phase-disposition modulation.
u
M
v
u1
`
v
u2
V
DC
V
DC
`
(a)
v
uM
0
2V
DC
2V
DC
>
>.
Triangular carriers
Reference v
un
(b)
Fig. 2.13: Phase-shifted sinusoidal PWM for a ve-level cascade
converter. (a) One phase leg schematic of the converter, and
(b) Phase-shifted sinusoidal PWM.
is the cascade number. This method leads to cancelation of all carrier and associated
sideband harmonics up to the 2N-th carrier group. Fig. 2.13 illustrates the carrier and
reference waveforms for one phase leg of a ve-level cascade converter.
V
j
V
j+1
V
j+2
V
u,
v
w
Fig. 2.14: Space vector diagram for a ve-level converter.
2.5.2 Space Vector PWM
Space vector modulation (SVM) has been extended to multilevel converters [83], [90],
[91]. The SVM identies each switching state of a multilevel converter as a point in
complex (, ) plane. Fig. 2.14 shows space vectors of a ve-level converter. The voltage
reference vector rotating in the (, ) plane at the fundamental frequency is sampled
within each switching period, and it is synthesized by selecting the nearest three vectors
(

V
j
,

V
j+1
,

V
j+2
) with corresponding duty cycles (d
j
, d
j+1
, d
j+2
) computed to achieve the
same volt-second average as the sampled reference vector.
= d
j

V
j
+d
j+1

V
j+1
+d
j+2

V
j+2
, (2.1)
where d
j
+d
j+1
+d
j+2
= 1. (2.2)
Space-vector PWM provides good utilization of dc voltage, low ripple current, and
relatively easy hardware implementation. However, as the number of level increases,
redundant switching states and the complexity of selecting switching states increase
dramatically. Celanovic et al. [83] have introduced a computationally ecient SVM
algorithm for a general m-level converter.
v
t
1

2

N
2

3
2
2
V
DC
2V
DC
NV
DC
Fig. 2.15: Generalized stepped-voltage waveform.
2.5.3 Selective Harmonic Elimination
Harmonic elimination methods are based on harmonic elimination theory developed
by Patel et al. [92], [93].
Fig. 2.15 shows a generalized quarter-wave symmetric stepped-voltage waveform syn-
thesized by a (2N + 1)-level converter, where N is the number of switching angles. The
Fourier series expansion of the waveform is given by
v(t) =
4V
DC
k=1
1
k
{cos(k
1
) + cos(k
2
) + + cos(k
N
)} sin(kt), (2.3)
where k is uneven, and 0
1
<
2
<
N
/2.
To minimize harmonic distortion and to achieve adjustable amplitude of the fundamen-
tal component, up to N1 harmonic contents can be removed from the voltage waveform.
In general, the most signicant low-frequency harmonics are chosen for elimination by
properly selecting switching angles and the high-frequency harmonic components can be
readily removed by using additional lter circuits.
2.5.4 Space Vector Control
Rodriguez et al. [82] introduced a space-vector control for multilevel converters that
works with low switching frequencies. The control method does not generate the mean
value of the desired load voltage in every switching interval, which is the principle of
space-vector modulation. The main idea is to select a voltage vector that minimizes the
distance to the reference vector.
axis
a
x
i
s
v
c
v
(a)
axis
a
x
i
s
> >.
Reference
> >.
Output
(b)
Fig. 2.16: Space vector control of an 11-level converter. (a) Load
voltage space vectors generated by the converter, and (b) Reference
and output voltage vectors.
Fig. 2.16(a) shows the 311 dierent space vectors generated by an 11-level converter.
The shaded hexagon shows the boundary of highest proximity, which means that when
the reference voltage v
is located in this area, vector v

c
must be selected. The high den-
sity of vectors produced by the 11-level converter generates only small errors in relation
to the reference vector. Fig. 2.16(b) shows the reference vector and the vectors generated
by the converter using space vector control.
This method is simple and attractive for high number of levels. As the number of
levels decreases, the error in terms of the generated vectors with respect to the reference
will be higher, resulting in an increase of the load current ripple.
2.6 Applications of Multilevel Converters
2.6.1 Medium-Voltage Motor Drives
With Non-Regenerative Front Ends Multilevel inverters have been widely used
in medium-voltage motor-drive applications such as fans, pumps, blowers, compressors
and conveyers [59], [94][97]. Multipulse rectiers, as shown in Fig. 2.17, are generally
used as front ends in these applications requiring no regenerative braking [98].
Utility
grid
i
S
i
S
+30
(a)
Utility
grid
i
S
i
S
20
40
(b)
Fig. 2.17: Power circuits and line currents of multipulse diode
rectiers. (a) 12-pulse, and (b) 18-pulse.
+
0
M
Fig. 2.18: A typical medium-voltage motor drive based on an NPC
inverter with 12-pulse diode rectier.
Fig. 2.18 shows a typical example of a medium-voltage motor drive based on a neutral-
clamped inverter with 12-pulse diode rectier as a front end. Fig. 2.19 shows another
0
+
60
N
+
(k1)60
N
Cell u1
Cell u2
Cell uN
Cell
v1
Cell
v2
Cell
vN
Cell
w1
Cell
w2
Cell
wN
M
Fig. 2.19: A medium-voltage motor drive based on a cascade PWM
inverter with non-regenerative frond end [46].
medium-voltage motor drive based on a cascade PWM converter with non-regenerative
front end [46].
However, large phase-shifting transformers in the multipulse rectiers, which are meant
for the reduction of harmonics in the line current, are bulky and costly. Today the trend
is towards the use of rectiers based on multilevel topologies [97], [99].
With Regenerative Front Ends Several industrial applications can generate en-
ergy back from the load to the power supply. The inverter must be able to deal with this
demand. Diode-clamped inverters with active front end are used in several applications
demanding energy regeneration, like laminators, rolling mills and downhill conveyor [100].
Fig. 2.20 shows a back-to-back (BTB) conguration of three-level diode-clamped con-
verters for a medium-voltage adjustable-speed motor drive capable of energy regenera-
tion.
Fig. 2.21 shows the NPC-converter based motor drive for Type N700 bullet trains
in Japan [22]. The 1850-V 1.1-MW motor drive consists of a single-phase full-bridge
ve-level NPC rectier and a three-phase three-level NPC inverter.
M
NPC Rectier NPC Inverter
Fig. 2.20: A typical medium-voltage adjustable-speed motor drive
with NPC rectier as an active front end.
AC 25 kV, 60 Hz, 1
Transformer
4160 kVA
NPC Converter NPC Converter
DC 2400 V
275 kW, 1850 V
110 A, 102 Hz
3000 rpm
Max. 5700 rpm
M
M
M
M
Fig. 2.21: A neutral-point-clamped converter based motor drive of
Type N700 bullet train in Japan [22].
The diode rectier in the cascade-converter-based motor drive in Fig. 2.19 can be
replaced by an active front end as shown in Fig. 2.22, thus allowing power ow to be
reversed [101]. Note that the transformer used in Fig. 2.22 is a multiphase, non phase-
shifted transformer because the active front end converter corrects the power factor and
eliminates the harmonics. An alternative topology in which the three-phase active front
end is replaced by a single-phase active front end has been investigated in [102].
Cell u1
Cell u2
Cell uN
Cell v1
Cell v2
Cell vN
Cell w1
Cell w2
Cell wN
M
Fig. 2.22: A medium-voltage motor drive based on a cascade PWM
inverter with regenerative three-phase active frond end [101].
Table 2.5 lists medium-voltage motor drives based on multilevel converters that are
commercially available today [22], [59], [103][107]. For each motor drive, details are
given of the converter conguration, switching device, power rating and manufacturer.
2.6.2 Applications in Power Systems
The diode-clamped converter has been widely investigated for harmonic and reactive
compensation. References [108][110] investigated the diode-clamped converter for active
power lters while [111][113] investigated it for STATCOMs. ABB has commercialized
the NPC-VSC based STATCOM with the trade name of SVC Light [114]. Fig. 2.23
shows NPC-VSC-based 80-MVA STATCOM commissioned in 2004 at the Kanzaki
substation of Kansai Electric Power Co., Inc. [115].
The multilevel cascade converter is best suited for harmonic/reactive compensation
and other utility applications [45], [47], [48]. Alstom T&D commercialized the multi-
level cascade converter for STATCOM [53], which is currently being supplied by Areva
Table 2.5: Commercial medium-voltage motor drives based on mul-
tilevel converters
Converter
Conguration
Switching
device
Power Rating Manufacturer
NPC
ABB
GCT 0.3 MVA - 5 MVA (ACS 1000) [59]
GCT 3 MVA - 27 MVA (ACS 6000) [103]
Siemens AG
IGBT 1 MVA - 10 MVA
(SINAMICS GM150) [104]
GCT 10 MVA - 21 MVA
TM GE Automation Systems
IGBT 0.3 MVA - 5.2 MVA (Dura-Bilt5i MV) [105]
Converteam
IGBT up to 33 MVA (MV7000) [106]
Cascade
H-bridge
Siemens AG
IGBT 0.3 MVA - 31 MVA (ROBICON Perfect Harmony)
[104]
IGBT 0.15 MVA - 4.8 MVA (TMdrive-MV) [105]
NPC/H-bridge
Fuji Electric Systems
IGBT 0.4 MVA - 7.5 MVA (FRENIC4600FM5) [22]
Toshiba
IGBT 0.4 MVA - 4.8 MVA (TOSVERT-300MVi) [107]
IGBT 8 MVA
(TMdrive-XL Series) [105] IEGT 20 MVA
GCT 20 MVA
77 kV
GCT converter cell DC 6 kV
OV-GCT
Fig. 2.23: The 80-MVA GCT STATCOM using NPC converters
at Kanzaki substation, Japan [115].
T&D [116].
Siemens AG has commercialized modular multilevel converters with the trade name
of HVDC PLUS for a wide range of power system applications including STATCOM
and unied power ow controller (UPFC) [117].
2.7 Summary
This chapter has provided an overview of medium-voltage high-power converters with
focus on multilevel voltage-source converters including diode-clamped, ying-capacitor,
and cascade converters. Emerging multilevel topologies such as hybrid/asymmetrical
converters and modular multilevel converters have been presented. Modulation strategies
have been briey reviewed. Finally, applications of multilevel converters in industries and
power distribution systems have been discussed.
41
Chapter 3
Battery Energy Storage Systems
This chapter reviews literatures on conventional and modern battery energy storage
systems. The conventional systems are based on a combination of a multipulse converter
and a complicated zigzag transformer, while the modern systems are based on multilevel
converters. The chapter presents a basic design concept of the 6.6-kV battery energy
storage system based on a multilevel cascade PWM converter, and discusses the practical
issues to be addressed for its realization.
3.1 Conventional Systems
Signicant advances in battery technologies have spurred interests in energy storage
systems based on batteries. Table 3.1 shows some major battery energy storage system
installations throughout the world [42], [58], [118][123]. For each system, details are
given of the location, rated capacity, battery type, principle applications and the date of
installation.
Conventionally, battery energy storage systems are based on a combination of multi-
pulse (12-, 18-, 24-pulse and so on) converter and a complicated zigzag transformer [42],
[58]. Lead-acid batteries, which represent an established and mature technology, are the
preferred choice in most of these systems.
Fig. 3.1 shows a 12-kV, 10-MW, 40-MWh battery energy storage system that was
placed in service at Southern California Edisons Chino 230/69/12.5-kV substation in
early 1988 [42], [120]. At the time of its installation, it was the largest battery energy
storage system in the world. It was developed as a multi-purpose (load leveling, peak
Table 3.1: Major battery energy storage system installations
throughout the world
Battery Energy
Storage System
Location
Rated
Capacity
Battery
Type
Principle
Application
Year
BEWAG AG [118]
Berlin,
Germany
17 MW/
14 MWh
Lead acid
Spinning reserve,
frequency control
1986
Kansai Electric
Power Co., Inc. [119]
Tatsumi,
Japan
1 MW/
4 MWh
Lead acid
Multipurpose
demonstration
1986
South California
Edison (SCE)
[42][120]
Chino,
CA, USA
10 MW/
40 MWh
Lead acid
Multipurpose
demonstration
(load leveling, etc.)
1988
Puerto Rico Electric
Power Authority
(PREPA) [121]
San Juan,
PR, USA
20 MW/
14 MWh
Lead acid
Spinning reserve,
frequency control,
voltage regulation
1994
GNB Technologies
[58]
Vernon,
CA, USA
5 MVA/
2.5 MWh
Lead acid
UPS,
peak shaving
1995
Golden Valley
Electric Association
(GVEA) [122]
AK, USA
40 MW/
14 MWh
NiCd
Spinning reserve,
frequency control,
voltage regulation
2003
Tokyo Electric
Power Co., Inc.
(TEPCO) [123]
Hitachi
Automotive
Systems
Factory,
Japan
8 MW/
58 MWh
NaS Load leveling 2004
shaving, etc.) demonstration project. The energy storage system was based on an 18-
pulse voltage-source converter using GTOs. The battery consisted of 8256 lead-acid cells
congured in eight parallel strings of 1032 cells each. The dc voltage ranged from 1750
to 2860 V. It used complicated zigzag transformers in order to synthesize a staircase
Battery
T11
T12
T13
T21
T22
T23
T31
T32
T33
T11
T21T32 T31T22
T12
T22
T33
T32
T23
T13
T23
T31
T33
T21
Fig. 3.1: The 10-MW 40-MWh battery energy storage system
based on an 18-pulse power converter in Chino, CA, USA [42].
voltage waveform.
Fig. 3.2 shows another example of a conventional battery energy storage system [58].
This 4.16-kV, 5-MVA, 2.5-MWh system was installed at the GNB Battery Recycling
Plant in Vernon, California in 1995 for uninterruptible power supply (UPS) and peak
shaving. It used lead-acid batteries with a dc-voltage range from 660 to 900 V. The
system was based on a pair of six-pulse converters, forming a 12-pulse converter, and
three 12-pulse converters were paralleled to achieve the required power rating.
The transformers used in Figs. 3.1 and 3.2 would be expensive, bulky, lossy, and prone
to failure. Modern multilevel converters such as diode-clamped, ying capacitor, and
cascade converters are preferred to traditional transformer-based multipulse converters.
2C 2A 2B
1A 1B 1C
N
N 1A 2A
Phasor diagram
Battery
Fig. 3.2: The 5-MVA 2.5-MWh battery energy storage system
based on a 12-pulse power converter in Vernon, CA,USA [58].
3.2 Modern Systems
Battery energy storage systems based on the neutral-point clamped converter have
been reported in literatures [122], [124], [125]. Fig. 3.3 shows a simple schematic of the
600-kW 200-kWh battery energy storage system based on the neutral-point clamped
converter [125]. It was jointly developed by ABB and Saft, and was installed at an
11-kV radial distribution network operated by EDF Energy Networks, UK. The dc link
included a number of series-connected Li-ion batteries and had a voltage of 5.8-kV. It is
the worlds rst high-voltage Li-ion battery system.
The 40-MW 14-MWh battery energy storage system in Table 3.1, which was jointly de-
veloped by ABB and Saft for Golden Valley Electric Association, Alaska, used full-bridge
neutral-point clamped converter as the building block of the cascade converter [122].
5.8 kV
Li-ion
batteries
Fig. 3.3: The 600-kW 200-kWh battery energy storage system
based on a neutral-point clamped converter in UK.
Although cascade converter has been primarily investigated for STATCOMs and motor
drives, its unique structure is suitable for battery energy storage systems and battery-
based motor drives. Tolbert et al. [54] described a cascade SCM converter using battery
units for a motor drive.
As seen in Table 3.1, lead-acid batteries are the preferred choice in conventional battery
energy storage systems. NiCd batteries rank alongside lead-acid batteries in terms of
their maturity and have achieved signicant prominence in terms of their application in
the worlds largest (in terms of power) 40-MW 14-MWh battery energy storage system
at Golden Valley, Alaska, USA.
There has been interest in NaS batteries for energy storage systems with most of the
research and development work carried out jointly by TEPCO and NGK Insulators in
Japan [40], [126]. In July 2004, NGK commissioned what is claimed to be the worlds
largest (in terms of energy) 8-MW 58-MWh NaS battery energy storage system at a
Hitachi automotive plant in Japan [123].
VRB systems, while not currently on the same scale as NaS, are nevertheless sizable
including the 4-MW 6-MWh system at Tomamae wind farm in Hokkaido, Japan [127].
In recent years, much development work has been carried out on the scaling up of
NiMH and Li-ion batteries [128], [129], in an attempt to replicate the success of these
technologies in portable equipments. The success of NiMH batteries has been more
evident, with its use in hybrid electric vehicles (HEVs) from Toyota, Honda and Ford.
Many experts in the auto industry acknowledge that the next generation of HEVs will be
equipped with Li-ion batteries. The eventual battery choice for HEVs will have a huge
impact on stationary battery systems of many types, including battery energy storage
system for power leveling of renewable energy resources like wind power.
3.3 Design Concept Based on a Cascade Converter
3.3.1 Transformer-Based System
Fig. 3.4 shows a feasible circuit conguration of the 6.6-kV battery energy storage
based on a cascade PWM converter using NiMH battery units. Careful assignment
of a cascade number and an operating voltage range of each battery unit are of vital
importance in the system design. A transformer is used to realize the system with a
suitable cascade number and a reasonable dc voltage. Note that it is a simple step-up
transformer that is easily available from the market at reasonable cost, compared to
a multi-winding transformer in a conventional multipulse converter. One of the major
advantages of using the transformer is the electrical isolation between the grid and the
battery energy storage system. The transformer also helps in reducing the battery-unit
voltage.
The asymmetrical cascade converter, characterized by battery units with dierent dc
voltages in multiple H-bridge converter cells, might be attractive in reducing harmonic
voltage/current and switching power loss [64], [65]. However, the author of this disser-
tation prefers the symmetrical cascade converter to the asymmetrical one, because the
use of the battery units and converter cells with the same voltage, current, and capacity
ratings brings the modularity to the energy storage system.
Fig. 3.5 shows charge and discharge characteristics of a typical NiMH battery cell [130].
A fully-charged NiMH battery cell measures 1.4 V and supplies a nominal voltage of 1.2 V
during discharge, down to about 1.0-1.1 V. The nominal voltage of a battery unit in the
6.6-kV system may be 288 V (= 1.2 V240 cells). The operating voltage of the battery
6.6 kV, 50 Hz
6.6 kV/1.6 kV
50 Hz
Converter cell 1
Cell 2
Cell 6
Converter cell 1
Cell 2
Cell 6
Converter cell 1
NiMH
battery unit
Cell 2
Cell 6
L
AC
Fig. 3.4: Feasible circuit conguration of the 6.6-kV transformer-
based battery energy storage system based on combination of a
cascade PWM converter with a cascade number N = 6, and 18
NiMH battery units with a nominal voltage of 288 V.
unit may range from 270 V to 330 V. Note that NiMH battery units with nominal voltage
at 200-300 V have already been used in HEVs [131]. If the cascade number is N = 6, a
6.6 kV/1.6 kV transformer is required to connect the energy storage system to the 6.6-kV
grid. Li-ion battery units with the same nominal voltage as 288 V(= 3.6 V 80 cells)
are also applicable to the system.
General-purpose IGBTs rated at 600 V and 200 A can be used as power switching
devices. The 18 converter cells are controlled by the phase-shifted unipolar sinusoidal
C
e
l
l
v
o
l
t
a
g
e
[
V
]
SOC [%]
1.7
1.5
1.3
1.1
0.9
0.1
0.5
0 10 20 30 40 50 60 70 80 90 100
Charge
Discharge
Fig. 3.5: Charge/discharge characteristic of a typical NiMH battery
cell [130].
PWM [88], [89]. Even though the PWM carrier frequency is set as low as 1 kHz, the
equivalent carrier frequency is as high as 12 kHz (= 2 6 cells 1 kHz). Moreover,
setting such a low carrier frequency as 1 kHz brings a signicant reduction in switching
power loss to each converter cell. The ac voltage results in a 13-level waveform in line-
to-neutral and a 25-level waveform in line-to-line, thus signicantly improving voltage
and current THD.
3.3.2 Transformerless System
Today, a transformer-based system seems more practical compared to the one using
no transformer. Nevertheless, the transformerless system may also be viable in the next
5-10 years, in which the cascade number and the dc-link voltage would be higher than
those in the transformer-based system. Their optimization would be required to address
communication [132] and reliability issues as well as cost and life issues of battery units.
It has been shown that battery life tends to degrade almost exponentially as the number
of series-connected cells in a battery unit increases. Although cell balancing [133][137]
can enhance its life, it is accompanied by an additional cost of cell-balancing hardware.
Note that this dissertation does not address cell balancing in a battery unit. It discusses
the SOC balancing among the multiple battery units in chapter 5.
Fig. 3.6 shows a feasible circuit conguration of the 6.6-kV transformerless battery
6.6 kV, 50 Hz
Converter cell 1
Cell 2
Cell 10
Converter cell 1
Cell 2
Cell 10
Converter cell 1
NiMH
battery unit
Cell 2
Cell 10
L
AC
Fig. 3.6: Feasible circuit conguration of the 6.6-kV transformerless
battery energy storage system based on combination of a cascade
PWM converter with a cascade number N = 10, and 30 NiMH
battery units with a nominal voltage of 660 V.
energy storage system based on a combination of a three-phase cascade PWM converter
with a cascade number N = 10 and 30 NiMH battery units. The nominal voltage of a
battery unit is 660 V (= 1.2 V 550 cells). The operating voltage of the battery unit
may range from 605 V to 770 V. With nominal cell voltage at 3.6 V, Li-ion battery
unit can reach the same dc voltage with relatively lower number of battery cells in series
and therefore, may be more suitable for the 6.6-kV transformerless system. General-
purpose IGBTs rated at 1.2-kV and 200-A may be used as power switching devices.
Using phase-shifted unipolar sinusoidal PWM with a carrier frequency of 1 kHz, the
equivalent carrier frequency would be 20 kHz and the ac voltage results in a 21-level
waveform in line-to-neutral.
The major advantage of the transformerless system over the transformer-based one
may be elimination of bulky and heavy line-frequency transformer. This, however, is
at the cost of losing electrical isolation. Energy densities of the latest batteries are so
high that the consequences of failure can be very dangerous. Adequate measures should
be taken to isolate the battery system from the grid in the event of a grounding fault.
Further research and development especially in the eld of batteries would be needed in
order to realize the transformerless system.
3.4 Practical Issues for the 6.6-kV System
Although the cost and the life issues of battery units are the major hurdles at present,
several issues need to be addressed for the realization of the 6.6-kV battery energy storage
system based on a multilevel cascade converter.
SOC Balancing of Battery Units Due to asymmetric battery units, unequal
converter-cell losses, and so on, SOC imbalance may occur among multiple battery units
in a battery energy storage system based on a cascade converter. This may result in
the reduction of total available capacity of the battery units, and may also cause over-
charge/overdischarge of a particular battery unit. An SOC balancing control is indis-
pensable for eective utilization of battery energy and stable operation of the system.
Fault Tolerance Medium-voltage battery energy storage system is a high-power
equipment. When it fails, the downtime can be very expensive. Besides, the cascade-
converter-based structure employs a large number of power switching devices, which
increases the chances of failure. Therefore, reliability is a major issue. Fault tolerance is
desirable to maintain continuous operation during a converter-cell or battery-unit failure,
thus improving the reliability and availability of the system.
Active-Power Control of Individual Converter Cells The active-power control
of individual converter cells is desirable for maximum utilization of battery energy when
power-handling capacities of battery units dier. The dierences in the power-handling
capacities may be due to production tolerances and operating conditions or due to the
replacement of one or more battery units by the new ones.
Ride-Through Capability of Asymmetrical Power System Failures This
is highly desirable in all medium-voltage high-power equipments. The multilevel cas-
cade PWM converter based battery energy storage system can produce compensating
negative-sequence voltage in response to the system voltage imbalance caused by asym-
metrical power system failures such as single-line-to-ground (SLG) fault, thereby sup-
pressing the negative-sequence current.
Startup Method A simple start up method without using external circuit is de-
sirable.
Cell Balancing Cell balancing in a battery unit is an important issue to be con-
sidered. Manufacturing tolerances and operating conditions cause small dierences be-
tween cells in a multi-cell battery unit. These dierences tend to be magnied with each
charge/discharge cycle. For example, weaker cells become over-stressed during charging
causing them to become even weaker, until they eventually fail causing premature fail-
ure of the battery unit. Cell balancing is a method of compensating for weaker cells by
equalizing the charge on all the cells in the battery unit and thus extending battery life.
Cell balancing becomes more serious when the number of cells in a battery unit is higher,
which is the case in the 6.6-kV system, especially in the transformerless system.
Optimization Between Cascade Number and DC Voltage Cascade number
aects communication and reliability issues while dc voltage aects cost and life issues
of battery units. Therefore, as discussed in section 3.3, optimization between cascade
number and dc voltage level would be a very important part of the design. The author
has suggested a cascade number of six and ten for a transformer-based system and a
transformerless one, respectively.
Safety Safety should be another major design consideration. Energy densities of
batteries are so high that the consequences of failure can be very dangerous. Elec-
trical isolation from the grid would be desirable in many cases. The advantage of the
transformer-based system is that its 50-Hz transformer provides electrical isolation in ad-
dition to stepping down the grid voltage. In the case of transformerless system, enough
measures should be taken to isolate the battery system from the grid in the event of a
grounding fault.
The dissertation deals with the SOC balancing in chapter 5, the fault tolerance in
chapter 6, and the active-power control of individual converter cells in chapter 7.
3.5 Summary
This chapter has provided a review of some major battery energy storage system instal-
lations throughout the world. The chapter has discussed the drawbacks of conventional
systems and presented the 6.6-kV design concepts based on a multilevel cascade PWM
converter, both with and without a line-frequency transformer. It has also discussed in
brief the practical issues to be addressed for the realization of the 6.6-kV system.
53
Chapter 4
The 200-V, 10-kW, 3.6-KWh
Experimental System
This chapter describes a downscaled 200-V, 10-kW, 3.6-kWh experimental battery
energy storage system based on a combination of a three-phase multilevel cascade PWM
converter and NiMH battery units. It discusses the system conguration and gives an
overview of the control system including sampling method.
4.1 System Conguration
Fig. 4.1 shows the system conguration of an experimental battery energy storage
system based on a three-phase cascade PWM converter. It is rated at 200 V, 10 kW and
3.6 kWh. Table 4.1 summarizes the circuit parameters.
The system is star-congured and has a cascade number N = 3. Each of the nine
converter cells is equipped with a NiMH battery unit at its dc side. Each battery unit,
consisting of series connection of 60 battery cells, is rated at 72 V and 5.5 Ah. The dc
voltage ranges from 66 to 84 V and the total rated energy capacity is 13 MJ or 3.6 kWh
(= 72 V 5.5 Ah 9).
Fig. 4.2 shows the control system of the 200-V system. This is based on a fully-
digital controller using a DSP and multiple FPGAs. Each battery unit is equipped with
a battery management system (BMS) that provides the functions of monitoring and
controlling the respective battery unit to protect it against abnormal conditions. The
BMS also provides the function of SOC estimation [138], the detail of which is beyond
200 V
50 Hz
L
S CB1 MC1
L
AC
C
C
C
`
`
`
`
`
`
v
DCu1
v
DCu2
v
DCu3
v
u1
v
u2
v
u3
v
S R
1
i
u
v
uM
i
v
v
vM
i
w
v
wM
Cell 2
Cell 3
T
h
e
v
-
p
h
a
s
e
c
l
u
s
t
e
r
T
h
e
w
-
p
h
a
s
e
c
l
u
s
t
e
r
The u-phase cluster
M
O
i
DCu1
i
DCu2
i
DCu3
R
2
MC2
CB2
R
2
R
2
Fig. 4.1: Experimental system conguration of the 200-V, 10-kW,
3.6-kWh down-scaled battery energy storage system based on com-
bination of a three-phase cascade PWM converter with a cascade
number N = 3, and nine NiMH battery units with a nominal voltage
of 72 V.
the scope of this dissertation.
The nine H-bridge converter cells are controlled by phase-shifted unipolar sinusoidal
PWM with a carrier frequency of 800 Hz. The resulting line-to-neutral voltage is a seven-
level waveform with an equivalent carrier frequency of 4.8 kHz (= 2 3 cells 800 Hz).
Table 4.1: Circuit parameters of the experimental battery energy
storage system
Nominal line-to-line rms voltage V
S
200 V
Power rating P 10 kW
Cascade number N 3
AC inductor L
AC
1.2 mH (10%)
Background system inductance L
S
48 H (0.4%)
Starting Resistors R
1
, R
2
10 , 20
Nominal DC voltage V
DC
72 V
DC capacitor C 16.4 mF
Unit capacitance constant H 38 ms at 72 V
NiMH battery unit 72 V, 5.5 Ah 9
PWM carrier frequency 800 Hz
Equivalent carrier frequency 4.8 kHz
on a three-phase, 200-V, 10-kW, 50-Hz base
An ac indcutor L
AC
(= 10%) in each phase supports the dierence between the ac
grid voltage and the seven-level PWM voltage. It also helps in ltering out switching
voltage/current ripples caused by PWM.
Fig. 4.3 shows the snapshots of the cascade converter used in the experiment, where
(a) shows the front view and (b) shows the rear view.
The experimental system requires no external startup circuit. Fig. 4.1 includes a simple
startup circuit consisting of two sub-circuits:
ac startup circuit consisting of the three-phase circuit breaker CB1, the three-
phase magnetic contactor MC1, and the current-limiting resistor R
1
in each phase,
and
dc startup circuit consisting of the circuit breaker CB2, the magnetic contactor
MC2, and the current limiting resistor R
2
in each converter cell.
v
S
i
v
2 3
6
3
36
18
L
S
L
AC
200 V
50 Hz
PT
DCCTs
PLL
A/D
N
i
n
e
c
o
n
v
e
r
t
e
r
c
e
l
l
s
PWM
(FPGAs)
Control
(DSP)
FPGA
BMS
BMS
BMS
F
i
b
e
r
o
p
t
i
c
s
SOC,
Temp.,
etc
Fig. 4.2: Control system for the battery energy storage system.
The startup procedure is based on the method presented in [88] for a cascade-converter-
based STATCOM. It is explained in chapter 5.
4.2 Overview of the Control System
Fig. 4.4 shows the control block diagram of the battery energy storage system. The
whole control system is divided into the following three sub-controls:
1. active-power control
2. SOC-balancing control
3. fault-tolerant control.
The active-power control is based on decoupled current control, which is the same in
control method and parameters as that presented in [139]. The SOC-balancing control
is divided into;
clustered SOC-balancing control, and
individual SOC-balancing control.
The aim of the clustered SOC-balancing control is to keep the mean SOC value of a
cluster or phase equal to the mean SOC value of the three clusters. This means,
_
_
SOC
u
SOC
v
SOC
w
_
_
=
_
_
SOC SOC
u
SOC SOC
v
SOC SOC
w
_
_
0, (4.1)
where
SOC =
1
3
(SOC
u
+ SOC
v
+ SOC
w
) (4.2)
_
_
SOC
u
SOC
v
SOC
w
_
_
=
1
3
_
_
SOC
u1
+ SOC
u2
+ SOC
u3
SOC
v1
+ SOC
v2
+ SOC
v3
SOC
w1
+ SOC
w2
+ SOC
w3
_
_
. (4.3)
Similarly, the aim of the individual SOC-balancing control is to keep each of the three
SOC values in a cluster equal to the mean SOC value of the corresponding cluster. That
Hall-eect
voltage sensors
AC inductors
(a)
OV/OC
Gate drives
DSP/FPGA
boards
(b)
Fig. 4.3: Snapshot of the cascade converter. (a) Front view, and
(b) Rear view.
p
v
SuO
v
SvO
v
SwO
i
u
i
v
i
w
9
SOC
u1
, SOC
u2
, , SOC
w3
SOC
i
d
i
q
3
SOC
u
, SOC
v
, SOC
w
v
uM
v
vM
v
wM
v
0
v
B
u
n
v
B
v
n
v
B
w
n
v
un
v
vn
v
wn
1
N
(n = 1, 2, and 3)
Averaging
Eq. (4.3)
Averaging
Eq. (4.2)
Active-
power
control
(Fig. 5.1)
Clustered
SOC-balancing
control
(Fig. 5.4)
1
N
Individual
SOC-balancing
control
(Fig. 5.8)
Fault-
tolerant
control
(Fig. 6.6)
v
un
v
vn
v
wn
v
un
v
vn
v
wn
Fig. 4.4: Control block diagram for the 200-V system with a cascade
number N = 3.
means, taking u-phase as an example,
SOC
un
= SOC
u
SOC
un
0. (4.4)
Both the clustered and individual balancing controls are based on feedback control.
The fault-tolerant control is based on feedforward control and achieves the following
two functions during a converter-cell or battery-unit fault;
one is to maintain continuous operation at the rated voltage and power, producing
a three-phase balanced line-to-line ac voltage, and
the other is to achieve SOC balancing of the remaining 3N 1 healthy battery
units.
The active-power control and the SOC-balancing control are described in detail in chap-
ter 5, while chapter 6 explains the fault-tolerant control.
Converter
cell 1
0
Converter
cell 2
0
Converter
cell 3
0
Sampling for converter cell 1
Reference renewal for converter cell 1
Voltage reference Carrier signal

208.3 s
Fig. 4.5: Sampling method showing three phase-shifted carriers
and three reference signals for a cluster of three converter cells of
one phase.
Besides, the dissertation presents an active-power control of individual converter cells
(not shown in Fig. 4.4) in chapter 7. It is dierent from the active-power control men-
tioned above because it regulates the power of each converter cell. The allows the 3N
battery units in the cascade converter to operate at dierent power levels. This is partic-
ularly advantageous when the power-handling capacities of the 3N battery units dier.
4.3 Sampling Method
Fig. 4.5 illustrates the sampling method used in the experiment. For the sake of
simplicity, attention is paid to one of the three clusters. Although each cluster has three
carrier signals with the same carrier frequency as 800 Hz, they are phase-shifted by 2/3.
Data sampling, for example, for converter cell 1 is carried out at every peak or trough of
the carrier signal for converter cell 2. The corresponding voltage reference is renewed at
the following peak or trough of the carrier signal for converter cell 1 with a time delay of
208.3 s. It is held for 625 s in order to avoid multi-switching. The equivalent carrier
frequency results in 4.8 kHz (= 800 Hz 2 3).
4.4 Summary
This chapter has described the downscaled 200-V, 10-kW, 3.6-kWh experimental bat-
tery energy storage system. The system is based on a cascade PWM converter with a
cascade number of 3 and nine NiMH battery units with nominal dc voltage of 72 V. The
chapter has also presented an overview of the control system consisting of active-power
control, SOC-balancing control, and fault-tolerant control, which will described in detail
in the following chapters.
61
Chapter 5
Active-Power Control and
SOC-Balancing Control
This chapter describes the active-power control and the state-of-charge balancing con-
trol of the battery energy storage system based on a cascade PWM converter. Theoretical
analysis is done and experimental waveforms are presented to verify the eectiveness of
the control methods. Experimental results also show the battery energy storage systems
ride-through capability of an SLG fault.
5.1 Active-Power Control
The active-power control is based on the synchronous dq reference frame [140]. The
synchronous frame controller can eliminate steady-state error and has fast transient
response by decoupling control. The control method is explained here.
Referring to Fig. 4.1 and neglecting the resistance components, the following set of
voltage-current equations are obtained:
_
_
v
SuO
v
SvO
v
SwO
_
_
_
_
v
uM
v
vM
v
wM
_
_
= L
AC
d
dt
_
_
i
u
i
v
i
w
_
_
, (5.1)
where
_
_
v
SuO
v
SvO
v
SwO
_
_
=
_
2
3
V
S
_
_
sin t
sin(t
2
3
)
sin(t +
2
3
)
_
_
. (5.2)
Applying the dq transformation leads to
_
_
L
AC
d
dt
L
AC
L
AC
L
AC
d
dt
_
_
_
i
d
i
q
_
=
_
v
Sd
v
d
v
Sq
v
q
_
, (5.3)
where v
d
and v
q
are the d-axis and q-axis components of v, while i
d
and i
q
are those of
i. Likewise, v
Sd
and v
Sq
are the d-axis and q-axis components of v
S
. The instantaneous
active power p and the instantaneous reactive power q [141], [142] can be expressed as
_
p
q
_
=
_
v
Sd
v
Sq
v
Sq
v
Sd
_ _
i
d
i
q
_
. (5.4)
When the three-phase source voltages are balanced on the grid, v
Sq
is always zero because
v
S
is aligned with the d-axis.
p = v
Sd
i
d
(5.5)
q = v
Sd
i
q
. (5.6)
Equations (5.5) and (5.6) imply that p and q can be controlled independently as a result
of controlling i
d
and i
q
respectively. The d-axis current command i
d
and the q-axis
current command i
q
are given by
i
d
=
p
v
Sd
(5.7)
i
q
=
q
v
Sd
= 0, (5.8)
where p
is the active-power command, while the reactive power command of q
= 0
ensures unity power-factor operation. Let the ac voltage commands in the d-axis and
the q-axis be
_
v
d
v
q
_
=
_
v
Sd
v
Sq
_
_
0 L
AC
L
AC
0
__
i
d
i
q
_
(5.9)
K
_
i
d
i
d
i
q
i
q
_
K
T
_
_
i
d
i
d
i
q
i
q
_
dt. (5.10)
Fig. 5.1 shows the active-power control resulted from 5.10. The rst and second terms
on the right-hand side of (5.10) are introduced to cancel out the eect of the source
voltage and the steady-state voltage appearing across the ac inductor L
AC
. The third
p
i
u
i
v
i
w
v
SuO
v
SvO
v
SwO
i
d
i
q
i
d
i
q
v
Sd
v
Sq
v
d
v
q
v
uM
v
vM
v
wM
1
v
Sd
1
v
Sd
L
AC
L
AC
K +
K
sT
K +
K
sT
dq
trans.
dq
trans.
Inverse
dq
trans.
+
+
Fig. 5.1: Active-power control.
and fourth terms form a PI controller with a proportional gain K and an integral time
constant T. Substituting (5.10) into (5.3) results in
d
dt
_
i
d
i
q
_
=
1
L
AC
_
_
K(i
d
i
d
) +
K
T
_
(i
d
i
d
)dt
K(i
q
i
q
) +
K
T
_
(i
q
i
q
)dt
_
_
. (5.11)
Equation (5.11) signies that i
d
and i
q
can be controlled independent of each other. The
three-phase reference signals v
uM
, v
vM
and v
wM
are obtained by applying the inverse dq
transformation to (5.10).
Fig. 5.2 shows the block diagram of the d-axis current control obtained by taking the
K +
K
sT
1
sL
AC
Converter
(gain 1)
V
Sd
+L
AC
I
q
V
Sd
+L
AC
I
q
I
d
I
d
+
Fig. 5.2: Block diagram of the d-axis current control, excluding the
eect of a one-sampling delay.
Laplace transformation of (5.3) and (5.10). The transfer function can be determined as
I
d
(s)
I
d
(s)
=
K(sT + 1)
L
AC
Ts
2
+KTs +K
. (5.12)
Note that the one-sampling delay is neglected from (5.12). The damping ratio is given
by
=
1
2
_
KT
L
AC
. (5.13)
Setting = 1 leads to a critically-damped response,
K =
4L
AC
T
= 0.5 V/A at T = 10 ms. (5.14)
The time constant T should be assigned to be much longer than the control delay from
the viewpoint of control stability.
5.2 SOC-Balancing Control
Battery SOC The SOC of a battery is its available capacity expressed as a per-
centage of the rated capacity.
SOC =
available capacity [Ah]
rated capacity [Ah]
100%. (5.15)
The battery management system plays an important part in estimating the SOC, which is
often called the fuel gauge function. The SOC estimation may be based on measuring
some convenient parameters such as voltage, current or internal impedance, which vary
with the SOC [138].
SOC Imbalance Due to asymmetric battery units, unequal converter-cell losses,
and so on, SOC imbalance may occur among multiple battery units in a battery energy
storage system based on a cascade converter. This may result in the reduction of total
available capacity of the battery units, and may also cause overcharge/overdischarge of
a particular battery unit.
SOC Balancing in Literature Tolbert et al. [54] proposed a switching-pattern-
swapping scheme for achieving SOC balancing of multiple battery units in a cascade-
converter-based motor drive. Fig. 5.3 illustrates the scheme for an 11-level converter
v
u
M
v
u5
v
u4
v
u3
v
u2
v
u1
`
`
`
`
`
0

v
uM
v
u5
v
u4
v
u3
v
u2
v
u1
V
DC
V
DC
V
DC
V
DC
V
DC
5V
DC
P
5
P
4
P
3
P
2
P
1
P
1
P
5
P
4
P
3
P
2
P
2
P
1
P
5
P
4
P
3
P
3
P
2
P
1
P
5
P
4
P
4
P
3
P
2
P
1
P
5
Fig. 5.3: Switching-pattern swapping scheme for SOC balancing of
multiple battery units in an 11-level cascade SCM converter.
in which the switching pattern is swapped among the various levels every half cycle,
resulting in equal loading of all the battery units. However, the scheme may be conned
to multilevel cascade converters using staircase modulation. Moreover, it assumed that
the battery units were identical and that their initial SOC values were balanced.
SOC Balancing Control This dissertation presents a new SOC-balancing control
for a battery energy storage system based on a cascade PWM converter. It is divided
into;
clustered SOC-balancing control, and
individual SOC-balancing control.
Let us recall (4.1), (4.2), and (4.3) from chapter 4 as follows;
_
_
SOC
u
SOC
v
SOC
w
_
_
=
_
_
SOC SOC
u
SOC SOC
v
SOC SOC
w
_
_
(5.16)
SOC =
1
3
(SOC
u
+ SOC
v
+ SOC
w
) (5.17)
_
_
SOC
u
SOC
v
SOC
w
_
_
=
1
3
_
_
SOC
u1
+ SOC
u2
+ SOC
u3
SOC
v1
+ SOC
v2
+ SOC
v3
SOC
w1
+ SOC
w2
+ SOC
w3
_
_
. (5.18)
Here SOC
u
, SOC
v
, and SOC
w
are the respective dierences between the mean SOC
value of the nine battery units in the three clusters and the mean SOC value of the three
battery units in the u-cluster, v-cluster, and w-cluster.
The aim of the clustered SOC-balancing control is to keep the mean SOC value of
a cluster (SOC
u
, SOC
v
and SOC
w
) equal to the mean SOC value of the three clus-
ters (SOC). Similarly, the aim of the individual SOC-balancing control is to keep each
of the three SOC values in a cluster (for example, SOC
u1
, SOC
u2
and SOC
u3
) equal to
the mean SOC value of the corresponding cluster (SOC
u
).
The individual SOC-balancing control presented in the dissertation resembles in struc-
ture the individual voltage-balancing control presented in [50]
1
and [139]. However, the
clustered SOC-balancing control is dierent in form and function from the clustered
voltage-balancing control in [50] and [139]. The clustered SOC-balancing control is based
on zero-sequence-voltage injection while the clustered voltage-balancing control is based
on negative-sequence current injection.
5.2.1 Clustered SOC-Balancing Control
The clustered SOC-balancing control is based on neutral shift. The neutral shift
implies shifting the oating (ungrounded) neutral point of the star-congured cascade
converter away from the neutral point of the source or the ac mains.
The idea is to inject a fundamental-frequency zero-sequence voltage v
0
to the three-
phase ac voltages v
uM
, v
vM
, and v
wM
of the cascade converter [143]. This allows each of
the three clusters to draw or release an unequal active power without drawing negative-
sequence current. Here, v
0
is the potential of point O with respect to point M in
1
Reference [50] paid attention to a STATCOM, with focus on voltage balancing of dc capacitors.
Fig. 4.1. Since the zero-sequence-voltage injection does not cause any change in the line-
to-line voltages, the clustered SOC-balancing control produces no eect on the three-
phase line currents and the total power.
If the cascade converter voltage is assumed not to contain any negative-sequence volt-
age, it can be expressed as
_
_
V
uM
V
vM
V
wM
_
_
=
_
_
V
fuM
V
fvM
V
fwM
_
_
+
_
_
V
0
V
0
V
0
_
_
= V
fM
e
j
f
_
_
1
e
j
2
3
e
j
2
3
_
_
+V
0
e
j
0
_
_
1
1
1
_
_
, (5.19)
where the rst term on the right-hand side represents the positive-sequence voltage with
an rms magnitude of V
fM
and a phase angle of
f
with respect to the u-phase voltage.
The second term represents the fundamental-frequency zero-sequence voltage with an
rms magnitude of V
0
and a phase angle of
0
. Both V
0
and
0
can be adjusted by the
clustered SOC-balancing control.
The line currents are assumed to contain only positive-sequence currents.
_
_
I
u
I
v
I
w
_
_
= Ie
j
_
_
1
e
j
2
3
e
j
2
3
_
_
, (5.20)
where
I =
I
2
d
+I
2
q
3
(5.21)
=
_
_
tan
1
I
q
I
d
if I
d
= 0
2
if I
d
= 0 and I
q
> 0)
2
if I
d
= 0 and I
q
< 0).
(5.22)
In a sinusoidal steady-state condition, I
d
and I
q
are equal to the d-axis current i
d
and
the q-axis current i
q
. The u-phase power can be expressed as
P
u
= Re
_
V
uM

I
u
_
= Re
_
V
fuM

I
u
+

V
0

I
u
_
. (5.23)
The rst term on the right-hand side is the active power related to the positive-sequence
voltage included in the u-phase ac voltage of the cascade converter, while the second
term is the active power coming from the zero-sequence-voltage injection, which can be
expressed as
P
u0
= Re
_

V
0
I
u
_
(5.24)
= Re [(V
0
(cos
0
+j sin
0
) I(cos +j sin )] (5.25)
= V
0
I cos(
0
). (5.26)
Similarly, the v- and w-phase powers due to zero-sequence voltage can be calculated.
_
_
P
u0
P
v0
P
w0
_
_
= V
0
I
_
_
cos(
0
)
cos(
0
+
2
3
)
cos(
0

2
3
)
_
_
. (5.27)
Equation (5.27) makes it clear that P
u0
+P
v0
+P
w0
= 0. This means the zero-sequence-
voltage injection produces no eect on the overall three-phase power transfer. Taking
3-phase to 2-phase transformation of (5.27) yields
_
_
P
0
P
0
P
00
_
_
=
_
3
2
_
_
cos
sin
0
_
_
(5.28)
where
=
0
. (5.29)
Fig. 5.4 shows the block diagram of the clustered SOC-balancing control. The SOC
dierences (SOC
u
, SOC
v
, and SOC
w
) correspond to an amount of active power to
be drawn or released by each of the three clusters to maintain SOC balancing among the
clusters. Performing three-phase to two-phase transformation of (5.16) gives
2
_
_
SOC
SOC
SOC
0
_
_
=
_
_
_
3
2
SOC
u
1
2
(SOC
v
SOC
w
)
0
_
_
. (5.30)
2
The vector [SOC
, SOC
]
T
is not a rotating vector, but a stationary vector in alliance with the
cluster having the largest SOC error.
SOC
u
SOC
v
SOC
w
SOC
SOC
u
SOC
v
SOC
w
SOC
SOC
_
SOC
2
+SOC
2
SOC
SOC
SOC
i
d
i
q
0
K
0
v
0
tan
1
3-phase to
2-phase
transform.
tan
1
I
q
I
d
2 sin(t+
0
)
+
Fig. 5.4: Clustered SOC-balancing control based on zero-sequence
voltage injection.
SOC
SOC
u
u,
SOC
v
SOC
v
SOC
w
w
SOC
O
(SOC
u
> SOC
v
> SOC
w
)
Fig. 5.5: Three-phase to two-phase transformation of SOC errors
in the u-, v-, and w-clusters.
Let SOC be dened as
SOC =
_
SOC
2
+ SOC
2
=
_
SOC
2
u
+ SOC
2
v
+ SOC
2
w
. (5.31)
Here, SOC is a parameter representing a degree of SOC imbalance among the three
clusters. The parameter (= tan
1
(P
0
/P
0
)) in (5.29), which represents the distribu-
tion of P
u0
, P
v0
, and P
w0
in axes, should be equal to the phase angle representing the
distribution of SOC imbalance in the axes.
=
_
_
tan
1
SOC
SOC
if SOC
= 0
2
if SOC
= 0 and SOC
> 0
2
if SOC
= 0 and SOC
< 0.
(5.32)
Fig. 5.5 shows an example of phasor representation of the 3-phase to 2-phase transforma-
tion of SOC errors in u-, v-, and w-clusters (SOC
u
, SOC
v
, and, SOC
w
) to calculate
SOC and , where SOC
u
> SOC
v
> SOC
w
.
The zero-sequence-voltage reference is determined as
v
0
=
2 K
0
SOC sin(t +
0
), (5.33)
where K
0
is a proportional gain, and
0
is given by
0
= . (5.34)
Phasor representation leads to
0
= K
0
SOC e
j
0
. (5.35)
Fig. 5.6 illustrates an example of phasor representation of the injection of zero sequence
voltage and the resulting neutral shift. Fig. 5.6(a) shows the phasor diagram before
injecting the zero-sequence voltage where the neutral point of the cascade converter (M)
coincides with the neutral point of the source (O). Fig. 5.6(b) shows the phasor diagram
after the injection of the zero-sequence voltage which is determined by (5.35). The
injection results in the shift of the neutral point of the cascade converter away from the
neutral point of the source. This causes the three clusters draw or release an unequal
active power that helps balance the mean SOC values (SOC
u
, SOC
v
, and SOC
w
) of the
three clusters.
Fig. 5.7 shows the control block diagram of clustered SOC-balancing control, taking
the u-phase as an example. The coecient (3/W)100 converts a cluster battery energy [J]
to SOC [%], where W = 13 10
6
J. The closed-loop transfer function is given by
SOC
u
(s)
D
u
(s)
=
_
2
3
1
K
0
I
u
1+s
_
2
3
W
3
1
K
0
I
u
1
100
. (5.36)
O, M
I
u
V
SuO
jL
AC
I
u
I
w
V
SwO
V
SvO
I
v
jL
AC
I
v
V
uO
V
vO
V
wO
jL
AC
I
w
(a)
O
V
0
0
I
u
V
uM
V
SuO
jL
AC
I
u
V
wM
M
I
w
V
SwO
V
SvO
I
v
jL
AC
I
v
V
uO
V
vM
V
vO
V
wO
jL
AC
I
w
(b)
Fig. 5.6: Illustration of the injection of zero-sequence voltage and
the resulting neutral shift. (a) Phasor diagram before the injection
of zero-sequence voltage, and (b) Phasor diagram after the injection
of zero-sequence voltage.
SOC
D
u
(s) I
u SOC
P
u0
SOC
u
_
3
2
K
0
1
s
.
3
W
.100
+
+
+
Fig. 5.7: Clustered SOC-balancing control, taking the u-phase as

an example.
This transfer function has a time constant given by
T
0
=
_
2
3
W
3
1
K
0
I
u
1
100
, (5.37)
where the gain K
0
was designed as
K
0
= 3.5 V/% at T
0
= 6 min. (5.38)
5.2.2 Individual SOC-Balancing Control
Fig. 5.8 shows the individual SOC-balancing control paying attention to the n-th
converter cells of the three clusters. In order to determine the transfer function, let us
redraw the block diagram of the individual SOC-balancing control as shown in Fig. 5.9,
taking the u-phase n-th converter cell as an example, where N = 3 and W = 13 10
6
J.
Let SOC
un
be a dierence between the mean SOC value of the u-cluster and the
SOC value of the n-th converter cell in the u-cluster.
SOC
un
= SOC
u
SOC
un
, (5.39)
where n = 1, 2, and 3. The dierence SOC
un
is minimized by appropriately charging
or discharging the respective battery unit in the u-cluster. The superimposed ac voltage
to minimize the dierence is determined as
v
Bun
=
2 K
1
SOC
un
sin(t +), (5.40)
where K
1
is a proportional gain. Unity power-factor operation makes the power-factor
angle equal to zero for charging operation, or for discharging operation.
SOC
u
SOC
un
SOC
v
SOC
vn
SOC
w
SOC
wn
v
Bun
v
Bvn
v
Bwn
(n = 1, 2, and 3)
K
1
K
1
K
1
2 sin(t +)
2 sin(t + 2/3)
2 sin(t + + 2/3)
+
+
+
Fig. 5.8: Individual SOC-balancing control between three cascaded

converter cells inside each cluster, paying attention to the n-th con-
verter cells.
K
1
1
s

3N
W
100
I
u
D
un
SOC
u
SOC
u
SOC
un +

+
(n = 1, 2, and 3)
V
Bun
P
Bun
Fig. 5.9: Individual SOC-balancing control, taking the u-phase n-th
converter cell as an example.
The sum of the superimposed voltages in a cluster is equal to zero.
N
n=1
v
Bun
=
2 K
1
sin(t +)
N
n=1
SOC
un
= 0. (5.41)
This shows that the individual SOC-balancing control does not interfere with the active-
power control and the clustered SOC-balancing control.
The active power for achieving the SOC balancing of the u-phase n-th converter cell
is given by
P
Bun
= K
1
I
u
SOC
un
D
un
, (5.42)
where D
un
represents a loss or disturbance in the u-phase n-th converter cell. An amount
of active power equal to P
Bun
is drawn into, or released from, the u-phase n-th converter
cell to increase or decrease the SOC
un
value so that SOC
un
= 0.
SOC
un
=
W
3N
_
P
Bun
dt. (5.43)
Note that (5.43) discards a 100-Hz component
3
from p
Bun
(= v
Bun
i
u
). Equations (5.39),
(5.42) and (5.43) result in Fig. 5.9. The closed-loop transfer function is given by
SOC
un
(s)
D
un
(s)
=
1
K
1
I
u
1 +s
W
3N
1
K
1
I
u
1
100
. (5.44)
This transfer function has a time constant given by
T
1
=
W
3N
1
K
1
I
u
1
100
. (5.45)
Finally, the gain K
1
was designed as
K
1
= 0.7 V/% at T
1
= 12 min. (5.46)
5.3 Experimental Results
5.3.1 Startup Waveforms
The battery energy storage system requires no external startup circuit. The startup
procedure is similar to the one presented in [88].
Fig. 5.10 shows the waveforms during startup. At time t = 0, CB1 was switched
on, whereas MC1 as well as CB2 and MC2 in each converter cell remained switched o.
Each of the nine capacitors started charging through R
1
and the respective converter cell
started operating as a diode rectier. The inrush ac current was limited to 12 A (peak),
which was below the rated current of 30 A. At the time of t = 30 s, when the starting ac
current decayed to zero, the MC1 as well as nine CB2s were turned on sequentially. The
3
The 100-Hz component included in p
Bun
makes no contribution to charging or discharging the
battery unit, because its mean value is zero over one fundamental-frequency cycle (20 ms). More-
over, a high-energy density of the battery unit makes the eect of the 100-Hz component on the
SOC negligible.
i
u
[A] 0
20
12 A
v
DC
[V]
0
50
46 V

200 ms
t = 0
Nine traces
CB1 was turned on

(a)
i
u
[A] 0
20
CB2 was turned on
v
DC
[V]
0
100
Nine traces

2 s
78 V
46.5 V
t = 30 s
(b)
i
u
[A] 0
60

20 ms
v
DC
[V]
60
70
80
90
78 V
Controller was started

Nine traces
p [kW]
0
12
10 kW
t = 2 min
(c)
Fig. 5.10: Experimental waveforms when the battery energy stor-
age system was started. (a) CB1 was turned on at t = 0, (b) CB2
was turned on at t = 30 s, and (c) Controller was started at t = 2 min.
dc-link voltages then reached the battery-unit voltages of 78 V, as shown in Fig. 5.10(b).
The nine starting resistors R
2
limit the inrush dc currents when the nine battery units
v
SuO
[V] 0
200
i
u
[A] 0
60
p [kW] 0
12

10 ms
v
DC
[V]
60
70
80
90
Nine traces
Fig. 5.11: Experimental waveforms when the battery bank was
charged at 10 kW with a mean SOC window between 40 and 45%.
are connected to the dc links and are bypassed by the nine magnetic contactors MC2s in
5 s. At t = 2 min, the controller was started and the gate signals were provided to the
nine converter cells, along with the active-power command p
. The system thus came to

normal operation.
5.3.2 Charging and Discharging Waveforms
Fig. 5.11 shows the experimental waveforms when the battery energy storage system
was charged up at the rated power of 10 kW. The waveforms of v
SuO
and i
u
were in
phase because this system was operated with a condition of q
= 0. The u-phase current

was slightly distorted with a current THD of 3.5% at a battery-unit voltage of 78 V.
was discharged down at the rated power of 10 kW. The waveforms of v
SuO
and i
u
were
out of phase by 180
. The u-phase current had a THD of 5.4%. The THD value is

expected to be lower in the 6.6-kV system because a saturation/forward voltage (2 V)
v
SuO
[V] 0
200
i
u
[A] 0
60
p [kW] 0
12

10 ms
v
DC
[V]
60
70
80
90
Nine traces
Fig. 5.12: Experimental waveforms when the battery bank was
discharged at 10 kW with a mean SOC window between 40 and
45%.
of 1.2-kV IGBTs/diodes is much lower than a battery-unit voltage ranging from 600 to
750 V with a higher equivalent carrier frequency. The mean SOC window was in between
40 and 45% when these charge-discharge waveforms were observed.
was repetitively charged up to a mean SOC of 75% and discharged down to a mean
SOC of 25%. Although the experiment used a mean SOC window between 25% and
75%, a wider window may be used in an actual system. Note, however, that NiMH
batteries show extended cycle life with a lower depth-of-discharge (DOD)
4
value [129].
Here,

i
DC
, v
DC
, and SOC were obtained from a battery management system (BMS)
with a sampling rate of 1 s
1
. Since the power was set at p = 10 kW, the charging
or discharging battery current was observed to be around 15 A. This is equivalent to a
4
DOD is a measure of energy withdrawn from a battery, expressed as a percentage of the full
capacity.
i
DC
[A] 0
20
Nine traces

750 s

555 s

500 s
v
DC
[V]
60
70
80
90
100
Nine traces
SOC [%]
20
40
60
80
Nine traces
75%
25%
Fig. 5.13: Experimental waveforms with repetitive charging and
discharging of the battery bank, where a mean SOC window was
kept between 25 and 75%.
C-rate
5
of 2.7 C (= 15 A/5.5 Ah).
5.3.3 Battery-Unit Voltage and Current Waveforms
Fig. 5.14 shows the voltage and current waveforms of a battery unit in the u-cluster,
where (a) corresponds to those during charging (p = 10 kW), while (b) to those during
discharging (p = 10 kW) both at a mean SOC value of 65%. The waveform of v
DCu1
contained a 100-Hz component of 2 V (peak-to-peak), and the waveform of i
DCu1
con-
tained a 100-Hz component of 17.5 A (peak-to-peak) during charging. They are in phase
so that the internal impedance of the battery-unit can be considered purely resistive.
The internal resistance is estimated to be 115 m (= 2 V/17.5 A). The dc internal
resistance of a standalone battery unit was measured to be 133 m at an SOC value of
65% and a battery temperature of 30
C.
5
The term C-rate is a charging or discharging rate of a battery expressed in terms of its total
storage capacity in Ah. A rate of 1 C means a complete transfer of the stored energy in 1 h.
v
DCu1
[V]
70
80
90
100

5 ms
i
DCu1
[A] 0
30
(a)
v
DCu1
[V]
60
70
80
90

5 ms
i
DCu1
[A] 0
30
(b)
Fig. 5.14: Battery voltage and current waveforms. (a) During
charging at 10 kW, and (b) During discharging at 10 kW. The mean
SOC value was 65%.
5.3.4 Transient Waveforms
Fig. 5.15 shows transient waveforms from charging to discharging operation with a
ramp change in active power from 10 kW to 10 kW in 30 ms with a mean SOC value of
around 70%. Fig. 5.16 shows transient waveforms from discharging to charging operation
with a ramp change in active power from 10 kW to 10 kW in 30 ms with a mean SOC
value of around 30%. These waveforms conrmed stable operation even in the transient
states.
v
SuO
[V] 0
200
i
u
[A] 0
60
p [kW] 0
12
10 kW
10 kW

20 ms
v
DC
[V]
75
80
85
90
Nine traces
Fig. 5.15: Experimental waveforms when p
was changed from

10 kW to 10 kW in 30 ms with a mean SOC value of 70%.
5.3.5 Eectiveness of the SOC-Balancing Control
The SOC-balancing control is introduced to make equal all the SOC values of the nine
battery units for the eective utilization of the battery energy. In Fig. 5.17, the upper
part shows all the nine SOC values of the battery units, the middle part shows the three
mean SOC values of the u-, v- and w-clusters, and the lower part shows the value of
SOC dened in (5.31).
Before starting the experiment (t = 0), the SOC values of the nine battery units had
a maximal imbalance of 5% between the lowest and highest ones. However, when the
SOC-balancing control was started along with p
= 10 kW at t = 0, the nine SOC

values gradually started to converge together. In about 15 mins, all the SOC values were
eectively balanced. The value of SOC was reduced to one-third of its initial value in
about 7 min. This fact agreed well with T
0
= 6 min in (5.38).
v
SuO
[V] 0
200
i
u
[A] 0
60
p [kW] 0
12
10 kW
10 kW

20 ms
v
DC
[V]
65
70
75
80
Nine traces
Fig. 5.16: Experimental waveforms when p
was changed from

10 kW to 10 kW in 30 ms with a mean SOC value of 30%.
SOC
un
SOC
vn
SOC
wn
[%]
20
40
60
80
Nine traces
Experiment started
SOC
u
SOC
v
SOC
w
[%]
20
40
60
80
Three traces
SOC
u
and SOC
w
SOC
v
SOC
[%]
0
1
2
3
4

5 min t = 0
Fig. 5.17: Experimental waveforms to verify the eectiveness of the
SOC-balancing control, where a mean SOC value was kept between
30 and 70% with p
= 10 kW and q
= 0.
To ac mains
To energy storage
system
Auto-
transformer
AC switch
v
Su
v
Sv
v
Sw
Fig. 5.18: Voltage-sag generator used to simulate a single-phase
voltage sag in the laboratory.
5.3.6 Ride-Through Capability of Voltage Sags
When the battery energy storage system is connected to a power distribution system,
it must deal with the voltage imbalance due to asymmetrical power system failure. The
active-power control in Fig. 5.1 is capable of suppressing the negative-sequence current
during a voltage sag, thereby allowing the battery energy storage system to maintain
continuous operation.
Fig. 5.18 shows voltage-sag generator used to simulate a single-phase voltage sag in the
laboratory. It consists of a three-phase autotransformer and ac switches using IGBTs.
Experiment is carried out to test the energy storage system for the ride-through capability
of voltage sags.
Figs. 5.19 shows experimental waveforms when a u-phase voltage sag of 25% occurred
and lasted for 100 ms during charging at 10 kW. Fig. 5.20 shows those during discharg-
ing at 10 kW. The mean SOC value of the nine battery units was 75% during both
experiments.
Although the negative-sequence currents were not completely eliminated from the line
currents, the results showed the capability of the battery energy storage system of riding
through voltage sags. Note that the presence of 100 Hz component in i
d
and p is caused
by the negative-sequence current.
The six traces of v
DC
in Figs. 5.19 and 5.20 include v
DCu1
, v
DCu2
, v
DCv1
, v
DCv2
, v
DCw1
,
v
SuO
[V] 0
200

20 ms
Voltage sag

i [A] 0
60
p [kW] 0
15
i
d
, i
q
[A]
-25
0
25
50
75
i
d
i
q
.
v
DC
[V]
75
80
85
90
v
DCu1
, v
DCu2
, v
DCv1
, v
DCv2
v
DCw1
, v
DCw2
Six traces
i
DC
[A] 0
30
Three traces
i
DCu1
, i
DCv1
and i
DCw1
Fig. 5.19: Experimental waveforms when a voltage sag of 25%
occurred in the u-phase and lasted for 100 ms during charging at
10 kW with a mean SOC value of 75%.
and v
DCw2
, which showed that the uctuation of dc voltage during the voltage sag is
not serious in the battery energy storage system. The three traces of i
DC
include i
DCu1
,
i
DCv1
, and i
DCw1
.
5.4 Summary
This chapter has provided detailed analysis of the active-power control of the converter
and the SOC-balancing control of the multiple battery units for the battery energy
v
SuO
[V] 0
200

20 ms
Voltage sag

i [A] 0
60
p [kW] 0
15
i
d
, i
q
[A]
-75
-50
-25
0
25
i
d
i
q
.
v
DC
[V]
65
70
75
80
v
DCu1
, v
DCu2
, v
DCv1
, v
DCv2
,
v
DCw1
, and v
DCw2
Six traces
i
DC
[A] 0
30
Three traces
i
DCu1
, i
DCv1
and i
DCw1
Fig. 5.20: Experimental waveforms when a voltage sag of 25%
occurred in the u-phase and lasted for 100 ms during discharging
at 10 kW with a mean SOC value of 75%.
storage system based on a cascade PWM converter. Experimental results obtained from
a 200-V, 10-kW, 3.6-kWh laboratory model have veried the eectiveness of the control
methods. A simple startup procedure without using external circuit has been explained.
Experimental results demonstrating the ride-through capability of the battery energy
storage system against a voltage sag have also been provided.
85
Chapter 6
Fault-Tolerant Control
This chapter presents a fault-tolerant control to improve the reliability and availability
of the battery energy storage system based on a cascade PWM converter. During a
converter-cell or battery-unit failure, it enables continuous operation at rated power,
producing a three-phase balanced line-to-line voltage while maintaining SOC balancing
of the remaining healthy battery units. Experimental results are presented to verify the
eectiveness of the control method.
6.1 Reliability
Medium-voltage converters are high-power equipments. When they fail, the downtime
can be very expensive. For this reason, reliability is a very important issue in this family
of converters [144][146].
However, medium-voltage converters based on multilevel topologies require a large
number of power switching devices. Each of these switching devices is a potential failure
point. For this reason it may considered that the medium-voltage multilevel converters
are less reliable.
6.2 Fault Tolerance
Reliability can be improved by a fault-tolerant design. In traditional two-level con-
verters, the fault tolerance is achieved by series connection of one extra power switching
device per arm. This strategy, known as N+1 redundancy, was originated in LCI drive
design. It requires no additional control and the converter operation is not aected when
one device fails because the failed device acts like a short circuit. By this method, the
reliability is greatly improved. However, the number of power switching devices doubles
when this strategy is applied to the multilevel converters, thus increasing cost, size and
complexity of the system.
Multilevel converters, nevertheless, oer more possibilities in the power circuit to allow
for operation even during faulty condition. Fault tolerance for the multilevel convert-
ers has been investigated in literatures [147][159]. For a cascade converter, the fault
tolerance can be achieved;
1. by providing a redundant converter cell in each phase, and bypassing the faulty
converter cell as well as two healthy converter cells in the other two phases, or
2. by providing no redundant converter cells, and bypassing the faulty converter cell
only.
The rst category can ride through a fault in at least one converter cell at the rated
voltage and power. This approach is often used in critical applications at the expense of
cost and eciency.
The second category can tolerate faults in a few converter cells with a reduced voltage
and power. Although a tolerable degree of reduction in voltage and power depends on
the application, it is preferred over the complete shutdown in most cases. Neutral shift
is used to make the available voltage and power maximal in the second category.
6.3 Literature Review
Song et al. [155] discussed a fault-tolerant control belonging to the rst category for
a 4.16-kV 7.2-MVA STATCOM based on a cascade converter. The ve-level cascade
converter has a dc voltage of 2.175 kV. In order to improve reliability, one redundant
converter cell is added in each phase, resulting in a seven-level converter with dc voltage
of 1.45 kV.
Fig. 6.1 shows the cascade converter with redundant converter cells. During nor-
mal operation with three converter cells in each phase, the STATCOM operates as the
4.16 kV
50 Hz
`1450 V for normal operation
2170 V for fault-tolerant operation
Cell
u1
Cell
u2
Cell
u3
Cell
v1
Cell
v2
Cell
v3
Cell
w1
Cell
w2
Cell
w3

Redundant
converter cells
Fig. 6.1: A 4.16-kV 7.2-MVA STATCOM based on a ve-level
cascade converter with one redundant converter cell in each phase.
seven-level converter with dc voltage at 2.175 kV. When a converter cell fails, the faulty
converter cell as well as two healthy converter cells in the other two phases are bypassed
and the STATCOM is operated as the ve-level converter with dc voltage at 1.45 kV.
Wei et al. [151] described a fault-tolerant control belonging to the second category for
a seven-level cascade SVM converter intended for a motor drive. Fig. 6.2(a) shows the
space vector diagram. When a converter cell fails, it results in a layer of invalid space
vectors, as shown in Fig. 6.2(b) for a converter-cell failure in the u-phase. The invalid
space vectors are represented by the dots with a circle around. With one faulty converter
cell, there still exists a large number of healthy space vectors. Therefore, it is possible
to make use of redundant switching states of each healthy vector in order to produce a
three-phase balanced line-to-line voltage with minimum harmonic distortion.
Rodriguez et al. [154] used another fault-tolerant control belonging to the second cate-
gory for a 4.16-kV motor drive based on a cascade PWM converter. The 11-level converter
is shown in Fig. 6.3(a). During normal operation with no faulty converter cells, the ac
voltages of converter cells have a phase displacement of 120
as shown in Fig. 6.3(b).

When a converter cell fails, the phase angles (, , and ) of ac voltages of healthy con-
6 4 2 0 2 4 6
6
4
2
0
2
4
6
(a)
v
u
v
v
v
w
6 4 2 0 2 4 6
6
4
2
0
2
4
6
(b)
Fig. 6.2: Space vector diagram of a seven-level cascade converter.
(a) Normal condition, and (b) With one faulty cell in the u-phase.
Dots with a circle around represent faulty space vectors.
verter cells are modied to achieve neutral shift producing a three-phase balanced line-to-
line voltage. Fig. 6.3(c) shows the neutral shift ( = 126.4
, = 107.2
, and = 126.4
)
for the 11-level cascade converter to produce a three-phase balanced line-to-line voltage
during one converter-cell failure in the u-phase.
Lezana et al. [158] controlled the dc voltages of healthy converter cells in addition to
the neutral-shift method discussed in [154], so as to keep a cascade inverter operated
at the rated voltage and power during a converter-cell fault. However, most literatures
have been limited to theoretical analysis and/or computer simulation.
6.4 SOC Balancing During Fault-Tolerant Operation
Chapter 5 presented an SOC-balancing control for the battery energy storage system
based on a cascade PWM converter. However, SOC balancing should be maintained
not only in normal operation but also in fault-tolerant operation for eective utilization
of battery energy. No literature has addressed SOC balancing of healthy battery units
during the occurrence of a converter-cell fault in a cascade converter.
The fault-tolerant control presented in this dissertation belongs to the second category
and executes an appropriate neutral shift based on fundamental-frequency zero-sequence
0
12
48
Cell u1
Cell u2
Cell u5
M
Cell
v1
Cell
v2
Cell
v5
Cell
w1
Cell
w2
Cell
w5
M
v
u1
`
v
u2
`
v
u5
`
v
v1
`
v
v2
`
v
v5
`
v
w1
`
v
w2
`
v
w5
`
(a)
v
u1
v
u2
v
u3
v
u4
v
u5
u
v
w1
v
w2
v
w3
v
w4
v
w5
w
v
v1
v
v2
v
v3
v
v4
v
v5
v
= 120
= 120
=
120
O,M
(b) (c)
v
u2
v
u3
v
u4
v
u5
u
v
w1
v
w2
v
w3
v
w4
v
w5
w
v
v1
v
v2
v
v3
v
v4
v
v5
v
= 126.4
=
126.4
=
107.2
O
M
Fig. 6.3: A 4.16-kV motor drive based on a cascade PWM in-
verter [154]. (a) Power circuit, (b) Normal operation with no faulty
converter cell, and (c) Balanced operation with one faulty converter
cell in u-phase.
voltage injection to allow the cascade converter produce a three-phase balanced line-
to-line voltage at the ac side and achieve SOC balancing of all the remaining healthy
battery units during a converter-cell failure.
Q1
Q2
Q3
Q4
(a)
Q1
Q2
Q3
Q4
(b)
Fig. 6.4: Methods for bypassing a faulty converter cell. (a) Using
thyristor switches, and (b) Using a bypass contactor.
6.5 Methods of Bypassing a Faulty Converter Cell
In a battery energy storage system as shown in Fig. 4.1, when a power switching device
or a battery unit is detected to be faulty or the fuse in series with the battery unit (not
shown in Fig. 4.1) blows, the corresponding converter cell is bypassed immediately by
short-circuiting its ac terminals.
Fig. 6.4 shows two methods for bypassing the faulty converter cell, where (a) uses a set
of two thyristor switches [151] while (b) uses a bypass contactor [154] to short-circuit its
ac terminals. Note that it does not matter which power switching device in the converter
cell gets faulty, as long as the faulty converter cell can be detected.
Fig. 6.5 shows another method of bypassing the faulty converter cell, which is used in
the dissertation. It requires no additional bypass switch and exploits the failure state of
a power switching device to bypass the faulty converter cell [155]. For example, if Q1
fails in short mode, Q3 is given the on-signal, while the two bottom switches Q2 and Q4
are given the o-signal, thus eectively bypassing the faulty converter cell.
Q1
Q2
Q3
Q4
on
o
on
o
Fig. 6.5: Method for bypassing a faulty converter cell used in the
dissertation, which exploits the failure state of the power switching
device.
6.6 Fault-Tolerant Control
This section describes the proposed fault-tolerant control. During a converter-cell or
battery-unit failure, the fault tolerant control
maintains continuous operation producing a three-phase balanced line-to-line ac
voltage, and
achieves SOC balancing of the remaining 3N 1 healthy battery units.
Fig. 6.6 shows the detailed block diagram of the fault-tolerant control in Fig. 4.4,
considering a single-converter-cell fault. During normal operation, switches SW1 and
SW2 are closed at position 1. When the converter-cell fault occurs, the switches move
to position 2, enabling the fault-tolerant control. The core of the control is the injection
of fundamental-frequency zero-sequence voltage v
0f
to achieve neutral shift.
Let us assume for simplicity that the dc voltages and SOC values of the 3N battery
units be balanced. Because the modulation indices of the 3N converter cells get equal
for normal operation, the ac voltages of the n-th converter cells in the three clusters can
be represented as
v
un
= m
i
v
DC
sin t (6.1)
v
vn
= m
i
v
DC
sin(t
2
3
) (6.2)
v
wn
= m
i
v
DC
sin(t +
2
3
), (6.3)
where m
i
is the modulation index, and n = 1, 2, N.
v
un
v
vn
v
wn
Unity gain for healthy phase
Gain of
N
N1
for faulty phase
Unity gain for healthy phase
Gain of
N
N1
for faulty phase
v
0f
_
_
_
sint for u-phase fault
sin(t
2
3
) for v-phase fault
sin(t +
2
3
) for w-phase fault
v
un
v
vn
v
wn
Position 1
2
Position 1
2
SW1 SW2
Fig. 6.6: Block diagram of the fault-tolerant control riding through

a single-converter-cell fault.
Fig. 6.7(a) shows the phasor diagram of (6.1), (6.2), and (6.3) for N = 3. In the
following, it is assumed that the u-phase converter cell numbered 1 is out of order.
Therefore, it is bypassed.
v
u1
= 0. (6.4)
Without Neutral Shift Since the value of v
DC
in (6.1)(6.3) depends on the
battery-unit dc voltage, the modulation index m
i
of the N 1 healthy converter cells in
the u-phase should be increased by a factor of N/(N1) so as to maintain a three-phase
balanced line-to-line voltage.
v
un
=
N
N 1
m
i
v
DC
sin t (6.5)
v
vn
= m
i
v
DC
sin(t
2
3
) (6.6)
v
wn
= m
i
v
DC
sin(t +
2
3
), (6.7)
O (M)
(a)
v
u1
v
u2
v
u3
u
v
w1
v
w2
v
w3
w
v
v1
v
v2
v
v3
v
O (M)
(b)
(v
u1
= 0)
v
u2
v
u3
v
w1
v
w2
v
w3
v
v1
v
v2
v
v3
u
v
w
M
O
Injection of
zero-sequence voltage
(c)
(v
u1
= 0)
v
u2
v
u3
v
w1
v
w2
v
w3
v
v1
v
v2
v
v3
u
v
w
O: Neutral point of the source
M: Neutral point of the cascade converter
Fig. 6.7: Phasor diagrams of converter-cell voltages with a cascade
number N = 3. (a) During normal operation, (b) During a fault
in the u-phase converter cell numbered 1 without zero-sequence
voltage injection, and (c) During a fault in the u-phase converter cell
numbered 1 with the injection of zero-sequence voltage. Note that
the modulation indices of the u-phase converter cells were increased
by a factor of 1.5 in (b) and (c). They, however, got reduced in (c)
due to the injection of zero-sequence voltage.
where n = 2, 3, N for the u-phase, while n = 1, 2, N for the v-and w-phases.
Fig. 6.7(b) shows the phasor diagram of (6.5), (6.6), and (6.7) for N = 3. The increase
in ac voltages in the u-phase puts an additional burden on the N 1 healthy battery
units in the u-phase, resulting in a non-negligible degree of SOC imbalance between the
N 1 battery units in that phase and 2N battery units in the other two phases.
With Neutral Shift This subsection describes a neutral shift to share the burden
of the 3N 1 healthy battery units equally, balancing their SOC values. The neutral
shift is based on the injection of a fundamental-frequency zero-sequence voltage to each
ac voltage of the healthy converter cells. The zero-sequence voltage is chosen to be out of
phase by 180
with the u-phase cluster voltage where a single-converter-cell fault occurs.

Note that the idea of zero-sequence voltage injection itself is not new. For example,
Betz et al. [143] investigated the injection of zero-sequence voltage/current for capacitor-
voltage balancing in a cascade-converter-based STATCOM intended for negative-sequence
compensation of three-phase line currents. Moreover, the author has used zero-sequence
voltage injection for the clustered SOC-balancing control in chapter 5.
The ac voltages of the healthy converter cells can then be expressed as
v
un
=
N
N 1
m
i
v
DC
sin t
N
N 1
v
0f
sin t (6.8)
v
vn
= m
i
v
DC
sin(t
2
3
) v
0f
sin t (6.9)
v
wn
= m
i
v
DC
sin(t +
2
3
) v
0f
sin t, (6.10)
where the second term on the right-hand side of each equation is the zero-sequence
voltage injected.
Fig. 6.7(c) shows the phasor diagram of (6.8), (6.9), and (6.10) for N = 3. Let the
three-phase line currents be balanced as
i
u
=
2 I sin t (6.11)
i
v
=
2 I sin(t
2
3
) (6.12)
i
w
=
2 I sin(t +
2
3
). (6.13)
The input electric power to each converter cell is given by
p
u1
= 0 (6.14)
p
un
=
_ 2
0
v
un
i
u
dt
=

N
N 1
(m
i
v
DC
v
0f
)I; for n = 2, 3, N (6.15)
p
vn
=
_ 2
0
v
vn
i
v
dt
=

(m
i
v
DC
+
v
0f
2
)I; for n = 1, 2, N (6.16)
p
wn
=
_ 2
0
v
wn
i
w
dt
=

(m
i
v
DC
+
v
0f
2
)I; for n = 1, 2, N. (6.17)
These powers (p
u2
, p
u3
, p
w3
) absorbed by the 3N 1 healthy battery units should be
equal to achieve SOC balancing during the converter-cell fault.
p
un
= p
vn
= p
wn
. (6.18)
From (6.15) to (6.18), the following equation can be derived.
v
0f
=
2
3N 1
m
i
v
DC
. (6.19)
This indicates that in spite of the existence of the single faulty and bypassed converter
cell in the u-phase, the 3N 1 powers would be equal if the fundamental-frequency
zero-sequence voltage, given by (6.19) and being out of phase by 180
with the u-phase

voltage, is injected. Although the injection of zero-sequence voltage causes such a neutral
shift as shown in Fig. 6.7(c), the fundamental components of the three-phase line-to-line
voltages produced by the cascade converter remain balanced.
From (6.19), for a cascade number N = 3, the zero-sequence voltage is given by
v
0f
=
1
4
m
i
v
DC
. (6.20)
Substituting (6.20) into (6.8), (6.9) and (6.10) yields
v
un
= 1.125 m
i
v
DC
sin t (6.21)
v
vn
= 1.145 m
i
v
DC
sin(t 130.9
) (6.22)
v
wn
= 1.145 m
i
v
DC
sin(t + 130.9
). (6.23)
This means that the modulation index m
i
is increased by a factor of 1.125 in the u-phase
and 1.145 in the v- and w-phases during the single-converter-cell fault in the u-phase.
Without neutral shift, it would have to be increased by a factor of 1.5 in the u-phase in
order to maintain a three-phase balanced line-to-line voltage.
When the cascade converter is used for a medium-voltage battery energy storage sys-
tem, the cascade number may be as high as six or more. If N = 10, for example, the
modulation index is increased by a factor of less than 1.05 during a converter-cell fault
if the neutral shift described in this subsection is used. This concludes that such a small
voltage margin of the battery units and converter cells allows the battery energy storage
system to be operated at the rated voltage and power even during the occurrence of a
single-converter-cell fault.
Note that if the single-converter-cell fault occurs in the v-phase, the zero-sequence
voltage given by (6.19) is chosen to be out of phase by 180
with the v-phase cluster

voltage.
v
un
= m
i
v
DC
sin t v
0f
sin(t
2
3
) (6.24)
v
vn
=
N
N 1
m
i
v
DC
sin(t
2
3
)
N
N 1
v
0f
sin(t
2
3
) (6.25)
v
wn
= m
i
v
DC
sin(t +
2
3
) v
0f
sin(t
2
3
). (6.26)
For N = 3, the resulting ac voltages of the healthy converter cells would then be
v
un
= 1.145 m
i
v
DC
sin(t + 10.9
) (6.27)
v
vn
= 1.125 m
i
v
DC
sin(t 120
) (6.28)
v
wn
= 1.145 m
i
v
DC
sin(t + 109.1
). (6.29)
Similarly, if the single-converter-cell fault occurs in the w-phase, the zero-sequence
voltage given by (6.19) is chosen to be out of phase by 180
with the w-phase cluster

voltage.
v
un
= m
i
v
DC
sin t v
0f
sin(t +
2
3
) (6.30)
v
vn
= m
i
v
DC
sin(t
2
3
) v
0f
sin(t +
2
3
) (6.31)
v
wn
=
N
N 1
m
i
v
DC
sin(t +
2
3
)
N
N 1
v
0f
sin(t +
2
3
). (6.32)
For N = 3, the resulting ac voltages of the healthy converter cells would then be
v
un
= 1.145 m
i
v
DC
sin(t 10.9
) (6.33)
v
vn
= 1.145 m
i
v
DC
sin(t 109.1
) (6.34)
v
wn
= 1.125 m
i
v
DC
sin(t + 120
). (6.35)
Multilevel cascade converters are, thus, capable of maintaining continuous operation
even during the converter-cell fault. To take advantage of this property, however, it is
important to detect the faulty converter cell as soon as possible. Fault detection in mul-
tilevel converters has been investigated in literatures [149], [150], [160][162]. Turpin et
al. [149] and Richardeau et al. [150] have used switching frequency analysis of phase
voltage in order to identify the fault in a ying-capacitor converter. The technique could
detect the fault in few sample times. Son et al. [160] compared the current-vector pat-
tern of faulty operation with that of normal operation in order to identify the fault in a
neutral-point clamped converter. Khomfoi et al. [161] proposed a neural-network-based
method that identied the type and location of fault in a cascade-converter-based drive
from its voltage measurement. Recently, Lezana et al. [162] have used the frequency
analysis technique described in [149] and [150] for accurate and faster detection of the
fault in the cascade PWM converter.
Fig. 6.8 shows experimental waveforms during fault-tolerant operation, in which the
u-phase converter cell numbered 1 was bypassed by turning on the two upper IGBTs
and turning o the two bottom IGBTs. The remaining eight battery units were charged
at 10 kW with a mean SOC value of 65% in Fig. 6.8(a), while they were discharged
at 10 kW with a mean SOC value of 69% in Fig. 6.8(b). Losing the converter cell in
the u-phase brought an increase in switching ripples to the line currents i
u
, i
v
, and i
w
.
This can be observed by comparing the line current waveforms in Fig. 6.8 with those in
Figs. 5.11 and 5.12. Generally, the fault-tolerant operation would last for a short period
of time until the converter cell is repaired.
Fig. 6.9(a) shows transient waveforms during charging before and after the u-phase
converter cell numbered 1 was bypassed. The mean SOC value was 67%. Fig. 6.9(b)
shows those before and after it was restored to the normal operation. The mean SOC
value was 69%. These experimental waveforms verify smooth transition from the normal
operation to the fault-tolerant operation, and vice versa.
Fig. 6.10 shows various voltage waveforms at the ac side of the cascade converter
during normal discharging operation, while Fig. 6.11 shows those during fault-tolerant
operation both at the rated power of 10 kW. The three u-phase converter-cell ac voltages
v
SO
[V] 0
200
i [A] 0
60 i
u
i
v
i
w
v
DC
[V]
60
70
80
90
Eight traces
v
DCu1
[V]
60
70
80
90

10 ms
(a)
v
SuO
[V] 0
200
i
u
[A] 0
60 i
u
i
v
i
w
v
DC
[V]
60
70
80
90 Eight traces
v
DCu1
[V]
60
70
80
90

10 ms
(b)
Fig. 6.8: Experimental waveforms when the u-phase converter cell
numbered 1 was bypassed while the remaining eight battery units
were being charged or discharged. (a) Charged at 10 kW with a
mean SOC value at 65 %, and (b) Discharged at 10 kW with a mean
SOC value at 69%.
v
SO
[V] 0
200
i [A] 0
60 i
v
i
w
i
u

10 ms
v
DC
[V]
75
80
85
90
Nine traces
The u-phase converter cell

numbered 1 was bypassed
v
DCu1
(a)
v
SO
[V] 0
200
i [A] 0
60 i
u
i
v
i
w

10 ms
v
DC
[V]
75
80
85
90
Nine traces

numbered 1 was restored
v
DCu1
(b)
Fig. 6.9: Transient waveforms during charging at 10 kW. (a) When
the u-phase converter cell numbered 1 was bypassed with a mean
SOC value of 67%, and (b) When the u-phase converter cell num-
bered 1 was restored with a mean SOC value of 69%.
(v
u1
, v
u2
and v
u3
) and the v-phase converter-cell ac voltage (v
v1
) were picked up as rep-
resentatives. These as well as the other ve ac converter-cell voltages (v
v2
, v
v3
, v
w3
)
were three-level waveforms during normal operation. Note that the ac voltage v
u1
was
v
u1
[V] 0
300

20 ms
v
u2
[V] 0
300
v
u3
[V] 0
300
v
v1
[V] 0
300
(a)
v
uM
[V] 0
300

20 ms
v
vM
[V] 0
300
v
wM
[V] 0
300
(b)
Seven-level waveforms `
`
`
`
`
`
`
`
`'
v
uv
[V] 0
600

20 ms
v
vw
[V] 0
600
v
wu
[V] 0
600
(c)
Fig. 6.10: Experimental voltage waveforms at the ac side of the
cascade converter during normal operation at 10 kW in discharg-
ing. (a) Four converter-cell ac voltages, (b) Three line-to-neutral
voltages, and (c) Three line-to-line voltages.
v
u1
[V] 0
300
v
u2
[V] 0
300

20 ms
v
u3
[V] 0
300
v
v1
[V] 0
300
(a)
v
uM
[V] 0
300
Five-level waveform
v
vM
[V] 0
300

20 ms
v
wM
[V] 0
300
Seven-level waveforms
(b)
v
uv
[V] 0
600

20 ms
v
vw
[V] 0
600
v
wu
[V] 0
600
(c)
Fig. 6.11: Experimental voltage waveforms at the ac side of the cas-
cade converter during fault-tolerant operation at 10 kW in discharg-
zero in Fig. 6.11(a). The three line-to-neutral voltages were seven-level waveforms in the
normal operation, whereas the u-phase voltage was degraded to a ve-level waveform
in the fault-tolerant operation. Although the fundamental components of the line-to-
neutral voltages are not balanced, those of the line-to-line voltages v
uv
, v
vw
, and v
wu
in
Fig. 6.11(c) were well balanced.
6.8 SOC Balancing During Fault-Tolerant Operation
Figs. 6.12 and 6.13 were taken to verify the eectiveness of the fault-tolerant control in
achieving SOC balancing of the eight healthy battery units during a single-converter-cell
fault. Fig. 6.12 shows SOC waveforms without fault-tolerant control. Initially, all the
nine SOC waveforms were balanced. At t = 0, the u-phase converter cell numbered 1 was
bypassed and the modulation indices of the remaining two converter cells in the u-phase
were increased by a factor of 1.5 so as to produce a three-phase balancing line-to-line
voltage. This made the two battery units numbered 2 and 3 in the u-phase charged and
discharged faster than the other six battery units in the v- and w- phases. As a result,
a serious SOC imbalance was created between the two battery units in the u-phase and
the six battery units in the other two phases. As explained earlier, the SOC imbalance
is undesirable because it reduces the total available capacity of the remaining healthy
battery units. The waveforms were observed at 10 kW with a mean SOC window between
50 and 70%.
Fig. 6.13 shows SOC waveforms when the fault-tolerant control was enabled. Initially,
all the nine battery units were operating at 10 kW with a mean SOC window between
50 and 70%. At t = 0, the u-phase converter cell numbered 1 was bypassed and the
fault-tolerant control was enabled. The remaining eight converter cells were repetitively
charged and discharged at 10 kW. It is clear from the waveforms that the fault-tolerant
control is eective in balancing the SOC values of all the 3N 1 healthy battery units
during a single-converter-cell fault.
SOC
un
SOC
vn
SOC
wn
[%]
40
50
60
70
80
Six traces
SOC
u1
The u-phase converter cell numbered 1

was bypassed
SOC
u2
and SOC
u3

1 min
t = 0
Fig. 6.12: Experimental SOC waveforms with no fault-tolerant
control, when the u-phase converter cell numbered 1 was bypassed
while the remaining eight battery units were charged at 10 kW.
SOC
un
SOC
vn
SOC
wn
[%]
40
50
60
70
80
Eight traces
SOC
u1
The u-phase converter cell numbered 1 was

bypassed

5 min
t = 0
Fig. 6.13: Experimental SOC waveforms with the fault-tolerant
control, when the u-phase converter cell numbered 1 was bypassed
while the remaining eight battery units were repetitively charged
and discharged at 10 kW.
6.9 Simulation Results
Figs. 6.14-6.16 show EMTDC/PSCAD simulation results. Simulation was carried out
under the same operating conditions as the experiment. Fig. 6.14(a) shows simulation
waveforms during charging at 10 kW before and after the u-phase converter cell num-
bered 1 was bypassed, while Fig. 6.14(b) shows those before and after the converter cell
was restored to the normal operation. Losing the converter cell in the u-phase brought
an increase in switching ripples to the line currents i
u
, i
v
, and i
w
, which is similar to the
experimental results in Fig. 6.9.
v
SO
[V] 0
200
i [A] 0
60 i
v
i
w
i
u

10 ms
v
DC
[V]
75
80
85
90
Nine traces

numbered 1 was bypassed
v
DCu1
(a)
v
SO
[V] 0
200
i [A] 0
60 i
u
i
v
i
w

10 ms
v
DC
[V]
75
80
85
90
Nine traces

numbered 1 was restored
v
DCu1
(b)
Fig. 6.14: Simulation waveforms during charging at 10 kW. (a)
When the u-phase converter cell numbered 1 was bypassed, and (b)
When the u-phase converter cell numbered 1 was restored.
Fig. 6.15 shows simulation waveforms of various voltages at the ac side of the cascade
converter during normal operation, while Fig. 6.16 shows those during fault-tolerant
operation. The simulation waveforms in Figs. 6.15 and 6.16 matched the experimental
waveforms in Figs. 6.10 and 6.11, respectively.
v
u1
[V] 0
300

20 ms
v
u2
[V] 0
300
v
u3
[V] 0
300
v
v1
[V] 0
300
(a)
v
uM
[V] 0
300

20 ms
v
vM
[V] 0
300
v
wM
[V] 0
300
(b)
`
`
`
`
`
`
`
`
`'
v
uv
[V] 0
600

20 ms
v
vw
[V] 0
600
v
wu
[V] 0
600
(c)
Fig. 6.15: Simulation voltage waveforms at the ac side of the cas-
cade converter during normal operation at 10 kW in discharging.
(a) Four converter-cell ac voltages, (b) Three line-to-neutral volt-
ages, and (c) Three line-to-line voltages.
v
u1
[V] 0
300
v
u2
[V] 0
300

20 ms
v
u3
[V] 0
300
v
v1
[V] 0
300
(a)
v
uM
[V] 0
300
Five-level waveform
v
vM
[V] 0
300

20 ms
v
wM
[V] 0
300
(b)
v
uv
[V] 0
600

20 ms
v
vw
[V] 0
600
v
wu
[V] 0
600
(c)
Fig. 6.16: Simulation voltage waveforms at the ac side of the cas-
cade converter during fault-tolerant operation at 10 kW in discharg-
6.10 Summary
This chapter has described fault-tolerant control for a battery energy storage system
based on a cascade PWM converter with star conguration. It is based on a combina-
tion of converter-cell bypass and neutral shift. During a converter-cell or battery-unit
failure, it enables the cascade converter to maintain continuous operation, producing a
three-phase balanced line-to-line voltage and achieving SOC balancing of the remaining
healthy battery units. Experimental results based on a 200-V system have veried the
eectiveness of the proposed fault-tolerant control.
108
Chapter 7
Active-Power Control of Individual
Converter Cells
This chapter presents an active-power control of individual converter cells for the
cascade-converter-based battery energy storage system. The control is based on neutral
shift and enables the multiple battery units in the cascade converter to operate at dier-
ent power levels while producing a three-phase balanced line-to-line voltage. Theoretical
analysis is done and experimental results are presented to verify the eectiveness of the
control method.
7.1 Background
Production tolerances, uneven temperature conditions and dierences in ageing char-
acteristics may eventually lead to dierent power-handling capacities of the multiple
battery units in a cascade-converter-based battery energy storage system. Dierences in
power-handling capacities may also occur when, for example, one of the 3N battery units
in the cascade converter is replaced by a new one. For maximum utilization of battery
energy, it would then be necessary to operate one or more battery units at reduced or
increased power levels.
7.2 Control Method
Fig. 7.1 shows the block diagram of two active-power controls for the battery energy
storage system based on a cascade PWM converter:
1. active-power control of the whole converter cells (represented by dashed lines),
and
2. active-power control of individual converter cells (represented by solid lines).
The rst one controls the total active power and has been explained in chapter 5. The
active-power control of individual converter cells, on the other hand, regulates the power
of each converter cell (P
un
, P
vn
, and P
wn
). Its main function is to calculate the amplitude
p
(=0)
v
SuO
v
SvO
v
SwO
i
u
i
v
i
w
9
P
u1
, P
u2
, , P
w3
i
d
i
q
v
uM
v
vM
v
wM
v
0a
P
un
P
vn
P
wn
P
u
P
v
P
w
v
un
v
vn
v
wn

Active-
power
control
(Fig. 5.1)
Calculation of
zero-sequence
voltage
P
un
P
u
P
vn
P
v
P
wn
P
w
(n = 1, 2, and 3)
Active-power control of
the whole converter cells
Active-power control of
individual converter cells
Fig. 7.1: Block diagram of the active-power control of individual
converter cells (represented by solid lines). The part represented by
dashed lines is the active-power control of the whole converter cells.
For simplicity, the SOC-balancing control and the fault-tolerant
control are not included.
(
2 V
0a
) and phase angle (
0a
) of the zero-sequence voltage (v
0a
) so that its injection
produces a three-phase balanced line-to-line voltage in spite of operating the 3N converter
cells at dierent power levels. For simplicity, the SOC-balancing control and the fault-
tolerant control are not included in Fig. 7.1.
Let P
un
, P
vn
, and P
wn
be the power commands to the 3N converter cells, where
n = 1, 2, N. The three cluster power commands (P
u
, P
v
, and P
w
) are given by
_
_
P
u
P
v
P
w
_
_
=
_
_
P
u1
+P
u2
+ +P
uN
P
v1
+P
v2
+ +P
vN
P
w1
+P
w2
+ +P
wN
_
_
. (7.1)
Each of the cluster power command can be considered as a sum of two components as
follows:
_
_
P
u
P
v
P
w
_
_
=
P
3
+
_
_
P
u
P
v
P
w
_
_
, (7.2)
where P
= P
u
+ P
v
+ P
w
. The rst term on the right-hand side of (7.2) is the active
power due to positive-sequence voltage. The second term is the active power due to
zero-sequence voltage and, from (5.27), it is given by
_
_
P
u
P
v
P
w
_
_
= V
0a
I
_
_
cos(
0a
)
cos(
0a
+
2
3
)
cos(
0a

2
3
)
_
_
. (7.3)
Solving (7.3) for V
0a
and
0a
results
0a
=
_
_
tan
1
_
2
3
_
1
2
+
P
v
P
u
__
if P
u
= 0
2
if P
u
= 0 and P
v
> 0
2
if P
u
= 0 and P
v
< 0
(7.4)
V
0a
=
P
u
I cos(
0a
)
. (7.5)
The zero-sequence-voltage reference is determined as
v
0a
=
2 V
0a
sin(t +
0a
). (7.6)
P
un
P
un
K
2
+
K
2
sT
2
Control
(Fig. 7.1)
u-phase n-th
converter cell
v
un
P
un
Fig. 7.2: Feedback loop (taking u-phase as an example) used in the
experiment to make the converter-cell powers at the dc side (P
un
)
equal to the respective commands at the ac side (P
un
) regardless of
the converter-cell losses.
Finally, the modulating signals to the 3N converter cells are determined as
v
un
= (v
uM
+v
0a
)
P
un
P
u
(7.7)
v
vn
= (v
vM
+v
0a
)
P
vn
P
v
(7.8)
v
wn
= (v
wM
+v
0a
)
P
wn
P
w
. (7.9)
Note that when the power-handling capacities of all the 3N battery units are equal,
their active-power commands are also equal (P
un
=P
vn
=P
wn
), and therefore, the modu-
lating signals would be solely determined by the active-power control of whole converter
cells as follows:
v
un
=
v
uM
N
(7.10)
v
vn
=
v
vM
N
(7.11)
v
wn
=
v
wM
N
. (7.12)
The active-power control of individual converter cells is basically a feedforward control.
However, a feedback loop, as shown in Fig. 7.2, is used in the experiment to make the 3N
converter-cell powers at the dc side (P
un
, P
vn
, and P
wn
) equal to the respective commands
at the ac side (P
un
, P
vn
, and P
wn
) regardless of the converter-cell losses. The proportional
gain K
2
and the integral time constant T
2
of the PI controller in the feedback loop are
set as follows:
K
2
= 0.1 W/W, T
2
= 10 s. (7.13)
For simplicity, the feedback loop is neglected from the above analysis.
Table 7.1 summarizes ve modes of operation of the experimental system. For each
mode, it gives the nine converter-cell power commands, and shows the theoretical values
of amplitude and phase angle of the corresponding zero-sequence voltage (v
0a
). The
zero-sequence voltage is determined in such a way as to produce a three-phase balanced
line-to-line voltage in spite of operating the nine converter cells at dierent power levels.
Table 7.1: Five modes of operation, each of which has a dierent
set of converter-cell power commands, and its corresponding theo-
retical zero-sequence voltage
Mode
Converter-cell power commands [kW]
Zero-sequence
voltage (v
0a
)
P
u1
P
u2
P
u3
P
v1
P
v2
P
v3
P
w1
P
w2
P
w3
2 V
0a

0a
[V] [rad]
I 1 1 1 1 1 1 1 1 1 0 -
II 0.5 1 1 1 1 1 1 1 1 19.2
III 0.5 1 1 0.5 1 1 1 1 1 20.4 2/3
IV 0.5 1 1 0.5 1 1 0.5 1 1 0 -
V 0.25 1 1 0.5 1 1 0.5 1 1 11.3
Fig. 7.3 shows experimental power waveforms of nine converter cells for the ve modes
of operation in Table 7.1. The nine powers were measured at the dc sides by the re-
spective battery management systems. Mode I represents the condition when the power
commands to all the nine converter cells were equal (1 kW each). From mode II to
mode V, one of the nine converter-cell power commands was reduced to 50% of its pre-
vious value in a ramp of 50 W/s.
Fig. 7.4 shows experimental waveforms for mode I. With equal power commands to
all the nine converter cells, the zero-sequence voltage should be theoretically zero as in
indicated in Table 7.1. However, due to the feedback loop of power in Fig. 7.2, a small
amount of zero-sequence voltage was observed. The zero-sequence voltage had a peak of
p
un
p
vn
p
wn
[W]
0
250
500
750
1000
1250
Six traces
p
u1
p
v1
p
w1
p
u1
Mode I Mode II Mode III Mode IV Mode V

50 s

Fig. 7.3: Experimental power waveforms of the nine battery units
during ve modes of operation of Table 7.1.
v
SO
[V] 0
200
v
SuO
v
SvO
v
SwO
i [A] 0
50
i
u
i
v
i
w

10 ms
v
0
[V] 0
20
Fig. 7.4: Experimental waveforms during mode I.
2 V and was in phase with the u-phase current, which caused the u-cluster to draw an
additional power of 30 W. The THD of u-phase current i
u
was 4.0%.
Fig. 7.5 shows the experimental waveforms for mode II. With the power command
of u-phase converter-cell numbered 1 reduced to 0.5 kW, the zero-sequence voltage was
17 V in amplitude and out of phase by 180
with the u-phase voltage. A small dierence

between experimental and theoretical values was caused again by the power feedback
loop. The current THD was 4.8% in this case due to increased 1.6-kHz ripple.
Fig. 7.6 shows the experimental waveforms for mode III. The power command of v-
phase converter-cell numbered 1 was reduced to 0.5 kW while those of u-phase converter
cell numbered 1 and other seven converter cells were kept at 0.5 kW and 1 kW respec-
tively. The resulting zero-sequence voltage was 18 V in amplitude and in phase with the
w-phase voltage. The current THD was 5% in this case.
v
SO
[V] 0
200
v
SuO
v
SvO
v
SwO
i [A] 0
50
i
u
i
v
i
w
v
0
[V] 0
20

10 ms
Fig. 7.5: Experimental waveforms during mode II.
v
SO
[V] 0
200
v
SuO
v
SvO
v
SwO
i [A] 0
50
i
u
i
v
i
w
v
0
[V] 0
20

10 ms
Fig. 7.6: Experimental waveforms during mode III.
Fig. 7.7 shows the experimental waveforms for mode IV. With equal power commands
in the u-, v- and w-clusters (2.5 kW each), the resulting zero-sequence voltage should
theoretically be zero. A small amount of zero sequence voltage was, however, observed
as in mode I. The current THD was 4.6%.
Fig. 7.8 shows the experimental waveforms for mode V. The power command of u-
phase converter-cell numbered 1 was reduced to 0.25 kW while those of v- and w-phase
v
SO
[V] 0
200
v
SuO
v
SvO
v
SwO
i [A] 0
50
i
u
i
v
i
w
v
0
[V] 0
20

10 ms
Fig. 7.7: Experimental waveforms during mode IV.
v
SO
[V] 0
200
v
SuO
v
SvO
v
SwO
i [A] 0
50
i
u
i
v
i
w
v
0
[V] 0
20

10 ms
Fig. 7.8: Experimental waveforms during mode V.
converter cells numbered 1 were kept at 0.5 kW and those of other six converter cells
were kept at 1 kW. The resulting zero-sequence voltage was 9 V in amplitude and out
of phase by 180
with the u-phase voltage. The current THD was 6%.

Since the same ac current ows through the three converter cells in a cluster, the
desired sharing of power between the three converter cells in the cluster is obtained by
proportionally controlling the ac voltages of the three converter cells. That means, taking
u-phase as an example, the following relation exists as indicated in (7.7):
V
u1
P
u1
=
V
u2
P
u2
=
V
u3
P
u3
. (7.14)
v
un
0
1
(a)

10 ms
v
u1
and v
u3
un
0
1
(b)
v
u3
v
u1
un
0
1
(c)
v
u3
v
u1
un
0
1
(d)
v
u3
v
u1
un
0
1
(e)
v
u3
v
u1
Fig. 7.9: Modulating signals (normalized by respective battery-unit

voltages) of u-phase converter cells numbered 1 and 3. (a) Mode I,
(b) Mode II, (c) Mode III, (d) Mode IV, and (e) Mode V.
Fig. 7.9 shows modulating signals (normalized by respective battery-unit voltages that
were assumed equal) of u-phase converter cells numbered 1 and 3 for the ve modes of
operation. The power command (P
u3
) to the u-phase converter cell numbered 3 was kept
constant at 1 kW throughout the ve modes of operation. Then, as the power command
(P
u1
) to the u-phase converter cell numbered 1 was changed from 1 kW to 0.5 kW in
mode II, and again from 0.5 kW to 0.25 kW in mode V, the ratio of V
u1
to V
u3
changed
from 1 to 0.5 in mode II and from 0.5 to 0.25 in mode V, as expected.
i
DCu1
[A]
0
20
(a)

10 ms
i
Bu1
[A]
0
20
(b)
i
DCu1
[A]
0
20
(c)
i
DCu1
[A]
0
20
(d)
i
DCu1
[A]
0
20
(e)
Fig. 7.10: Experimental waveforms of the battery current in the
u-phase converter-cell numbered 1. (a) Mode I, (b) Mode II, (c)
Mode III, (d) Mode IV, and (e) Mode V.
Fig. 7.10 shows the battery-unit current i
DCu1
of the u-phase converter cell numbered 1
for the ve modes of operation. The battery current contains the 100-Hz component as
well as the 1.6-KHz component due to PWM.
7.4 Summary
This chapter has described an active-power control of individual converter cells for
the cascade-converter-based battery energy storage system. The control, which is based
on the neutral shift, has enabled the multiple battery units in the cascade converter
to operate at dierent power levels while producing a three-phase balanced line-to-line
voltage. The control method is particularly advantageous when production tolerances
and operating conditions result in dierent power-handling capacities of the multiple
battery units. It is also advantageous in cases when one or more battery units in the
cascade converter are replaced by the new ones. Experimental results have been provided
to verify the eectiveness of the proposed control method.
119
Chapter 8
Conclusion and Future Research
8.1 Conclusion
The dissertation has discussed a battery energy storage system based on a cascade
PWM converter with star conguration. Basic design concepts, with and without a line-
frequency transformer, have been presented for the 6.6-kV system. The dissertation has
addressed three important issues, namely state-of-charge balancing control, fault-tolerant
control, and active-power control of individual converter cells, which are indispensable for
practical use of the battery energy storage system. A 200-V, 10-kW, 3.6-kWh laboratory
system based on a combination of a cascade PWM converter and NiMH battery units
has been designed, constructed and tested to verify the validity and eectiveness of the
proposed control methods.
Experimental Verication of SOC-Balancing Control The SOC balancing
control, discussed in detail in chapter 5, helps to balance the state-of-charges of the
multiple battery units. The control is realized by dividing it into clustered SOC-balancing
control between the three phases and individual SOC-balancing control between the
converter cells in a phase. The clustered SOC-balancing control is based on neutral shift.
The neutral shift is achieved by injecting fundamental-frequency zero-sequence voltage
to the three clusters. The amplitude of zero-sequence voltages represents the degree of
SOC imbalance among the three clusters while its phase angle represents the distribution
of the SOC imbalance among the three clusters. The individual SOC-balancing control
regulates the power of converter cells in a phase without interfering with the active-power
control and the clustered SOC-balancing control. Theoretical analysis has been provided
and experimental results have been provided to verify the eectiveness of the proposed
SOC-balancing control.
Experimental Verication of Fault-Tolerant Control The fault-tolerant con-
trol, discussed in detail in chapter 6, helps to enhance the reliability and availability
of the battery energy storage system. The control method is based on a combination
of converter-cell bypass and neutral shift. During a converter-cell or battery unit fail-
ure, it enables to maintain continuous operation of the system, producing a three-phase
balanced line-to-line voltage and achieving SOC balancing of remaining healthy battery
units. Moreover, with a small voltage margin of the battery units and converter cell, it
allows the battery energy storage system to be operated at the rated voltage and power
even during a single-converter-cell fault. As in clustered SOC-balancing control, the
neutral shift is based on the injection of fundamental-frequency zero-sequence voltage to
the three phases. Theoretical analysis has been provided to determine the magnitude
and phase of the zero-sequence voltage when a converter-cell fault occurs in the u-, v-,
or w-phase. Experimental results have veried the eectiveness of the control method.
Experimental Verication of Active-Power Control of Individual Converter
Cells The active-power control of individual converter cells, discussed in detail in chap-
ter 7, enables the multiple battery units to operate at dierent power levels while pro-
ducing a three-phase balanced line-to-line voltage. It is particularly advantageous when
power-handling capacities of multiple battery units dier due to manufacturing toler-
ances and operating conditions or due to the replacement of one or more battery units
by the new ones. Similar to the clustered SOC-balancing control and the fault-tolerant
control, it is also based on the neutral shift. Theoretical analysis has been provided
to determine the magnitude and phase of the zero-sequence voltage to be injected to
achieve the appropriate neutral shift. Experimental results have veried the validity of
the control method.
The dissertation has addressed three important issues of the battery energy storage
system based on a cascade PWM converter for its practical use. At present, the major
hurdle in developing a large-scale battery energy storage system is, however, the high
cost of the battery. Therefore, for the battery energy storage system to be economically
feasible, it need to be used for a number of applications (e.g. backup power, peak shaving,
frequency control, etc.) to generate sucient revenue. Moreover, utility regulators need
to be educated on the economic and social benets that the battery energy storage
systems can provide.
8.2 Future Research
Eciency Estimation The dissertation has not covered eciency estimation of
the battery energy storage system. Future work is needed in this direction.
Li-ion Battery Based Systems The battery energy storage system presented in
the dissertation is based on NiMH batteries. The NiMH batteries have energy densities
in the range of 30-80 Wh/kg and are currently being used in HEVs. However, Li-ion
batteries, with energy densities in the range of 50-130 Wh/kg, are being considered to be
promising alternatives to NiMH batteries for the next generation of HEVs. The eventual
choice of batteries for HEVs will have a huge impact on stationary battery systems of
many types, including battery energy storage system for power leveling of renewable
energy resources. Experimental verication of Li-ion based system is required.
Operation Under More Than One Converter-Cell Failures The fault-tolerant
control presented in the dissertation can be extended to include the cases when more
than one converter cells fail. This enables the battery energy storage system to maintain
continuous operation producing a three-phase balanced line-to-line voltage in spite of
more than one converter-cell failures, thus signicantly improving the reliability.
122
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Study of a Battery Energy Storage System Based on a Multilevel Cascade PWM Converter With Star Configuration

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Study of a Battery Energy Storage

System Based on a Multilevel

was changed from 10 kW to 10 kW in

was changed from 10 kW to 10 kW in

out of phase with those below the zero point;

out of phase with those below the zero point;

, while each converter-cells carrier is phase-shifted by 180

is located in this area, vector v

is the active-power command, while the reactive power command of q

Fig. 5.7: Clustered SOC-balancing control, taking the u-phase as

Fig. 5.8: Individual SOC-balancing control between three cascaded

CB1 was turned on

Controller was started

. The system thus came to

= 0. The u-phase current

. The u-phase current had a THD of 5.4%. The THD value is

was changed from

= 10 kW at t = 0, the nine SOC

was changed from

as shown in Fig. 6.3(b).

Fig. 6.6: Block diagram of the fault-tolerant control riding through

with the u-phase cluster voltage where a single-converter-cell fault occurs.

with the u-phase

with the v-phase cluster

with the w-phase cluster

The u-phase converter cell

The u-phase converter cell

The u-phase converter cell numbered 1

The u-phase converter cell numbered 1 was

The u-phase converter cell

The u-phase converter cell

with the u-phase voltage. A small dierence

with the u-phase voltage. The current THD was 6%.

Fig. 7.9: Modulating signals (normalized by respective battery-unit

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