2002 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev.

B

IRF9530, RF1S9530SM

12A, 100V, 0.300 Ohm, P-Channel Power
MOSFETs

These are P-Channel enhancement mode silicon gate power
eld effect transistors. They are advanced power MOSFETs
designed, tested, and guaranteed to withstand a specied
level of energy in the breakdown avalanche mode of
operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching
convertors, motor drivers, relay drivers, and drivers for high
power bipolar switching transistors requiring high speed and
low gate drive power. The high input impedance allows these
types to be operated directly from integrated circuits.
Formerly developmental type TA17511.

Features

12A, 100V
r

DS(ON)

= 0.300

Single Pulse Avalanche Energy Rated
SOA is Power Dissipation Limited
Nanosecond Switching Speeds
Linear Transfer Characteristics
High Input Impedance
Related Literature
- TB334, Guidelines for Soldering Surface Mount
Components to PC Boards

Symbol

Packaging

JEDEC TO-220AB JEDEC TO-263A

Ordering Information

PART NUMBER PACKAGE BRAND

IRF9530 TO-220AB IRF9530
RF1S9530SM TO-263AB RF1S9530
NOTE: When ordering, use the entire part number. Add the sufx 9A to
obtain the TO-263AB variant in the tape and reel, i.e., RF1S9530SM9A.
G
D
S
GATE
DRAIN (FLANGE)
SOURCE
DRAIN
DRAIN
(FLANGE)
GATE
SOURCE

Data Sheet January 2002
2002 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. B

Absolute Maximum Ratings

T

C

= 25

o

C, Unless Otherwise Specied

IRF9530,
RF1S9530SM UNITS

Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DS

-100 V
Drain to Gate Voltage (R

GS

= 20k

)

(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

DGR

-100 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

D

T

C

= 100

o

C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

D

-12
-7.5
A
A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

DM

-48 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

GS

20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 75 W
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 W/

o

C
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

AS

500 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

J,

T

STG

-55 to 150

o

C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

L

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

pkg

300
260

o

C

o

C

CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specication is not implied.

NOTE:
1. T

J

= 25

o

C to T

J

= 125

o

C.

Electrical Specications

T

C

= 25

o

C, Unless Otherwise Specied

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV

DSS

I

D

= -250

A, V

GS

= 0V, (Figure 10) -100 - - V
Gate Threshold Voltage V

GS(TH)

V

GS

= V

DS

, I

D

= -250

A -2 - -4 V
Zero Gate Voltage Drain Current I

DSS

V

DS

= Rated BV

DSS

, V

GS

= 0V - - -25

A
V

DS

= 0.8 x Rated BV

DSS

, V

GS

= 0V, T

C

= 125

o

C - - -250

A
On-State Drain Current (Note 2) I

D(ON)

V

DS

> I

D(ON)

x r

DS(ON)MAX

, V

GS

= -10V,
(Figure 7)
-12 - - A
Gate to Source Leakage Current I

GSS

V

GS

=

20V - -

100 nA
Drain to Source On Resistance (Note 2) r

DS(ON)

I

D

= -6.5A, V

GS

= -10V, (Figures 8, 9) - 0.250 0.300

Forward Transconductance (Note 2) g
fs
V

DS

> I

D(ON)

x r

DS(ON)

Max, I

D

= -6.5A
(Figure 12)
2 3.8 - S
Turn-On Delay Time t

d(ON)

V

DD

= 50V, I

D

-12A, R

G

= 50

,

V

GS

= 10V
R

L

=

4.2

,

(Figures 17, 18)
MOSFET Switching Times are Essentially Inde-
pendent of Operating Temperature
- 30 60 ns
Rise Time t

r

- 70 140 ns
Turn-Off Delay Time t

d(off)

- 70 140 ns
Fall Time t

f

- 70 140 ns
Total Gate Charge
(Gate to Source + Gate to Drain)
Q

g(TOT)

V

GS

= -10V, I

D

= -12A, V

DSS

= 0.8 x Rated BV

DSS,

(Figure 14, 19, 20) Gate Charge
is Essentially Independent of Operating
Temperature
- 25 45 nC
Gate to Source Charge Q

gs

- 13 - nC
Gate to Drain (Miller) Charge Q

gd

- 12 - nC
Input Capacitance C

ISS

V

DS

= -25V, V

GS

= 0V, f = 1MHz, (Figure 11) - 500 - pF
Output Capacitance C

OSS

- 300 - pF
Reverse Transfer Capacitance C

RSS

- 100 - pF
Internal Drain Inductance L

D

Measured From the
Contact Screw On Tab To
Center of Die
Modified MOSFET
Symbol Showing the
Internal Devices
Inductances
- 3.5 - nH
Measured From the Drain
Lead, 6mm (0.25in) From
Package to Center of Die
- 4.5 - nH
Internal Source Inductance L

S

Measured From The
Source Lead, 6mm
(0.25in) From Header to
Source Bonding Pad
- 7.5 - nH
Thermal Resistance Junction to Case R

JC

- - 1.67

o

C/W
Thermal Resistance Junction to Ambient R

JA

Typical Socket Mount - - 62.5

o

C/W
L
S
L
D
G
D
S

IRF9530, RF1S9530SM
2002 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. B

Source to Drain Diode Specications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I

SD

Modified MOSFET
Symbol Showing the In-
tegral Reverse
P-N Junction Diode
- - -12 A
Pulse Source to Drain Current
(Note 2)
I

SDM

- - -48 A
Source to Drain Diode Voltage (Note 2) V

SD

T

J

= 25

o

C, I

SD

= -12A, V

GS

= 0V,
(Figure 13)
- - -1.5 V
Reverse Recovery Time t

rr

T

J

= 150

o

C, I

SD

= -12A, dI

SD

/dt = 100A/

s - 300 - ns
Reverse Recovery Charge Q

RR

T

J

= 150

o

C, I

SD

= -12A, dI

SD

/dt = 100A/

s - 1.8 -

C
NOTES:
2. Pulse test: pulse width



300

s, duty cycle



2%.
3. Repetitive rating: pulse width limited by max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. V

DD

= 25V, starting T

J

= 25

o

C, L = 5.2mH, R

G

= 25

, peak I
AS
= 12A. See Figures 15, 16.
G
D
S
Typical Performance Curves Unless Otherwise Specied
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
T
C
, CASE TEMPERATURE (
o
C)
P
O
W
E
R

D
I
S
S
I
P
A
T
I
O
N

M
U
L
T
I
P
L
I
E
R
0
0 25 50 75 100 150
0.2
0.4
0.6
0.8
1.0
1.2
125
-2.4
0
25 50 100
I
D
,

D
R
A
I
N

C
U
R
R
E
N
T

(
A
)
T
C
, CASE TEMPERATURE (
o
C)
-12.0
150
-9.6
75 125
-4.8
-7.2
t
1
, RECTANGULAR PULSE DURATION (s)
Z

J
C
,

N
O
R
M
A
L
I
Z
E
D
T
H
E
R
M
A
L

I
M
P
E
D
A
N
C
E
10
-3
10
-2
1
10
-5
10
-4
0.01
0.1
10 10
-1
1
SINGLE PULSE
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
JC
+ R
JA
+T
C
P
DM
t
1
0.1
0.02
0.2
0.5
0.01
0.05
t
2
IRF9530, RF1S9530SM
2002 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. B
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS
FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS
NOTE: Heating effect of 2s pulse is minimal.
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Typical Performance Curves Unless Otherwise Specied (Continued)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I
D
,

D
R
A
I
N

C
U
R
R
E
N
T

(
A
)
-100
-1
100s
10s
DC
1ms
100ms
-10 -1
-0.1
-1000
-10
-100
LIMITED BY r
DS(ON)
AREA MAY BE
OPERATION IN THIS
10ms
SINGLE PULSE
T
J
= MAX RATED
T
C
= 25
o
C
I
D
,

D
R
A
I
N

C
U
R
R
E
N
T

(
A
)
0 -10 -20 -30 -40
-4
-8
-12
-16
-20
-50
V
GS
= -8V
V
GS
= -7V
V
GS
= -6V
V
GS
= -5V
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
= -4V
PULSE DURATION = 80s
V
GS
= -10V
V
GS
= -9V
DUTY CYCLE = 0.5% MAX
0
-2
0 -2 -4 -6 -10
-4
-6
I
D
,

D
R
A
I
N

C
U
R
R
E
N
T

(
A
)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-8
-8
-10
V
GS
= -6V
V
GS
= -5V
V
GS
= -4V
V
GS
= -9V
V
GS
= -10V
V
GS
= -8V
V
GS
= -7V
PULSE DURATION = 80s
DUTY CYCLE = 0.5% MAX
0 -4 -6 -8 -10 -2
0
-12
-16
I
D
(
O
N
)
,

O
N
-
S
T
A
T
E

D
R
A
I
N

C
U
R
R
E
N
T

(
A
)
V
GS
, GATE TO SOURCE VOLTAGE (V)
-20
-8
-4
V
DS
I
D(ON)
x r
DS(ON)

125
o
C
25
o
C
-55
o
C
PULSE DURATION = 80s
DUTY CYCLE = 0.5% MAX
0
0.8
-10 -20 -30 -40
r
D
S
(
O
N
)

D
R
A
I
N

T
O

S
O
U
R
C
E
I
D
, DRAIN CURRENT (A)
-50
1.0
0
0.2
0.4
0.6
V
GS
= -10V
V
GS
= - 20V
2s PULSE TEST
O
N

R
E
S
I
S
T
A
N
C
E

(

)
N
O
R
M
A
L
I
Z
E
D

D
R
A
I
N

T
O

S
O
U
R
C
E
2.2
1.4
1.0
0.6
0.2
-40 0 40
T
J
, JUNCTION TEMPERATURE (
o
C)
120
1.8
80
V
GS
= -10V, I
D
= -6.5A
O
N

R
E
S
I
S
T
A
N
C
E
PULSE DURATION = 80s
DUTY CYCLE = 0.5% MAX
IRF9530, RF1S9530SM
2002 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. B
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Typical Performance Curves Unless Otherwise Specied (Continued)
1.25
0.95
0.85
0.75
-40 0 40 80
T
J
, JUNCTION TEMPERATURE (
o
C)
N
O
R
M
A
L
I
Z
E
D

D
R
A
I
N

T
O

S
O
U
R
C
E
B
R
E
A
K
D
O
W
N

V
O
L
T
A
G
E
120 160
1.05
1.15
I
D
= 250A
1000
200
0
0 -20 -50
C
,

C
A
P
A
C
I
T
A
N
C
E

(
p
F
)
600
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
800
400
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
C
DS
+ C
GD
C
ISS
-10 -30 -40
C
OSS
C
RSS
V
GS
= 0V, f = 1MHz
I
D
, DRAIN CURRENT (A)
g
f
s
,

T
R
A
N
S
C
O
N
D
U
C
T
A
N
C
E

(
S
)
0 -4 -8 -12 -16
1
2
3
4
5
-20
T
J
= 125
o
C
T
J
= 25
o
C
T
J
= -55
o
C
0
PULSE DURATION = 80s
DUTY CYCLE = 0.5% MAX
-0.4 -1.0 -1.2 -1.6 -1.8 -0.6
-0.1
-1.0
-10
I
S
D
,

D
R
A
I
N

C
U
R
R
E
N
T

(
A
)
V
SD
, SOURCE TO DRAIN VOLTAGE (V)
-100
-0.8 -1.4
T
J
= 25
o
C
T
J
= 150
o
C
PULSE DURATION = 80s
DUTY CYCLE = 0.5% MAX
Q
g(TOT)
, TOTAL GATE CHARGE (nC)
V
G
S
,

G
A
T
E

T
O

S
O
U
R
C
E

(
V
)
0 8 16 24 40
- 5
0
- 10
- 15
42
V
DS
= -80V
I
D
= -12A
V
DS
= -50V
V
DS
= -20V
IRF9530, RF1S9530SM
2002 Fairchild Semiconductor Corporation IRF9530, RF1S9530SM Rev. B
Test Circuits and Waveforms
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
t
P
0.01
L
I
AS
+
-
V
DS
V
DD
R
G
DUT
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
0V
V
GS
V
DD
V
DS
BV
DSS
t
P
I
AS
t
AV
0
V
GS
R
L
R
G
DUT
+
-
V
DD
t
d(ON)
t
r
90%
10%
V
DS
90%
t
f
t
d(OFF)
t
OFF
90%
50% 50%
10%
PULSE WIDTH
V
GS
t
ON
10%
0
0
0.3F
12V
BATTERY
50k
+V
DS
S
DUT
D
G
I
G(REF)
0
(ISOLATED
-V
DS
0.2F
CURRENT
REGULATOR
I
D
CURRENT
SAMPLING
I
G
CURRENT
SAMPLING
SUPPLY)
RESISTOR RESISTOR
DUT
Q
g(TOT)
Q
gd
Q
gs
V
DS
0
V
GS
V
DD
0
I
G(REF)
IRF9530, RF1S9530SM
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
OPTOLOGIC
OPTOPLANAR
PACMAN
POP
Power247
PowerTrench
QFET
QS
QT Optoelectronics
Quiet Series
SILENT SWITCHER
FAST
FASTr
FRFET
GlobalOptoisolator
GTO
HiSeC
ISOPLANAR
LittleFET
MicroFET
MicroPak
MICROWIRE
Rev. H4

ACEx
Bottomless
CoolFET
CROSSVOLT
DenseTrench
DOME
EcoSPARK
E
2
CMOS
TM
EnSigna
TM
FACT
FACT Quiet Series
SMART START
STAR*POWER
Stealth
SuperSOT-3
SuperSOT-6
SuperSOT-8
SyncFET
TinyLogic
TruTranslation
UHC
UltraFET

STAR*POWER is used under license

VCX
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