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Electromagnetic interference EMI, also called radio-frequency interference or
RFI when in radio frequency is disturbance that affects an electrical circuit due to either
electromagnetic induction or electromagnetic radiation emitted from an external source.
The disturbance may interrupt, obstruct, or otherwise degrade or limit the effective
performance of the circuit. These effects can range from a simple degradation of data to a
total loss of data. The source may be any object, artificial or natural, that carries rapidly
changing electrical currents, such as an electrical circuit, EMI can be intentionally used
for radio jamming, as in some forms of electronic warfare, or can occur unintentionally, as
a result of spurious emissions for example through intermodulation products, and the like.
It frequently affects the reception of AM radio in urban areas. It can also affect cell
phone, FM radio and television reception, although to a lesser extent.
The growth in complexity of modem electronic devices and systems and their
massive diffusion are some of the main factors responsible for the increase of
electromagnetic compatibility (EMC) and electromagnetic interference (EMI). For these
reasons, today great attention is devoted to the analysis of degradation in a devices
performance due to spurious signals associated with electromagnetic interference conveyed
to ICs terminals. As CMOS is the leading technology, a great interest has been devoted to
the design of high-performance CMOS ICs, which may contain several OpAmps. In this
scenario, the study of EM1 induced failures become a relevant issue, especially for modern
integrated mixed digital-analog apparatus and circuits in which, due to the very fast switch
of the digital parts, externally conveyed electromagnetic interference can couple on the
supply rails with interference and skews due to other blocks of the embedded system.
Moreover, EM radiation can affect the outer enclosure of an apparatus and be coupled
through skin aperture to its interior. The resulting internal EM fields induce unwanted
voltages or currents on the system cables which are conducted to the terminals of circuits
and semiconductor devices located inside the electronic equipment which thus act as


unintentional receivers. Traditional design practices typically address EMC when an
incompatibility is discovered in a production prototype. By so doing, fixing problems late
in the design cycle becomes more costly and difficult as the complexity of electronic
system increases, so that it appears necessary to develop some . problems guidelines earlier
in the design phase to reasonably assure a sufficient amount of system robustness against
EMI. When OpAmps are subjected to out-of-band large signals, some devices can operate
well outside their usual operation regions either permanently or in a certain period of time
of the interfering signal. In particular, MOS transistors can be find in cut-off, in
subthreshold or triode regime instead of the expected designed saturation region. Besides,
one can accidentally find forward biased source-bulk or drain-bulk junctions transistors in
complex CMOS topologies. Detailed theoretical and practical studies were carried out to
find the electrical and/or physical origin of circuit failures in OpAmps due to input-
conveyed EMI. For some CMOS and BiCMOS architectures remedies to reduce these
failures were found.
EMI effects can involve many electrical or electronic equipments along with
interconnects. As an example, air- craft might be susceptible to electronic interferences
because of their reliance on radio communication and navigation systems whose
electromagnetic spectrum ranges from 10 kHz (navigation systems) up to above 9 GHz
(weather radar). Furthermore, the massive introduction of electronics in automobiles might
cause many problems: e.g., cellular telephone transmitters can disturb braking systems
(ABS). EMI might arise from inside the automobile as well: e.g., alternator, ignition
system, switching solenoids, electric starter, and lamps, are potential sources of such
disturbances. Nowadays, because of the high density of components packed on printed
circuit boards as well as the increasing speed of mixed analog digital circuits, IC designers
have to consider EMI during their design phase. Neglecting these aspects might lead to
failures on IC induced by spurious signals that might arise from a large class of sources,
including EMI at frequencies outside the working bandwidth of the circuit. Furthermore the
lack of EMI immunity forces the IC de- signers to reduce circuit susceptibility by means of
a posteriori layout adjustments, filters, change in the operating frequency, shielding, etc.,
that are seldom viable and are often complex and expensive. Therefore, in recent years,
EMI were carefully investigated both theoretically and experimentally to find possible


prevention methodologies, in particular in high performance digital/analog IC that might
include several operational amplifiers. The circuits most sensitive to EMI are the analog
ones and, among them, the OpAmps. The interfering signals might propagate mainly in 2
different ways: conduction and radiation. However, considering the chip size and the
working frequencies of possible electronic systems, that act as EMI sources, the conduction
seems at the moment the most relevant way of propagation. Hence, to investigate the EMI
effects on a generic amplifier, the interfering signals should be modeled by a waveform
easily reproducible with a standard function generator
Integrated circuits are often a source of EMI, but they must usually couple their
energy to larger objects such as heatsinks, circuit board planes and cables to radiate
significantly. On integrated circuits, important means of reducing EMI are: the use of
bypass or decoupling capacitors on each active device (connected across the power supply,
as close to the device as possible), rise time control of high-speed signals using series
resistors, and V
filtering. Shielding is usually a last resort after other techniques have
failed, because of the added expense of shielding components such as conductive gaskets.

Fig. 1.1 Sources of EMI/RFI in a System on a Chip (SoC) typical architecture.


The efficiency of the radiation depends on the height above the ground
plane or power plane (at RF, one is as good as the other) and the length of the conductor in
relation to the wavelength of the signal component (fundamental
frequency, harmonic or transient (overshoot, undershoot or ringing)). At lower frequencies,
such as 133 MHz, radiation is almost exclusively via I/O cables; RF noise gets onto the
power planes and is coupled to the line drivers via the V
and ground pins. The RF is then
coupled to the cable through the line driver as common-mode noise. Since the noise is
common-mode, shielding has very little effect, even with differential pairs. The RF energy
is capacitively coupled from the signal pair to the shield and the shield itself does the
radiating. One cure for this is to use a braid-breaker or choke to reduce the common-mode
At higher frequencies, usually above 500 MHz, traces get electrically longer
and higher above the plane. Two techniques are used at these frequencies: wave shaping
with series resistors and embedding the traces between the two planes. If all these measures
still leave too much EMI, shielding such as RF gaskets and copper tape can be used. Most
digital equipment is designed with metal, or conductive-coated plastic, cases.



The effect of growth of electronic industry and its widespread use of electronic
equipment in communications, computations, automations, biomedical, space and other
purposes has led to many Electromagnetic Interference (EMI) problems to the designers as
their systems/subsystems operate in close proximity. It is likely to become more severe in
future, unless designers follow EMI control methodology/ techniques to meet the EMC
requirements during the design stage itself. The elimination or suppression of EMI should
be a prime objective of the designer. In this chapter an attempt has been made to present
technical data and details of various EMI aspects its standards and so on. As the design and
development proceeds, the number of available noise reduction techniques also decreases
and at the same time cost of mitigating noise goes up. Hence selecting a right component
in right time is very essential. This section gives a quick reference to the designer to
reduce the noise at source level in the system during design and development stages by
choosing appropriate component/ device and fixing it correctly into the problem.
Three things can cause an EMI problem: A signal source creates some kind of
noise, there is a transmission path for the noise, and/or there is a receiver sensitive enough
to be distorted by the noise, as shown in Figure 2.1. The noise source can be inside or
outside the circuits. Tackling the noise problem at the source means reducing the emission
levels for example, by lowering noise amplitudes. Different coupling mechanisms exist
for noise, and many EMI countermeasures focus on these; however, they overlook what
can be done at the emitter or receiver. A receiver susceptible to noise injection must exist
in the system if there is an EMI problem. Here, the obvious solution is reducing its



Fig.2 1. EMI sources.
The noise source can be inside or outside the circuits. Tackling the noise problem at the
source means reducing the emission levels for example, by lowering noise amplitudes.
Different coupling mechanisms exist for noise, and many EMI countermeasures focus on
these; however, they overlook what can be done at the emitter or receiver. A receiver
susceptible to noise injection must exist in the system if there is an EMI problem. Here, the
obvious solution is reducing its sensitivity. At this point, a fundamental distinction must be
made between the two types of EMI problems: - Improving EMI so that the design meets
regulations and will pass EMI testing (also called EMC or electromagnetic compliance) -
Improving EMI so that the design works reliably in all modes of operation, with good
efficiency, and does so without being disturbed by other (EMC-compliant) equipment
nearby For the first type, test methods and certified labs exist. For the second type, it is
important to take the design through all design stages, carefully checking to see if poor
EMI design may be the cause of the problem. Here, it is important to consider component
variations. Maybe the components in the prototype are such that no problem is visible, but
the components used in production may cause problems. The four coupling mechanisms
Resistive (or galvanic) coupling: The noise signal is transferred via electrical connections.
This works at all frequencies, and is usually fixed by good layout (particularly the ground


layout) and filtering with capacitors and inductors or lower signal levels with RC elements.
Common impedance coupling can be classified as galvanic coupling.
Capacitive coupling: Electrical fields are the main transmission path. Capacitance levels
are mostly small so this affects small signals and/or high frequencies. Shielding the source
using thin conductive layers is most effective.
Inductive coupling: This transmission path is quite common in switched-mode power
supplies since high- frequency currents in the inductors can cause strong magnetic fields at
higher frequencies, where the coupling factors can be higher. Magnetic shielding is less
effective than electric shielding since the absorption depth is smaller, requiring thicker
materials. Inductive coupling is best addressed at the source.
Wave coupling: Here, the noise typically has a high frequency, and is transmitted via an
electromagnetic wave. It does not play a major role in power supplies, since frequencies are
not high enough, and can be damped very effectively with shielding. this section focuses on
capacitive, resistive, and inductive coupling; as they are the most important sources of EMI
issues in power electronics applications. It is generally accepted industry practice to
consider conducted EMI below 30MHz, radiated EMI above 30MHz, and in most cases up
to 1GHz exceptions do exist, however.
Coupling modes cannot be treated in isolation since ideal elements exist only in
simulators, not in real life. Parasitic elements are always present. The parasitic capacitors
and inductors contribute to the problem, as parts of tank circuits that will resonate when
stimulated by a voltage or current edge. The parasitic tanks help to convert one coupling
mode into another, and that is why coupling modes cannot be analyzed and fixed in
isolation. The third parasitic element, resistance, actually helps to ease the problem by
damping the resonant oscillation. Using the amplitude change from peak to peak can help
to calculate the parasitic resistance, identify it in the circuit, and optimize the circuit



As electrical consumers moved from simple light bulbs to large motors and
particularly to switched-mode power supplies with rectifiers and capacitors at the inputs,
the quality of the grid voltage and service worsened. This led to the emergence of
worldwide standards to mitigate these problems. Two considerations of these standards are:
- Limit the amount of emission (radiated/conducted) which a given application generates -
Define the minimum immunity levels (radiated/conducted) a given application must
tolerate without malfunction .The list of standards is very long. The common theme is that
certain standards define the limit values and their measurement methods and conventions,
and additional documents define the regulations for classes of applications in more detail.
Additionally, standards can be grouped into local/regional standards, MIL standards,
automotive standards, standards for the aircraft industry, for physically large equipment,
and for more specialized equipment (e.g. smart meters). The two most important standards
for power supplies are EN550xx and EN61000. Applications connected to the grid must
comply with both. The first covers EMI limits for various applications, defining the
measurement methods in more detail for both conducted and radiated EMI, defining limit
values, and mostly considering the high frequency content the application generates. The
following list gives an overview:
CISPR11, EN55011 for industrial, medical, scientific applications
CISPR13, EN55013 for consumer applications
CISPR14, EN55014 for home appliances, power tools, involving motion
CISPR15, EN55015 for lighting equipment
CISPR22, EN55022 for computing applications
The standard CISPR16 / EN55016 defines the measurement method for the
applications listed above and is central to all of them. The standard EN61000 (or 61k) is
the PFC standard and considers the line frequency harmonics a given application
generates, up to the 40th harmonic frequency or 2kHz and below. Extension of the standard
to consider interharmonics up to 9kHz is in discussion. No defined impedance is used with


the standard but the harmonic current content generated by the application is measured and
appropriate limits defined. Using a defined impedance to measure the harmonic current is
not required today, but is also under discussion. The standard 61k-3-2 defines the limits
for applications <16A, and 61k-3-12 for 16A75A current consumption. The standard
61k-4-7 defines the measurement and evaluation method. Additional 61k standards define
the behavior for voltage and frequency variations, immunity to conducted and radiated
radio frequency signals, fast voltage transients, surges, voltage dips / drops, short
interruptions and flicker, and magnetic fields. For the standard 61k, the equipment typically
is grouped into different classes, with professional equipment above 1000W power
consumption still being excluded. Different limit levels exist for the different classes. In
most cases, a good PFC circuit is sufficient to meet the 61k regulations. Circuits that have
just an input rectifier and capacitor connected directly to the mains may not be able to meet
the requirements without a PFC. It is also important to note that 61k requires repeatability
of the test results, within 5%.
Related to the design of practical electric and electronic appliances on one
hand, and to the general electromagnetic principles and theory on the other hand, EMC is
an interdisciplinary scientic domain that has introduced and maintained its own typical
vocabulary, conventions, denitions and design guidelines over the years. As stipulated,
the major focus in this work lies on the design of analog integrated circuits exhibiting a
high degree of immunity against electromagnetic interferences. This section therefore
concentrates on the general EMC issues which appear at IC level. Standardized
measurement methods were developed in order to simulate as well as replicate in
measurements the appearing EMC incompatibilities in integrated circuits. Using these
measurement methods to evaluate the EMC behavior of ICs as such, does not require an
in-depth knowledge of EMC or electro- magnetism. Quite in the same way, numerous
EMC-friendly design guidelines describe what should be done in order to eliminate or at
least alleviate EMC problems in electronic circuits (although the vast majority of these
guidelines are solely addressing the PCB level design). One may wonder if these design
guidelines can not be used as such, without any theoretical EMC knowledge.


The answer to this question is of course a matter of opinion: however, the
bottom line is that using established measurement methods and corresponding design
guidelines without any notion of where theyre coming from or what restrictions they
intrinsically contain, proves very often to be unfruitful and thought-constricting. Especially
the latter is very undesirable since it impairs the exibility and creativity which is required
when designing electronic circuits. Electromagnetism is a scientic discipline which is
unfortunately still commonly considered to be a standalone subject, dealing with antennas,
trans- mission lines and radio waves, and therefore not directly tied to electricity and
electronics. However, its impact on EMC is fundamental and profound, and its basic laws
lie at the bottom of so-called rule of thumb EMC-friendly design guidelines as well as of
the established and standardized measurement methods . It is for this reason important to
devote some attention to the links which exist between electromagnetism and EMC at IC
level. Of course, this subject is in itself much too elaborate to be covered in full in this
work. For this reason, the most basic concepts are discussed and presented in this chapter,
offering a glimpse of what lies beyond the common rules of thumb and accepted
measurement methods. This section starts with a general classication of EMC
terminology, and describes some frequent and palpable sources of electromagnetic
disturbances. Next, a section is devoted to the link existing between electromagnetism and
EMC-friendly integrated circuit design. Afterwards, the EMC issues in ICs are briey
discussed, and the main differences between digital and analog circuits are covered from a
conceptual point of view where EMC is concerned. Finally, existing measurement methods
for simulating and testing the electromagnetic susceptibility of integrated circuits are
shortly reviewed.
It is useful at this point to make a symbolic link between the elegant and
complex theory of electromagnetism on one hand, and the intricate as well as exciting
discipline of analog integrated circuit design on the other hand. Without doing so, the sense
behind the accepted EMC measurement methods as well as widely recognized so-called
EMC rule of thumb design rules is quickly lost, as has been motivated at the beginning. A
basic understanding of how both worlds tie into each other is quasi-mandatory. This is


however not possible to accomplish without refreshing fundamental electromagnetic
concepts, necessitating a vast array of calculations .Inorder to t the present material ,the
results of the computations are referred to but their derivation is omitted here: these exact
analytical derivations can, however, be looked up in detail in the cited reference works.
Simply stated, all equipment which is using electricity or electromagnetic waves in its
operation is fundamentally governed by physical laws which are elegantly merged and
expressed in Maxwells equations. In order to design and to understand the working of
such equipment, Maxwells equations or simplications thereof (e.g. Ohms law) are used,
but only for the desired operation of the device. Indeed, owing to the huge amount of
required calculations, it is usually not reasonable to examine all the possible
electromagnetic interactions and couplings which are taking place in an arbitrary practical
piece of equipment at the same time .Therefore, when considering and improving the EMC
behavior of an electronic circuit, a set of design guidelines based on Maxwells equations
which minimize the likelihood of incompatibility occurrences must be used.

(Roberto Pelliconi STMicroelectronics Via C. Olivetti 2 2004 1 Agrate
NICOLO SPACIALO DEIS University of Bologna Viale Risorgimento 2 40
136 Bologna ITALY)

The growth in complexity of modem electronic devices and systems and their
massive diffusion are some of the main factors responsible for the increase of
electromagnetic compatibility (EMC) and electromagnetic interference (EMI). For these
reasons, today great attention is devoted to the analysis of degradation in a devices
performance due to spurious signals associated with electromagnetic interference conveyed
to ICs terminals. As CMOS is the leading technology, a great interest has been devoted to


the design of high-performance CMOS ICs, which may contain several OpAmps. In this
scenario, the study of EM1 induced failures become a relevant issue, especially for modern
integrated mixed digital-analog apparatus and circuits in which, due to the very fast switch
of the digital parts, externally conveyed electromagnetic interference can couple on the
supply rails with interference and skews due to other blocks of the embedded system.
Moreover, EM radiation can affect the outer enclosure of an apparatus and be coupled
through skin aperture to its interior. The resulting internal EM fields induce unwanted
voltages or currents on the system cables which are conducted to the terminals of circuits
and semiconductor devices located inside the electronic equipment which thus act as
unintentional receivers.
Traditional design practices typically address EMC when an incompatibility is
discovered in a production prototype. By so doing, fixing problems late in the design cycle
becomes more costly and difficult as the complexity of electronic system increases, so that
it appears necessary to develop some guidelines earlier in the design phase to reasonably
assure a sufficient amount of system robustness against EMI. When OpAmps are subjected
to out-of-band large signals, some devices can operate well outside their usual operation
regions either permanently or in a certain period of time of the interfering signal. In
particular, MOS transistors can be find in cut-off, in subthreshold or triode regime instead
of the expected designed saturation region. Besides, one can accidentally find forward
biased source-bulk or drain-bulk junctions transistors in complex CMOS topologies.
Detailed theoretical and practical studies were carried out to find the electrical and/or
physical origin of circuit failures in OpAmps due to input-conveyed EMI. For some CMOS
and BiCMOS architectures remedies to reduce these failures were found .Nevertheless, up
to now, less effort has been devoted to the analyses of failures induced from
electromagnetic interference conveyed to the power-supply rails of integrated operational
amplifiers .In this work, with particular reference to the classic two-stage CMOS OpAmp,
will report results regarding interference conveyed to both positive and negative supply
rails and will suggest a compensation technique that allows a strong increase in IC
In this work we study, from an electrical point of view, the behaviour of a
CMOS operational amplifier when electromagnetic interference EMI) are conveyed to the


supply rails. In particular, with reference to the classical two-stage CMOS topology, we
will show that amplifier undergoes strong failures when is subjected to EM1 conveyed to
the positive supply, while it is only moderately sensible to interference conveyed to the
negative supply. Finally, through detailed circuit analyses and extensive circuit
simulations, we will demonstrate the electrical origin of such failure and suggest a
compensation technique that allows a strong increase in IC reliability.
Thus investigated the influence of EM1 conveyed at the supply rails of the two
stages CMOS operational amplifier. On the basis of many circuit simulations and
theoretical analysis, we have recognised a limited subset of capacitive effects responsible
for the described effects and we have demonstrated the origin of the observed failure
induced by a sinusoidal signal representing EM interference. In particular, we have
proposed a simple compensation network that permits to get both satisfactory general
OpAmp characteristics and a low susceptibility to EMI- induced interference. Moreover,
the chosen values for input capacitances decrease the asymmetric behaviour at high
frequencies and permit to reduce EM1 susceptibility to input- conveyed interfering signals
as well .
(Paolo S. Crovetti1 and Franco Fiori2 Dipartimento di Elettronica, Politecnico di Torino
corso Duca degli Abruzzi, 24 10129 Torino (Italy) 1paolo.crovetti@polito.it
The steady increase of environmental electromagnetic pollution has constantly
raised the level of RF interference (RFI) superimposed onto nominal signals in present-day
integrated circuits (ICs) and a high immunity to EMI has consequently become a
mandatory requirement for any micro- and nano-electronic product. In such a scenario, the
susceptibility to RFI of operational amplifiers (opamps), whose input differential pair
demodulates RFI and translates it into a DC offset and/or baseband distortion, is a serious
concern in microelectronic design . To this purpose, several opamp input stages immune to


Electromagnetic Interference (EMI) have been proposed in the literature over the last
years. The baseband electrical performance of these circuits, however, is typically worse
with respect to standard opamps, especially for what concerns bandwidth and/or phase
margin. In this paper, a novel opamp input stage, which exploits negative feedback to
achieve a robust compensation of RFI- induced distortion, is proposed. Such a circuit has
been employed to design a CMOS opamp which has been fabricated by a 0.35um CMOS
technology. According with both computer simulations and EMI susceptibility
measurements, the designed opamp is much more immune to EMI with respect to a
standard opamp and does not show any remarkable penalty in baseband performance. The
effects of RFI in an MOS device are revised and the RFI compensation mechanism, on
which the novel opamp input stage is based, is described Then, the design of the novel
opamp input stage, which is intrinsically immune to EMI, is addressed. In the same
Section, the design of a CMOS opamp which includes the novel input stage, is also
Thus a novel CMOS Operational Amplifier input stage which is robust to high
power electromagnetic interference (EMI) without any significant penalty in baseband
performance is presented and its operation principle is discussed. An opamp which
includes the new input stage is proposed and it is compared in terms of immunity to EMI
with a standard opamp circuit on the basis of computer simulations and experimental
A new opamp input stage which is robust to high power EMI has been
proposed and its operation principle has been discussed. An opamp circuit, which includes
the new input stage, has been designed and compared with a standard Miller opamp.

(Alfred Hesener)
In power supplies, the two prominent types of EMI are conducted EMI and
radiated EMI. Comprehensive regulations provide limitations to radiated and conducted
EMI generated when the power supply is connected to the mains. Comparing the modern
power switches used in power supplies with those from older generations, the new switches


have significantly reduced switching times, leading to faster and faster rise and fall times
for the voltage and current waveforms. These fast edges produce significant energy at
surprisingly high frequencies, and are the root cause of all EMI problems in switched-mode
power supplies. This high frequency energy causes ringing in all the resonant tanks, small
or large, that exist within the power supply. In general, this wringing does not cause
problems; however, in some cases, this may stop the power supply from working properly
or passing tests. Faster switching also means that losses can be reduced, improving the
efficiency of the power supply. But faster switching should also enable higher switching
frequencies, ultimately leading to smaller passive components and better transient behavior
a promise that has not been realized. The main reasons for this are the cost of
transformers for use at these frequencies and the disproportional complexity of solving
high frequency EMI problems. Resonant and quasi-resonant topologies offer an elegant
way out of this dilemma. They have been around for a long time, but due to limitations,
they have not been widely accepted. The sensitivity to load and line regulations can limit
their usage and parameter variations of passive components can make series production
difficult and expensive. Further, for some stages of the power supply (e.g. secondary side
post- regulation) a resonant version does not really exist. It is only with todays modern
control ICs that quasi-resonant power supplies show their potential while maintaining good
EMI performance. So it is not surprising that more and more designs are using this
topology. Given these new developments, it is clear that EMI performance can no longer be
considered only after the main power supply design is finished. It needs to be designed into
the power supply right from the start at specification level, just like reliability and safety,
influencing topology and component selection. The goal is to meet EMI regulations while
not disturbing other applications nearby. The power supply should also be self-compliant
and tolerate a certain amount of EMI from the outside. This paper will show how to
embed EMI considerations throughout the entire design cycle. The intent is to give the
power supply designer a good understanding of the problem and an overview of the
measures that can be taken while designing and testing the power supply, to improve time
to market and to come up with a robust design. It is not a comprehensive overview on the
topic, as a large amount of good literature exists already.


Increasing power density, faster switching and higher currents forces designers
to spend more time both considering the effects of electromagnetic interference (EMI) and
debugging a design that has EMI problems but is otherwise complete. This paper explains
the different types of EMI and their coupling mechanisms and the existing EMI
regulations. The most frequent noise sources, transmission paths and receiver sensitivity
are examined. Based on real designs and measurements, specific procedures are
recommended for use throughout the design cycle, to make the power supply work reliably
and pass EMI testing.
As long as voltages and currents are being switched, EMI will be generated and
need to be addressed. This implies that there will never be a silver bullet just
improvements to the situation to arrive at an acceptable compromise. Once the basic
mechanisms are understood, it is easier to analyze and re-engineer a given power supply to
improve its behavior and really exploit all the performance advantages of modern power

(Fridolin Michel Michiel Steyaert)
The increasing number of electromagnetic sources like mobile phones and
wireless sensor networks have caused industry to create stringent standards for
electromagnetic compatibility (EMC) of analog circuits to guarantee nominal operation in
harsh environments of high frequency electromagnetic interferences. While there exist
many different ways, how electromagnetic disturbances can interfere with a circuit,
conducted EMI has turned out to be the most severe, since PCB tracks easily catch up
interferences and conduct them to the package pins, while the tiny dimensions of on-chip
structures luckily form poor antennas for radiated EMI . Current commercial solutions
mainly focus on the printed circuit board (PCB) level and employ bulky ltering
capacitances, shielding, etc. to combat EMI signals. This approach comes with two major


1. Large off-chip ltering capacitors prevent integration of several blocks on a
single chip and therefore increase area and cost signicantly.
2. No general solution is realized. The EMC problem has rather to be solved
depending on the PCB board and overall topology, which usually results in multiple
redesigns both on the circuit and the PCB level in order to meet the EMC specications.
This in turn delays the time to market and thus again results in higher overall costs.
In contrast, if EMC issues are solved on the circuit level during the design
phase, EMC specications are much easier to meet, since the dependence on the board
topology is strongly reduced. In consequence, the man power, required in the post layout
phase is drastically reduced, resulting in lower overall costs and shorter time to market. In
order to make analog integrated circuits less vulnerable to EMI, the most sensitive building
blocks have to be determined and revised. As differential ampliers often build the rst
stage in an analog signal processing chain and amplify small input signals to higher voltage
levels appropriate for further analog or digital processing, they mostly determine the
maximum achievable signal to noise ratio. Consequently, they have to provide high
performance in terms of noise and DC gain. Because any EMI signal might deteriorate
these performance values it is crucial to pay special attention to the EMI susceptibility of
differential ampliers. Therefore, this work investigates differential input topologies, that
provide EMI immunity on the circuit level and compares their EMI induced offset from the
gain bandwidth (GBW) up to 10 GHz. then explains the effect of EMI signals on
differential ampliers, the simulation setup is presented where several EMC solutions are
introduced and simulated with the same basic amplier performance for later comparison.



There are many forms of electromagnetic interference, EMI that can affect
circuits and prevent them from working in the way that was intended. This EMI or radio
frequency interference, RFI as it is sometimes called can arise in a number of ways,
although in an ideal world it should not be present.
EMI - electromagnetic interference can arise from many sources, being either
man made or natural. It can also have a variety of characteristics dependent upon its source
and the nature of the mechanism giving rise to the interference.
By the very name of interference given to it, EMI is an unwanted signal at the
signal receiver, and in general methods are sought to reduce the level of the interference.
Many denitions are applicable in order to describe the principle of electro-
magnetic compatibility (EMC). The denition rendered here is the one offered as it stands
out because of its clearness and its unambiguity. Electrical and electronic devices are said
to be electromagnetically compatible when the electrical noise generated by each does not
interfere with the normal performance of any of the others. Electromagnetic compatibility
is that happy situation in which systems work as intended, both within themselves and
within their environment. When there is no EMC, this is due to electromagnetic
interference (EMI). EMI is said to exist when undesirable voltages or currents are present
to inuence adversely the performance of a device. These voltages or currents may reach
the victim device by conduction or by electromagnetic eld radiation.
This last precision is not superuous, and a clear distinction between these two
interference types must be made. To be precise, the term radiated interference in the
above denition comprises two phenomena, namely near eld coupling and far eld
radiation. This distinction is important and not a purely academic categorization. When
there is EMI, there is at least one EMI source causing an intolerable emission (be it
conducted, near eld coupled or far eld radiated), and possibly one or more EMI victim(s)


which for one or more reasons is (are) susceptible to the emanated disturbance.
Electromagnetic emission (EME) is described by the International Electrotechnical
Commission (IEC) as [IEV]: The phenomenon by which electromagnetic energy emanates
from a source. In the same way, the IEC describes electromagnetic susceptibility (EMS) as
[IEV]: The inability of a device, circuit or system to perform without degradation in the
presence of an electromagnetic disturbance. Susceptibility is complementary to immunity,
the latter describing to what extent EMI may be injected into a system before failures start
to occur. Because the acronym for electromagnetic immunity would conict with the one
used for electromagnetic interference, this term is not abbreviated in this work: when used
in the text, immunity always signies the opposite of susceptibility. Care must be taken
when using the concepts of immunity and susceptibility without distinction, since this
easily leads to confusion. These four different phenomena and the way they are related to
each other are represented.
Three sources of electromagnetic interference Nature contributes to
electromagnetic pollution primarily by atmospheric noise (which is amongst others
produced by lighting during thunderstorms) and cosmic noise. Lightning induces
electromagnetic emissions which propagate over distances ranging up to several thousand
kilometers, causing spikes or sharp random pulses in the electromagnetic spectrum. The
spectral components of lightning span a wide range of frequencies, from a few Hertz to
well over 100 MHz .Cosmic noise is a composite of noise sources comprised of Cosmic
microwave background radiation: discovered by Arno Penzias and Robert Wilson in 1965,
the cosmic microwave background radiation conrms the Big Bang theory which has been
predicted by George Gamow in cosmology, and it constitutes the radio remnant of the
origin of our universe. The background radiation is isotropic, and it has a thermal black
body spectrum at a temperature of 2.725 Kelvin. Its spectrum peaks at a frequency of 160.2
GHz 1.
Solar radio noise: is proportional to solar activity and the generation of solar
prominences and ares. Satellite observations have demonstrated that X-ray and ultraviolet
emissions are especially intense in the heart of solar ares.


Galactic noise: with similar characteristics as thermal noise, it seems to come
most strongly from the Sagittarius constellation. This complex radio source at the center of
our Galaxy is identied as Sagittarius A, and it could equally be a plausible location for a
supermassive black hole which astrophysicists believe is at the center of our galaxy.
Several other natural noise sources and their corresponding emission spectra
are enumerated]. Unsurprisingly, most pollution be it environmental or electromagnetic is
man-made. Engine ignition in automotive devices, AC high-voltage power lines,
microwave ovens, electric motors, communication transmitters, all these appliances,
applications and systems contribute to an electromagnetically polluted radio spectrum
.These electromagnetic disturbances span a very broad frequency range, ranging from a
few tens of Hz (typically 5060, depending on the frequency of the power grid) to tens of
GHz (frequency bands of modern communication systems). Extensive listings of man-
made electromagnetic noise sources, intentional as well as unintentional, functional as well
as nonfunctional. The threat associated to the criminal and covert use of intentional EMI
has been discussed and illustrated with some examples and banana skins in respectively .
EMI - Electromagnetic Interference can arise in many ways and from a number
of sources. The different types of EMI can be categorised in a number of ways.
One way of categorising the type of EMI is by the way it was created:
Man-made EMI: This type of EMI generally arises from other electronics circuits,
although some EMI can arise from switching of large currents, etc.
Naturally occurring EMI: This type of EMI can arise from many sources - cosmic
noise as well as lightning and other atmospheric types of noise all contribute.
Another method of categorising the type of EMI is by its duration:
Continuous interference: This type of EMI generally arises from a source such as a
circuit that is emitting a continuous signal. However background noise, which is


continuous may be created in a number of ways, either manmade or naturally
Impulse noise: Again, this type of EMI may be man-made or naturally occurring.
Lightning, ESD, and switching systems all contribute to impulse noise which is a form
of EMI.
It is also possible to categorise the different types of EMI by their bandwidth.
Narrowband: Typically this form of EMI is likely to be a single carrier source -
possibly generated by an oscillator of some form. Another form of narrowband EMI is
the spurious signals caused by intermodulation and other forms of distortion in a
transmitter such as a mobile phone of Wi-Fi router. These spurious signals will appear
at different points in the spectrum and may cause interference to another user of the
radio spectrum. As such these spurious signals must be kept within tight limits.
Broadband: There are many forms of broadband noise which can be experienced. It
can arise from a great variety of sources. Man-made broadband interference can arise
from sources such as arc welders where a spark is continuously generated. Naturally
occurring broadband noise can be experienced from the Sun - it can cause sun-outs for
satellite television systems when the Sun appears behind the satellite and noise can
mask the wanted satellite signal. Fortunately these episodes only last for a few minutes.
Electromagnetic interference (EMI) is becoming a greater concern for both
system designers and application engineers as more electronic applications move to
wireless communication platforms. Today's applications are using denser component
spacing, placing mixed-signal analog and digital devices even closer together. EMI can
have detrimental effects in these systems. Fortunately, the issue of EMI is receiving more
attention and being addressed, resulting in circuit design techniques and semiconductor
products that offer increased EMI immunity.
EMI susceptibility and immunity tests have been in place for many years.
These tests are intended to help determine if a product will show robust EMI performance
once in production. In many cases, these tests are often required to ensure that the products
meet certain compliance specifications and regulatory requirements before shipment to


customers and original equipment manufacturers. This testing can prove to be time-
consuming and costly; therefore, it is desirable to achieve high initial pass rates. Often,
EMI testing must be performed at an accredited laboratory that has the proper equipment,
and multiple visits are typically required to resolve compliance failures. Consequently,
board and system-level designers should be concerned with EMI at the beginning of the
design process. Development and production of devices that deliver excellent EMI
performance, complemented with designs that apply good layout and shielding techniques,
result in excellent EMI immunity.
The EMI immunity of operational amplifiers (op amps) is very important
because op amps are found in a tremendous range of circuits where they are used to
amplify and condition signals. Texas Instruments has begun to address this issue by
designing op amps and other linear devices with input EMI filters to increase EMI
immunity. The initial effectiveness of these EMI filters has been qualitatively observed
when compared to parts without the EMI filter. Texas Instruments now has the ability to
accurately measure and specify a quantitative op amp metric for EMI immunity, known as
the EMI rejection ratio. The EMIRR metric allows op amps to be directly compared in
terms of EMI immunity. Equipped with this information, designers can now select the best
performing devices for EMI-sensitive applications. This approach offers board and system-
level designers a significant advantage and helps avoid the costly expenses of additional
design cycles.
EMI can enter a system (or device) through either conduction or radiation, or
both. Radiated EMI is not discussed in detail here, because all interfering EMI signals are
eventually converted to conducted EMI. Radiated EMI is most often conducted by printed
circuit board (PCB) traces or wires that lead to active devices such as op amps. The
physical length of these traces and wires can make them effective antennas at microwave
and radio frequencies (RF). Additionally, EMI-sensitive devices may be placed within a
shielded container that highly attenuates such radiated signals. In these cases, the wires and


connections in and out of the container form the only conduction path for the EMI signals
into the devices.
Conducted EMI, on the other hand, can originate from several. In addition to
radiated EMI signals, conducted EMI may enter a system through the power mains or may
be generated by the system itself. Switching power supplies, for example, can be a source
of EMI. Return currents from one circuit to ground can couple into another circuit if both
circuits share a common impedance to ground (also known as ground bounce), as
illustrated in Figure 1.

Fig3.1 Common impedance to ground
EMI can also be generated inside a system by fast-changing data and clock
signals that capacitively or inductively couple to a neighboring circuit. Fast voltage
transients in circuits similar to that shown in Figure 2 can cause displacement currents in
nearby capacitively coupled circuits. Fast current transients can also inductively couple
elsewhere in the circuit, and induce voltages across conductors that form current loops as
modeled in Figure 3. EMI threats can come from both external and internal sources in a
system; therefore, decoupling and filtering are employed at all interfaces to the outside
world and often directly at the sensitive devices.
There are many ways in which the electromagnetic interference can be coupled
from the source to the receiver. Understanding which coupling method brings the
interference to the receiver is key to being able to address the problem.


Radiated: This type of EMI coupling is probably the most obvious. It is the type
of EMI coupling that is normally experienced when the source and victim are
separated by a large distance - typically more than a wavelength. The source
radiates a signal which may be wanted or unwanted, and the victim receives it in a
way that disrupts its performance.

sec 4

Conducted : Conducted emissions occur as the name implies when there is a
conduction route along which the signals can travel. This may be along power
cables or other interconnection cabling. The conduction may be in one of two
Common mode: This type of EMI coupling occurs when the noise appears in the


same phase on the two conductors, e.g. out and return for signals, or +ve and -ve for
power cables.
Differential mode: This occurs when the noise is out of phase on the two
conductors.The filtering techniques required will vary according to the type of EMI
coupling experienced. For common mode lines are filtered together. For differential
mode they may be filtered together.
I nductive coupling: What is normally termed inductive coupling can be one of
two forms, namely capacitive coupling and magnetic induction.
Capacitive coupling : This occurs when a changing voltage from the source
capacitively transfers a charge to the victim circuitry.
Magnetic coupling: This type of EMI coupling exists when a varying magnetic
field exists between the source and victim - typically two conductors may run close
together (less than apart). This induces a current in the victim circuitry, thereby
transferring the signal from source to victim.
By determining the form of coupling that exists and the way in which it is
reaching the victim, it may prove to be that the most effective method of reducing the EMI
is by putting measures in place to reduce the coupling and reduce the level of interference
to an acceptable level.
Electromagnetic interference, EMI is present in all areas of electronics. By
understanding the source, the coupling methods and the susceptibility of the victim, the
level of interference can be reduced to a level where the EMI causes no undue degradation
in performance.
3.5 How EMI Affects Op Amps
The most common op amp response to EMI is a shift in the dc offset voltage
that appears at the op amp output. Conversion of a high-frequency EMI signal to dc is the
result of the nonlinear behavior of the internal diodes formed by silicon p-n junctions inside
the device. This behavior is referred to as rectification because an ac signal is converted to


dc. The small RF signal rectification generates a small dc voltage in the op amp circuitry.
When this rectification occurs in the op amp signal path, the effect is amplified and may
appear as a dc offset at the op amp output. Figure 4 shows an oscilloscope screenshot of an

Fig 3.2 Oscilloscope Image of Opamp out[ut and input
op amp output shift that occurs as an RF signal is applied to the op amp input. This effect is
undesirable because it adds to the offset error; therefore, EMIRR is a useful metric to
describe how effectively an op amp rejects rectifying EMI.

This section discusses the sources of electromagnetic interference (EMI). It
describes how designs with gas arrestors, a varistor, suppressor diodes, chokes and ferrites,
capacitors, or series resistors protect equipment. Methods for EMI testing are described.
More and more aspects of our lives depend on the uninterrupted operation of
electronic equipment and appliances. "Drive by wire" and "fly by wire" have become
everyday realities. In automated plants and high-availability systems especially, electronic
equipment that fails to operate correctly can cause enormous damage and disruption.
The ideal electronic circuit should be free of active electromagnetic interference (EMI, also
called RFI or radio frequency interference) sources and passively immune to disturbances
from outside. The task of minimizing active sources is probably easier than protecting
against interference. Common techniques to minimize EMI are line filtering, power-supply
design, proper layout, and shielding the enclosure. Electrical disturbances can be conducted


by the power lines or conveyed through the air by capacitive, magnetic, or electromagnetic
radiation. Typically, the interference conducted over signal lines connected to the
equipment is the most difficult to manage. In any case, one must distinguish between the
need to protect against damage or malfunction, and the need to prevent signal or
data distortion, for example from a disruption in the sequence of a microcontroller
program. The first problem is attacked with hardware design, the second with software
algorithms. This section addresses the means for protecting equipment against the intrusion
of harmful voltages and currents.
3.6.1 Guidelines for Regulating EMI
Recognizing the importance of EMI, governmental bodies early undertook the
task of enforcing equipment compatibility through regulations. IEC 61000-4, for example,
standardizes test methods. Sections relevant to this discussion include IEC 61000-4-2
for electrostatic discharge(ESD), IEC 61000-4-4 for fast transients (FTB), and IEC 61000-
4-5 for high-energy transients (SURGE). All of these test methods rely on realistic model.
Before applying any protective elements, consider these basic rules:
EMI protection should be considered while designing the circuit, not added
Block disturbances as near to the source as possible, preferably before they enter
the equipment; redirect them to ground.
All sections that can be exposed to EMI disturbance, even electrically isolated
sections, should be located as far as possible from sensitive circuitry.
Because signal circuitry cannot withstand kilovolt-level voltages, such
disturbances must be excluded from the input, converted to current, and then to heat.
Ground-loop currents, which can enter an interface and run throughout the circuit, are often
thwarted with galvanic isolation. Isolation is especially useful for the longer lines and high
ground-loop currents that can occur in industrial systems..An ESD current pulse of 30A
peak may produce only tens of millivolts of resistive voltage drop on a ground trace.
However, its extremely steep rise time (> 30A/ns) can induce hundreds of volts of
inductive drop on the same trace (assuming roughly 1nH/cm of wire inductance)more


than sufficient to cause data errors. Skin effect applies at these high frequencies; it
increases wire resistance dramatically by forcing current to flow only within microns of the
conductor surface. To counteract this effect, ground connections need a large surface area
to maintain low resistance. Fast rise times can enable capacitive coupling of FTB and ESD
disturbances from noisy sections to supposedly quiet ones. In this context, a frequent
mistake is made when designers provide galvanically isolated supplies by adding windings
to the main power-supply transformer. This arrangement allows "infected lines" (ground
returns for the external signal) to contaminate the entire circuit .
Other commonly used EMI-protection components are described below.
Gas arrestor - is a kind of dish-shaped capacitor filled with gas, frequently neon.
Overvoltage in excess of ~100V creates a plasma that limits the voltage at low levels and
carries high currents. Gas arrestors absorb high-level transients, but are not suitable for fast
transients because the emergence of plasma takes some time. They are not suitable for
mains protection and are difficult to use with low-source impedances..

Varistor - is an arrestor made with metal oxide (mostly zinc), usually shaped like a tablet
with two connectors , one on each side. Behaving similar to a zener diode, a varistor
responds much faster than the gas arrestor, but exhibits high leakage currents especially
when the signal approaches the clamping voltage.
Suppressor (TransZorb) diodes are used to limit fast transients at low voltage level.Their
power-dissipation capability is limited according to their form factor. As forvaristors, they
exhibit significant leakage currents in the vicinity of their breakdown voltage. Junction
capacitance is also significant, so in fast systems they are usually decoupled with diode
ESD structures are novel designs that behave somewhat like diacs. These designs are
integrated in the MAX202E, MAX485E, other RS-232/RS-485 transceiver ICs, and
recently in analog multiplexers such as the MAX4558. Exhibiting low capacitance and low
leakage currents, they are suitable for both ESD and FTB protection.
Chokes, ferrites can attenuate high frequency and fast voltage peaks, but do not absorb
much energy. Beware of resonant effects, and always use with attenuating capacitors


(commonly an LC filter in a T-structure). An inductor manufacturer usually specifies the
self-resonant frequency (SRF). The SRF comes from the parasitic capacitance of an
inductor that cancels out the inductance when operating above the SRF. For better
performance, use an inductor as an RF choke below its SRF, and never above the SRF.
These devices are frequently used to protect against common-mode disturbances and for
mains filtering.
Capacitors are perhaps the most important protective element. A capacitor's important
features are equivalent series resistance (ESR), inductance, high-current capability, and
voltage capability. Proper placement of capacitors in the layout is crucial to minimizing
EMI. When used properly, capacitors create a high-frequency ground to from a lowpass
filter, bypassing the RF signal to ground. Capacitors also have a self-resonant frequency, a
point at which it becomes inductive. Just like an inductor, a capacitor should be used below
its SRF. Another way to understand this is to make sure that the SRF is much higher than
the frequency of noise that needs to be filtered.
Series resistors are also among the most important and lowest cost protective elements.
Properly selected according to resistance and power dissipation, series resistors can replace
more costly elements with comparable results.
Good layout design can minimize the effects of EMI. Fast switching currents
generate the magnetic field, and fast changing voltages create the electric field that can
result in undesired coupling. Electromagnetic coupling can be minimized with the use of
good grounds and shield cases. Proper placement of vias is always a good practice. Have
multiple vias for bypass capacitors because multiple vias reduce resistance and inductance.
Also, avoid a ground that has an unstable ground-voltage potential. Traces that carry high-
frequency signals generate a time-varying electromagnetic wave that can propagate the
cause of interference. Two traces at a 90-degree angle result in the least interference
between the two signals. A good case ground also helps prevent outside signals from
entering the system. This, in turn, shields the circuit. The following examples illustrate use
of these components, some working principles, and possible pitfalls.



3.6.2 Thermocouples
Thermocouple signals offer the advantage of quasistatic processing. To guard
against signal distortion by ground-loop currents, most thermocouple applications provide
galvanic isolation between the signal-acquisition and signal-processing circuitry. As Figure
3.3 shows, the differential signal is fed through a multiplexer to the input of an
instrumentation amplifier, and from there to an analog-to-digital converter (ADC). Opto- or
magnetic coupling transfers the ADC's digital output across the isolation barrier.

Fig 3.3 These components process the differential signal from a thermocouple.

The thermocouple is easily protected with a simple, lowpass RC network of
2k and 100nF on each electrode. An additional 1nF diverting capacitor with high-voltage
rating connects the circuit common and the grounded frame of the equipment. This
capacitor diverts ESD disturbances to ground while maintaining galvanic isolation for the
DC currents. It also forms a capacitive voltage-divider that limits peak voltages at the
isolated power supply. To further limit peak voltage, a high-voltage varistor can be
connected in parallel with the diverting capacitor (Figure 3.4).
The 2k resistor must be large enough to withstand high voltage (up to 8kV ESD, and
to dissipate considerable energy during FTB and SURGE testing. Unfortunately,
leakage current at the inputs of the following circuit (i.e., before the


Fig 3.4. A high-voltage varistor (lower left) limits the peak voltages.
isolation barrier) can flow through this protective series resistance to create substantial
static signal errors. Multiplexers, for example, can introduce unacceptable errors;
amplifiers added to buffer the multiplexer can introduce additional input-offset and
input-current errors while adding cost and board space to the system.
The MAX4051A multiplexer, which is pin and function compatible with the
industry-standard MAX4051, offers a moderate-cost alternative. Its leakage current is
guaranteed at 5nA (max) over the extended temperature range and only 2pA typical at
+25C. Thus, the worst-case leakage over temperature at the series resistors creates a
maximum error of only 2V. This error is quite sufficient for most thermocouples. If
the application requires even less error, an instrumentation-amplifier buffer based on
the MAX4254 quad op amp lowers the leakage to 100pA (max) over temperature and
to 1pA (typ) at +25C. In addition, a low-input offset voltage (V
) drift (only
0.3V/C) makes this buffer extremely effective for high-impedance, low-level signals.
Another alternative is the monolithic MAX1402 signal-acquisition system,
which includes a sigma-delta ADC, buffer amplifier, multiplexer, current source for
sensor excitation, and so-called burnout current sources for signal validation. It features
very low input-leakage current, and the flexibility for implementing applications such
as cold-junction compensation.



3.6.3 Angular Encoders
Industrial angular encoders determine the rotor position in electrical
machines. Precision positioning systems feature dual-channel, orthogonal, differential
sinusoids (called "sincos" signals by some manufacturers).Taken together, these
sinusoids form a pointer that allows a fine resolution of rotor position. Alongside the
analog-position signal lines, such systems often include RS-422 or RS-485 lines for
initializing the encoder and setting its parameters. In some cases these lines run for long
distances, carrying analog signals of low-kilohertz frequency and digital data rates as
high as megabits per second (Figure 3.5).

Fig 3.5 Communication in this optical-encoder system consists of analog "sincos" signals and
bidirectional digital-data signals.
Thus, protection in the form of large series resistors and passive RC
combinations is excluded, but line-termination resistors (usually 120) are required to
prevent reflections. The primary need is for protection against ESD and FTB
disturbances. In a system with conventional data transceivers (Figure 3.5), the
differential transmitter's output voltage is limited by a suppressor diode and decoupling
diodes. (Decoupling diodes are reverse-biased to decouple the wideband data signal
from the capacitance of the suppressor diode, which otherwise would heavily attenuate
the signal.)



Fig 3.6. This diode/suppressor network prevents damage from ESD, FTB, and SURGE faults.
Optional PTC fuses protect against fault connections to hazardous voltages.

Similar protection is provided for the receiver, but with an important
difference: to guarantee an unsymmetrical common-mode range (-7V to +12V for EIA-
422A) the limiting network must be unsymmetrical as well. Transmitter outputs and
receiver inputs comply with the same common-mode range, so for convenience and
economy both are protected by the same suppressor diodes. However, this whole protection
network can be replaced by the MAX490E, an RS-422 transceiver that integrates the ESD-
and FTB-protection networks. As a matter of good practice, the transceiver ground should
be tied to casing/earth with as short a connection as possible. If the lines are shielded
(which is highly recommended!), the shield should also be tied to this point with a short
connection. If you expect large exchange currents between separated ground potentials,
you should insert a 100 series resistor between the shield and earth, preferably bypassed
with a low-ESR capacitor.
If the system requires SURGE protection, an external protection network is
unavoidable. In that case, it may be advisable to split the line termination so it can function


as a current-limiting resistance as well. This is easily accomplished on the receiver side
with a moderate loss of signal level. For the driver side, you must verify whether an
approximate 10 of series resistance is acceptable, given that the MAX490E's differential
output impedance is about 40. A possible circuit including PTC fuses in series with the
data lines is given in Figure 4 as well.
The number of electronic (mobile) devices in the world is still increasing. With
this increase of transmitting devices, the electromagnetic interference (EMI) between those
devices and other equipment becomes a bigger challenge. This raises the need for
equipment and therefore integrated circuits that are more robust to the presence of
Electromagnetic waves (EM) in the air. Therefore, Texas Instruments developed op amps
with increased EMI robustness to overcome the issues of electromagnetic interference.
Along with these EMI hardened op amps a parameter has been introduced to
unambiguously specify the EMI robustness of an op amp: EMI Rejection Ratio (EMIRR).
Section 2 starts with a description of how RF signals can be picked up and
transferred to the op amp pins. Subsequently, a qualitative description of the interaction of
the RF signal and the op amp is given. To be able to compare different op amps on their
EMI robustness, the EMI Rejection Ratio (EMIRR) is defined. The EMIRR is a parameter
that quantitatively describes the effect that an RF signal has on op amp performance. The
definition of EMIRR is discussed along with a straightforward method to measure the
EMIRR. Finally, two typical applications will be discussed showing the advantage of EMI
hardened op amps.
To be able to describe the performance of op amps with respect to their EMI
robustness, first a model needs to be derived that describes how the signals of disturbing
(RF) sources might end up at the op amp pins. This requires the identification of possible
coupling paths from an interfering (RF) source to the op amp (electronic victim device).
Second, the actual interaction between the received signal at the op amp pins and the op
amp circuitry need to be considered.


An interfering or disturbing (RF) signal can arrive at the op amp via two
different types of coupling paths: Radiation Conduction
Interference via radiation arises when an electronic victim device itself picks up
the EM waves. Whether this will happen depends on the frequency of the EM wave and the
susceptibility of the electronic device for that frequency. This susceptibility largely
depends on the size of the electronic victim device relative to the wavelength of the
disturbing EM waves.
In the case of interference via conduction, other devices, such as cables and
PCB traces connected to the victim device, act as the receiving device, that is, antenna for
EM waves. Subsequently, the received signals (voltages and currents) are transferred in a
conductive way to the victim device.
Since the dimensions of an op amp IC are so small (a few mm) compared to the
wavelength of the disturbing RF signals (several cm in the GHz range to tens of cm in the
hundreds of MHz range), disturbances will dominantly arrive in a conductive way at the op
amp pins. These conductive disturbances on the pin of the op amp can be represented by
(RF) voltages and currents which are received by the PCB and connecting wires. These
voltages and currents might interfere with the op amp and jeopardize proper behavior. The
fact that disturbances arrive mainly in a conductive way implies that, when determining the
EMI robustness of an op amp, it is sufficient to consider conductively received
disturbances. So, conductive measurements suffice to determine the EMI robustness of op
amps. No tests need to be performed in expensive EMI chambers.
RF signals interfere with op amps via the non-linearity of the op amp circuitry.
The highest non-linearity is obtained for signals with a frequency that falls outside the band
of the op amp circuit, that is, for frequencies at which the overall feedback is virtually zero.
This non-linearity results in the detection of the so called out-of-band signals. The obtained
effect is that the amplitude modulation of the out-of-band signal is down-converted into the
base band. This base band can easily overlap with the band of the op amp circuit.
As an example, Figure 1 shows the equivalent input offset voltage of an op amp
for a detected RF carrier with on-off keying. It is assumed that the op amp is connected in
unity gain (AV = 1) which means that the obtained output voltage variation is equivalent to


the input offset voltage variation. Clearly the offset voltage varies in the rhythm of the on-
off keying of the RF carrier.
The key in describing the EMI robustness of an op amp is to link the level of
the applied RF signal to the resulting level of offset voltage variation.
To identify EMI robust op amps, a parameter is needed that quantitatively
describes the EMI performance. A quantitative measure enables the comparison and the
ranking of op amps on their EMI robustness. This application report introduces the EMI
Rejection Ratio (EMIRR). This parameter describes the resulting input-referred offset
voltage shift of an op amp as a result of an applied RF carrier (interference) with a certain
frequency and level. The definition of EMIRR is given by:

where VRF_PEAK is the amplitude of the applied unmodulated RF signal (V)
and VOS is the resulting input- referred offset voltage shift (V).
In this definition, the RF signal level is included as a condition at which the
EMIRR is determined. This is required as the relation between the resulting offset voltage
shift and the RF signal level is quadratic (the details on this quadratic relation is beyond the
scope of this application report). An example of the resulting offset shift (VOS) versus
applied RF level (RF peak voltage) is shown in Figure 2. Section 4 describes in more detail
the measurement setup used for obtaining these results). The curve is shown on a LOG-
LOG scale to clearly show the quadratic nature of the offset voltage shift versus RF level,
that is, the curve has a slope of two. The curve is limited at the bottom end of the signal
range as for the corresponding relatively low RF signal levels the resulting offset shift is
below the resolution of the measurement setup (noise). For op amps with a relatively high
sensitivity (low EMIRR), the curve might saturate for higher RF input levels. This is a
result of the offset shift that becomes very large, such that the op amp clips.


Fig 3.7 Measured Input Reffered offset voltage shift vs apllied RF peak level
The effect of the quadratic relation (between applied RF level and resulting
offset voltage shift) on the EMIRR is easily illustrated. In the definition of EMIRR, VOS
is replaced by an expression accounting for the quadratic dependency on the RF signal
level, yielding:

Equation shows that for a double RF signal level the EMIRR is 6 dB lower, that
is, doubling the RF level quadruples the offset voltage shift.
For the EMIRR a standard test condition of 100 mVP is used, which is
equivalent to 20 dBVP. For EMI hardened op amps it might be necessary, however, to use
larger signals for obtaining an offset shift well beyond the noise level of the measurement
test circuit. In that case it is required to indicate the used RF level when specifying the
EMIRR. It should be noted that EMIRR numbers obtained for different RF signal levels


hamper the comparison of the corresponding op amps. Therefore, it is preferable to convert
the EMIRR obtained for an RF signal level other than 100 mVP to the standard EMIRR.
The expression for this conversion is obtained by scaling the used signal level,
VRF_PEAK_B, to 100 mVP according to:

For example, assume EMIRR1V is measured for an op amp. Converting this to
the standard EMIRR yields:

The interpretation of the EMIRR parameter is straight forward. When two op
amps have an EMIRR that differ by 20 dB, the resulting error signal as a result of EMI,
when used in identical setups, differ by 20 dB as well. So, the higher the EMIRR the more
robust the op amp.
Measuring EMIRR is straightforward and requires three basic actions: 1.
Applying an RF signal in a well defined way to an op amp pin under test. 2. Measuring the
offset voltage with the RF signal switched off and again with the RF signal switched on. 3.
Calculate the resulting offset voltage shift from which the EMIRR can be obtained.
The EMIRR is a measure to compare the EMI performance of op amps. To
have a fair comparison, it is a prerequisite that the conditions for these EMIRR


measurements are equal, and that the influence of the test setup, such as instruments and
test board, are kept to a minimum. The presented measurement test circuit and method
ensures that the EMIRR measurements are accurate and repeatable. The core is a simple
board with standard components. The equipment used is standard off the shelf as well, such
as a power supply, an RF generator, and a multi-meter. Special attention needs to be paid to
the way the RF signal is applied to the pin under test, that is, the setup and test board need
the careful treatment of an RF setup. It should be noted that when a higher resolution is
required, the EMIRR can also be determined by using an AM modulated RF carrier and
then with a spectrum analyzer measuring the level of the down converted amplitude
modulation. In this case, for the EMIRR calculation some correction factors are required to
account for the different way of measuring.




ASIC technology is scaling down, the density of components packed on
printed circuit boards (PCBs) is scaling up. Moreover, the request for high speed
applications is increasingly intense. Thus, electromagnetic interference (EMI) has
gradually become a critical issue for IC designers to consider during the design phase.
Ignoring EMI might result in circuit failures induced by spurious signals, which can arise
from a variety of sources including EMI at high frequencies out of the working range of the
circuits. EMI has a strong impact on electrical or electronic equipment with
interconnections. EMI pollution collected by these modern electronic wiring harnesses has
signicantly increased the level of radio frequency interference (RFI), which might be
dramatically higher than that of nominal signals. Generally EMI disturbance is picked up
by wires and traces on the PCB, and radio frequency interference (RFI) signals can be
derived from it. These signals can also be generated on the same chip where RF ampliers,
power supplies and digital subsystems are integrated.
Nowadays, it is meaningful to investigate EMI to nd possible prevention
methods, especially in high-performance dig- ital or analog circuits that might include
OpAmps. OpAmps are one of the most common building blocks in analog and mixed-
signal ICs and are very sensitive to EMI/RFI. Although EMI susceptibility can be kept
under control by lters, shielding, or a posteriori layout adjustment, in some applications
these solutions are expensive and complex, and even inviable. Therefore, the circuits
should be designed to be intrinsically immune to EMI without the support of the off-chip
lters. In order to obtain a good circuit, the IC designers should take into consideration the
EMI-induced input offset over the whole EMI frequency range, the matching constraints,
the input referred noise, and the closed-loop stability issue. Here propose an EMI-robust
OpAmp with good performance not only at relatively low EMI frequencies but also in the
high frequency range, thereby over- coming the inadequacy of the old techniques while
maintaining their advantages.


The EMI susceptibility of OpAmps is correlated to three dominant factors:
1) EMI sources
2) Nonlinear distortion in the input transistors or nonlinear behavior of the
input differential pair
3) Parasitic effects.
If these three factors are present at the same time, the undesired EMI effect,
especially the EMI induced offset voltage, is generated. Inorder to eliminate the dc shift
effectively, one of the factors must be removed. In the following sections, the latter two
phenomena will be discussed in detail.
4.1.1 Nonlinear Behavior of the Input Differential Pair
The intrinsic nonlinear behavior of transistors is one common
source of EMI-related problems in analog integrated circuits (ICs), particularly when a
disturbance signal is generated in the frequency out of working range. For example, a
memoryless, weakly nonlinear system has input and output signals that can be described by
the following equation: (Here y and x are the output and input of the system respectively)
Assume that x is a sinusoidal EMI signal,
Therefore, when nonlinear circuits are excited with a single sinusoidal signal,
the dc component deviates from the value for a linear system due to the inuence of even


order terms, which can also be caused by asymmetrical behavior. Even worse, the
undesirable EMI signal may cause dc voltage shift error, which drives transistors on some
critical nodes out of the operation region or into total cut-off, forcing the IC circuit to
malfunction. Weak nonlinearity is dominant when the EMI signal does not drive the
ampliers into cut-off. For high EMI amplitude signals, active devices are switched off and
strongly nonlinear behavior is generated. However, if the high-amplitude EMI signal has a
very high frequency, the input signal is ltered by the parasitic capacitances of the input
transistors with the equivalent series resistors and inductors. This results in the weakly non-
linear behavior.
4.1.2 Parasitic capacitance effect
The effect of parasitic capacitance is similar to that of the strong
nonlinear behavior in the input stage. Take the basic onestage operational transconductance
amplier (OTA) in the voltage follower conguration as the example, which is depicted in
Fig.4.1.At frequencies above the bandwidth of the amplier, the parasitic capacitances of
the input transistors dominate. Thus, when the ac coupling effect of parasitic capacitances
is present, the M1 and M2 transistors conduct much less ac drain current. In addition, as the
load capacitor is generally much larger than the parasitic capacitance, it will result in ac
shorted to ground at high frequencies. Eventually, the one-stage OTA is simplied as
shown in Fig. 4.2. Hence, in terms of the capacitance dividing law, assuming that the gate-
source capacitances of M1 and M2 are the same, i.e., , the gate-source voltages of M1 and
M2 are approximated as follows:

which show unequal gate-source voltages due to the parasitic capacitances at high EMI
frequencies. The voltage difference results in a larger magnitude of ac drain current owing
through M1, which means a large sinusoidal input voltage drives M1 into the cut-off region


for a longer time than M2 and the strongly nonlinear distortion in the drain current of M1 is
larger than that in M2.

Fig. 4.1. Basic one-stage OTA connected in the voltage-follower conguration.

Fig. 4.2. One-stage OTA circuit simplied at high EMI frequencies.
The dc shift at the output node equivalently converges to a value characterized by the dc
mean value of the M1 and M2 gate-source voltages, which are functions of Cgs and Ct.
Therefore, inorder to suppress the strong nonlinearity effect, the parasitic capacitance
should be minimized while the gate-source capacitances should be increased.



In order to investigate the EMI effects in OpAmps, the interfering signal is
often modeled as a continuous sinusoidal wave- form generated by a zero dc voltage
source, which is super- imposed on the pins connected to long wires as antennae for EMI.
Since the waveforms of the real interfering signals vary in shape, this modeling simplies
the numerical simulation and laboratory measurements. The model can also be used to

Fig. 4.3. Voltage-follower conguration.
compare the behaviors of different ampliers working in non-linear conditions. The
continuous signal always represents the worst EMI signal because the real interfering
signals generally decay in time. The circuit performance with a large signal working out of
band can be tested since the input waveform can be varied in amplitude and frequency. The
voltage follower conguration shown in Fig. 4.3 is used in most measurement setups. If the
OpAmp is considered as a one-pole system, the open loop gain can be expressed as below:

Therefore, the output voltage is derived as:
. ........(5)


This is equal to the signal at the inverting input terminal. So at EMI frequencies that are
much higher than the amplier gain-bandwidth product , the ac signal at the output is
approximately zero, and the common-mode and differential-mode signals at the inputs are:
which result in the worst case of the EMI-induced offset. At frequencies close to or lower
than the gain-bandwidth product (GBW), is larger than , and can even be equal to ,so the
differential mode component decreases to a smaller value than . This may not generate the
expected worst case scenario. Therefore, we have determined that the conguration is more
reasonable at high frequencies in order to evaluate the EMI performance of the circuit by
checking the worst EMI- induced offset.
First, a conventional differential pair in Fig.4.4 is studied in detail. When a
high-frequency EMI signal is coupled to the input terminals, the output impedance of the
tail current transistor becomes nite. This impedance includes the parasitic capacitance
between the D node and ground, and the output resistance of the Mb1 transistor. In the
analysis of EMI effects, usually the latter resistance is neglected. The former comprises the

Fig. 4.4. Conventional Differential Pair.


drain-bulk capacitance of Mb1 and the parasitic junction capacitance. If N-Channel
MOSFET (NMOS) transistors are used, the junction capacitance is between the bulk and
the isolating well of the input transistors in the twin-tub CMOS process in Fig. 4.5(a) &
(b). If P-Channel MOSFET (PMOS) transistors are used, the parasitic junction capacitance
is between the substrate and the isolating well of the input transistors . The parasitic
junction capacitance can be removed by connecting the bulk of the input transistors to the
substrate, which increases the threshold voltage. Moreover, the substrate noise impacts the
normal operation of the transistors through the body effect and varies the threshold voltage
as well as the bulk transconductance. The expression of the EMI-induced dc shift is derived
as follows. In the analysis of weak nonlinear input transistors ,the formulas for saturation
operation are used. The offset current is the difference of the currents owing through M1
and M2 in Fig4.4, and the input offset voltage is shown as the ratio of the output offset
current to the trans-conductance of the input transistors

where is the sum of a dc and an ac component , and the terms average out in the
calculation. According to the Parseval identity for Fourier integrals , the total energy
contained in a transient waveform across all of time is equal to the total energy of the
waveforms Fourier transformation added across all of its frequency components. The
transfer functions for the common-mode and differential-mode signals are expressed as
shown below, provided that M1 and M2 match each other perfectly:



The input offset voltage of the one-stage OTA can be rewritten as:
Therefore, it is observed that the dc offset is proportional to the scalar product of the
common-mode and differential-mode EMI disturbance components and the phase between
both of them. In addition ,a larger overdrive voltage should be satised for a larger , which
decreases the input offset voltage .However, the offset caused by the mismatch increases
with the overdrive voltage, so it is difcult to get an optimum offset value if using as the

Fig. 4.5. (a) and (b) Parasitic capacitances of NMOS transistor . (a) NMOS differential
pairincluding parasitic capacitances, (b) NMOS transistor cross- section including parasitic capacitances.


design parameter. Furthermore, the offset current can also be reduced by increasing the
input , and by decreasing . It is necessary to notice that PMOS is more sensitive to the EMI
effect than NMOS with the same effective and bias current owing to the smaller mobility
and thus larger parasitic capacitances. Therefore, the PMOS transistors are used as the
inputs in all the OpAmp designs in order to verify the effectiveness of the proposed
technique. The target here is to prove that the EMI performance can be improved even
using a worse case scenario involving PMOS inputs. Some design solutions were published
for EMI susceptibility according to the mathematical illustrations above. It is necessary to
clarify and summarize the effective design techniques for obtaining superior EMI
4.3.1. Input Filter
For the topology with low-pass lters in front of the input differential pair
(Fig. 4.6), the purpose is to prevent any EMI/RFI disturbances from entering the actual
circuit. Generally ,the EMI/RFI frequencies are very high, especially compared to the
nominal input signal frequency, so the well-designed low- pass lters can sift out the
undesired interference signals. However, there are some important drawbacks, which make
it not so desirable. First, the low-pass lters might attenuate the nominal input signals that
are generally weak. Secondly, the lters introduce an extra pole which might degrade the
phase margin. From these two points of view, the pole must be pushed far beyond the
dominant pole of the circuit:


Fig. 4.6. Differential pair with low-pass lters.
Thirdly, the thermal noise associated with resistors increases the total input referred noise.
The noise spectral density of the resistor and the input transistors are:
where J/K is the Boltzmann constant, and is the coefcient derived to be 2/3 for long-
channel transistors. In order to obtain the negligible thermal noise for the resistors (i.e.,
should be small enough), has to be large enough , which is disadvantageous in the IC
4.3.2 Source Degeneration
The distortion phenomenon is suppressed by adding source degeneration
resistors to linearize the differential pair. Its drawback is the larger input referred noise
because of the source resistors in the signal path.
In addition ,the source degeneration resistors are not effective at high EMI frequencies
because they could be shortened by the parasitic source-to-ground capacitance, and the
offset reduction is not substantial.



4..3.3 Cross Couple
If none of the three dominant factors (the EMI source, the nonlinearity of the
input devices and the parasitic capacitances from the input source to the ground) can be
removed, then the compensation topology can be used. The EMI effect is eliminated both
by applying the disturbances to a second differential pair, which has the opposite effect on
the offset, and by cross connecting the outputs of both pairs as shown in Fig. 4.7.The
biasing voltage is the same for both tail transistors, which provide the same current and
input transconductance.

Fig.4.7. Cross-coupled differential pair.
In order to attenuate the EMI disturbance but not weaken the desired input
signal, two matched high-pass lters must be added infront of the second differential pair
with a large enough cut-off frequency. However, the disadvantages associated with the
cross-coupled differential pair and accompanying lters are the larger current consumption
and integrated area because of the extra transistors, the higher noise owing to the resistors,
and the closed-loop stability issue. In addition, the reference voltage is needed for the high-
passlters, which adds to the complexity of the design. Most importantly, since the
mismatch cannot be ignored, and the reference voltage can not be equal to the dc bias
voltage of M1 and M2 due to the large process variations, the offset compensation
degrades dramatically. This makes this topology difcult to achieve in practice.


4.3.4 Source Buffer With/Without Source Resistors
Because the parasitic capacitance from the source of the input transistors to the
ground is a main factor of the EMI-in- duced offset voltage, the source-buffered differential
pair was proposed for achieving sufcient common mode rejection at higher frequencies by
decoupling the bulk from the input sources and removing the large bulk source capacitance.
An additional benet is less input-referred noise which is similar to that of the conventional
topology because the auxiliary differential pair does not disturb the signal path of the
nominal differential pair. Although the technique generates net zero output offset current in
the ideal case, it is difcult to extract the accurate transistor parameters to obtain the on-
chip capacitor , especially with large process variations in practice. The major drawback of
the source-buffered differential pair without source resistors in Fig.4.8 is its high
dependence on tightly specied tolerances of on-chip capacitors , which exhibit systematic
error. Any variation in translates itself into higher EMI-Induced shift errors, which make
the negligible offset target challenging to accomplish. The topology with the source
degeneration resistor in Fig. 4.9 can suppress the strong effect of . In order to add the
source resistor without consuming voltage headroom, two equal tail transistors Mb1a and
Mb1b are split from the original Mb. But its major disadvantage is the larger input-referred
noise. Because of the existence of ,bothMb1aandMb1bcontribute to the differential noise,
which means the circuit suffers from more noise (and offset voltage).

Fig. 4.8. Source-buffered structure.


Fig. 4.9. Source-buffered structure with source resistors

Therefore, with regard to noise generation, this topology might not be an optimum choice.





In creating an EMI-robust structure, the important criteria to consider are the
EMI-induced input offset, the matching constraints, the input referred noise, and the
closed-loop stability issue. Moreover, the source-buffered structure is more useful
compared to other EMI-resisting ones. So the proposed work is designed on the basis of
this previous analysis. The total input-referred noise is reduced and the dependence of the
on-chip capacitors on process variations is suppressed in the proposed topology. The
advantage of reducing the parasitic effect and increasing the common-mode rejection is
In the proposed structure, the differential pair can be degenerated as shown in
Fig 5.1 by using two small source resistors . Since the bias current ows through them and
generates the voltage drop of ,small should be used for the voltage headroom especially
when low-voltage applications are expected. Furthermore, the small source resistors can
also improve the noise behavior because they are one of the dominant terms in the input-
referred noise ,and the resistors connection in Fig. 5.1 can avoid the differential noise of
the tail current transistors unlike the source-buffered scheme in Fig. 4.9.In addition, when
two equal pairs of source resistors Rs1 & Rs2 are used in the input and auxiliary branches,
and if their bias currents are the same ,then the body effect is lower and the coupling of
substrate noise is smaller than when the bulk is connected to the source of the auxiliary
differential pair . This reduces the capacitive loading of the input source but without the
risk of forward-biasing the body-source junction of the input transistors for high EMI


Fig. 5.1. Proposed source buffered structure
In Fig. 5.1, both the large isolation well-to-substrate capacitances have been removed from
the input sources by decoupling their bulks, but the large isolation well-to-substrate junc-
tion capacitance at the sources of M3 and M4 ) cannot be ignored. The small-signal circuit
for the common modeisshowninFig.14. and are the and drain-to-bulk parasitic
capacitances, which are much smaller Ct2 & Cgs1 than and because of the missing
parasitic well capacitances in and the larger effects of when combined with external Cin .
The following relations are present:

The common-mode transfer function is obtained as follows:



If gm1Cbs1 = gmb1Cgs, which can be easily satised, the common-mode rejection is
suppressed signicantly at high EMI frequencies. The rst zero which increases the
magnitude at the rate of 20 dB/decade, is at the origin. After reaching the rst pole , the
magnitude of the transfer function is at. The second pole decreasesthemagnitudeby
dB/decade, and then the second zero of makes the magnitude curve at again.Finally at the
double pole , the magnitude is decreased at the dB/decade. The previous illustration is
shown in Fig. 5.2.

Fig. 5.2. Simplied magnitude plot of common-mode transfer function.
The small-signal circuit for the differential mode is shown in Fig. 5.3.


Fig 5.3 Small signal equivalent circuit

The differential-mode transfer function is shown and is replaced .This replacement further
reduces the impact of the on-chip capacitors at relatively high EMI frequencies, which is
another advantage of this structure. Because Mb1 is connected between the mid-point of
the source resistors and the ground, it does not contribute to the differential noise, which
means the circuit benets from less noise (and offset voltage) compared to the published
source-buffer technique.
In summary, the new advantages of this proposed scheme are stronger
common-mode rejection and better insensitivity of the on-chip capacitance variations
compared to the previously published structures; additionally, both the input-referred noise
and the coupling of the substrate noise are lower.

The major advantage of the previous scheme in Section A is the higher
common-mode rejection at relatively high EMI frequencies. However, the EMI-induced
offset voltage at low frequencies also needs to be reduced. This issue can be overcome in


the circuit depicted in Fig.5.2, in which two matched RC high-pass lters are added in
front of the auxiliary differential pair. Since the high-pass lters are not in the signal paths,
their cut-off frequencies do not need to lie above the nominal frequency band, and the
closed-loop stability is not affected. This circuit needs an additional biasing voltage , which
requires extra biasing circuits. Similar to the analysis in Section A, the lower body effect
and less input-referred noise and smaller substrate noise coupling are maintained. The
common-mode transfer function is derived and here

Likewise, if the condition of gm1Cbs1 = gmb1Cgs1 is satised, the common-
mode transfer function Hc = Vx/Vc is approximated to:
Iit is found that the magnitude of Hc(s) is attenuated if the EMI frequency is
smaller than the cut-off frequency (1/RC) of the high-pass lters. Otherwise Hc(s) stays
the same , and this simplied bode plot is shown in Fig.5.3. Therefore,

Fig 5.4 Proposed scheme suppressing EMI effect

this proposed structure sup- presses EMI effects very well in the low frequency range and
at the same time, it retains the advantages of the structure in Section A. The differential-


mode transfer function can still be expressed thus maintaining the benet of the
insensitivity of the on-chip capacitors to process variations.



In order to estimate the EMI performance of the circuits, the worst offset
voltage should be measured. Generally, the voltage- follower conguration in a specic
frequency range is chosen in the following simulations. Four different analog topologies
(the conventional one, the source-buffered one and the two proposed source-buffered
ones) have been implemented in the designs of otherwise identical folded-cascode (FC)
OpAmps at a 3 V power supply with the load capacitance of 3 pF using the NCSU 0.5- m
CMOS technology. All the OpAmps are designed using the same input transistor size and
transconductance. Based on the simulation results shown in Table I,




Fig. 6.1. EMI measurement setup.
the proposed source-buffered structure in Section B offers the best alternative compared to
the other three for several reasons. First, the power consumption is comparable to the other
structures. Secondly, although the total input-referred noise is slightly larger than that of
the conventional one, it is still lower than the remaining two due to the relatively small
source resistors. Moreover, it has the best linearity and thus the smallest EMI-induced
offset voltage, which is derived from the results .As illustrated in the simulation plots, it is
obvious that when the input amplitude increases from 50 mV to 800 mV, the EMI-induced
offset voltage becomes larger. This directly corresponds to the analysis of larger A
increasing the dc shift error , which is rewritten.
Furthermore, the larger the term is, the larger the offset voltage becomes.
Therefore, in order to verify the dependence of the offset on nonlinear distortions, needs to
be extracted from the simulation results. The dc gain is approximated to , so for the
conventional OpAmp and the source-buffered one is calculated to be 2864.18 and 1164.13
respectively. When the input signal has a 400 mV am- plitudeand100MHzfrequency, is dB
for the conventional one and dB for the source-buffered one. Be- cause and V,a2 is 1224.53


for the conventional one and 336.39 for the source buffered one; furthermore, the former
one has worse linearity and thus a larger offset (according to the offset values. In the
sameway, for both proposed OpAmps is 1148.15, and the values for are 109.39 for the
proposed A and 83.27 for B. The proposed techniques result in much better linearity, which
improves the EMI performance. In order to obtain the accurate measurement results, the
board interconnections must be designed as short as possible along with ground shields and
straight paths in the PCB design for the purpose of minimizing all the undesired signals
from the measurement setup itself. For the same reason, three capacitors with the values of
100 pF, 100 nF and 10 uF are connected between the power line and ground. The output
pins are connected to an low-pass lter in order to evaluate the mean voltage, which
quanties the EMI effects easily and accurately .
The test chip has an active area of 0.907 mm and is packaged with DIP40. In
order to comprehend the EMI effects on the OpAmps, the output offset voltages are
measured at 15 different frequencies, with a value of 1.6 V. It is necessary to point out that
a voltage relating to the inherent input offset voltage is present at the OpAmp outputs. This
offset is not connected to the shift error generated due to RF signals and should not be
included when measuring the EMI-induced offset voltage. Four chips have been tested, and
the testing re- sults vary within an order of 3%. Fig 6.1 shows the EMI-induced offset
voltage comparison results for a large EMI input signal of the 800 mV (7.35 dBm)
amplitude in the voltage-follower conguration. The measured maximum EMI-induced
input offset voltage is -222 mV for the second proposed structure in Section B, which is
compared to -712mV for the conventional one, and mV for the one using the source-
buffered technique. This means that better offset reduction can be achieved in the proposed
structure than in the other ones. More importantly, it is shown that both of the proposed
schemes have better immunity to relatively high-frequency EMI; and the one in Section B
has very good EMI performance in the whole EMI frequency range. In addition to the EMI
performance of the OpAmps, the measurement of several other typical parameters such as
power consumption, and GBW are also provided in Table II .The conventional structure
consumes 2.8 mW power and has 29 MHz GBW.



Fig. 6.2. Offset comparison of four different structures

EMI performance of the OpAmps, the measurement of several other typical parameters
such as power consumption, and GBW are also provided in Table II .The conventional
structure consumes 2.8 mW power and has 29 MHz GBW. The pro- posed one in Section
A, as well as the one using the published scheme have 3.2 mW of power consumption, and
the proposed one in Section B has 3.5 mW. Therefore, the power consumption of the latter
three circuits is comparable but larger than that of the conventional one due to the auxiliary
differential pair, and their GBWs are 12 MHz, which is smaller than the conventional one
owing to the effect of the source resistors In order to describe how effectively the OpAmps
reject the EMI disturbances, a useful metric of EMIRR (EMI rejection ratio) dened is
used. EMIRR can be measured in decibels (dB), similar to power-supply rejection ratio
(PSRR) or common-mode rejection ratio (CMRR) parameters. It is a logarithmic ratio
where higher decibel values correspond to better rejection and higher immunity. EMIRR is
calculated by the fol- lowing equation. is the peak amplitude of the applied RF voltage. is
the dc voltage shift that is generated in response to the applied RF; it is the input-referred
change in the offset voltage,




. The second logarithmic term in the equation refers the EMIRR to an input signal with the
amplitude of 100 m in response to the applied RF; it is the input-referred change in the
offset voltage. The second logarithmic term in the equation refers the EMIRR to an input
signal with the amplitude of 100 mVp


Fig.6.3 EMIRR versus frequencies for four different structures

Fig. 6.3 plots EMIRR versus several frequencies for different topologies, and
Table II shows their EMIRRs at high frequencies. The proposed scheme in Section B has
the highest EMIRR among the four circuits; hence, we were able to obtain the most
competitive EMI performance even with high disturbance signal amplitude and frequency.



Large electromagnetic interference can be conducted directly via the chip
package pins leading to failures on the integrated circuits exposed to EMI. The increased
severity of terroristic alert in the last years raises serious pre occupations on the
vulneralability of safety electronic equipment ti intentional EM attacks moreover an
increasing no of integrated circuit are becoming more and more susceptible indeed the
decrease in geometry length induces a reduction in power supply voltage and consequently
noise margin. the most sensitive circuits to EMI are the analog ones and among them the
Operational Amplifiers. many solutions have been proposed to intrinsically improve the
immunity of amplifiers. and all of them were focussed on classical opamp input stage
based on a differential pair biased by a current source. The EMI susceptibility factors,
especially the effects of the nonlinear distortion and the parasitic capacitances is presented.
It also shows the EMI dependence on linearity with simulation data and calculation results.
The novel EMI-robust OpAmps with architectures based on the source-
buffered differential pair is proposed and were fabricated in NCSU 0.5um CMOS
technology. The improvement of the proposed OpAmp is veried by experimental results
compared to previously published techniques.
1. Total input referred noise is reduced.
2. Dependence on on-chip capacitor on process variation is suppressed.
3. Parasitic effect is decreased.
4. CMRR is increased




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