Create a new world of imaging with Sony's New Technology and Structure

Sony's Stacked CMOS Image Sensor Solves

All Existing Problems in One Stroke
In conventional CMOS image sensors, the pixels (sensors) and circuits (logic)
are formed on the same silicon substrate.
Like oil and water, this coexistence of two conflicting elements makes it difficult
to optimize their characteristics and also imposes other constraints.
The "stacked CMOS image sensor1", a new generation of the back-illuminated
CMOS image sensor, developed by Sony solves these problems in one stroke.
Stacking the pixel section and the circuit section enables compact size,
high image quality, faster speeds and flexible integration of versatile functions.
Through this technology, Sony has created functions that will enable
differentiation of final products to provide new ways of enjoying images.
1: See press release at: http://www.sony.net/SonyInfo/News/Press/201201/12-009E/

Expectations of Pixels and

Circuits
The expectations that customers have of a
final product containing an image sensor can
be categorized into expectations regarding
pixels and those regarding circuits. (See
figure 1.)
When it comes to pixels, customers
are looking for improvements in basic
performance such as pixel size, speed,
sensitivity and high pixel numbers. For
example, smaller pixel sizes make it difficult
to obtain greater sensitivity. However, Sony
thinks that image sensors should capture
images at 1 lx (moonlight) and has once
again raised their basic performance goals
accordingly.
It is often said that customers demand a new
approach from image sensors that will allow
differentiation of in the design of the final
product, for example, fun and ease of use.
Some think that Sony as a leader in digital
imaging technology should make better use
of its intellectual property (IP).

There is also a strong demand for

customization.

Figure 1 Demands by Customers that Use Image Sensors in Final Products

Pixel (sensor)
Improvement in Basic
Performance
Compact size
Faster speeds
Higher sensitivity
Higher pixel numbers

Circuit (logic)

Proposal for fun and

ease of use
Proposal for Sony's digital
imaging technology
Customization

Figure 2 Sony's Objectives as an Image Sensor Supplier

Pixel (sensor)
Incompatibility of image
sensor specific processes
and standard logic
processes
Sensor process
constraints

Circuit (logic)
Inefficiencies caused
by unnecessary logic
processes
Constraints in process
line generation
Performance and cost
barriers to customization

Beauty
industry

Sensing

Learning
Data and
information
RGBW

Future Image Sensor Evolution Axes

Provide new comfortable ways of enjoying images

Health care

Viewing
HDR

Sony has set a goal to develop a "Super Reality" sensor that

Funct
nctionality

surpasses human vision to achieve high speeds and high

picture quality. The increasing popularity of smartphones means
a greater diversification of camera usage. Sony would like to

Exceeding Human
Vi i
Vision

specify a new evolution axis of higher performance in addition

to this evolution axis.

Image Quality

Towards Super Reality

Sony meets the customers' expectation for greater differentiation

in final products with the stacked CMOS image sensor that has
the superb mechanism to provide new ways of enjoying images.

High Speed

Sony's Objectives as a Supplier

A number of hurdles remains to be cleared to
satisfy these expectations and demands. (See
figure 2.)
Firstly, the pixel and circuit manufacturing
processes are as irreconcilable as oil and
water. For example, to improve the light
gathering efficiency of the pixels optical
waveguides have been introduced. The dry
etching process required to do this causes
damage to the silicon crystals and the pixel
section makes it necessary to follow it up
with an annealing process (heat treatment) to
recover from this damage. From the point of
view of the circuit section, heat treatment is
highly undesirable since it changes transistor
parameters. As described above, pursuing
pixel section characteristics when forming
pixels and circuits on the same silicon wafer
means that you add a constraint to the circuit
section.
Completely unnecessary from the point of
view of the circuit section, it is a process
that the pixel section needs. On-chip color
filters, microlenses and other components
are formed both on the pixel section and also
the circuit section, after which everything is
removed. These kind of inefficiencies exist
because the same silicon substrate is used for
forming both pixels and circuits.
There are also constraints in process line
generation. Sony currently uses the 65 nm
process rule in IC manufacturing. Since
the same silicon substrate is used for both
the pixel section and the circuit section, the

circuits will also have to be made

ade according
to the 65 nm process rule, which is a major
constraint. Even if production is outsourced
to external foundry manufacturers, it is not
possible to select the ideal logic process.
In addition, customization was problematic
both in terms of performance and cost.
The arrival of the stacked CMOS image
sensor neatly solves all these problems.

Two Concepts that Changes

Configuration Considerably
In a back-illuminated CMOS image sensor,
both pixels and circuits are formed on the
silicon substrate, which is reduced to a

few m to take in light. As it is difficult to

transport a substrate this thin, a supporting
substrate is usually added to the side opposite
the light receiving surface (back side). Since
a difference in the coefficient in thermal
expansion between the different layers
could cause them to separate, the supporting
substrate, like the chip, is also a silicon
substrate.
The supporting substrate also being a silicon
substrate makes it a natural first step to use it
as a circuit layer. (See figure 3.)
As placing the pixels and circuits on the
same silicon substrate is a precarious
approach at best, it is a natural second step to
completely separate the two.

Figure 3 Stacked CMOS Image Sensors, the Next Generation of Back-illuminated

CMOS Image Sensors

A new
concept
Conventional

1. Effective use of the supporting substrate

2. Complete separation of pixel section and
circuit section

Back-illuminated
CMOS image sensor

Newlydeveloped

Pixel section

Pixel section

Circuit section
Supporting substrate

Supporting substrate

Stacked
CMOS image sensor

Circuit section
Layer
structure

Circuit section

Layer
structure

n Figure 4 Potential of Stacked CMOS Image Sensors

Final product
manufacturers

End user
Improved camera performance
New product value through timely
addition of new functions
The experience of a product that is
fun and easy to use

Sony

Differentiation of functions in a compact form

High speed and low power consumption
thanks to a cutting-edge logic process
Offers ease of design and flexibility in making
improvements

Full use of Sony's digital imaging technology

Flexible selection of ideal process logic through
outsourcing
Sensors with higher picture quality that enable
greater productive capacity
Customization requests can be quickly addressed

Impact Provided by Completely

Separated Stacked Layers
The following sections give a description of
the advantages that stacked CMOS image
sensors can provide with regard to previously
described expectations and issues. (See
figure 4.)

l Advantages to End Users

Complete separation will prevent pixels
from constraining circuits making it possible
to freely select a process that leads to high
picture quality. This will dramatically
improve sensitivity and other basic
performance factors.
With conventional CMOS image
sensors, there was a time lag between
the development of Sony digital imaging
technology and until that technology could
be differentiated for a customer product.
For example, if a customer required a new
algorithm from Sony for a signal processing
IC that would be ready in two years for
integration into a product, that technology
would have to be close to completion now.
However, stacked CMOS image sensors
allow us to perform development in step
with the customer. At the final stage, Sony
integrates new technology, or IP, into the
circuit section of the stacked structure

before delivering the product. The new

CMOS sensor makes it easier to add new
functionality to increase the shooting fun of
the end user.

l Advantages to Final
Product Manufacturers
The stacked structure makes it possible to
place large circuits on small chips, which
further simplifies differentiation. Also, the
technology enables use of cutting-edge
processes with chips having formed circuits
to speed up signal processing speeds and
reduce power consumption. It also facilitates
design and improves design flexibility.

l Advantages to Sony
The new technology enables us to quickly
provide digital imaging IP, a Sony strength,
to increase productivity of the external
foundry cooperative manufacturers and to
quickly respond to customization requests.

Circuit Scale and Compact Size

In the following, Sony will describe the size
of circuits and their process rules that
can be placed on the stacked circuit section

of typically sized image sensors. Digital

still cameras mainly use Type 1/2.3 CMOS
image sensors. If the 45 nm process rule can
be used for the circuit section, it will become
possible to implement signal processing
circuits that equal the DSPs used in highend digital still cameras. And even the 65 nm
rule will make possible signal processing for
middle class digital still cameras.
Type 1/3.2 image sensor processed according
to the 65 nm rule could be incorporated in a
surveillance camera. And if the 45 nm rule
were used, it would enable integration of a
signal processing circuit large enough for
middle class digital still cameras.
Secondly, how can the surface area be
reduced by completely separating the pixel
section from the circuit section?
Sony's Type 1/4 CMOS image sensors can
then be reduced by 30% and SoC CMOS
image sensors for mobile phones with
camera signal processing capability can be
reduced by 40%. Although CMOS sensors
are generally thought to be larger than CCD
image sensors, stacked CMOS image sensors
do not need any registers and can therefore
be 20% smaller. The configuration of the
sensor makes it ideal for use in medical
cameras and other industrial applications.

Sony Proposal:

Two New Functions to Eliminate Common Shooting Errors

Stacked CMOS image sensors can be used for work role-sharing with customer's DSP, store digital imaging IP in the circuit
section or enable flexible integration of customer developed functions. First we will introduce two new functions and what they
mean in the evolution of the camera.

Sony's unique RGBW Coding function

enabling clear shooting in dark rooms
or at night

The built-in "RGBW Coding" function which adds W

(White) pixels to the conventional range of RGB (RedGreen-Blue) pixels has realized higher sensitivity,
enabling high-quality shooting with low noise even in dark
indoor or night settings.
While the addition of W ( White) pixels improves
sensitivity, it has the problem of degrading image quality.
However, Sony's own device technology and signal
processing realizes superior sensitivity without hurting
image quality.

Conventional RGB
method

Newly developed "RGBW

Coding" method

HDR (High Dynamic Range) Movie

function which enables brilliant colors
to be captured even in bright settings

Typically, when shooting with differing light levels, such as

an indoor setting against a bright outdoor background, there
can easily be blocked up shadows for dark areas or blown
out highlights for bright areas. Such phenomena are a result
of the combination of low-light and bright-light which have
different optimal exposure conditions in the same shot.
This function reduces this by setting two different exposure
conditions within a single screen shooting and conducts
the appropriate signal processing for the captured image
information under each optimal exposure condition. This
process generates an image with a broad dynamic range
and enables shooting of both the background and subject
matter with brilliant colors even in a bright environment.

Normal movie

HDR movie

When a stacked CMOS image sensor supporting these two functions are integrated into a
smartphone or other device, there is no need to change the signal processing of the device.

Products with both

functions are planned
for shipment

Type 1/3.06 stacked CMOS image sensor with approx. 13.0M effective pixels
Sample shipments planned for June, 2012
Type 1/4 stacked CMOS image sensor with approx. 8.0M effective pixels
Sample shipments planned for August, 2012