A

u
d
i
o
S
e
r
i
a
l
B
u
s
I
n
t
e
r
f
a
c
e
I 2
C
S
e
r
i
a
l
C
o
n
t
r
o
l
B
u
s
B
i
a
s
/
R
e
f
e
r
e
n
c
e
MICBIAS
SCL
SDA
RESET
V
o
l
t
a
g
e
S
u
p
p
l
i
e
s
A
u
d
i
o
C
l
o
c
k
G
e
n
e
r
a
t
i
o
n
MCLK
L
I
N
E
2
L
P
G
A
0
/
+
5
9
.
5
d
B
0
.
5
d
B
S
t
e
p
s
A
D
C
+
+
+
+ + +
V
C
M
V
C
M
D
A
C
L
+
V
o
l
u
m
e
C
o
n
t
r
o
l
E
f
f
e
c
t
s
DIN
DOUT
BCLK
WCLK
DINL
DINR
DOUTL
DOUTR
M
I
C
2
R
/
L
I
N
E
2
R
L
I
N
E
2
R
A
D
C
P
G
A
0
/
+
5
9
.
5
d
B
0
.
5
d
B
S
t
e
p
s
+
D
A
C
R
V
o
l
u
m
e
C
o
n
t
r
o
l
E
f
f
e
c
t
s
A
G
C
A
G
C
S
W
-
D
2
S
W
-
D
1
S
W
-
D
3
S
W
-
D
4
DVDD
DRVDD
DRVDD
DRVSS
DVSS
IOVDD
AVSS_ADC
AVDD_DAC
AVSS_DAC
H
P
R
O
U
T
H
P
R
C
O
M
H
P
L
C
O
M
H
P
L
O
U
T
L
E
F
T
_
L
O
P
L
E
F
T
_
L
O
M
L
I
N
E
1
L
P
L
I
N
E
2
L
P
L
I
N
E
1
L
M
L
I
N
E
1
R
M
S
W
-
L
0
S
W
-
L
1
S
W
-
L
2
S
W
-
L
4
S
W
-
L
3
S
W
-
R
4
S
W
-
R
3
R
I
G
H
T
_
L
O
P
R
I
G
H
T
_
L
O
M
L
I
N
E
1
R
P
L
I
N
E
2
R
P
S
W
-
R
0
S
W
-
R
1
S
W
-
R
2
B
0
1
5
1
-
0
1
M
I
C
1
R
P
/
L
I
N
E
1
R
P
M
I
C
1
R
M
/
L
I
N
E
1
R
M
L
I
N
E
1
R
P
L
I
N
E
1
R
M
M
I
C
1
L
P
/
L
I
N
E
1
L
P
M
I
C
1
L
M
/
L
I
N
E
1
L
M
L
I
N
E
1
L
P
L
I
N
E
1
L
M
M
I
C
2
L
/
L
I
N
E
2
L
/
M
I
C
D
E
T

P0048-01
SDA DVDD
D
R
V
D
D
M
C
L
K
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9 32
10 31
11 30
12 29
13 28
14 27
15 26
16 25
MIC1LP/LINE1LP
B
C
L
K
MIC1LM/LINE1LM
W
C
L
K
MIC1RP/LINE1RP
D
I
N
MIC1RM/LINE1RM
D
O
U
T
MIC2L/LINE2L/MICDET
D
V
S
S
MICBIAS
I
O
V
D
D
MIC2R/LINE2R
S
C
L
RHB PACKAGE
(BOTTOM VIEW)
RESET
H
P
R
O
U
T
RIGHT_LOM
H
P
R
C
O
M
RIGHT_LOP
D
R
V
S
S
LEFT_LOM
H
P
L
C
O
M
LEFT_LOP
H
P
L
O
U
T
AVSS2
D
R
V
D
D
AVDD
A
V
S
S
1

T0145-01
WCLK
BCLK
SDOUT
SDIN
t (DO-BCLK)
d
t (DO-WS)
d
t (WS)
d
t (DI)
S
t (DI)
h

T0146-01
WCLK
BCLK
SDOUT
SDIN
t (DO-BCLK)
d
t (WS)
d
t (WS)
d
t (DI)
S
t (DI)
h

T0145-02
WCLK
BCLK
SDOUT
SDIN
t (WS)
h
t (BCLK)
H
t (DO-BCLK)
d
t (DO-WS)
d
t (DI)
S
t (BCLK)
L
t (DI)
h
t (WS)
S

T0146-02
WCLK
BCLK
SDOUT
SDIN
t (WS)
h
t (WS)
h
t (BCLK)
L
t (DO-BCLK)
d
t (DI)
S
t (BCLK)
H
t (DI)
h
t (WS)
S
t (WS)
S

P Headphone Power mW
80
70
60
50
40
30
20
10
0
0 10 20 30 40 50 60 70 80 90 100
T
H
D

T
o
t
a
l

H
a
r
m
o
n
i
c

D
i
s
t
o
r
t
i
o
n

d
B
G001
Load = 16
AC-Coupled
HPL
DRV
DD
= 2.7 V
HPR
DRV
DD
= 2.7 V
HPR
DRV
DD
= 3.3 V
HPL
DRV
DD
= 3.3 V
HPL
DRV
DD
= 3.6 V
HPR
DRV
DD
= 3.6 V
90
80
70
60
50
40
30
20
10
0
0 25 50 75 100 125 150 175 200 225 250 275 300 325 350
HPR
DRV
DD
= 3.3 V
P Headphone Power mW
T
H
D

T
o
t
a
l

H
a
r
m
o
n
i
c

D
i
s
t
o
r
t
i
o
n

d
B
G002
Load = 16
Capless
HPL
DRV
DD
= 2.7 V
HPR
DRV
DD
= 2.7 V
HPL
DRV
DD
= 3.3 V
HPR
DRV
DD
= 3.6 V
HPL
DRV
DD
= 3.6 V

f Frequency kHz
160
140
120
100
80
60
40
20
0
0 2 4 6 8 10 12 14 16 18 20
A
m
p
l
i
t
u
d
e

d
B
G003
f Frequency kHz
160
140
120
100
80
60
40
20
0
0 2 4 6 8 10 12 14 16 18 20
A
m
p
l
i
t
u
d
e

d
B
G004

P Speaker Power W
90
80
70
60
50
40
30
20
10
0
0 100 200 300 400 500 600
T
H
D

T
o
t
a
l

H
a
r
m
o
n
i
c

D
i
s
t
o
r
t
i
o
n

d
B
G005
Load = 8
DRV
DD
= 3.6 V
DRV
DD
= 3.3 V
DRV
DD
= 2.7 V
24
26
28
30
32
34
36
38
40
42
0 10 20 30 40 50 60
PGA Gain Setting dB
S
N
R

S
i
g
n
a
l
-
t
o
-
N
o
i
s
e

R
a
t
i
o

d
B
G006
Input = 65 dBFS

0.85
0.8
0.75
0.7
0.65
0.6
0.55
0.5
0.45
0.4
0 10 20 30 40 50 60 70
PGA Setting (dB)
G
a
i
n

E
r
r
o
r

(
d
B
)
Left ADC
Right ADC
G009
1.8
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6
AVDD Supply Voltage V
M
I
C
B
I
A
S

O
u
t
p
u
t

V
o
l
t
a
g
e

V
G007
MICBIAS = AVDD
MICBIAS = 2.5 V
MICBIAS = 2 V

1.8
2.0
2.2
2.4
2.6
2.8
3.0
3.2
45 35 25 15 5 5 15 25 35 45 55 65 75 85
T
A
Ambient Temperature C
M
I
C
B
I
A
S

O
u
t
p
u
t

V
o
l
t
a
g
e

V
G008
MICBIAS = AVDD
MICBIAS = 2.5 V
MICBIAS = 2 V

TLV320AIC3101
MIC2L/LINE2L/MICDET
MIC1LP/LINE1LP
MIC1RP/LINE1RP
MIC2R/LINE2R
MIC1LM/LINE1LM
0.1 F m
0.1 F m
0.47 F m
0.47 F m
0.1 F m
0.1 F m
0.1 F m
0.1 F m
0.1 F m
1 F m
1 F m
100 F m
100 F m
1 F m
1 F m
1
F
m
10 F m
0.47 F m
0.47 F m
0.47 F m
0.47 F m
MICBIAS
A
AVDD_DAC
AVSS_DAC
AVSS_ADC
DRVDD
DVDD
DVSS
IOVDD
DRVDD
DRVSS
S0206-02
A
D
1.525 V1.95 V
L
E
F
T
_
L
O
P
L
E
F
T
_
L
O
M
R
I
G
H
T
_
R
O
P
R
I
G
H
T
_
R
O
M
H
P
L
C
O
M
H
P
L
O
U
T
H
P
R
O
U
T
A
H
P
R
C
O
M
MIC1RM/LINE1RM
A
S
D
A
S
C
L
IOVDD
R
E
S
E
T
M
C
L
K
B
C
L
K
W
C
L
K
D
O
U
T
D
I
N
DSP
or
Apps Processor
R
P
R
P
1 kW
1 kW
FM
Tuner
Analog
Baseband
IOVDD
(1.1 V3.3 V)
AVDD
(2.7 V3.6 V)
8 W
8 W
External Audio Power Amplifiers
TPA2012D2 (Stereo Class-D in WCSP)
TPA2010D1 (Mono Class-D in WCSP)
TPA2005D1 (Mono Class-D in BGA, QFN, MSOP)

TLV320AIC3101
MIC2L/LINE2L/MICDET
MIC1LP/LINE1LP
MIC1RP/LINE1RP
MIC2R/LINE2R
MIC1LM/LINE1LM
0.1 F m
0.1 F m
0.1 F m
0.1 F m
0.47 F m
0.47 F m
0.1 F m
0.1 F m
0.1 F m
0.1 F m
0.1 F m
1 F m
1 F m
220 F m
220 F m
1 F m
1 F m
1
F
m
10 F m
MICBIAS
A
A
AVDD_DAC
AVSS_DAC
AVSS_ADC
DRVDD
DVDD
DVSS
IOVDD
DRVDD
DRVSS
S0207-02
A
D
1.525 V1.95 V
L
E
F
T
_
L
O
P
L
E
F
T
_
L
O
M
R
I
G
H
T
_
R
O
P
R
I
G
H
T
_
R
O
M
H
P
L
C
O
M
H
P
L
O
U
T
H
P
R
O
U
T
A
H
P
R
C
O
M
MIC1RM/LINE1RM
A
A
A
S
D
A
S
C
L
IOVDD
R
E
S
E
T
M
C
L
K
B
C
L
K
W
C
L
K
D
O
U
T
D
I
N
DSP
or
Apps Processor
R
P
R
P
1 kW
1 kW
1 kW
1 kW
FM
Tuner
IOVDD
(1.1 V3.3 V)
AVDD
(2.7 V3.6 V)
8 W
8 W
External Audio Power Amplifiers
TPA2012D2 (Stereo Class-D in WCSP)
TPA2010D1 (Mono Class-D in WCSP)
TPA2005D1 (Mono Class-D in BGA, QFN, MSOP)
LINE_OUT_R
LINE_OUT_R+
LINE_OUT_L
LINE_OUT_L+

SDA
SCL
t
HD-STA
0.9 s m
t
SU-STO
0.9 s m
P S
t
SU-STA
0.9 s m
Sr
t
HD-STA
0.9 s m
S
T0114-02

DA(6) DA(0) RA(7) RA(0) D(7) D(0)

T0147-01
SDA
SCL
(M) SDA Controlled by Master
(S) SDA Controlled by Slave
Start
(M)
Write
(M)
Slave
Ack
(S)
Slave
Ack
(S)
Slave
Ack
(S)
Stop
(M)
7-Bit Device Address
(M)
8-Bit Register Address
(M)
8-Bit Register data
(M)
DA(6) DA(0) RA(7) RA(0) SDA
SCL
DA(6) DA(0) D(7) D(0)
(M) SDA Controlled by Master
(S) SDA Controlled by Slave
Start
(M)
Write
(M)
Slave
Ack
(S)
Slave
Ack
(S)
Slave
Ack
(S)
Master
No Ack
(M)
Stop
(M)
Repeat
Start
(M)
Read
(M)
7-Bit Device Address
(M)
8-Bit Register Address
(M)
8-Bit Register Data
(S)
7-Bit Device Address
(M)
T0148-01

BCLK
WCLK
1 0 0 1 0
T0149-01
1/fs
LSB MSB
Left Channel Right Channel
2 2 SDIN/SDOUT n1 n1 n2 n2 n3 n3

BCLK
WCLK
1 1 0 0 0
T0150-01
1/fs
LSB MSB
Left Channel Right Channel
2 2 SDIN/SDOUT n1 n1 n1 n2 n2 n2 n3 n3

BCLK
WCLK
1 1 0 0
T0151-01
1/fs
LSB MSB
Left Channel Right Channel
2 2 SDIN/SDOUT n1 n1 n1
1 Clock Before MSB
n2 n2 n3 n3

BCLK
WCLK
0 0
T0152-01
1/fs
LSB LSB LSB MSB MSB
Left Channel Right Channel
1 1 2 2 SDIN/SDOUT n1 n1 n1 n2 n3 n3 n4 n2

N1
N1 N1
1
1 1
1 N1 N2
N2 N2
0
0 0
0 N2
Right-Channel Data
Right-Channel Data
Left-Channel Data
Left-Channel Data



DSP Mode
Left-Justified Mode
Offset
Offset Offset
T0153-01
Word Clock
Word Clock
Bit Clock
Bit Clock
Data In/Out
Data In/Out

K*R/P 2/Q
PLL_CLKIN
CODEC
CODEC_CLKIN
PLL_OUT
Q = 2, 3,.., 16, 17
MCLK BCLK
CLKDIV_IN PLL_IN
B0153-01
DAC f
S
ADC f
S
CODEC_CLK = 256 f
S(ref)
CLKDIV_OUT
1/8
PLLDIV_OUT
CLKDIV_CLKIN
K = J.D
J = 1, 2, 3, ...., 62, 63
D = 0000, 0001, ...., 9998, 9999
R = 1, 2, 3, 4, ...., 15, 16
P = 1, 2, ...., 7, 8
WCLK = /NCODEC
CODEC = DAC = ADC
Set NCODEC = NADC = NDAC = 1, 1.5, 2, ...., 5.5, 6
DAC DRA => NDAC = 0.5
ADC DRA => NADC = 0.5
f
f f f
S(ref)
S S S

H(z) +
N0 )N1 z
*1
32, 768 *D1 z
*1

Digital Audio Data Serial Interface

ADC
+
+
D
I
N
D
O
U
T
B
C
L
K
W
C
L
K
D
I
N
L
D
I
N
R
D
O
U
T
L
D
O
U
T
R
ADC
AGC
AGC
Record Path
Record Path
Effects
Effects
SW-D1
SW-D2
SW-D4
SW-D3
Left-Channel
Analog Inputs
Right-Channel
Analog Inputs
PGA
0 dB59.5 dB,
0.5-dB Steps
PGA
0 dB59.5 dB,
0.5-dB Steps
Volume
Control
Volume
Control
DAC
Powered
Down
DAC
Powered
Down
DAC
L
DAC
R
B0173-01

Only

W0002-01
Decay Time
Target
Level
Input
Signal
Output
Signal
AGC
Gain
Attack
Time

H(z) +
N0 )N1 z
*1
32768 *D1 z
*1

N0 )2 N1 z
*1
)N2 z
*2
32768 *2 D1 z
*1
*D2 z
*2

N3 )2 N4 z
*1
)N5 z
*2
32768 *2 D4 z
*1
*D5 z
*2

LB1 LB2
RB1 RB2
B0154-01

B0155-01
LB1
RB2
Atten
LB2 L
+
+
+
+
+

+
+
R
To Left Channel
To Right Channel

Gain = 0, 1.5, 3, . . ., 12 dB, Mute

To Left ADC PGA
B0156-01
MIC1L/LINE1L
MIC1R/LINE1R
Gain = 0, 1.5, 3, . . ., 12 dB, Mute
Gain = 0, 1.5, 3, . . ., 12 dB, Mute
MIC2L/LINE2L/MICDET

LEFT_LOP
RIGHT_LOP
LEFT_LOM
RIGHT_LOM
SW-L0
SW-R0
SW-L3
SW-R3
SW-L1
SW-R1
SW-L4
SW-R4
SW-L2
SW-R2
MIC1LP/LINE1LP
MIC1RP/LINE1RP
MIC1LM/LINE1LM
MIC1RM/LINE1RM
LINE1LP
LINE1RP
LINE1LM
LINE1RM
MIC2L/LINE2L/MICDET
MIC2R/LINE2R
LINE2L
LINE2R
B0174-01

PGA_L
PGA_L
PGA_R
PGA_R
DAC_L1
DAC_L1
DAC_R1
DAC_R1
DAC_L3
LEFT_LOP
LEFT_LOM
B0157-01
DAC_R3
RIGHT_LOP
RIGHT_LOM
DAC_L
DAC_L1
DAC_L2
DAC_L3
DAC_R
DAC_R1
DAC_R2
DAC_R3
Stereo
Audio
DAC
Volume
Controls,
Mixing
Volume
Controls,
Mixing
Gain = 0 dB to 9 dB,
Mute
Gain = 0 dB to 9 dB,
Mute

0 dB to 78 dB
0 dB to 78 dB
0 dB to 78 dB
0 dB to 78 dB
+
PGA_L
PGA_R
DAC_L1
DAC_R1
B0158-01

VCM
VCM
HPLOUT
HPLCOM
HPRCOM
HPROUT
DAC_L2
DAC_R2
PGA_L
PGA_L
PGA_L
PGA_L
DAC_L1
DAC_L1
DAC_L1
DAC_L1
DAC_R1
DAC_R1
DAC_R1
DAC_R1
B0159-01
PGA_R
PGA_R
PGA_R
PGA_R
Volume
Controls,
Mixing
Volume
Controls,
Mixing
Volume
Controls,
Mixing
Volume
Controls,
Mixing
Volume Level
0 dB to 9 dB, Mute
Volume Level
0 dB to 9 dB, Mute
Volume Level
0 dB to 9 dB, Mute
Volume Level
0 dB to 9 dB, Mute

MICBIAS
MIC2R
HPLOUT
HPROUT
To
Detection
Block
HPRCOM
HPLCOM
1.35 V
MIC2L/LINE2L/MICDET
To Detection Block
MIC PreAmp
s
s g m
s g m s
s g Stereo
Cellular
Stereo +
Cellular
m = mic
s = ear speaker
g = ground/vcm
AVDD
B0243-02
Pwr
Amp
Pwr
Amp
Pwr
Amp
HPLOUT
HPROUT
To Detection Block
MIC PreAmp
s
s g m
s g m s
s g Stereo
Cellular
Stereo +
Cellular
m = mic
s = ear speaker
g = ground/vcm
AVDD
B0244-02
MICBIAS
MIC2R
MIC2L/LINE2L/MICDET
Pwr
Amp
Pwr
Amp

To Detection Block
HPLOUT
HPLCOM
HPROUT
HPRCOM
Differential Headphone
Connector Assembly
B0245-02
S
W
1
MIC2L/LINE2L/MICDET
Pwr
Amp
Pwr
Amp
Pwr
Amp
Pwr
Amp

PACKAGE OPTION ADDENDUM

www.ti.com 27-Jul-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (C) Device Marking
(4/5)
Samples
TLV320AIC3101IRHBR ACTIVE VQFN RHB 32 2500 Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR -40 to 85 AC3101I
TLV320AIC3101IRHBT ACTIVE VQFN RHB 32 250 Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR -40 to 85 AC3101I
TLVAIC3101IRHBRG4 ACTIVE VQFN RHB 32 2500 Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR -40 to 85 AC3101I
TLVAIC3101IRHBTG4 ACTIVE VQFN RHB 32 250 Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR -40 to 85 AC3101I

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
PACKAGE OPTION ADDENDUM
www.ti.com 27-Jul-2013
Addendum-Page 2
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type
Package
Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
(mm)
Pin1
Quadrant
TLV320AIC3101IRHBR VQFN RHB 32 2500 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2
TLV320AIC3101IRHBR VQFN RHB 32 2500 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2
TLV320AIC3101IRHBT VQFN RHB 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2
TLV320AIC3101IRHBT VQFN RHB 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 27-Jul-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TLV320AIC3101IRHBR VQFN RHB 32 2500 367.0 367.0 35.0
TLV320AIC3101IRHBR VQFN RHB 32 2500 338.1 338.1 20.6
TLV320AIC3101IRHBT VQFN RHB 32 250 210.0 185.0 35.0
TLV320AIC3101IRHBT VQFN RHB 32 250 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 27-Jul-2013
Pack Materials-Page 2
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