ISE Fmax Performance Technology Boosts Design Speeds by up to 70 Percent over Competition

The new ISE Fmax technology employs efficient algorithms to improve the results of physical synthesis and
logic optimization resulting in up to a 70 percent performance advantage for Virtex-4 FPGAs over
competing devices. ISE Fmax Technology includes a full set of features for design retiming, timing-driven
packing and placement, performance evaluation and post-placement logic optimization. The ISE Xplorer
utility, included with the latest release, is an easy-to-use script that helps designers evaluate and optimize
the Virtex-4 and Spartan-3 FPGA performance, delivering an average of 10 percent improvement over
previous releases for timing driven designs. ISE 8.1i offers a performance evaluation mode that delivers a
37 percent out-of-the box performance improvement for designs without timing constraints.
ISE Fmax technology is complementary to synthesis optimizations from Synplicity and Mentor Graphics.
The combination of synthesis and ISE Fmax technologies enables users to meet stringent timing goals.
The new ISE 8.1i software in combination with the Synplify Pro synthesis products give Xilinx FPGA
designers an advantage when pushing timing performance, said Jeff Garrison, director of marketing for
FPGA Products at Synplicity, Inc. We continue to work closely with Xilinx to ensure that our newest
technologies, such as our Graph-based physical synthesis recently introduced in our Synplify Premier
product, interface with ISE software to deliver the fastest timing closure for the entire line of Xilinx FPGAs.
The tight integration of Mentor Graphics advanced Precision Synthesis solution into the Xilinx ISE 8.1i
release opens up the best features of both environments for our mutual customers, said Simon Bloch,
general manager, Design Creation and Synthesis Division, Mentor Graphics. The customer-proven design
analysis technology in Precision Synthesis, which delivers the right balance of automated/interactive
optimizations and user control, now complements the industry-leading Xilinx Fmax Technology available in
ISE 8.1i.
Industrys Only Partial Reconfiguration Solution
With the 8.1i release, Xilinx has added a new methodology to enhance the industrys first and only partial
reconfiguration solution. Partial reconfiguration reduces system cost, size, device count, and power
consumption, useful for a wide variety of applications, such as Software Defined Radio (SDR) and high
performance computing. Designers can now dynamically load different hardware configurations into the
same area of the FPGA while the rest of the device continues running. This real-time dimension to
programmability builds upon field upgradeability and multi-boot approaches that have enabled many Xilinx
customers to boost system reliability with real-time diagnostics, lower field service costs and extend the
lifespan of existing products in the marketplace.
Ease of Use Improves Productivity
ISE 8.1i offers 37 percent faster push button in the performance evaluation mode, enabling quick and easy
evaluation of designs without need for constraints. ISE 8.1i also offers support for dual-core CPU
workstations, enabling faster compile times and parallel processing of design jobs across multiple CPU
cores. These capabilities are further bolstered by XPower, the industry's most comprehensive power
analysis solution, improved web analysis capabilities in WebPower Tools 8.1i, and new power optimized
routing technology. ISE 8.1i Project Navigator and integrated ISE Simulator tool offer a new intuitive
Windows XP TM look and feel on all platforms, making ISE 8.1i easier to learn and use than ever before.
ChipScope Pro 8.1i
The release of ChipScope Pro 8.1i provides the industrys most complete and easy to use debug solution
up to 50x times faster than simulation. The ChipScope Pro core resource estimator enables users to
explore on-chip debug and verification options such as trigger width, sample depth, and advanced
capabilities such as trigger sequencing and storage qualification to determine the optimal trade off between
on-chip visibility and FPGA resource allocation.
Platform Pricing and Availability
Voted #1 in user satisfaction by FPGA Journal subscribers, ISE delivers programmable logic design
solutions to over 200,000 users worldwide with an intuitive, front-to-back design environment for all leading-
edge Xilinx product families, including Virtex-4 FPGAs, Spartan-3 Generation FPGAs, and CoolRunner-II
CPLDs. All versions of ISE software packages support Windows 2000 and Windows XP and Linux Red
Hat Enterprise 3.0. ISE Foundation also supports Solaris 2.8 and 2.9. ISE 8.1i configurations are
immediately available with prices ranging from a free internet download version to the fully featured version
priced at $2495. ChipScope Pro tools are available immediately for $695, or users can obtain a 60-day full
featured evaluation version of the tool at no charge. ISE customers can obtain partial reconfiguration
capability by contacting their local FAE. For more information about ISE 8.1i and the ChipScope Pro debug
and verification solution, visit www.xilinx.com/ise orwww.xilinx.com/chipscopepro/.