HL LabManual 2013 14 Modified

HL Lab Manual 2013-14
SINHGAD TECHNICAL EDUCATION SOCIETYS

SINHGAD INSTITUTE OF TECHNOLOGY
DEPARTMENT OF COMPUTER ENGINEERING
LAB MANUAL
FOR
T.E. COMPUTER (SEM I)
Academic Year 2013-14
HARDWARE LABORATORY
SUBJECT CODE: 310248
Prepared By
Prof. A.N.Bandal
Prof.S.M.Nalawade
TEACHING SCHEME
EXAMINATION SCHEME
PRACTICAL : 4 HRS/WEEK
TERM WORK: 25 MARKS

PRACTICAL : 50 MARKS
1
Computer Department. SCOE VADGAON
PREFACE
INFORMATION ABOUT LAB : Hardware Laboratory

SOFTWARE REQUIRED
: Tasm, Tlink
HARDWARE REQUIRED
: 8051 Kits, PentiumIV, and 256MB DDR RAM, 80 GB

HDD
OPERATING SYSTEM
: Windows-XP, Windows-98
GOAL OF LAB
: To study different programming features of 8051

Microcontroller and 386 microprocessor.
2
SINHGAD INSTITUTE OF TECHNOLOGY

KUSGAON, LONAVALA.
DEPARTMENT OF COMPUTER ENGINEERING
CERTIFICATE
This is to certify that

Mr. /Miss ___________________________________
Of class ______________Roll No._______________
Examination Seat No. ________________________
has completed all the practical work in the
HARDWARE LABORATORY, satisfactorily, as
prescribed by University of Pune in the Academic Year
20
- 20
Staff In-charge
Head of Department
Principal
3
HARDWARE LAB
INDEX
Sr.
No
Title
Date of
Date of
Marks
Commencem
Submissi
Obtain
ent
on
ed
Signatu
1
2
3
4
5
6
7
8
9
10
11
Lab Lab Inovations
1
2
3
Computer Department. SIT, Lonavala
re
HARDWARE LAB
ASSIGNMENT NO: 1
TITLE: Design simulation program for TYPE Command

PROBLEM STATEMENT:
Write an ALP to simulate TYPE command using PSP.
PLATFORM: DOS/Win-98
THEORY:
1. About PSP: - The actual code of a program is loaded into memory immediately after a
special system block - the PSP. The diagram below shows an example of typical memory
distributions for programs loaded. The word prefix in the title Program Segment Prefix
refers to the fact that operating systems like CP/M and earlier versions of MS-DOS put
this control block just before the program. In more current versions, MS-DOS can keep
the program itself separate from the control information, but in most cases PSP is still the
prefix of the program.
There are basically two types of memory distribution and initial register settings, those
for -COM and those for -EXE modules. The difference between these two is minimal
really, especially when an -EXE program is located within one physical segment (64K
bytes). The only significant difference in this instance is that when a -COM module is
loaded, all segment registers point to the start of the PSP, while for an -EXE module, the
CS register points to the start of the code segment. The contents of the segment registers
for the simplest type of -EXE and -COM modules is shown in the diagram here also.
HARDWARE LAB
The Program Segment Prefix (PSP) is a data structure used in DOS systems to store the
state of a program. It has the following structure:
Offset Size
Contents
00-01
2 bytes (code)
CP/M exit (always contain INT 20)
02-03
word (2 bytes)
Memory size in paragraphs
04
byte
Reserved
05-09
5 bytes (code)
Far call to CP/M compatibility code within DOS
0A-0D dword (4 bytes) Terminate address of previous program (old INT 22)
0E-11 dword
Break address of previous program (old INT 23)
12-15
dword
Critical error address of previous program (old INT 24)
16-17
word
Caller's PSP segment (usually command.com - internal)
18-2B 20 bytes
Job File Table (internal)
2C-2D word
Environment segment
2E-31 dword
SS:SP on entry to last INT 21 call (Internal)
32-33
word
Max open files (Internal - see below)
34-37
dword
Handle-entries address (Internal - see below)
38-4F
24 bytes
Reserved
50-52
3 bytes (code)
Far call to DOS (always contain INT 21 + RETF)
53-5B 9 bytes
Reserved
5C-6B 16 bytes
Unopened Standard FCB 1
6C-7F 20 bytes
Unopened Standard FCB 2 (overwritten if FCB 1 is opened)
80
Number of characters on command-line
1 byte
81-FF 127 bytes
Command-line (terminated by a 0Dh)
2. About FCB: We will refer to set of file & record function that are compatible with CP/M as FCB
function. These function present on data structure called a file control block. To maintain
certain block keeping information about open files. This structure resides in the
application programs memory space. The FCB function allow the programmer to create,
open, close & delete files to read or write records of any size of any record position
written such files. These functions do not support the hierarchical file structure that was
HARDWARE LAB
first introduced in MS-DOS version 2.0. So, they can be used to access files in the current
subdirectory for a given disk device driver.
We use handle functions, the OS maintain the data structure that contain bookkeeping
information about the file inside its own memory space & these structures are not
accessible to the application program. The handle function fully support the hierarchical
file structure allowing the file programmer to create, open, close & delete files in any
subdirectory on any disk drive to read or write records of any size at any byte offset
within such files.
Using The FCB Functions:Understanding the function of file control block is the key to success with the FCB
family of file & record function. An FCB is a 37 byte data structure allocated within the
application programs memory space; it is divided into many field. Typically, the program
initialize an FCB with drive code, a filename & an extension & then passes the address of
the FSB. This information include with file exact size in bytes & the date & time of file
was created or last updated. MS-DOS also places certain other information within a
reserved area of the FCB, however this area is used by the operation system for its own
purpose & various among different version of MS-DOS.
For compatibility with PC/M MS-DOS automatically sets the record size field of FCB to
128 bytes. If program does not want to use this default record-size, it must place the
desired size into record, size field after open or create operation, subsequently when the
program record size needs to read or write records from the file, it must pass the address
of the FCB to MS-DOS. MS-DOS in turn keeps the FCB updated with information about
the current position of the pointer & the size of the file.
In general MS-DOS function that use FCBs accept the full address of the FCB in the
DS:DX register & pass back a return code in the AL register.
The handle file & record-managed calls may be gathered into the following broad
classification for study.
Function
Action
HARDWARE LAB
Common handle file operation

3 CH
Create file (Requires ASCII structure)
3 DH
Open File
3 EH
Close File
Common Handling Record Operation

42 H
Set file pointer
3 FH
Read File
40 H
Write File
Less Commonly Used Handle Operation

41 H
Delete File
43 H
Get or Modify File Attributes
44 H
IOC TL (I/O Control)
45 H
Duplicate Handle
46 H
Redirect Handle
56 H
Rename File
57 H
Get / Set File, Data & Line
5AH
Create Temporary File
5BH
Create File
5CH
Lock & Unlock File Region
67H
Set Handle Count
68H
Commit File
6CH
Extended open file
Handle File Access Skeleton :The following is a typical program sequence to access file using the handle family of
function.
1] Get filename from user by mean of buffered i/p service or from the command tail
supplied by MS-DOS in the PSP.
2] Put a zero at the EOF specification in order to create an ASCII string.
3] Open the file using INT 21H function 3DH & mode2 (create/write) or create the file
using INT 21 function 3CH. Save the file that is returned.
HARDWARE LAB
4] Set the pointer using INT 21 function 42H. You may set the file pointer position
relative to one of three different locations, the start of file, the current pointer position or
the end of file.
5] Read from the file (INT 21H function 3 FH) or write to the file (INT 21H function
40H). Both of these function requires that the BX register contain the file handle, the CX
register contain the length of the record on the DS:DX registers point to the data being
transferred.
In read operation if file no of bytes read is less than no of requested, the End Of File has
been reached. In a write operation if no of byte returned is less than the no of required the
disk containing the file is full. Neither of these condition is required as an error code, i.e.
carry flag is not set.
6] If the program is not finished processing the file go to step 4 otherwise close the file
(INT 21H function 3EH). Any normal exit from the program will also close file all active
handles.
ALGORITHM:
I.
Create a file:
a) Algorithm:
1) Start
2) Initialize data segment
3) Display message to create file.
4) Set attribute of file.
5) Create file.
6) Stop.
II.
Rename a File:
a) Algorithm:
1) Start
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4) Rename file.
5) Stop.
III.
Input File:
a) Algorithm:
1) Start
5) Open file.
6) Write file.
7) Close file
8) Stop.
IV.
Display a File:
a) Algorithm:
1) Start
3) Open file.
4) Write file.
5) Read file
6) Stop.
V.
Delete a File :
a) Algorithm:
1) Start
3) Open file..
4) Delete file
5) Stop.
HARDWARE LAB
FAQs:1) What is FCB?

__________________________________________________________________
__________________________________________________________________
2) How FCB record size is allocated?
__________________________________________________________________
__________________________________________________________________
3) Where the Full address of FCB is kept by MS-DOS function?
__________________________________________________________________
__________________________________________________________________
4) Explain in detail the function to Open a file?
__________________________________________________________________
__________________________________________________________________
5) What is PSP?
__________________________________________________________________
__________________________________________________________________
6) Explain 2 fields in PSP?
__________________________________________________________________
__________________________________________________________________
7) What is the functions of PSP?
__________________________________________________________________
__________________________________________________________________
8) State the advantages of PSP?

__________________________________________________________________
__________________________________________________________________
9) State the dis-advantages of PSP?
__________________________________________________________________
__________________________________________________________________
HARDWARE LAB
10) Explain in detail the function to Read a file?

__________________________________________________________________
__________________________________________________________________
Design Problem:1) Write ALP to edit file attributes?

2) Write ALP to display date and time created or updated?
3) Write ALP to display the file Size?
CONCLUSION:
________________________________________________________________
________________________________________________________________
________________________________________________________________
HARDWARE LAB
ASSIGNMENT NO: 2
TITLE: Design simulation program for COPY Command

PROBLEM STATEMENT:
Write an ALP to simulate COPY command using PSP.
PLATFORM: DOS/Win-98
THEORY:
1. About COPY Command: Allows the user to copy one or more files to an alternate location.
Availability
The copy command is an internal command and is available in the below
Microsoft operating systems.
All Versions of MS-DOS

Windows 95
Windows ME
Windows NT
Windows 2000
Windows XP
Windows Vista
Windows 7
Syntax
Copies one or more files to another location.
HARDWARE LAB
COPY [/A | /B] source [/A | /B] [+ source [/A | /B] [+ ...]] [destination] [/A
| /B]] [/V] [/Y | /-Y]
Examples
copy *.* a:
Copy all files in the current directory to the floppy disk drive.
copy autoexec.bat c:\windows

Copy the autoexec.bat, usually found at root, and copy it into the windows
directory; the autoexec.bat can be substituted for any file(s).
copy win.ini c:\windows /y
Copy the win.ini file in the current directory to the windows directory.
Because this file already exists in the windows directory it normally would
prompt if you wish to overwrite the file. However, with the /y switch you will not
receive any prompt.
File handling and Record-managing calls: The handle file & record-managed calls may be gathered into the following broad
classification for study.
Function
Action
Common handle file operation

3 CH
Create file (Requires ASCII structure)
3 DH
Open File
3 EH
Close File
Common Handling Record Operation

42 H
Set file pointer
HARDWARE LAB
3 FH
Read File
40 H
Write File
Less Commonly Used Handle Operation

41 H
Delete File
43 H
Get or Modify File Attributes
44 H
IOC TL (I/O Control)
45 H
Duplicate Handle
46 H
Redirect Handle
56 H
Rename File
57 H
Get / Set File, Data & Line
5AH
Create Temporary File
5BH
Create File
5CH
Lock & Unlock File Region
67H
Set Handle Count
68H
Commit File
6CH
Extended open file
ALGORITHM:
VI.
Create a file:
a) Algorithm:
1) Start
5) Create file.
6) Stop.
VII.
Rename a File:
a) Algorithm:
1) Start
HARDWARE LAB

4) Rename file.
5) Stop.
VIII.
Input File:
a) Algorithm:
1) Start
5) Open file.
6) Write file.
7) Close file
8) Stop.
IX.
Display a File:
a) Algorithm:
1) Start
3) Open file.
4) Write file.
5) Read file
6) Stop.
X.
Delete a File :
a) Algorithm:
1) Start
3) Open file..
4) Delete file
5) Stop.
HARDWARE LAB
HARDWARE LAB
FAQs:1) What is COPY Command?

__________________________________________________________________
__________________________________________________________________
2) Explain in detail the function to Write a file?
__________________________________________________________________
__________________________________________________________________
3) Explain in detail the function to Close a file?
__________________________________________________________________
__________________________________________________________________
4) Explain in detail the function to Rename a file?
__________________________________________________________________
__________________________________________________________________
5) Explain in detail the function to Delete a file?
__________________________________________________________________
__________________________________________________________________
6) What is use of File Handler?
__________________________________________________________________
__________________________________________________________________
7) What are functions of FCB?
__________________________________________________________________
__________________________________________________________________
8) State the advantages of FCB?

__________________________________________________________________
__________________________________________________________________
9) State the dis-advantages of FCB?
__________________________________________________________________
__________________________________________________________________
10) State the blocks of Extended FCB?
HARDWARE LAB
__________________________________________________________________
__________________________________________________________________
Design Problem:1) Write ALP to simulate RENAME command from DOS.

2) Write ALP to change file extension.
3) Write ALP to UPDATE the file content.
CONCLUSION:
________________________________________________________________
________________________________________________________________
________________________________________________________________
ASSIGNMENT NO: 3
TITLE:
Study of floppy
a) Boot record
PLATFORM:
DOS/Win-98
THEORY:
BOOT RECORD:
HARDWARE LAB
The boot record contains the instructions that load (or "boot") system files (if present)
from disk into memory. All formatted disks contain a boot record even if the system files
are not stored on it.
CHARACTERISTICS OF DISK STORAGE DEVICE:

Tracks and sectors:
- A sector is a segment of a track on a hard disk drive (HDD) or a floppy disk. It
generally contains 512 bytes and is the smallest unit of data that can be accessed by a
disk drive (although software makes it possible to access individual bytes and even
individual bits).
- A track is any of the concentric circles on the magnetic coating on a platter or floppy
disk over which one magnetic head passes while it is stationary but the platter or floppy is
spinning. In the case of CDROMs, DVDs and other optical disks, there is a single spiral
track formed in a plastic coating.
- Both diskettes and hard disk devices are run by a controller that handles the placement
of read/write heads on the disk surface and transfer data between disk and memory.
- Tracks are divided into a number of segments called sectors. Each sector generally
contains 512 bytes and is the smallest unit of data that can be accessed by a disk drive
(although software makes it possible to access individual bytes and even individual bits).
- Tracks on each platter are assigned consecutive numbers by the operating system,
beginning with zero for the outermost track. The operating system remembers where data
is stored by noting these numbers as well as those of the cylinders, heads and sectors.
HARDWARE LAB
Cylinder:
-
A cylinder is a vertical set of all of the tracks with the same number on each
surface of a diskette or hard disk. Thus cylinder 0 is the set of all tracks numbered
0 on every side, cylinder 1 is the set of all tracks numbered I, and so forth. For a
diskette, then, cylinder 0 consists of track 0 on side 1 and track 0 on side 2;
cylinder I consists of track 1 on side 1 and track 1 on side 2; and so forth. Side
number and head are the same; for example, disk head 1 access the data on side 1.
Each track, and thus each cylinder, on a modern HDD has a width of only a few
microns (i.e., millionths of a meter). There can be tens of thousands of tracks on
each platter, and thus the same number of cylinders in the HDD.
HARDWARE LAB
Arm assembly
Physical Sector:
A smallest unit to store data on disk of capacity 512 bytes.
Relative sector:
Sectors are numbered relative to the start of the disk so that first on the disk,on
cylinder 0, track 0 is addressed as relative sector 0.
DISK CONTROLLER:
The disk controller, which is located between the processor and the disk drive,
handles all communication between them. The controller accepts data from the
processor and converts the data into a form that is usable by the device.
HARDWARE LAB
The role of the controller is to provide the appropriate commands to move the
access arm to the required cylinder, select the read/write head, and accept the data
from the sector when the data reaches the read/write head.
Two factors govern the data transfer rate, the speed with which the disk drive
delivers data to the computer: access time and rotation rate.
1.
Access (or seek) time is concerned with the movement required for the
read/write heads to reach the required cylinder/track. For sequential
processing, the heads move at most one cylinder; for random
processing, head movement may involve many cylinders.
2.
The rate of rotation determines the time taken for the required sector to
reach the head and to transfer the data from the sector to the computer's
memory. The average time for this operation is, of course, a half
revolution, and is known as latency. For a rotation rate of 6,000 rpm, the
speed per second is 6,000/60 = 100 revolutions. A single rotation
requires 11100 seconds, which equals 10 milliseconds. Latency is
therefore 5 milliseconds.
Clusters:
-
A cluster is a group of sectors that the system treats as a unit of storage space.
A cluster .size is always a power of 2, such as 1, 2,4, or 8 sectors.
A diskettes with two sectors per cluster look like this:
SECTOR
CLUSTER
SECTOR
SECTOR
CLUSTER
HARDWARE LAB
A diskettes with four sectors per cluster look like this:
SECTOR
SECTOR
SECTOR
SECTOR
CLUSTER
Disk capacity:
Here are storage capacities for two types of 3.5" diskettes:
Capacity
3.5" 720KB
3.5" 1.44MB
Tracks per
Sectors
Bytes
Total
Sectors
Side
Per
Per
Two Sides
per
(Cylinders)
80
80
Track
9
18
Sector
512
512
737,280
1,474,560
Cluster
2
1
For hard disks, capacities vary considerably by device and by partition. Useful
operations for determining the number of cylinders, sectors per track, or read-write heads
include INT 2lH functions IFH and 440DH with minor code 6OH.
Disk area:
The data area for a bootable disk or diskette begins with two system files named
IO.SYS and MSDOS.SYS. When we use FORMAT/S to format a disk, DOS copies its
system files onto the first sectors of the data area. User files either immediately follow the
system files or, if there are no system file begin at the start of the data area.
BOOT RECORD
SYSTEM
FAT
DIRECTORY
SYSTEM FILES
DATA AREA
HARDWARE LAB
The system area is the first area of a disk on the outer most track beginning with
side 0, track 0 and sector 1.
The following list gives the organization of 3.5 diskettes device, showing starting
and ending sector number:
BOOT
FAT
1-18
DIRECTORY
19-32
3.5 / 1.44MB
The next section explains the boot record, directory and FAT.
BOOT RECORD:
It helps the operating system to load the operating system from disk into memory.
The boot record contains the following information, in order of offset address:
00H
Jump to bootstrap routine at offset 3EH in the boot record
03H
Name or DOS version number when boot created
0BH
Bytes per sec or, usually 200H (512)
0DH
Sectors per cluster (1, 2, 4, or 8)
0EH
Number of reserved sectors
10H
Number of copies of FAT (1 .or 2)
11H
Number of root directory entries
13H
Number of disk sectors if volume less than 32MB
15H
Media descriptor byte (same as first byte of FAT, described later)
16H
Number of sectors for FAT
18H
Number of sectors per track
1AH
Number of read-write heads (sides or surfaces)
1CH
Number of hidden sectors
HARDWARE LAB
1EH
Reserved by the system
20H
Total number of sectors if volume is greater than 32MB
24H
Physical drive number (for diskette, A = 0; for hard disk, 80H = drive C)
25H
26H
Extended boot sector signature (contains 29H)
27 H
Volumes ID
2BH
Volume label
36H
3EH-1FFH
Bootstrap loader begins here
INT13H -> disk related interrupt

00H => Reset disk system
01H => Get disk system status
02H => Read sector
READ SECTOR:
Call with:AH = 02H
AL = number of sector
CH =cylinder
CL = sector
DH= head
DL = drive
00H-7FH
Floppy disk
80H-FFH
Fixed disk
Returns:If successful
Carry flag= clear
AH => 00H
AL => no. of sectors
HARDWARE LAB
If unsuccessful
Carry flag= set
FAQs:1) What is BOOT RECORD?
__________________________________________________________________
__________________________________________________________________
2) What is Directory?
__________________________________________________________________
__________________________________________________________________
3) What is permanent on BOOT Record
__________________________________________________________________
__________________________________________________________________
4) List the characteristics of Disk Storage Device?
__________________________________________________________________
__________________________________________________________________
5) What is track?
__________________________________________________________________
__________________________________________________________________
6) What is sector?
__________________________________________________________________
__________________________________________________________________
HARDWARE LAB
7) What is cylinder?
__________________________________________________________________
__________________________________________________________________
8) What is physical Sector?

__________________________________________________________________
__________________________________________________________________
9) What is relative Sector?

__________________________________________________________________
__________________________________________________________________
10) What is function of Disk Controller?

__________________________________________________________________
__________________________________________________________________
11) What is cluster?

__________________________________________________________________
__________________________________________________________________
Design Problem:1) Design a Program which verifies the sector?

2) Design a program which formats the track?
HARDWARE LAB
3) Design program which gives the drive parameters?
CONCLUSION:
________________________________________________________________
________________________________________________________________
_
HARDWARE LAB
ASSIGNMENT NO: 4
TITLE:
Study of floppy
a) Root directory
b) Fat
PLATFORM:
DOS/Win-98
THEORY:
ROOT DIRECTORY:
All files on a disk begin on a cluster boundary, which is the first sector of the cluster. For
each file, the system creates a 32-byte (20H) directory entry that describes the name of
the file, the date of creation, its size, and the location of its starting cluster.
00H
08H
0CH
16H
18H
File Name
Time attribute or Last updated
Extension
File Attribute
RESERVED
HARDWARE LAB
Value
00H
05H
2EH
Meaning
Dir. Entry has never been used ;end of occupied portion of directory
First character of file name is actually E5H
Entry is an Alias for the current or parent directory.If the next byte is also
2EH,the cluster field contains the cluster number of the parent directory
File has been erased.
E5H
Bit
0
1
2
3
4
5
6
7
Meaning
Read-only; attempts to open for write or to delete will fail
Hidden file; excluded from normal searches
System file; excluded from normal searches
Volume label; can exist only in root directory
Directory; excluded from normal searches.
Archive bit; set whenever file is modified.
Reserved
Reserved
FAT:
It allows disk space for files.
CHARACTERISTICS OF DISK STORAGE DEVICE:

Tracks and sectors:
- A sector is a segment of a track on a hard disk drive (HDD) or a floppy disk. It
generally contains 512 bytes and is the smallest unit of data that can be accessed by a
disk drive (although software makes it possible to access individual bytes and even
individual bits).
- A track is any of the concentric circles on the magnetic coating on a platter or floppy
disk over which one magnetic head passes while it is stationary but the platter or floppy is
spinning. In the case of CDROMs, DVDs and other optical disks, there is a single spiral
track formed in a plastic coating.
HARDWARE LAB
- Both diskettes and hard disk devices are run by a controller that handles the placement
of read/write heads on the disk surface and transfer data between disk and memory.
- Tracks are divided into a number of segments called sectors. Each sector generally
contains 512 bytes and is the smallest unit of data that can be accessed by a disk drive
(although software makes it possible to access individual bytes and even individual bits).
- Tracks on each platter are assigned consecutive numbers by the operating system,
beginning with zero for the outermost track. The operating system remembers where data
is stored by noting these numbers as well as those of the cylinders, heads and sectors.
HARDWARE LAB
Cylinder:
-
A cylinder is a vertical set of all of the tracks with the same number on each
surface of a diskette or hard disk. Thus cylinder 0 is the set of all tracks numbered
0 on every side, cylinder 1 is the set of all tracks numbered I, and so forth. For a
diskette, then, cylinder 0 consists of track 0 on side 1 and track 0 on side 2;
cylinder I consists of track 1 on side 1 and track 1 on side 2; and so forth. Side
number and head are the same; for example, disk head 1 access the data on side 1.
Each track, and thus each cylinder, on a modern HDD has a width of only a few
microns (i.e., millionths of a meter). There can be tens of thousands of tracks on
each platter, and thus the same number of cylinders in the HDD.
Arm assembly
HARDWARE LAB
Physical Sector:
A smallest unit to store data on disk of capacity 512 bytes.
Relative sector:
Sectors are numbered relative to the start of the disk so that first on the disk,on
cylinder 0, track 0 is addressed as relative sector 0.
DISK CONTROLLER:
The disk controller, which is located between the processor and the disk drive,
handles all communication between them. The controller accepts data from the
processor and converts the data into a form that is usable by the device.
The role of the controller is to provide the appropriate commands to move the
access arm to the required cylinder, select the read/write head, and accept the data
from the sector when the data reaches the read/write head.
Two factors govern the data transfer rate, the speed with which the disk drive
delivers data to the computer: access time and rotation rate.
3.
Access (or seek) time is concerned with the movement required for the
read/write heads to reach the required cylinder/track. For sequential
processing, the heads move at most one cylinder; for random
processing, head movement may involve many cylinders.
4.
The rate of rotation determines the time taken for the required sector to
reach the head and to transfer the data from the sector to the computer's
memory. The average time for this operation is, of course, a half
revolution, and is known as latency. For a rotation rate of 6,000 rpm, the
speed per second is 6,000/60 = 100 revolutions. A single rotation
HARDWARE LAB
requires 11100 seconds, which equals 10 milliseconds. Latency is

therefore 5 milliseconds.
Clusters:
-
A cluster is a group of sectors that the system treats as a unit of storage space.
A cluster .size is always a power of 2, such as 1, 2,4, or 8 sectors.
A diskettes with two sectors per cluster look like this:
SECTOR
SECTOR
CLUSTER
SECTOR
CLUSTER
A diskettes with four sectors per cluster look like this:
SECTOR
SECTOR
SECTOR
SECTOR
CLUSTER
Disk capacity:
Here are storage capacities for two types of 3.5" diskettes:
HARDWARE LAB
Capacity
3.5" 720KB
3.5" 1.44MB
Tracks per
Sectors
Bytes
Total
Sectors
Side
Per
Per
Two Sides
per
(Cylinders)
80
80
Track
9
18
Sector
512
512
737,280
1,474,560
Cluster
2
1
For hard disks, capacities vary considerably by device and by partition. Useful
operations for determining the number of cylinders, sectors per track, or read-write heads
include INT 2lH functions IFH and 440DH with minor code 6OH.
Disk area:
The data area for a bootable disk or diskette begins with two system files named
IO.SYS and MSDOS.SYS. When we use FORMAT/S to format a disk, DOS copies its
system files onto the first sectors of the data area. User files either immediately follow the
system files or, if there are no system file begin at the start of the data area.
BOOT RECORD
FAT
DIRECTORY
DATA AREA
SYSTEM
SYSTEM FILES
The system area is the first area of a disk on the outer most track beginning with
side 0, track 0 and sector 1.
The following list gives the organization of 3.5 diskettes device, showing starting
and ending sector number:
BOOT
0
FAT
1-18
DIRECTORY
19-32
3.5 / 1.44MB
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The next section explains the boot record, directory and FAT.
THE ROOT DIRECTORY:
It contains name location and status of each file on the disk. The top directory in a
file system. The root directory is provided by the operating system and has a special
name; for example, in DOS systems is called the root directory. The root directory is
sometimes referred to simply as the root.
Directory entries have the following formats:

BYTES
00H-07H
PURPOSE
Filename, as defined in the program that created the file. The first byte can
also indicate the file status:
OOH File has never been used
05H
First character of filename is actually E5H
2EH
File is a subdirectory
E5H
File has been deleted
08H-0AH
Filename extension, such as EXE or ASM
0BH
File attribute, defining the type of file (note that a file may have more than
one attribute):
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OOH Normal file

01H
File that can only be read (read-only)
02H
Hidden file, not displayed by a directory search
04H
System file, not displayed by a directory search
08H
Volume label (if this is a volume label record, the label itself is in
the filename and extension fields)
1OH
Subdirectory
20H
Archive file, which indicates whether the file was rewritten since
the last update.
(For example, code 07H means system file (04H) that is read-only
(RO) and hidden (02H).)
0CH-15H
Reserved by the system.
16H-17H
Time of day when the file was created or last updated; stored as 16 bits in
binary format as hhhhhmmmmmmsssss.
18H-19H
Date when the file was created or last updated, stored as 16 bits in binary
format as yyyyyyymmmmddddd. Year can be 000-119 (with 1980 as the
starting point), month can be 01-12, and day can be 01-31.
1AH-1BH
Starting cluster of the file. The number is relative to the last two sectors of
the directory. Where there are no system files, the first data file begins at
relative cluster 002. The actual side, track, and cluster depend on disk
capacity. A zero entry means that the file has no space allocated to it.
1CH-1FH
Size of the file in bytes. When a file is written, the system calculates and
stores its size in this field.
INT25H -> Absolute disk read

Call with:AL = drive number (0=A,1=B etc)
CX = no. of sector to read
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DX= starting sector number

DS: BX = segment offset of number
Return: -
if successful
Carry flag= clear
If unsuccessful
Carry flag=set
AX=error code
FILE ALLOCATION TABLE(FAT):

-
Purpose of FAT is to allocate disk space for files. FAT contain entry for each
cluster on disk.
FAT begins at sector 2
Original designer provide for 2 copies of FAT (FAT 1 and FAT 2).
FAT 2 could be used if FAT 1 is corrupted.
File Allocation Table (FAT) is a partially patented file system developed by

Microsoft for MS-DOS and was the primary file system for consumer versions of
Microsoft Windows up to and including Windows Me.
FAT as it applies to flexible/floppy and optical disk cartridges (FAT12 and FAT16
without long file name support) has been standardized as ECMA-107 and
ISO/IEC 9293.
FAT are mainly three types.

1) FAT12
2) FAT16
3) FAT32
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FAT12
Microsoft
FAT16
Full Name
File Allocation Table

(12-bit version)

(16-bit version)
Introduced
1977 (Microsoft Disk November
Developer
Partition
FAT32

(32-bit version)
1987, August 1996 (Windows
BASIC)
(Compaq DOS 3.31)
95 OSR2)
0x01 (MBR)
0x04, 0x06, 0x0E (MBR)
0x0B,
identifier
0x0C
(MBR)
EBD0A0A2-B9E5-4433
-87C0-68B6B72699C7
(GPT)
FAT12:
-
This initial version of FAT is now referred to as FAT12. As a file system for
floppy disks, it had a number of limitations: cluster addresses were "only" 12 bits
long (which limited cluster count to 4096 and made FAT manipulation a bit
tricky) and the disk size was stored as a 16-bit count of sectors, which limited the
size to 32 MB.
FAT12 was used by several manufacturers with different physical formats but a
typical floppy diskette at the time was 5.25", single-sided, 40 tracks, with 8
sectors per track, resulting in a capacity of slightly less than 160 KB.
FAT16:
-
In 1984 IBM released the PC AT, which featured a 20 MB hard disk. Microsoft
introduced MS-DOS 3.0 in parallel. Cluster addresses were increased to 16-bit,
allowing for a greater number of clusters (up to 65,517) and consequently much
greater file-system sizes.
FAT32:
-
In theory, this should support a total of approximately 268,435,456 (228) clusters,

allowing for drive sizes in the range of 8 terabytes with 32K clusters, but the boot
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sector uses a 32 bit field to limit volume size to 2 32 sectors (2TB on a hard disk
with 512 byte sectors).
FAQs:1) What is ROOT RECORD?

__________________________________________________________________
__________________________________________________________________
2) What is Directory?
__________________________________________________________________
__________________________________________________________________
3) What is FAT and What it includes?
__________________________________________________________________
__________________________________________________________________
4) List the characteristics of Disk Storage Device?
__________________________________________________________________
__________________________________________________________________
5) What is track?
__________________________________________________________________
__________________________________________________________________
6) What is sector?
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__________________________________________________________________
__________________________________________________________________
7) What is cylinder?
__________________________________________________________________
__________________________________________________________________
8) What is physical Sector?

__________________________________________________________________
__________________________________________________________________
9) What is relative Sector?

__________________________________________________________________
__________________________________________________________________
10) What is function of Disk Controller?

__________________________________________________________________
__________________________________________________________________
11) What is cluster?

__________________________________________________________________
__________________________________________________________________
Design Problem:-
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1) Design a Program which verifies the sector?

2) Design a program which formats the track?
3) Design program which gives the drive parameters?
CONCLUSION:
________________________________________________________________
________________________________________________________________
_
ASSIGNMENT NO: 05
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TITLE: Study of Printer Device Driver

PLATFORM: WINDOWS 98
THEORY:
1. File system drivers
"A device driver [...] is a computer program that enables another program [...] to interact
with a hardware device. By extension, you could potentially call any service a driver...
FSDs are developed using the same methodologies and kits as "device" drivers, at
least in the Microsoft world. In fact, the filesystem kit is a superset of the driver
development kit.
A software driver is a computer program allowing higher-level computer programs to
interact with a computer hardware device.
A driver typically communicates with the device through the computer bus or
communications subsystem to which the hardware is connected. When a calling program
invokes a routine in the driver, the driver issues commands to the device. Once the device
sends data back to the driver, the driver may invoke routines in the original calling
program. Drivers are hardware-dependent and operating-system-specific. They usually
provide the interrupt handling required for any necessary asynchronous time-dependent
hardware interface.
Purpose
Device drivers simplify programming by acting like a translator between a device and the
applications or operating systems that use it. The higher-level code can be written
independently of whatever specific hardware device it may control. Every version of a
device, such as a printer, requires its own specialized commands. In contrast, most
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applications access devices (such as sending a file to a printer) by using high-level,

generic commands, such as PRINTLN. The driver accepts these generic statements and
converts them into the low-level commands required by the device.
Microsoft has attempted to reduce system instability due to poorly written device drivers,
by creating a new framework for driver development, called Windows Driver Foundation
(WDF). This includes User-Mode Driver Framework (UMDF) that encourages
development of certain types of drivers - primarily those that implement a message-based
protocol for communicating with their devices - as user mode drivers. If such drivers
malfunction, they do not cause system instability. The Kernel-Mode Driver Framework
(KMDF) model continues to allow development of kernel-mode device drivers, but
attempts to provide standard implementations of functions that are well known to cause
problems, including cancellation of I/O operations, power management, and plug and
play device support.
Apple has an open-source framework for developing drivers on Mac OS X called the I/O
Kit.
2 .Device driver applications
Because of the diversity of modern hardware and operating systems, many ways exist in
which drivers can be used. Drivers are used for interfacing with:
Printers
In computers, a printer driver or a print processor is a piece of software that converts the
data to be printed to the form specific to a printer. The purpose of printer drivers is to
allow applications to do printing without being aware of the technical details of each
printer model.
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3.
Printer drivers in different operating systems
UNIX
On UNIX systems and other systems which use the Common UNIX Printing System,
such as Mac OS X, printer drivers are typically implemented as filters. They are usually
named the front end of the printing system, while the printer spoolers constitute the back
end.
Backend are also used to determinate the available devices. On startup, each backend is
asked for a list of devices it supports, and any information that is available.
DOS
On MS-DOS, there have been no system-wide printer drivers; each application was
shipped with its own printer drivers, which were essentially descriptions of printer
commands. Printers, too, have been supplied with drivers for the most popular
applications. In additions, applications included tools for editing printer description, in
case there was no ready driver. In the days when DOS was widely used, many printers
had emulation modes for Epson FX80 and IBM Proprinter commands. It appears that
these also worked with Windows 3.0,
Windows
On Microsoft Windows systems, printer drivers make a part of GDI or XPS . Programs
then use the same standard APIs to draw text and pictures both on screen and on paper.
Printers which use GDI natively are commonly referred to as Win printers and are
considered incompatible with other operating systems.
Win32 APIs also allow applications to send data directly to the spooler, bypassing the
printer driver; however, few applications actually use this option.
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4. Printing mode
The data received by a printer may be:
1. a string of characters
2. a bitmapped image
3. a vector image
5. Computer printer
A computer printer, or more commonly a printer, produces a hard copy (permanent
human-readable text and/or graphics) of documents stored in electronic form, usually on
physical print media such as paper transparencies]]. Many printers are primarily used as
computer peripherals, and are attached by a printer cable to a computer which serves as a
document source. Other printers, commonly known as network printers, have built-in
network interfaces (typically wireless or Ethernet), and can serve as a hardcopy device
for any user on the network.
Dot-matrix printers
In the general sense many printers rely on a matrix of pixels, or dots, that together form
the larger image. However, the term dot matrix printer is specifically used for impact
printers that use a matrix of small pins to create precise dots. The advantage of dot-matrix
over other impact printers is that they can produce graphical images in addition to text;
however the text is generally of poorer quality than impact printers that use letterforms
(type).
Dot-matrix printers can be broadly divided into two major classes:
1. Ballistic wire printers
2. Stored energy printers
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Dot matrix printers can either be character-based or line-based (that is, a single horizontal
series of pixels across the page), referring to the configuration of the print head.
At one time, dot matrix printers were one of the more common types of printers used
for general use - such as for home and small office use. Such printers would have either 9
or 24 pins on the print head. 24-pin print heads were able to print at a higher quality.
Once the price of inkjet printers dropped to the point where they were competitive with
dot matrix printers, dot matrix printers began to fall out of favor for general use.
Dot matrix printers are still commonly used in low-cost, low-quality applications like
cash registers, or in demanding, very high volume applications like invoice printing. The
fact that they use an impact printing method allows them to be used to print multi-part
documents using carbonless copy paper (like sales invoices and credit card receipts),
whereas other printing methods are unusable with paper of this type. Dot-matrix printers
are now (as of 2005) rapidly being superseded even as receipt printers.
The installable device drivers that were introduced in MS-DOS version 2 give the
user great flexibility. They allow the user to customize and configure the computer
for a wide range of peripheral devices, with a minimum of troublesome interactions
and without having to "patch" the operating system. Even the most inexperienced
user can install a new device into a system by plugging in a card, copying a driver
file to t~ disk, and editing the system configuration file.
For those inclined to do their own programming, the MS-DOS installable device
drivers are interfaced to the hardware-independent kernel through a simple and
clearly defined scheme Of function codes and data structures. Given adequate
information about the hardware, any competent assembly-language programmer can
expect to successfully interface even the most bizarre device to MS-DOS without
altering the operating system in the slightest and without acquiring any special or
proprietary' knowledge about its innards.
In retrospect, installable device drivers have proven to be one of the key usability
features of MS-DOS. I feel that they have been largely responsible for the rapid
proliferation and competitive pricing of high-speed mass storage devices for MSComputer Department. SIT, Lonavala
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DOS machines, an~ for the growing confidence of the average user toward
"tampering with" (upgrading) his or her machine.
6. MS-DOS Device-Driver Types

Drivers written for MS-DOS fall into two distinct classes;
1. Block-device drivers
2. Character-device drivers
A driver's class determines what functions. it must support, how it is viewed by MSDOS, and how it makes' the associated physical device appear to behave when an
application program makes a request for VO.
When the number of characters requested by the application program has been
received, when a Ctrl-Z is detected, or when the Enter key is pressed (in the case of the
keyboard), MS-DOS terminates the Input and copies the data from its internal buffer into
the requesting program's buffer. Similarly, during ASCII-mode output, MS-DOS passes
the characters to the device driver one at a time and checks for a Ctrl-C pending at the
keyboard between each character. When a Ctrl-C IS detected, MS-DOS aborts the input
or output operation and transfers to the routine whose address is stored in the Int 23H
vector.
In binary mode, MS-DOS reads or writes the exact number of bytes requested by the
application program, without regard to any control characters such as Enter or Ctrl-C.
MS-DOS passes the entire request through to the driver in a single operation, instead of
breaking it into single-character reads or writes, and transfers the characters directly to or
from the requesting program's buffer.
Block-Device drivers
Block-device drivers usually control random-access mass-storage devices. such as
floppy-disk drives and fixed disks, although they can also be used to control non-randomaccess devices such as magnetic-tape drives. Block devices transfer data in chunks, rather
than one byte at a time. The size of the blocks may be either fixed (disk drives} or
variable (tape drives).
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A block driver can support more than one hardware unit; map a single physical unit
onto two or more logical units, or both. Block devices do not have file-like logical names,
as character devices do. Instead, MS-DOS assigns drive designators to the block-device
units or logical drives in an alphabetic sequence: A, B, and so forth. Each logical drive
contains a file system: boot block, file allocation table, root directory, and so forth.
A block-device driver's position in the chain of all drivers determines the first letter
assigned to that driver. The number of logical drive units that the driver supports
determines the total number of letters assigned to it. Block -device drivers always read or
write exactly the number of sectors requested (barring hardware ) and never filter or
otherwise manipulate the contents of the blocks being transferred.
Initialization
Media check
Build BPB
IOCTL read and write
Status
Read
Write, write/verify
Output until busy
Flush buffers
Device open
Device close
Check whether removable
Generic IOCTL
Get/Set logical device
Strategy routine
Device-driver header
The Device Header

The device header (Figure 14-2) lies at the beginning of the driver. It contains a link to
the next driver in the chain, a set of attribute flags for the device (Figure 14-3), offsets
to the executable strategy and interrupt routines for the device, and the logical-device
name (if it is a character device such as PRN or COM1) or the number of logical units (if
it is a block device).
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Byte offset
00H
02H
04H
Link to next driver, offset

Link to next driver, segment
06H
Device attribute word
08H
Strategy entry point, offset
0AH
Interrupt entry point, offset

Logical name (8 bytes) if character
device
Number of units (1 byte) if block
device,
followed by 7 bytes of reserved
space
Fig: Device-driver header. The offsets to the start and inter routines are offsets from rum
the same segment used to point to the device header.
Bit
Significance
15
1 if character device, 0 if block device
14
1 if IOCTL read and write supported
13
for block devices:
1
,
if BIOS parameter blocks in boot sector should be used to determine media

characteristics 0 if media ID byte should be used
for character devices.-(1 if output until busy supported )
12
Reserved (should be 0)
11
1 if open/close/removable media supported (MS-DOS 3-0 and later)
7-10
6
1if generic IOCTL and get/set logical drive supported (MS-DOS 3.2 )
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1 if CON driver and Int 29H fast-output function supported
1 if current CLOCKS device
1 if current NUL device
for block devices:

1 if driver supports 32-bit sector addressing (MS-DOS 4.0) For character devices:
1 if standard output device (stdout)
1 if current standard input device (stdin)
Fig: Devices attribute word in device header. In block-device drivers, only bits 6, 11, and
13-15 (and bit 1 in MS-DOS version 4.0) have significance; the remainder should always
be zero.
The Strategy Routine

MS-DOS calls the strategy routine (start) for the device when the driver is first loaded
and installed, and again whenever an application program issues an I/O request for the
device. MS-DOS passes the strategy routine a. Double-word pointer to a data structure
called a request header. This structure contains information about the type of operation to
be performed. In current versions of MS-DOS, the strategy routine never actually
performs any I/O operation but simply saves the pointer to the request header. The stmt
routine must not make any Int 21H function calls.
The first 13 bytes of the request header are the same for all device-driver functions and
are therfore referred to as the static portion of the header. The number and contents of the
subsequent bytes vary according to the type of function being requested (Figure 14-4).
Both MS-DOS and the driver read and write information in the request header.
The request header's most important component is a command code, or function number,
passed in its third byte to select a driver sub function such as read, write, or status. Other
information passed to the driver in the header includes unit numbers, transfer addresses,
and sector or byte
Counts.
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MS-DOS request header structure definition

Request
Length
struc
db
request header template structure

?
0 length of request header
Unit
db
1 unit number for this request
Command
db
2 request header's command code
Status
dw
3 driver's return status word
Reserve
db
8 dup (?)
5 reserved area
Media
db
13 media descriptor byte
Address
dd
14 memory address for transfer
Count
dw
18 byte/sector count value
Sector
dw
20 starting sector value
Request
ends
end of request header template
Format of request header. Only the first 13 bytes are common to all driver functions; the
number and definition of the subsequent bytes vary, depending upon the function type.
The structure shown here is the one used by the read and write sub functions of the driver.
The Interrupt Routine

The last and most complex part of a device driver is the interrupt routine (intr), which
MS-DOS calls immediately after it calls the strategy routine. The interrupt routine
implements the device driver proper; it performs (or calls other resident routines to
perform) the actual input or output operations, based on the information passed in the
request header. The start routine may not make any Int 21H function calls, except for a
restricted set during driver initialization.
When an I/O function is completed, the interrupt routine uses the status field in the
request header to inform the DOS kernel about the outcome of the requested I/O
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operation. It can use other fields in the request header to pass back such useful
information as counts of the actual sectors or bytes transferred.
The interrupt routine usually consists of the following elements:
A collection of subroutines to implement the various function types that may be
requested by MS-DOS (sometimes called the command-code routines)

A centralized entry point that saves all affected registers, extracts the. Desired function
code from the request header, and branches to the appropriate command-code routine
(typically accomplished with a jump table)
A centralized exit point that stores status and error codes into the request header
(Figures 14-5 and 14-6) and restores the previous contents of the affected registers
The command-code routines that implement the various functions supported by an
installable device driver are discussed in detail in the following pages.
Bit(s) Significance
15
Error
12-14
Reserved
Busy
Done
0-7
Error code if bit 15 = 1word of the request header.
Fig. Values for the return status word of the request header.
Code
Meaning
Write-protect violation
Unknown unit
Drive not ready
Unknown command
Data error (CRC)
Bad request-structure length
Seek error
Unknown medium
Sector not found
Printer out of paper OAH
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OBH
Read fault
OCH
General failure
OD-OEH
Reserved
OFH
Invalid disk change (MS-DOS versions 3.0 and later)
Fig: Driver error codes returned in bits 0 through 7 of the return status word of the
request header.
Although its name suggests otherwise, the interrupt routine is never entered
asynchronously (on an I/O completion interrupt, for example). Thus, the division of
function between strategy and interrupt routines is completely artificial in the current
versions of MS-DOS.
THE COMMAND-Code Routines
A total of 20 command codes are defined for MS-DOS device drivers. The command
codes (which are not consecutive), the names of the associated driver-interrupt routines,
and the MS-DOS versions in which they are first supported are as follows:
Command
Function
Code
Character
Block
MS-DOS
driver
driver
version
2.0
Init (Initialization)
Media Check
2.0
Build BPB.
2.0
. IOCTL Read
2.0
2.0
Read"
Nondestructive Read
2.0
Input Status
2.0
Flush Input Buffers
2.0
Write
Write with Verify
2.0
2.0
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10
Output Status
2.0
11
Flush Output Buffers
2.0
12
IOCTL Write
2.0
13
Device Open
3.0
14
Device Close
3.0
15
Removable Media
3.0
16
Output until Busy
19
Generic IOCTL
23
24
3-0
x
3-2
Get Logical Device
3-2
Set Logical Device
3.2
As you can see from the preceding table, a driver's interrupt section must support
functions 0 through 12 under all versions of MS-DOS. Drivers tailored for MS-DOS 3-0
and 31 can optionally support an additional four functions, and MS-DOS drivers for
versions 3-2 and later can support three more (for a total of 20). MS-DOS inspects the
bits in the attribute word of the device-driver header to determine which of the optional
functions a driver supports, if any.
Some of the functions are relevant only for character-device drivers and some only for
block-device drivers; a few have meaning to both types. In any case, both driver types
should have an executable routine present for each function, even if it does nothing
except set the done flag in the status word of the request header.
Function 00H (0): Driver Initialization
MS-DOS requests the driver's initialization function Unit) only once, when the driver is
first loaded. This function performs any necessary device hardware initialization, setup of
interrupt vectors, and so forth. The initialization routine must return the address of the
position where free memory begins after the driver code (the break address), so that MSDOS knows where it can build certain control structures and then load the next installable
driver. If this is a block-device driver, init must also return the number of units and the
address of a BPB pointer array.
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MS-DOS uses the number of units returned by a block driver in the request header to
assign drive identifiers. For example, if the current maximum drive is D and the driver
being initialized supports four units, MS-DOS will assign it the drive letters E, F, G, and
H. Although the device-driver header also has a field for number of units, MS-DOS does
not inspect it.The BPB pointer array is an array of word offsets to BIOS parameter blocks
. Each unit defined by the driver must have one entry in the array, although the entries
can all point to the same BPB to conserve memory. During the operating-system boot
sequence, MS-DOS scans all the BPBs defined by all the units in all the block-device
drivers to determine the largest sector size that exists on any device in the system and
uses this information to set its cache buffer size.
The operating-system services that the initialization code can invoke at load time are very
limitedonly Int 21H Functions 01H through OCH and 30H. These are just adequate to
check the MS-DOS version number and display a driver-identification or error message.
. Many programmers position the initialization code at the end of the driver and return
that address as the location of the first free memory, so that MS-DOS will reclaim the
memory occupied by the initialization routine after the routine is finished with its work.
If the initialization routine finds that the device is missing or defective and wants to abort
the installation of the driver completely so that it does not occupy any memory, it should
Byte(s)
Contents_
00-01H
Bytes per sector
02H
Sectors per allocation unit (power of 2)
03H-O4H
Number of reserved sectors (starting at sector 0)
05H
Number of file allocation tables
06H-07H
Maximum number of root-directory entries
08H-09H
Total number of sectors in medium
OAH
Media descriptor byte
OBH-OCH
Number of sectors occupied by a single FAT
ODH-OEH
Sectors per track (versions 3-0 and later)
OFH-10H
Number of heads (versions 3-0 and later)
11H-12H
Number of hidden sectors (versions 3.0 and later)
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13H-14H
High-order word of number of hidden sectors (version 4.0)
15H-18H
If bytes 8-9 are zero, total number of sectors in medium (version 4.0)
19H-1EH
Reserved, should be zero (version 4.0)
Fig Structure of a BIOS parameter block (BPB). Every formatted disc contains a copy of
its BPB in the boot sector.
Number of units as zero and set the free memory address to CS: 0000H. (A characterdevice driver that wants to abort its installation should clear bit 15 of the attribute word in
the driver header and then set the units field and free memory address as though it were a
block-device driver.)
The initialization function is called with
RH + 2
BYTE
RH + 18
DWORD
Command code = 0
Pointer to character after equal sign on CONFIG.SYS line
That loaded driver (this information is read-only)
RH + 22
BYTE
Drive number for first unit of this block driver (0 = A, 1 - B,

And so forth) (MS-DOS version 3 only)
It returns:
RH + 3
WORD
Status
RH + 13
BYTE
Number of units (block devices only)
RH + 14
DW6RD
Address of first free memory above driver (break address)
RH + 18
DWORD
BPB pointer array (block devices only)
Function 01H (1): Media Check

The media-check function applies only to block devices, and in character-device drivers it
should do nothing except set the done flag. This function is called when a drive-access
call other than a simple file read or write is pending. MS-DOS passes to the function the
media descriptor byte for the disk that it assumes is in the drive (Figure 14-8). If feasible,
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the media-check routine returns a code indicating whether the disk has been changed
since the last transfer. If the media-check routine can assert that the disk has not been
changed, MS-DOS can bypass rereading the FAT before a directory access, which
improves overall-performance.
Code
Meaning
0F0H
3.5", 2-sided, 18-sector
0F8H
fixed disk
0F9H
3-5", 2-sided, 9-sector
0F9H
OFCH
OFDH
OFEH
OFFH
Current valid MS-DOS codes for the media descriptor byte of the request header,
assuming bit 13 in the attribute word of the driver header is zero.
FAQs:1) What is device driver?
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2) What is Software driver?

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3) What is function of Device driver?
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4) What are modes of printer?

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5) What are types of MS-DOS device drivers?
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6) What is Device header?

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7) What is strategy routine?
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8) What is interrupt routine?
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9) What is command code routine?
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10) What are types of routine?

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Design Problem:1) Write Program to get printer status in LAN Network?

2) Write program to show the value of every status bit for Printer?
3) Write program which will keep printer always busy status but in actual its free?
CONCLUSION:
________________________________________________________________
________________________________________________________________
________________________________________________________________
ASSIGNMENT NO: 6
TITLE: PC to PC Communication using NULL Modem.

a) File Transfer
b) Full duplex character transfer (chat application)
PLATFORM: Win_xp / C
HARDWARE LAB
THEORY:
Introduction to RS-232:
RS232 is the most known serial port used in transmitting the data in communication
and interface. Even though serial port is harder to program than the parallel port, this is
the most effective method in which the data transmission requires less wires that yields to
the less cost. The RS232 is the communication line which enables the data transmission
by only using three wire links. The three links provides transmit, receive and common
ground.
The transmit and receive line on this connecter send and receive data between
the computers. As the name indicates, the data is transmitted serially. The two pins are
TXD & RXD. There are other lines on this port as RTS, CTS, DSR, DTR, and RTS, RI.
The 1 and 0 are the data which defines a voltage level of -3V to -25V and +3V to
+25V respectively.
The electrical characteristics of the serial port as per the EIA (Electronics Industry
Association) RS232C Standard specifies a maximum baud rate of 20,000bps, which is
slow compared to todays standard speed. For this reason, we have chosen the new RS232D Standard, which was recently released.
The RS-232D has existed in two types. i.e., D-TYPE 25 pin connector and D-TYPE
9 pin connector, which are male connectors on the back of the PC. You need a female
connector on your communication from Host to Guest computer. The pin outs of both D9 & D-25 are show below.
HARDWARE LAB
Data Transmission Enable & Data Control Enable:

Devices, which use serial cables for their communication, are split into two categories.
These are DCE (Data Communications Equipment) and DTE (Data Terminal
Equipment.) Data Communications Equipments are devices such as your modem, TA
adapter, plotter etc while Data Terminal Equipment is your Computer or Terminal. A
typical Data Terminal Device is a computer and a typical Data Communications Device is
a Modem. Often people will talk about DTE to DCE or DCE to DCE speeds. DTE to
DCE is the speed between your modem and computer, sometimes referred to as your
terminal speed. This should run at faster speeds than the DCE to DCE speed. DCE to
DCE is the link between modems, sometimes called the line speed.
Most people today will have 28.8K or 33.6K modems. Therefore, we should expect the
DCE to DCE speed to be either 28.8K or 33.6K. Considering the high speed of the
modem we should expect the DTE to DCE speed to be about 115,200 BPS. (Maximum
Speed of the 16550a UART) . The communications program, which we use, has settings
for DCE to DTE speeds. However, the speed is 9.6 KBPS, 144 KBPS etc and the modem
speed.
If we were transferring that text file at 28.8K (DCE- DCE), then when the modem
compresses it you are actually transferring 115.2 KBPS between computers and thus have
a DCE- DTE speed of 115.2 KBPS. Thus, this is why the DCE- DTE should be much
higher than the modem's connection speed. Therefore, if our DTE to DCE speed is
HARDWARE LAB
several times faster than our DCE to DCE speed the PC can send data to your modem at
115,200 BPS
NULL MODEM
Null modem is used to connect two DTE's together. This is used to transfer files between
the computers using protocols like Z modem protocol, x modem protocol, etc
Block dig of null modem

Above-mentioned figure shows the wiring of the null modem. The main feature indicated
here is that the to make the computer to chat with the modem rather than another
computer. The guest & host computer connected through the TD, RD, and SG pins. Any
data that is transmitted through TD line from the Host to Guest is received on RD line.
The Guest computer must have the same setup as the Host. The signal ground (SG) line
of the both must be shorted so that grounds are common to each computer.
HARDWARE LAB
Data Terminal Ready (DTR) is looped back to Data Set Ready and Carrier Detect on
both computers. When the Data Terminal Ready is asserted active, then the Data Set
Ready and Carrier Detect immediately become active. At this point, the computer thinks
the Virtual Modem to which it is connected is ready and has detected the carrier of the
other modem.
All left to worry about now is the Request to Send and Clear To Send. As both computers
communicate together at the same speed, flow control is not needed thus these two lines
are also linked together on each computer. When the computer wishes to send data, it
asserts the Request to Send high and as it is hooked together with the Clear to Send, It
immediately gets a reply that it is ok to send and does so.
The Ring indicator line is only used to tell the computer that there is a ringing signal on
the phone line. As we do not have, a modem connected to the phone line this is left
disconnected
Using bioscom:
The macro bioscom () and function _bios_serialcom() are used in the serial
communication using RS-232 connecter.
Declaration:
bioscom(int cmd, char abyte, int port)
_bios_serialcom(int cmd ,int port, char abyte)
bioscom() and _bios_serialcom() uses the bios interrupt 0x14 to perform various
communicate the serial communication over the I/O ports given in port.
cmd: The I/O operation to be performed.
HARDWARE LAB
portid: port to which data is to be sent or from which data is to be read.

0: COM1
1: COM2
2: COM3
abyte:
When cmd =2 or 3 (_COM_RECEIVE or _COM_STATUS) parameter abyte is ignored.
When cmd = 0 (_COM_INIT), abyte is an OR combination of the following bits
(One from each group):
HARDWARE LAB
For example, if
abyte = 0x8B = (0x80 | 0x03 | 0x00 | 0x08)
= (_COM_1200 | _COM_CHR8 | _COM_STOP1 | _COM_ODDPARITY)
the communications port is set to
1200 baud
(0x80 = _COM_1200)
8 data bits (0x03 = _COM_CHR8)

1 stop bit (0x00 = _COM_STOP1)
Odd parity (0x08 = _COM_ODDPARITY)
To initialise the port with above settings we have to write,
bioscom(0, 0x8B, 0);
To send a data to COM1, the format of the function will be bioscom(1, data, 0).
Similarly bioscom(1, 0, 0 ) will read a data byte from the port.
This method is helpful in writing serial port program with single computer. Also you can
make changes in the port id if your computer has 2 rs232ports. You can connect the com1
HARDWARE LAB
port to com2 of the same computer and change the port id in the program. The data sent
to the port com1 should come to port com2. then also whatever you type in the keyboard
should appear on the screen.
FAQs:1) What is RS232?
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2) Which 3 lines of RS232 are used for data transmission?
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3) What is baud rate?
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4) What is DCE?
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5) What is DTE?
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6) What is function of NUL Modem?
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7) Which protocols asre used by NULL Modem?
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8) What is function of BIOSCOM?
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9) What is syntax of bioscom?
HARDWARE LAB
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10) What is syntax of bios_serialcom?
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Design Problem:1) Design program for Half Duplex data transfer.

2) Design a PC to PC Communication program using parallel ports.
3) Develop chat application for 2 users.
CONCLUSION:
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
ASSIGNMENT NO: 7
TITLE: Write an ALP to understand working of mouse.
THEORY:
General 8086 software interrupt interfaces
Declaration:
int86(int no, union REGS *inregs, union REGS *outregs);
HARDWARE LAB
int int86x(int intno, union REGS *inregs, union REGS *outregs,

struct SREGS *segregs);
Remarks:
int86 and int86x execute an 8086 software interrupt specified by the
argument int no.
With int86x, you can invoke an 8086 software interrupt that takes a value of
DS different from the default data segment, and/or takes an argument in ES.
Before the interrupt
Before executing the software interrupt, these functions copy register
values from inregs into the registers.
int86x also copies the segregs->ds and segregs->es values into the
corresponding registers before executing the software interrupt.
This feature allows programs that use far pointers or a large data memory
model to specify which segment is to be used for the software interrupt.
After the interrupt
After the software interrupt returns, these functions copy the following:
current register values to outregs
status of the carry flag to the x.cflag field in outregs
value of the 8086 flags register to the x.flags field in outregs
int86x also restores DS and sets the segregs->es and segregs->ds fields to
the values of the corresponding segment registers.
If the carry flag is set, it usually indicates that an error has occurred.
NOTE: inregs can point to the same structure that outregs points to.
Return Value:
Both functions return the value of AX after completion of the software
interrupt.
If the carry flag is set, indicating an error (outregs -> x.cflag != 0),
HARDWARE LAB
these functions set _doserrno to the error code

REGS(union)
The union REGS is used to pass information to and from these functions:
int86
int86x
intdos
intdosx
union REGS
{
struct WORDREGS x;
struct BYTEREGS h;
};
UNION(Keyword)
A union is similar to a struct, except it allows you to define variables
that share storage space.
Syntax:
union [<union type name>] {
<type> <variable names> ;
...
} [<union variables>] ;
For example,
union int_or_long {
int
long
i;
l;
} a_number;
Turbo C++ will allocate enough storage in a_number to accommodate the
largest element in the union.
HARDWARE LAB
Unlike a struct, the variables a_ number.i and a_number.l occupy the same
location in memory. Thus, writing into one will overwrite the other.
Elements of a union are accessed in the same manner as a struct.
ALGORITHM:
1. Start
2. Initialise the mouse pointer
3. If mouse is not initialize then display error message
4. else show mouse pointer and X,Y co-ordinates of mouse pointer using int86
If 1 then right button pressed
If 2 then left button pressed
If 3 then both button pressed
5. Stop.
FAQs:1) What is INT86?

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2) What is INT86X ?
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HARDWARE LAB
3) What happens before interrupt is called?

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4) What happens after execution of an Interrupt?

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5) What is REGS ?
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6) What is UNION?
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7) What is INT 33H ?

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8) What is the function code and Interrupt for hide mouse Pointer in case of an
interrupt?
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HARDWARE LAB
9) What is the function code and Interrupt for Show mouse pointer , Mouse Status ?
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10) What is the function code and Interrupt for Status code of Mouse ?
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Design Problem:1) Design ALP to set Mouse Pointer position.
2) Design ALP to get button press information.
3) Design ALP to set horizontal / Vertical limits for Mouse Pointer .
CONCLUSION:
________________________________________________________________________
________________________________________________________________________
ASSIGNMENT NO: 08
TITLE: Study of protected mode.
PROBLEM STATEMENT: Write a ALP of real to protected mode switching (DPMI)
THEORY:
Introduction to Protected-Mode
When introduced in the late 1970's, the 8086 was considered a technological
breakthrough. It was a cheap, powerful 16 bit processor which could address *huge*
HARDWARE LAB
amounts of memory (up to 1MB). The 8086 gained an enormous popularity soon after its
introduction, since it was chosen by IBM engineers when they designed the first personal
computer (they actually used a variant of the 8086 known as the 8088 but the differences
are minor). Since 1MB of memory was considered an overkill for a personal computer,
IBM decided to utilize only the first 640KB for RAM and reserve the remaining 384KB
for the BIOS and ISA add-on cards. At first, most applications were rather compact and
therefore were not affected by the 640KB barrier, but eventually some memory hogging
applications hit the market and Intel had to devise a solution.
The solution came in 1982 when Intel introduced its new processor : The 80286.
As opposed to the 8086 which offered only one operating mode, the 80286 actually
incorporated two: A backward compatible 8086 operating mode called Real-Mode and a
secondary advanced mode called Protected-Mode.
Protected-Mode Memory Management
When the processor is running in protected-mode, two mechanisms are involved in the
memory translation process: Segmentation and Paging. Although working in tandem,
these two mechanisms are completely independent of each other. In fact, the paging unit
can be disabled by clearing a single bit in an internal processor register. In this case, the
linear addresses which are generated by the segmentation unit pass transparently through
the paging unit and straight to the processor address bus.
Figure 1 - Protected-mode address translation process
Segmentation
HARDWARE LAB
The role of the segmentation unit is the same as on the 8086 processor. It allows the
operating system to divide programs into logical blocks and place each block in a
different memory region. This makes it possible to regulate access to critical sections of
the application and help identify bugs during the development process. The
implementation of the segmentation unit on the 80386 (and above) is simply an extension
of the old 8086 unit. It includes several new features such as the ability to define the
exact location and size of each segment in memory and set a specific privilege level to a
segment which protects its content from unauthorized access.
Not only real-mode applications use segment registers for accessing memory. The same
process takes place under protected-mode. However, there are several differences which
should be considered. First, there is a slight change in terminology. Under protectedmode, segment registers receive the name Selectors which reflects their new role in the
memory translation process. Although still 16-bit in size, their interpretation by the
processor is inherently different. Figure 2 presents the structure of a selector along with
the various bit-fields which comprise it.
Figure 2 - Internal composition of a selector

Instead of shifting segment registers (selectors) four bits to the left and adding an offset
(like in real-mode), the processor treats each selector as an index to a Descriptor Table.
Descriptor Tables
Descriptor tables reside in system memory and are used by the processor to perform
address translation. Each entry in a descriptor table is 8 bytes long and represents a single
HARDWARE LAB
segment in memory. A descriptor entry contains both a pointer to the first byte in the
associated segment and a 20-bit value which represents the size of the segment in
memory. Several other fields contain special attributes such as a privilege level and the
segment's type. Figure 3 presents the exact structure of a descriptor entry along with a
description of each of its internal fields.
Figure 3 - Structure of a descriptor entry

Table 1 contains a complete list of all descriptor fields and their functionality.
Field
Designated Role
Segment
Base
Address
(32-bits)
BASE
This field points to the segment's starting location in the
D/B
4GB linear address space.

Segment
Size
Bit
When the descriptor entry describes a code segment, this

bit is used to specify the default length of operands and
addresses.
When the bit is set, the processor assumes a 32-bit
HARDWARE LAB
segment.
When the bit is clear, a 16-bit segment is assumed.
When the descriptor entry describes a data segment, this
bit is used to control the operation of the stack.
When this bit is set, stack operations use the ESP register.
When this bit is clear, stack operations use the SP register.
Descriptor
Privilege
Level
(2-bits)
DPL
This field defines the segment privilege level. It is used by

the protection mechanism built into the processor to
restrict access to the segment.
Granularity
Bit
This bit controls the resolution of the segment limit field.

When this bit is clear, the resolution is set to one byte.
When this bit is set, the resolution is set to 4KB.
Segment
Limit
(20-bits)
LIMIT
This field determines the size of the segment in units of

one byte (When the granularity bit is clear) or in units of
4KB (When the granularity bit is set).
Segment
Present
Bit
This bit specifies whether the segment is present in

memory.
When this bit is clear, a segment-not-present exception is
P
generated whenever a selector for the descriptor is loaded

into
one
of
the
segment
registers.
This is used to notify the operating system of any attempt

to access a segment which has been swapped to disk
(virtual memory support) or which was not previously
S
allocated (a protection violation).

Descriptor
Type
Bit
This bit determines whether this is a normal segment or a

system
segment.
When this bit is set, this is either a code or a data segment.
HARDWARE LAB
When this bit is clear, this is a system segment.

Segment
Type
(4-bits)
When the descriptor entry describes a code segment, this

field determines the type of the segment: execute-only or
execute-read, conforming or non-conforming.
When the descriptor entry describes a data segment, this
field determines the type of the segment: read-only or readwrite,
expand-down
or
expand-up.
Accessing an expand-up segment with an offset which

exceeds the segment limit value causes an exception.
Type
The limit field in expand-down data segments is treated

differently by the processor. Offsets which cause an
exception to occur in expand-up segments are valid in
expand-down segments. An access into an expand-down
segment must be done with an offset larger than the
segment limit or else an exception is generated.
Decreasing the segment limit value in an expand-down
segment causes memory to be allocated at the bottom of
the segment. This is very useful for stacks since they tend
to grow toward lower memory addresses.
Table 1 - Description of bit-fields in a descriptor entry
Since each selector points to a specific descriptor entry, there is a one to one relationship
between selectors and segments in memory. This concept is demonstrated in the
following figure.
HARDWARE LAB
Figure 4 - Relationship between selectors and segments

As figure 5 shows, linear address calculation (which can be the physical address if paging
is disabled) is done by using the selector as an index to the descriptor table, getting the
base address of the segment, and adding the offset.
Figure 5 - Virtual to linear address translation
HARDWARE LAB
Two types of descriptor tables are used by the processor when working in protectedmode. The first is known as the GDT (Global Descriptor Table) and is used mainly for
holding descriptor entries of operating system segments. The second type is known as the
LDT (Local Descriptor Table) and contains entries of normal application segments
(although not necessarily). During initialization, the kernel creates a single GDT which is
kept in memory until either the operating system terminates or until the processor is
switched back to real-mode.
Whenever the user starts an application, the operating system creates a new LDT to hold
the descriptor entries which represent the segments used by the new task. This makes it
possible for the operating system to isolate each task's address space by enabling a
different LDT whenever a task switch occurs. Bugs and other errors in the application
cannot affect other running processes and are limited in scope to the currently mapped
memory segments.
Note that not all operating systems behave exactly as described above (for instance, all
Windows applications share a single LDT). However, this is the recommended
programming practice as offered by Intel.
When looking for a specific descriptor entry, the addressing unit in the processor uses the
TI bit (which is part of the selector) to decide which descriptor table should be used (the
GDT or the currently active LDT). Figure 6 shows this process in clarity.
HARDWARE LAB
Figure 6 - The Table Indicator bit

The linear address and size of the GDT itself are stored in a special processor register
called GDTR. During bootstrap, the operating system initializes this register to point to
the newly created GDT and does not modify its value during the entire session. In much
the same manner, the LDTR register contains the size and position of the currently active
LDT in memory (In fact, it serves as a selector to the GDT, pointing to a descriptor entry
which contains all the relevant information). The fact that the LDTR register serves as a
selector to the GDT rather than contain specific values, makes it possible for the
operating system to switch easily between different LDTs and prevent inter-task memory
corruptions.
In order to clarify the operation of the segmentation mechanism in protected-mode, I'll
use a small C code snippet:
Char
far
*pChar;
HARDWARE LAB
pChar
GlobalAlloc(GMEM_FIXED,
100);
pChar[50] = 'A';
This piece of code asks Windows to allocate a 100 bytes buffer and store its address in a
far pointer called pChar. If you examine the code inside GlobalAlloc, you will see that
Windows allocates a selector in its LDT whenever you call this function in your
application. So pChar actually contains both a selector and an offset. To modify the
allocated buffer, the processor uses the LDTR register to index its GDT and find the
currently active LDT descriptor. Then, it accesses the LDT by using the selector part of
pChar as an index to retrieve the segment base address. The offset (50) is added to the
retrieved segment base address and the letter 'A' is written to the calculated memory
location.
Note that the information presented above applies only to the 16-bit implementation of
Windows. The behavior of GlobalAlloc on the Win32 platforms is inherently different.
Paging
Paging is a mechanism which helps the operating system to create unique virtual (faked)
address spaces while it also has a major role in memory simulation using disk space - A
process commonly known as Virtual Memory support.
The 32-bit linear address generated by the segmentation unit can be optionally fed into
the paging unit to undergo a second address manipulation process. There is no
mathematical correlation between a linear address and its associated physical counterpart
but instead, special tables in memory known as the Page Tables assist the paging unit in
transforming the input linear address into a physical address which is sent to the
processor bus.
Applications live inside a 4GB linear address space and have no indication of how
physical memory is organized. This has numerous benefits since no application can see or
modify other applications data structures - One of the features required by most
multitasking operating systems.
HARDWARE LAB
The paging unit treats the linear and physical address spaces as a collection of
consecutive 4KB pages (The Pentium and Pentium Pro can also handle 4MB pages). A
linear page can be mapped to any of the physical pages or it can be marked as nonpresent to make it sensitive to memory accesses. Trying to read or modify a non-present
page causes the processor to generate a Page Fault Exception (exception 0xEh) which is
usually handled by the operating system internal code.
This is exacly the essence of virtual memory. When programs consume all available
memory, the operating system attempts to free memory by swapping least recently used
(LRU) pages of memory to disk. The swapped pages are marked as non-present so when
they are later accessed by their owning application, they would be automatically reloaded
from disk by the operating system (The code handling the page exception is responsible
for loading these pages and mapping them back to physical memory). You can think of
this process as if the operating system "steals" memory from background tasks in order to
give it to the currently active application.
The real impressive characteristic of the virtual memory mechanism is that it is
completely transparent to application code. After loading a page from disk and remapping
it to physical memory, the operating system reexecutes the instruction which caused the
page fault exception to occur, so the running application is not even aware of the fact that
part of its memory was stored temporarily on disk.
Before enabling the paging unit, the operating system must construct a table in memory
known as the page directory table. The 1024 DWORD entries of the page directory table
hold physical addresses of another set of paging tables called page tables. Page tables
participate in the last stage of the address translation process since they actually contain
the physical addresses of the 4KB chunks of memory.
A close examination of the paging process reveals that the processor breaks the linear
address into three components before turning it into a physical one. The top 10 bits of the
linear address are used by the processor to index the page directory table. The processor
retrieves the entry from the table and uses it to find the physical address of a page table.
HARDWARE LAB
The next 10 bits of the linear address serve as an index into the corresponding page table.
By adding the page table entry value (which represents the physical address of a physical
page in memory) and the 12 lower bits of the linear address (the offset into the page), the
processor can locate the requested physical address and send it to its address bus. Figure
7 shows the internal structure of a linear address and its interpretation by the processor.
Figure 7 - Components of a linear address

The two-level address indirection mechanism (page directory and page table) was chosen
to solve the problem related to the memory occupied by the page tables themselves. Since
each page table (including the page directory table) occupies 4KB of physical memory
(1024 entries * 4 bytes each), 1024 page tables (one page table for each entry in the page
directory) would require 4MB of memory - An awful waste of valuable memory bytes.
The use of the page directory table solves this problem since each entry (which represents
a 4KB page table) can be marked as non-present. Non-present page tables eliminate the
need to allocate a chunk of 4KB physical memory to hold their content.
Under Windows 95, each running 32-bit process is mapped to the 4MB-2GB range of
linear address space. Although 32-bit applications share the same linear address space,
Windows loads each application to a different physical memory location (if enough
memory is available). Whenever a task switch occurs, Windows modifies its page tables
HARDWARE LAB
to reflect the new linear to physical mapping scheme and swaps least recently used pages
of memory to disk.
FAQs:1) What is segmentation?
__________________________________________________________________
__________________________________________________________________
2) What is paging?
__________________________________________________________________
__________________________________________________________________
3) What is working of 1687H Function with interrupt 2FH?
__________________________________________________________________
__________________________________________________________________
4) What is descriptor tables?
__________________________________________________________________
__________________________________________________________________
5) What is content of descriptor tables?
__________________________________________________________________
__________________________________________________________________
6) What is GDT?
__________________________________________________________________
__________________________________________________________________
7) What is LDT?
HARDWARE LAB
__________________________________________________________________
__________________________________________________________________
8) What \is LDTR and GDTR?

__________________________________________________________________
__________________________________________________________________
9) What is use of Function 1687H with Interrupt INT2FH?

__________________________________________________________________
__________________________________________________________________
10) How LDTR and GDTR are related?
__________________________________________________________________
__________________________________________________________________
Design Problem:1) Write ALP to find real mode supported or not?

2) Design ALP to perform other operations supported by Interupt 2FH?
3) Write ALP to display descriptor table entries?
CONCLUSION:
________________________________________________________________
________________________________________________________________
________________________________________________________________
ASSIGNMENT NO: 9
HARDWARE LAB
TITLE:
Study of Pentium Motherboard:
1. Study of Motherboard Layout.
2. Study of CMOS SETUP
PLATFORM:
Windows XP
THEORY:
Motherboard is the largest circuit board inside the computer, it contains the
computers CPU, memory (RAM & ROM) & various support chips for CPU.
Motherboard also contains many expansion slots on which you can connect
smaller circuit board to interface different devices such as monitor pointer sound
card etc. with computer.
A) Functional Components Of Motherboard:1. Reset Logic:
Resetting of PC is done under any of the following conditions
During Power ON (Power up Reset)
a. Pressing Reset push button or switch i. e. manual reset.
b. Pressing CTRL, ALT, DEL key all together (soft reset)
The soft reset is different from power up reset & manual reset, which are
H/W reset. The H/W effectively applies a reset signal to the microprocessors
clock generator. As a result the microprocessor performs reset sequence which
involves clearing of all flags in IP, DS, SS & ES registers & setting up all 1s in
CS register. The soft reset is purely a S/W sequence as a result of which the POST
gets control.
2. DMA Logic:
HARDWARE LAB
It includes DMA controller, 4-bit DMA page register address buffer &
address latch. The DMA controller provides 4 channel but the PC makes the use
of only 3 channels. The channel 1 is not used in PC.
When the DMA controller perform a bus cycle it sends LSB address bits
on the address pins A0 A7 which are connected to XA0 XA7. The 8 MSB
add bit are issued by the DMA controller on its data pins DB0 DB7. This is
present on there only for clock cycle. The latch outputs are connected to A8
A15. When the CPU is circuit 1 of bus the DMA AEN signal at OE I/P pin No1 of
this latch is high making the latch output bi-directional.
The X1OW & XIOR are bidirectional signal whereas XMEMW &
XMEMR are only O/P signals from DMA controller.
3. Keyboard Logic:
The keyboard logic interface receives the scan code in the serial format
from the keyboard assembles the serial data into parallel 8 bit scan code &
generates interrupts request to the interrupt logic. The SYS (IRQ) S/W follows
specific protocol with keyboard up for data transfer & control sequence. The
keyboard I/P H/W consists of following sections.
i) Serial to parallel converter (shift register)
ii) Interrupt generation logic.
iii) Scan code port (Port A) of PPI.
Bidirectional Communication:
The keyboard P transmits the scan code to the PC system over a serial interface,
there are 2 bidirectional lines between keyboard & PC motherboard, one line is
for the serial data bit & other for clock signal. The 4 signal between keyboard &
PC are +5V DC ground, DATA circuit. The keyboard uP checks the status of both,
the check line & data line only if both lines are high, the keyboard constantly
sends data.
4. ROM Logic:-
HARDWARE LAB
In a PC, the last 64KB memory space from F0000 onwards is received for ROM
depending on the ROM(check) chip type used appropriate no. of chips are
mounted 80 as to provide 64KB RAM capacity. However most of the cases 40
KB ROM space is sufficient to provide the following routines.
a. POST
b. BIOS
c. Basic Interface.
ROM Device Logic:
This analysis the MSB of 20 bit address and generate appropriate chip select
control signal. So as to enable the reading of one of the ROM chips which
contains the location addressed bit, either 13, 14 or 15 address bit depending on
the ROM chip type.
5. RAM Logic:It contains the memory chip arranged as 4 banks of 9 chips. Depending on the
capacity of memory chip, the total capacity of RAM on motherboard varies. The
maximum usable RAM permitted by PC. OS CMS DOS for PCs is 640KB.
Usually 640KB RAM is provided by using 2 banks of 41256 chips & 2 banks of
4164 chips. Certain new motherboard use only 1 bank of 1MB chip thus,
providing 1 MB physical memory. However, functionally the first 640 KB only
is supported by the S/W.
B) Components Of Motherboard:1. Expansion slots.
2. CPU.
3. Co-processor.
4. Memory.
5. BIOS.
6. Support circuits or chip set for interrupt DMS.
HARDWARE LAB
1. Expansion Slots:There are long thin connector on the motherboard near the back side of
computer one can connect various expansion cards, such as display card, hard
drive controller, sound card, Network card & modern card etc. on these slots
when an adopter card is connected to the expansion slot, these buses are
categorized according to the no. of bits so that they can be transferred at a time.
On 8 bit data bus transferring 16 bit requires two data transfers. Another very
common term, taking about basic it, H/W on the width & the technology the
expansion slot bus can be driven into.
1. 8 bit ISA
2. 16 bit ISA
3. VSEA local bus or VL bus.
4. PC1 local bus
5. MCA
6. EISA
Types of Expansion Slots:There are long, thin connector on the motherboard rear the backside of the
computer. One can connect various expansion cards, such as display card, hard
drive controller, sound card network card & modem card etc.
HARDWARE LAB
1 .8 Bit ISA(Industry Standard Architecture ISA)

a) This bus is also referred as CLASSICAT BUS
b) As shown in fig. these bytes of adaptor have a total of 62 contacts at the
bottom of the adaptor
.
2. CPU (Main Processor):
The main component of any motherboard is the main processor of or chip which
control all the inner function of the system. The CPU is the brain of PC. Some
of the common CPU chips are Intel 8088, 8086, 80286/80386/80486, Pentium
MMX/I/II/III/IV etc.
3. Co-processor:
It is special purpose uP which is used to speed up main processor. Most common
is Math Co-processor. Co-processor or chips are used to help main processor in
carrying out its various functions & helps the main processor performing
mathematical calculation. Math Co-processor orders system (XT, AT, AT-386)
required co-processor chip to be inserted into special socket on motherboard but
current generation of CPUs have math co-processor built inside the main
processor itself.
Common Intel Co-processor:
8087:
It was the first co-processor made by Intel.
1. This co-processor was used with 8088, 8086 as well as 80186 & 188
processor.
2. This co-processor comes in a 40 pin DIP package & in 5.8 & 50MHz speed
version.
80287:
It is a co-processor for 80286 CPU. The 80287 processor is available in 40 pin
DIP socket it is not pin compatible with 8087 co-processor.
HARDWARE LAB
80387 SX / 80387 DX:

The 80387 is a co-processor chip for the 80386 processor.
1. The 387 co-processor is available in 68 pin grid array (PGA) case are shown
in fig. While installing 387 into its socket, the wrong orient may damage the
chip.
Pentium Processor with MMX Technology:
s
The Pentium processor offers higher performance compared to original.
1. 10-20% more performance on current software.

2. Once 60% faster for Intel Media Bench Mask. Micro-architecture
enhancement on the original Pentium processor.
3. Full support of Intel MMX media enhancement technology.
4. Double code & data caches to 16K each.
5. Improved branch prediction.
6. Enhanced pipeline dipper with buffers Pentium MMX is fully compatible
with all S/W written for Intel 386/486 process.
Features:
1. 64 bit data bus.
2. Multiple Interrupt Controller on chip.
3. Performance monitoring & power management feature.
4. Power management feature.
5. A co-processor architecture capable of executing 2 integer instruction in
parallel in a single clock achieving up to 2 times the Integer performance
relative to its equivalent frequency in 486 CPU.
6. The pipeline floating point unit (CPU) for supporting the 32-64K for main
specified in IEEE standard 754 as well as in 80 bit format.
7. H/W support for virtual interrupts provided through the Virtual Interrupt
(VI) & Virtual Interrupt Pending (VIP) bits.
HARDWARE LAB
4. Memory:
It is the place where computer stores program & data that help computer to
carry out its operation. Basically, two types of memory are-
A)RAM:
RAM is read/write memory used by the processor to sub-program data,
intermediate results during program execution & it is volatile in nature. Two
types of RAM are DRAM & SDRAM.
a). DRAM:
It is cost wise cheaper, than SRAM so used widely. Since, DRAM utilizes
capacitors to store information. It cannot retain data for a longer time unless the
data is referred. After sometimes refreshing is done by retiring the certain of
memory. After every few milliseconds else contents gets loose.
b) SDRAM:
The information stored here remains as long as power supply is provided to the
chip. Refreshing is not needed here. Circuit is also not needed for refreshing
hence is very simple. It uses flip-flops to store information. Physical installation
of RAM memory on motherboard takes place in several ways.
a. DIP (Dual Inline Pin) memory chip were used on initial Motherboards.
b. Later SIMM became common.
c. Currently DIMM are most common.
A) ROM:
It is Read Only Memory data can be written onto it by the manufacturer only.
a. Non-volatile in nature.
b. Does not loose contents, when power supply is turned Off.
HARDWARE LAB
c. Motherboard normally contains one or more of these ROM chips.

Support chips/chipset:
1. A typical system required interrupt controller, DMA controller, timer chip,
clock chip, bus controller chip, I/O peripherals chip etc. to make computer.
2. Modem in electronic have made it possible to produce very large scale
integration (VLSI) & now just 2 or 3 of there VLSI chip can be do the work
which were previously performed by dozens of different chips.
3. These sets of VLSI chips are called chipsets.
4. A typical chipset contains in 1 or 2 VLSI chips all the supports logic
required by processor to function as a complete system.
5. Many of these chipset makers include serial & parallel ports, LAN & audio
support & display adopter on the chipset itself.
Memory Module:
SIMM:
SIMM is not a single memory chip. It is a memory module i.e. a no. of memory
chips solared onto a small expansion board.
The edge connector of this expansion towered is plugged into serial SIMM
socket on the motherboard.
1. The design allows the memory to be added & removed from the computer
without the risk of destroying it.
2. 32 bit memory module provides complete 32 bit storage on 32 bit MICS
these memory modules can be added or removed individually.
P4 Processor:
The processor is designed to deliver performance across applications & usages
where user can truly applicant & experience the performance.
These application includes Internet audio & streaming video, image processing
video control, speech, 3D, CAD, games, multitasking user environment.
HARDWARE LAB
Features:
1. The Intel Processor Pentium 4 is available ranging from 1.30 to 2.8GHz.
2. Supported by the Intel 850 chipset.
3. Internet streaming & HD extensions architecture based S/W.
Intel Pentium IV processor can be designed for desktop PCs as well as entry
level workstations.
Chipset:
All the devices support functions inside a PC were integrated into few VLSI
components integrating circuit or ASCII collectively calls chipset.
Intel 810E chipset:
The Intel 810E chipset Integrates the Innovative features of the 810 chipset with
performance & except values of the 0.13v or 0.18v Intel Pentium based pro PC.
The 810E chipset embraces stability of 810E chipset by use of solid Integrated
Technology.
Features:
1. It is a unique integral gear arbitration allowing it to run with 66MHz,
100MHz & 133MHz processor buses.
2. Validated & turned for both Celeron & Pentium III processors the
Intel 810E chipset offers a step solution with a single flexible
motherboard for Intel Processor.
Intel 845 Chipset:
The Pentium IV processor was originally introduced with the support of high
performance Intel chipset 850.
Intel introduced 845 chipset with chipper SDRAM support for Pentium IV
processor.
HARDWARE LAB
The Intel 845 chipset complements the 850 chipset by offering support for the
high volume cost effective PCI 33 SDRAM memory for P4 processor system.
This chipset supports up to 3GB memory on 3 DIMM slots for corporate users
then, P4 offers excellence performance on todays office applications.
Features:
1. 400MHz system bus:-Delivers a high BW connection between the PIV
processor & platforms providing 3X. The BW over platform based on Intel
P3 processor.
2. PCI 333 SDRAM:-Excludes support of the highest volume most cost
effective memory shipping today. This allows system receiver points.
3. 2 USB Controller:-Provides high performance peripherals with 24 mbps of
BW while enabling support for upto 4 USB ports.
This result in significant increase over pre integrated +4 ports hubs at 12mbps.
4. The latest AC 97 implementation deliver 8X channels of audio for enhanced
sound quality & full surround capabilities.
Integrated audio solution continues to enjoy success as a very effective at high
performance.
5. LCI (LAN Connect Interface):
Provides flexible network solution such as phone line; 0101100 mbps internet
101100 Mbps internet with LAN manageability.
6. BIOS setup: The BIOS ROM or the basic i/p, o/p system has an onscreen
system configuration setup utility program.
When a system is switched on POST routines the following message
appears on the screen.
HARDWARE LAB
Press <del> if you want to RUN SETUP. Press <del> to change the already
existing configuration of your system or configuring new system.
To reset BIOS and memory password you have two options
1.
Either use BIOS reset jumper provided on motherboard.
2.
Or remove CMOS setup battery & allow 10 min for residual power in
CMOS to drain away. Then reconnect or reinstall in memory.

Some, motherboard usually have some provision for electrically disconnecting
battery power from CMOS.
STANDARD CMOS SET UP:Select the AMIBIOS setup option by choose standard CMOS setup from the
AMIBIOS setup main menu various options in standard CMOS setup are:Floppy Drive A: & B: :- move the cursor to these fields to select floppy type.
The settings are:360 KB 5.25 inch.
1.2 KB 5.25 inch.
720 KB 3.5 inch.
2.88 KB 3.5 inch.
Primary master
Primary slave
Secondary master
Secondary slave
Select these options to configure the driver named in the option. Select the auto
detect IDE to let AM/BIOS automatically configure the driver.
1. A screen with a list of a driver parameter appears.
2. Click on OK to configure the drive.
AM/BIOS setup standard CMOS setup:
HARDWARE LAB
(X) 1988 American mega trends Inc. All rights reserved.

Date (MM/DD/YYYY) : Mon Aug 16 2002 Basemen : 0KB
Time (hh / mm / ss): 17:34:44 Extd. Mem: 0KB
Floppy Drive A: 1.44 MB 3.5
Floppy Drive B: Not Installed
LBA BIK P1032 bit.
Type : Size Cylinder head NPCOM SEC mode mode mode mode
Primary:
Master: Auto
Primary:
Slave: Auto
Secondary:
Master: Auto
Secondary:
Slave: Auto
Boot Sector Virus Protection Disabled
Available Options
ESC: EXIT : Set
Disabled
Pgup/Pgdn
Enabled
F1: Help
F2/F3:
Advanced CMOS Setup:Quick Boot:- Set up this option to enable to instruct AMIBIOS to boot quickly
when the comp is turned ON.
1st Boot Device:- This option sets up the types of device for the 1 st boot device
that the AMIBIOS attempts to boot from after AMIBIOS POST completion.
HARDWARE LAB
The settings are disabled. Network option SCSI CD-ROM, IDE-0, IDE-1,
IDE-2 or IDE-3.
The optical & fail safe default are IDE-0.
2nd Boot Device:- This option sets the type of device for the 2 nd book drive that the
AMIBIOS attempt to boot from after AMBIOS port completes.
The settings are disabled floppy or IDE-0. The optical is fail safe default
setting are floppy.
3rd Boot Device:- This option sets the type of device for the third boot device that
the AMIBIOS attempts to boot from after AMIBIOS POST completes.
Try Other Boot Device:- Set this option to yes to instruct AMIBIOS to attempt to
boot, from any other drive in system if it cant find a boot drive among the
devices specified in it boot-device option.
Intel Display Mode:Set this option to BIOS for initial display mode by BIOS. Setting in BIOS are
silent.
Display Mode At Add-On ROM NIT:Set the display mode at add on ROM NIT settings are force or beep current.
Floppy Access CTRL:This option specifies the read/write access that is set when booting from a floppy
drive. The settings read/write or write only.
Hard Disk Access Control:This option specifies the read/write access set when booting from a hard disk.
HARDWARE LAB
The settings are read/write or read only. The optical & fail safe default settings are
read write.
Smart For Hard Disk:Set it to OFF to turn this by off. When, computer boots up so you use the
arrow keys on both the numeric keyboard on the keyboard.
PS12 Mouse Support:Enable it to enable AMIBIOS supply for a PS/2 mouse.
The settings are enabled / disabled.
Primary Display:This option configures the monitor attached to the computer. The optimal is
fail-safe default settings are VGA/BGA password check.
This option enables password check when system boot up or when AMIBIOS
set up is run settings are setup as always.
Boot to OS12 T64MB:Set this option to enable if running OS/2 operating system in using more than
64MB of system memory on the motherboard.
The settings are enabled or disabled.
CPU Serial No.:Set this option to enable to display CPU serial no. these settings are enabled or
disabled.
System BIOS Cacheable:When set to enable the contents of F000H system memory segment can be
read from or written to cache memory. The contents of this memory segment are
always copied from BIOS ROM to system ROM for faster execution.
The settings are disabled or enabled.
HARDWARE LAB
AMIBIOS Setup Advanced CMOS Setup: 1998 American Met trends inc. all rights reserved.
Quick Boot
Enabled
Available Opp.
1st boot drive
Floppy
Disabled
2nd boot drive
IDEO
Enabled
3rd boot drive
CD-ROM
Try another boot drive
Yes
Initial Display Mode
BIOS
Display Mode at Add.
BIOS
On ROM INIT force

Floppy Access Ctrl
Read/Write
Hard disk Access Ctrl.
Enabled
Boot-up Memorys Lock
ON
Floppy Drive Swap
Disabled
Floppy Drive Suz
Disabled
PS/2 Mouse support
Enabled
Primary Display
VGA/EGA
Password display check
Setup
Boot to OS/2 > 64MB
Disabled
Pgup/Pgdn
L1 cache
Write Back
Modify
L2 cache
Write Back
F1: Help P2
ESC: Exit set.
Power Management:- This page sets some of the parameters for the system power
management operation ROM PC/ISA BIOS C2AS (HH6C)
ACPI function
: Enables
Primary INTR: ON
Power Management
: User defined
IRQ2 (COM2): Primary
PM Ctrl by AM
: Yes
IRQ4: Primary
Video Off Method
: Blank Screen
IRQ5 (LPT2): Primary
HARDWARE LAB
Video Off After
: Suspend
IRQ0 (FDD): Primary
Modem Use IRQ
:3
IRQ7 (RSV): Secondary
POZE mode
: Disable
Suspend Mode
: Disable
HDD Power Down
: Disable
Soft Off by PVRBTM
: Relay 4 sec
PWROM after N/W fail
: Off
**PM events**
IRQ14 (HDD): Disabled
IRQ13 (Copro): Primary

VGA: Off
: Off
IRQ15 (RSV): Disabled
LPT & COM
: LPT/COM
ESC: Quit select item
HDD & FDD
: OFF
F1: Help PU/PD /*/-
DMA / Master
: OFF
F5: Old values (shift)
RT alarm resume
F6: Load BIOS defaults
F7: Load setup defaults

Modem ring resume
ACPI Function:- This main board support ACPI (Advance configuration & power
management interface.)
Use if this item is to turn the feature ON/OFF.
Power On After PW Fail:- Uses to set a system power state when power restore
after sudden AC power loss.
VGA:- If enabled any video activity can resume the system from a S/W power
down or a power saving mode.
LPT & COM: If enabled only activity through the serial or parallel port can
resume the system for S/W power down or a power saving mode.
HARDWARE LAB
HDD &FDD: If this is enabled only activity on the hard disk devices or floppy
disk drive resumes, the sys from s/w from s/w power down or a power saving
mode.
DMA/MASTER: If enabled only activity on sys DMA channel can resume
system from a system power down or power saving mode.
RTC ALARM RESUME: If enabled you can use the sole items to set on alarm
time on the sys real time clock.
The alarm can (work the) wake the system up from the power saving mode or
S/W power down.
MODEM RING RESUM: If enabled the system can be resumed from a power
mode or a s/w power down by an incoming call to the fax/modem.
PRIMARY/MTR: If you enable this item you can use the following list to
interrupt, select which interrupt have an effect ever the power mgmt. routine.
IRQ13- IRQ14: Interrupt requests are allocated to various systems resources. Use
these items to determine the effect of any activity on IRQ line. If you select
disabled there is no effect, if you select secondary activity on the IRQ will reset
the power down time outs. If you select the primary activity on the IRQ will reset
the power down or power saving mode.
FAQs:1) State the function components for Motherboard?
HARDWARE LAB
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__________________________________________________________________
2) State the components for Motherboard?

__________________________________________________________________
__________________________________________________________________
3) State the types of expansion slots?

__________________________________________________________________
__________________________________________________________________
4) How main processor is increased?
__________________________________________________________________
__________________________________________________________________
5) State features of 8087?
__________________________________________________________________
__________________________________________________________________
6) What are different types of memory?
__________________________________________________________________
__________________________________________________________________
7)State the Characteristics of ROM?

__________________________________________________________________
__________________________________________________________________
HARDWARE LAB
8)State features of P4?

__________________________________________________________________
__________________________________________________________________
9)State the 845 chipset Features?

__________________________________________________________________
__________________________________________________________________
10)What is VGA?
__________________________________________________________________
__________________________________________________________________
11)What is IRQ13-IRQ14?
__________________________________________________________________
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Design Problem:1) Study the latest motherboard and their on-board circuitry.
2) Study the different CMOS setup tools for Motherboard.
3) List the advanced diagnostic tools for new motherboards.
CONCLUSION:
________________________________________________________________________
________________________________________________________________________
________________________________________________________________________
ASSIGNMENT NO: 10
TITLE: Write an 8051 ALP for rate generation using Timer0/Timer1 by using
HARDWARE LAB
a. Polling method
b. ISP method
THEORY:
Introduction:
The Intel 8051 is an 8-bit microcontroller which means that most available operations are
limited to 8 bits. There are 3 basic "sizes" of the 8051: Short, Standard, and Extended.
The Short and Standard chips are often available in DIP form, but the Extended 8051
models often have a different form factor, and are not "drop-in compatable". All these
things are called 8051 because they can all be programmed using 8051 assembly
language, and they all share certain features (although the different models all have their
own special features).
Some of the features that have made the 8051 popular are:
8-bit data bus
16-bit address bus
34 general purpose registers each of 8 bits
16 bit timers (usually 2, but may have more, or less).
3 internal and 2 external interrupts.
Bit as well as byte addressable RAM area of 16 bytes.
4 8-bit ports, (short models have 2 8-bit ports).
16-bit program counter and data pointer
8051 models may also have a number of special, model-specific features, such as UARTs,
ADC, Op Amps, etc.
Pin diagram of the 8051 DIP
HARDWARE LAB
PIN 9: PIN 9 is the reset pin which is used reset the microcontrollers internal registers
and ports upon starting up.
PINS 18 & 19: The 8051 has a built-in oscillator amplifier hence we need to only connect
a crystal at these pins to provide clock pulses to the circuit.
PIN 40 and 20: Pins 40 and 20 are VCC and ground respectively. The 8051 chip needs
+5V 500mA to function properly, although there are lower powered versions like the
Atmel 2051 which is a scaled down version of the 8051 which runs on +3V.
PINS 29, 30 & 31: As described in the features of the 8051, this chip contains a built-in
flash memory. In order to program this we need to supply a voltage of +12V at pin 31. If
external memory is connected then PIN 31, also called EA/VPP, should be connected to
ground to indicate the presence of external memory. PIN 30 is called ALE (address latch
enable), which is used when multiple memory chips are connected to the controller and
only one of them needs to be selected. We will deal with this in depth in the later
chapters. PIN 29 is called PSEN. This is "program select enable". In order to use the
external memory it is required to provide the low voltage (0) on both PSEN and EA pins.
There are 4 8-bit ports: P0, P1, P2 and P3.
HARDWARE LAB
PORT P1 (Pins 1 to 8): The port P1 is a general purpose input/output port which can be
used for a variety of interfacing tasks. The other ports P0, P2 and P3 have dual roles or
additional functions associated with them based upon the context of their usage.
PORT P3 (Pins 10 to 17): PORT P3 acts as a normal IO port, but Port P3 has additional
functions such as, serial transmit and receive pins, 2 external interrupt pins, 2 external
counter inputs, read and write pins for memory access.
PORT P2 (pins 21 to 28): PORT P2 can also be used as a general purpose 8 bit port when
no external memory is present, but if external memory access is required then PORT P2
will act as an address bus in conjunction with PORT P0 to access external memory.
PORT P2 acts as A8-A15, as can be seen from fig 1.1
PORT P0 (pins 32 to 39) PORT P0 can be used as a general purpose 8 bit port when no
external memory is present, but if external memory access is required then PORT P0 acts
as a multiplexed address and data bus that can be used to access external memory in
conjunction with PORT P2. P0 acts as AD0-AD7
Oscillator circuit:
The 8051 requires the existance of an external oscillator circuit. The oscillator circuit
usually runs around 12MHz, although the 8051 (depending on which specific model) is
capable of running at a maximum of 40MHz. Each machine cycle in the 8051 is 12 clock
cycles, giving an effective cycle rate at 1MHz (for a 12 KHz clock) to 3.33MHz (for the
maximum 40MHz clock).
Internal schematics of the 8051.
Data and Program Memory
The 8051 Microprocessor can be programmed in PL/M, 8051 Assembly, C and a number
of other high-level languages. Many compilers even have support for compiling C++ for
an 8051.
Program memory in the 8051 is read-only, while the data memory is considered to be
read/write accessible. When stored on EEPROM or Flash, the program memory can be
rewritten when the microcontroller is in the special programmer circuit.
HARDWARE LAB
Program Start Address

8051 starts executing program instructions from address 0x00 in the program memory.
Direct Memory
The 8051 has 256 bytes of internal addressable RAM, although only the first 128 bytes
are available for general use by the programmer. The first 128 bytes of RAM (from 0x00
to 0x7F) are called the Direct Memory, and can be used to store data.
Special Function Register
The Special Function Register (SFR) is the upper area of addressable memory, from
address 0x80 to 0xFF. This area of memory cannot be used for data or program storage,
but is instead a series of memory-mapped ports and registers. All port input and output
can therefore be performed by memory mov operations on specified addresses in the
SFR. Also, different status registers are mapped into the SFR, for use in checking the
status of the 8051, and changing some operational parameters of the 8051.
General Purpose Registers
The 8051 has 4 selectable banks of 8 addressable 8-bit registers, R0 to R7. This means
that there are essentially 32 available general purpose registers, although only 8 (one
bank) can be directly accessed at a time. To access the other banks, we need to change the
current bank number in the flag status register.
A and B Registers
The A register is located in the SFR at memory location 0xE0. The A register works in a
similar fashion to the AX register of x86 processors. The A register is called the
accumulator, and by default it receives the result of all arithmetic operations. The B
register is used in a similar manner, except that it can receive the extended answers from
the multiply and divide operations. When not being used for multiplication and Division,
the B register is available as an extra general-purpose register.
FAQs:1) What is the function of 8051?
HARDWARE LAB
__________________________________________________________________
__________________________________________________________________
2) State the addressing modes of 8051

__________________________________________________________________
__________________________________________________________________
3) State the features of 8051?
__________________________________________________________________
__________________________________________________________________
4) What is full duplex data communication?
__________________________________________________________________
__________________________________________________________________
5) What is half duplex communication?
__________________________________________________________________
__________________________________________________________________
6) What is Simplex communication?
__________________________________________________________________
__________________________________________________________________
7) What is SM0, SM1 and SM2?

__________________________________________________________________
__________________________________________________________________
8) What is Mode0?
HARDWARE LAB
__________________________________________________________________
__________________________________________________________________
9) What is Mode1?
__________________________________________________________________
__________________________________________________________________
10) What is Mode2?
__________________________________________________________________
__________________________________________________________________
11) What is Mode3?
__________________________________________________________________
__________________________________________________________________
Design Problem:1) Write a Program to keep 8051 in every mode ie Mode0, Mode1, Mode2, Mode3.
2) Write the program to transfer data to port?
3) Write the program to perform data transfer between two ports?
CONCLUSION:
________________________________________________________________________
________________________________________________________________________
HARDWARE LAB
ASSIGNMENT NO: 11
TITLE: Write an 8051 ALP for serial port programming to transfer block of data using
a. Polling method
b. ISP method
THEORY:
Computers transfer data in two ways:
Parallel
Often 8 or more lines (wire conductors) are used to transfer data to a device that is only a
few feet away.
Serial
To transfer to a device located many meters away, the serial method is used The data is
sent one bit at a time.
At the transmitting end, the byte of data must be converted to serial bits using parallel-inserial-out shift register
At the receiving end, there is a serial-in-parallel-out shift register to receive the serial
data and pack them into byte
When the distance is short, the digital signal can be transferred as it is on a simple wire
and requires no modulation
If data is to be transferred on the
telephone line, it must be converted from 0s and 1s to audio tones
Serial data communication uses two methods
1. Synchronous method transfers a block of data at a time.
2. Asynchronous method transfers a single byte at a time.
It is possible to write software to use either of these methods, but the programs can be
tedious and long
There are special IC chips made by many manufacturers for serial communications
1. UART (universal asynchronous Receiver transmitter)
2. USART (universal synchronous-asynchronous Receiver-transmitter)
Department of Computer Science and Information

A protocol is a set of rules agreed by both the sender and receiver on
How the data is packed
How many bits constitute a character
When the data begins and ends
Asynchronous serial data communication is widely used for character-oriented
transmissions
Each character is placed in between start and stop bits, this is called framing
Block-oriented data transfers use the synchronous method
The start bit is always one bit, but the stop bit can be one or two bits
The start bit is always a 0 (low) and the stop bit(s) is 1 (high)
HARDWARE LAB
ASCII
character
(8-bit
ina
To allow data transfer between the PC and an 8051 system without any error, we must
make sure that the baud rate of 8051 system matches the baud rate of the PCs COM port
Hyperterminal function supports baud rates much higher than listed below
Sender Receiver
Baud Rate
19200
9600
4800
2400
1200
600
300
150
110
With XTAL = 11.0592 MHz, find the TH1 value needed to have the
following baud rates. (a) 9600 (b) 2400 (c) 1200
The machine cycle frequency of 8051 = 11.0592 / 12 = 921.6 kHz,
and 921.6 kHz / 32 = 28,800 Hz is frequency by UART to timer 1 to
HARDWARE LAB
set baud rate.

(a) 28,800 / 3 = 9600 where -3 = FD (hex) is loaded into TH1
(b) 28,800 / 12 = 2400 where -12 = F4 (hex) is loaded into TH1
(c) 28,800 / 24 = 1200 where -24 = E8 (hex) is loaded into TH1
Notice that dividing 1/12 of the crystal frequency by 32 is the default
value upon activation of the 8051 RESET pin.
SBUF is an 8-bit register used solely for serial communication

For a byte data to be transferred via the TxD line, it must be placed in the SBUF
Register
The moment a byte is written into SBUF, it is framed with the start and stop bits and
transferred serially via the TxD line
SBUF holds the byte of data when it is received by 8051 RxD line
When the bits are received serially via RxD, the 8051 deframes it by eliminating the
stop and start bits, making a byte out of the data received, and then placing it in SBUF
MOV SBUF,#D ;load SBUF=44h, ASCII for D
MOV SBUF,A ;copy accumulator into SBUF
MOV A,SBUF ;copy SBUF into accumulator
SCON is an 8-bit register used to program the start bit, stop bit, and data bits of data
framing, among other things.
HARDWARE LAB
SM0, SM1
They determine the framing of data by specifying the number of bits per character,
and the start and stop bits
SM2
This enables the multiprocessing capability of the 8051
SM0
Only mode 1 is
of interest to us
REN (receive enable)
It is a bit-adressable register
When it is high, it allows 8051 to receive data on
RxD pin
If low, the receiver is disable
TI (transmit interrupt)
When 8051 finishes the transfer of 8-bit character
It raises TI flag to indicate that it is ready to transfer another byte
TI bit is raised at the beginning of the stop bit
HARDWARE LAB
RI (receive interrupt)
When 8051 receives data serially via RxD, it gets rid of the start and stop bits and
places the byte in SBUF register
It raises the RI flag bit to indicate that a byte has been received and should be picked
up before it is lost
RI is raised halfway through the stop bit
The steps that 8051 goes through in transmitting a character via TxD
1. The byte character to be transmitted is written into the SBUF register
2. The start bit is transferred
3. The 8-bit character is transferred on bit at a time
4. The stop bit is transferred
It is during the transfer of the stop bit that 8051 raises the TI flag, indicating that the
last character was transmitted
5. By monit
oring the TI flag, we make sure that we are not overloading the SBUF
If we write another byte into the SBUF before TI is raised, the untransmitted portion of
the previous byte will be lost
6. After SBUF is loaded with a new byte, the TI flag bit must be forced to 0 by CLR TI
in order for this new byte to be transferred
In receiving bit via its RxD pin, 8051goes through the following steps
1. It receives the start bit
Indicating that the next bit is the first bit of the character byte it is about to receive
2. The 8-bit character is received one bit at time
3. The stop bit is received
When receiving the stop bit 8051 makes RI = 1,indicating that an entire character byte
has been received and must be picked up before it gets overwritten by an incoming
character
4. By checking the RI flag bit when it is raised, we know that a character has been
received and is sitting in the SBUF register
We copy the SBUF contents to a safe place in some other register or memory before it
is lost
5. After the SBUF contents are copied into a safe place, the RI flag bit must be forced
to 0 by CLR RI in order to allow the next received character byte to be placed in SBUF
Failure to do this causes loss of the received character
FAQs:1) Explain protocol used by sender and receiver while transmission of data.
__________________________________________________________________
__________________________________________________________________
HARDWARE LAB
2) What is the function of SBUF register?

__________________________________________________________________
__________________________________________________________________
3) Draw the structure of SCON register.
__________________________________________________________________
__________________________________________________________________
4) Explain use of SM0,SM1 bits in SCON register.
__________________________________________________________________
__________________________________________________________________
5) Explain use of REN bit in SCON register.
__________________________________________________________________
__________________________________________________________________
6) Explain use of TI flag in SCON register.
__________________________________________________________________
__________________________________________________________________
7) Explain use of RI flag in SCON register.
__________________________________________________________________
__________________________________________________________________
8) Explain different interrupts along with their IVT address locations.
__________________________________________________________________
__________________________________________________________________
HARDWARE LAB
9) With XTAL = 11.0592 MHz, find the TH1 value needed to have the
baud rate = 4800
__________________________________________________________________
__________________________________________________________________
10) With XTAL = 11.0592 MHz, find the TH1 value needed to have the
baud rate = 600
__________________________________________________________________
__________________________________________________________________
Design Problem:1) Write a Program to transfer ASCII character B continuously
2) Write a program to transfer This is 8051 Assignment message using serial port
3) Write program to transfer YES message serially using ISR.
CONCLUSION:
________________________________________________________________________
________________________________________________________________________

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HL Lab Manual 2013-14

SINHGAD TECHNICAL EDUCATION SOCIETYS

TERM WORK: 25 MARKS

HL Lab Manual 2013-14

INFORMATION ABOUT LAB : Hardware Laboratory

: 8051 Kits, PentiumIV, and 256MB DDR RAM, 80 GB

: To study different programming features of 8051

HL Lab Manual 2013-14

SINHGAD INSTITUTE OF TECHNOLOGY

This is to certify that

Computer Department. SIT, Lonavala

TITLE: Design simulation program for TYPE Command

Computer Department. SIT, Lonavala

CP/M exit (always contain INT 20)

Memory size in paragraphs

Far call to CP/M compatibility code within DOS

Break address of previous program (old INT 23)

Critical error address of previous program (old INT 24)

Caller's PSP segment (usually command.com - internal)

Job File Table (internal)

SS:SP on entry to last INT 21 call (Internal)

Max open files (Internal - see below)

Handle-entries address (Internal - see below)

Far call to DOS (always contain INT 21 + RETF)

Unopened Standard FCB 1

Unopened Standard FCB 2 (overwritten if FCB 1 is opened)

Number of characters on command-line

81-FF 127 bytes

Command-line (terminated by a 0Dh)

Computer Department. SIT, Lonavala

Computer Department. SIT, Lonavala

Common handle file operation

Create file (Requires ASCII structure)

Common Handling Record Operation

Set file pointer

Less Commonly Used Handle Operation

Get or Modify File Attributes

IOC TL (I/O Control)

Get / Set File, Data & Line

Create Temporary File

Lock & Unlock File Region

Set Handle Count

Extended open file

Computer Department. SIT, Lonavala

Computer Department. SIT, Lonavala

Computer Department. SIT, Lonavala

FAQs:1) What is FCB?

8) State the advantages of PSP?

Computer Department. SIT, Lonavala

10) Explain in detail the function to Read a file?

Design Problem:1) Write ALP to edit file attributes?

Computer Department. SIT, Lonavala

TITLE: Design simulation program for COPY Command

All Versions of MS-DOS

Computer Department. SIT, Lonavala

copy autoexec.bat c:\windows

Common handle file operation

Create file (Requires ASCII structure)

Common Handling Record Operation

Set file pointer

Computer Department. SIT, Lonavala

Less Commonly Used Handle Operation

Get or Modify File Attributes

IOC TL (I/O Control)