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I. INTRODUCTION
Since the mid eighties the world-wide installed wind turbine power has increased dramatically and several international forecasts expect the growth to continue. Supporting these forecasts are a number of national energy programmes which proclaim a high utilization of wind power
[I]. So far, the constant speed wind turbine, using the
induction generator, has been widely used [2]. However
as the ratings of the wind turbines are getting higher and
the wind turbines are getting more widespread, a couple of problems with the constant speed wind turbine occurs, which make variable speed constant frequency systems more attractive.
Wrated
0-7803-6618-2/01/$10.00
0 2001 IEEE
628
in the design of a variable speed wind turbine, is the selection of the most suitable converter topology. One goal
for this selection should be, that the gained utilization of
the wind energy is not lost in converter losses. This paper
evaluates the efficiency of two power converters for use in
the doubly-fed induction generator system. The considered power converters are: A two level back-to-back VSI
and a three-level back-to-back VSI.
TABLE I
RATINGSFOR THE SYSTEM
Nom. Speed
Dyn. slip'
Nom. power
Stator phase voltage
Grid phase voltage
Rotor side filter
Gen. wind. ratio
Sdyn
P,,,
V,
V,
L,
1500 4~12%
30%
2.0
398
277
60
2.63
[rpm]
[MW]
[VI
[VI
[PHI
GENERATOR SYSTEM
Fig. 2 shows the considered doubly-fed induction generator system along with the definitions of power flow direction. In the system, the converter topology (including
the grid filter) is the general design parameter while the
characteristics of the generator, the transformer and the
rotor side filter are predetermined values. The specifications for the wind turbine system are listed in Table I.
A common trait of a converter for use in the doubly-fed
induction generator system is, that it has to handle the
generated active and reactive rotor power under the conditions specified in Table 1.
Ps +PT
(2)
Q,:
Qsys
= Qs
+ Qg
=0
(3)
As indicated in (3) the generated reactive power is controlled to zero and in steady-state operation, the two components Qs and Qg both equals zero. The only control
parameter available to satisfy (3) is the rotor voltage. To
determine the rotor voltage, the equation set for the electrical part of the generator is used. By a power invariant
transformation of the phase quantities of the DFIG into
the stationary two-axis frame the following equation set is
obtained.
P, = Xe(vs 'i:)
Qs = %"(U, .i:)
P, = Xe(u, .iT)
QT
Sm(v, .i:)
(5)
(6)
(7)
(8)
v,
= 324 V
f,
fg
= 774
= 328
(9)
[A]
[A]
(10)
(11)
TOPOLOGIES
629
TABLE I1
DESIGNED
SWITCHING FREQUENCIES FOR THE TWO-LEVEL
BACK-TO-BACK V s I
SVPWM
DPWMO
DPWMl
DPWM2
converter topologies when used in the considered wind turbine system, some preliminary design considerations are
to be made concerning the components which are believed
t o influence the losses of the converter system. The considered components are:
Switching devices.
Filters.
Modulation strategies.
In the evaluation, the losses due to the series resistance of
the DC-link capacitor(s) is neglected.
A . Back-to-back VSI
A . l Design: From the design criteria specified in (9) the
DC-link voltage of the two-level back-to-back VSI is fixed
to 800 V (in this choice it is presumed that the converter
are able to utilize the full DC-link voltage). Further, a t
this DC-link voltage, the grid filter inductance L, is limited by the magnitude of the maximum grid current, c.f
(ll),given by:
4900 [Hz]
(0 < Mi
egi
where
is the maximum RMS grid inverter voltage. At
a 10% increased grid voltage, a total power of 2MW and
a speed 30% above synchronous speed the grid inductor
is limited to a value below 0.7 mH. In the present case
study, a 0.4 mH grid inductance is to be used. Regarding
the switches of the two-level back-to-back VSI, the selection is limited to switches based on the SKiiP@-technology
provided by SEMIKRON. For each leg in the two-level rotor
side inverter two paralleled single phase bridges of type
SkiiP942GB120 is used. At the grid side, a single module,
type SkiiP942GB120,per phase ensures the current capability specified by (11).
From Fig. 3 it appears that the preferred switch configuration for the three-level converter suffers from the
advantage of normal multi-level structures in which the
voltage ratings for all the switches can be derated. In the
considered topology, the switches connected to the upper
and lower DC-bus have to be rated to the full DC-link
voltage while the switches connected to the DC-link cen-
-50
'
-100
'
-150;
SuDer sync.
h W.
TABLE 111
DESIGNED
SWITCHING
I v . LOSS
BACK-TO-BACK VSI
SVPWMl
SVPWM2
MODELING
B.l Design: For the three-level converter, the same conditions as for the two-level converter apply with regard to
the magnitude of the DC-link voltage and the size of the
grid inductance. Hence the total DC-link voltage is fixed
to 800 V and the grid filter inductance is chosen to 0.4 mH.
For the rotor side inverter, 12 half bridge-modules (two in
parallel), type SKiiP942GB120 along with 18 additional
diodes, type SKKD90F06 ensures the current capability in
(10) while six modules, type SKiiP642GB120 along with
12 diodes, type SKKD90F06 form the three-level grid inverter.
where
is the threshold voltage for the transistor and
diode as a function of the device junction temperature Tj
and blocking voltage u Z )R, is the device resistance, k,,
is a switching loss function, i, is the device current, Is, is
the switched current and fsw is the number of switchings
per second for the considered device.
A . 2 Device parameters: Applying the least square regression model, c.f. appendix I, on the derived loss arrays, the model parameters are derived. Table IV lists
the derived transistor parameters and Table V the corresponding diode parameters. For the additional diodes in
the three-level structure, the data sheet loss parameters
are used.
300
200
100
0
'Due to some confusion in the names of modulation schemes for the
three-level converter, appendix I1 is dedicated t o a brief presentation
of the two methods in order to clarify the differences.
63 1
TABLE IV
SEMICONDUCTOR
LOSS
ut,,,^ (VI
RT [mn]
k,,
[ps]
942GB1201
2.0e-3T' + 1.24
3.2e-3Tj+1.72
0.65T'+350
MODELS
(TRANSISTORS).
12
942GB1202
642GB1203
1.44
1.44
2.0
3.08
1 . 9 e ~ ~ u $0 . 3 7 ~ ~ 179
LkW1
10.
8-
4Y
TABLE V
(DIODES).
942GB1202
1.08
1.32
0.66u~-2.3e-~u$
942GB1201
U t h , [VI
~
-3.2e-3Tj+1.40
RD [ma] 7.9e-4Tj+1.25
k,,
[p] 8.8e-2Tj i-4.29
p,oss
642GB1203
1.08
1.97
26.5
500
"
lo00
2000
1500
Psys[kWl
Fig. 7. Measured and simulated losses for a 2 MW test setup
converter a t the same operating conditions, the switching device temperature along with the grid voltage was
recorded for each of the measurements. Supporting the
developed simulation model with the characteristics of the
test setup (modulation strategies, switching frequencies,
switching device characteristics, grid voltages, device temperatures and filter characteristics), the losses of the test
setup were simulated. The solid lines in Fig. 7 represents
the simulated losses of the converter.
v.
SIMULATION MODEL
Fig. 8 shows the simulated losses of the grid side twolevel VSI. The upper left part (UL) shows the switching
losses of the grid inverter and the upper right part (UR)
shows the conducting losses of the grid inverter. The lower
left part (LL) shows the losses in the grid side filter and the
lower right part (LR) shows the total grid inverter losses
(including filter losses). Fig. 9 shows the simulated losses
associated with the operation of the rotor side inverter of
the two-level back-to-back VSI. The (UL) shows the total
switching losses in the rotor side inverter, (UR) shows the
conducting losses of the rotor side inverter and (LL) shows
the losses in the rotor side filter. The total losses of the
VI. RESULTS
2
1380rpm
1380rpm
1.5
1
0.5
-
1000
[kWl
2000
1000
PnysIkWl
2000
9,
"
1000
2000
1000
PrysIkWl
2000
Fig. 8. Simulated losses of the grid inverter of the two-level backto-back VSI.
632
0.8
PSwr[kWl
0.6
0.4
0.2
1000
Psyr[kW1
2000
1000
2000
1000
2000
Psys [kWl
"0
1000
2000
PEYS
[kWl
Fig. 9. Simulated losses of the rotor inverter of the two-level backto-back VSI
0.61
-+
144OGm
and (LL) shows the losses in the rotor side filter. The total
losses of the rotor side three-level VSI is shown in the (LR)
of Fig. 11.
0.4
VII. DISCUSSION
0.2
I
1000
2000
1000
Psyr[kWl
2000
633
on a 2MW test setup, and it is concluded that the lossprediction method shows quite good accuracy. In the
present work, the loss prediction method is used to evaluate the efficiency of two converter topologies for use in a
system based on the doubly-fed induction generator. The
considered converter topologies are a two-level back-toback VSI, and a three-level back-to-back VSI. It is found
that the back-to-back VSI, totally considered, is the most
efficient among the two topologies.
Oa
Ob
OC
Od
for
for
A, <
A, 2 5
for
w~~--iw+~--+v+~~---w++~ for
A, <
A, L 2
W+OO--WOOO-WOO--+UO--
~oo--~ooo-~+oo-~++o
WO--
----tu+---+U+()-
APPENDIX
I. LEASTSQUARE
R=B+4dT
if d e @ ) / O
I e=-&-lG
- end
end
(24)
REFERENCES
g = g i$Po
(23)
(25)
vOO--v+O--W++--~++O
IX. ACKNOWLEDGMENT
for k = 1 : N
-fv+Oo
V+OO---W+O----W~O--VO--
(22)
Fig. 12. Segment 0 of the space vector hexagon for the three level
converter.
634