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SCHEMATIC DRIVEN LAYOUT USING IC STATION

SCHEMATIC DRIVEN LAYOUT USING IC STATION

The following tutorial gives an introduction to schematic driven IC layout using Mentor Graphics' IC Station. In order to do a schematic driven layout of NFETs and
PFETs, the design should have been captured using Design Architect and simulated successfully. The following steps would take you through the layout of the 2-input
NAND cell that you captured and simulated in earlier exercises.
1. Execute cd mgc/ee484 to change directory to mgc/ee484. You need to create a viewpoint of the 2-input NAND cell. Use the following command at the shell
sdl_prep nand2
You only have to do this once per design. Even if you make changes to your design you don't have to do this again. If you do, the script will do nothing and that's OK

2. Invoke IC Station from the command prompt by typing

ic
3. Maximize the window. Create a new cell using the palette menu Cell > Create or use the pull down File>Cell>Create....

Fig. 1: Create Cell Form

This would setup an empty cell in Connectivity Editing configuration thus keeping the connectivity information between the layout and the schematic. If the cell has
already been created, execute the pull down File>Cell>Open... or use the palette menu Cell > Open to open the cell in Edit or Read Only mode.

Fig. 2 shows the status information like the process, edit status etc. of the IC window.

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Fig. 2: IC Windows Status Line

Fig.3 shows the layers that you would be using in the layout. The layers are loaded automatically when you invoke IC Station. The layer names are given on the left
while the notation svf on the right refers to the selectable, visible and filled layers. A layer can be selected only if it carries the notation "s". You can use the shift-Left
Mouse Button on each of the layer palette menu to toggle selectability. The middle mouse button toggles visibility, while the right mouse button toggles the filled status
of the layer. Using the mouse buttons on the layer palette, try to toggle the selectablity, visibility and the filled status of the layers.

Fig. 3: IC Layer Palette

4. Using the SDL button in the palette menu, go to the SDL menu.
5. From the SDL menu, set the logic source for the cell using Logic > Set palette option. In the dialog box that appears, use the Navigator button to select the nand2/sdl
viewpoint. Be sure to select the correct viewpoint for if you don't, the tools will not be able to recognize your transistors.
6. Once your logic source is selected, open the schematic using the palette menu Logic > Open. The schematic should appear in a window beside the empty cell.
7. At this point, you should be sure the ICgraph window is active (the empty cell's window). If it is not, click on that window to make it active. Notice the new pull down
menu MDK (MOSIS Design Kit) at the right of the menu bar. It has options to generate various pad-frames, set/unset the query on merge mode and select/unselect
"diffusion sharing." Selecting an item will do what that item says. So, for example, if we wish to have ICgraph automatically merge series and parallel transistors, then
we need to select Use Diffusion Sharing from the MDK menu. The session has been setup for Diffusion sharing. Do not alter this.

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8. Now you can place the devices into your cell by automatic placement method for this exercise. To do this, click on Schematic > A-Inst palette menu. At this point, the
tools will locate devices that are of the same type and have connectivity such that diffusion regions may be shared. The devices will be automatically generated based on
the length and width parameters specified on the instances and placed into the open cell. Overflow lines (in yellow) will show you the connectivity points in your circuit.
As you wire the circuit together, these overflows will disappear when you have made the correct connections.
9. Before editing the cell, add rulers to the cell.. The rulers act as a reference thus aiding in easy layout. To add rulers, click the Right Mouse Button in the active IC
window, and select the Add>Ruler: from the pop-up menu. Starting at the lower left as in Fig.4a and Fig. 4b, click and drag the Left Mouse Button and release it at a
point where you want the ruler to end. Similarly, construct the other ruler. To delete a ruler, execute the pull down menu Edit>Delete>Ruler: and click on the ruler to be
deleted.

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Fig. 4a: Internal Aspect of the 2-input NAND Cell

10. Now, as the placement algorithm places the devices fairly close, spread out the devices a little. First select the entire device by clicking on the dotted outline. Notice
that when you select a device it is also selected in the schematic window. Both devices and nets may be cross-selected in this manner. Using the Right Mouse Button,
execute the pop-up menu option Edit>Move>Unconstrained and place the cells as shown in Fig.4a. (Place the devices in such a way that, when you are routing the
metals, you can run the VDD rail from 3, 79 to 82, 85 and VSS from 3, 21 to 82, 24. Later you will layout your 3-input Nor cell in the same way. Thus, when you abut
these cells, the power and ground ports will be connected from cell to cell). Once the placement is done, unselect the cell using F2 key.
11. The next step to be performed is routing. There are many methods for accomplishing this task. We will look at a few of them now. The first method is very useful for
wiring metal together. You can do this using Add>Route palette menu (if the menu is not accessible, click the Right Mouse Button on the palette menu area. From the
pop-up menu, choose Show Scroll Bars. Use the scroll bars to access the option.) This will prompt you for a starting and ending point of a route. Make the starting point
on the metal contact between the two P-FETS. The pointer displays route_1 indicating that metal1 is routed. Once you have selected the starting point for the route, a
guide will appear showing you the clearance where you can place the route without any problems. Extend this route down to the contact near the N-FETS, double click to
complete the route. Notice how it is automatically drawn at the routing width specified in the processes file (3 microns for metal 1 and four microns for metal2). If you
need a different width wire, you need to use another method. Click Cancel on the prompt bar or hit Esc key to discontinue routing.

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Fig. 4b: External Aspect of the 2-input NAND Cell

12. One such method is placing paths. You will place some polysilicon wires using this method since you cannot place routes in poly. First, select Poly from the IC Layer
Palette (Refer Fig. 3) by clicking on the Poly. The "Layer" item in the IC Status Line would display a POLY now, indicating that the Poly has been selected. Execute the
Add>Path option in the palette menu. You will be prompted for a location. Click on the Options button on the prompt bar, as the width has to be changed to 2 microns.
A forms window similar to the one shown in Fig.5 appears. You can set aspect, width etc. in this form. Once you have chosen the aspect, width etc., select the Keep
Option Settings box and OK the dialog box.

Fig. 5: Add Path Options

If you get a dialog box as in Fig. 6, notifying you of an establishment of a connection, then respond Yes to the box if you want the connection to be made.
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Fig. 6: Connectivity Dialog Box

13. Wire up the a gate inputs with poly using paths. When you have made a complete connection, the overflow line will disappear. Be sure to follow the design rules!
Two micron minimum width, 2 micron separation, etc. If you need to use metal, then you can simply click on the metal layer in the layer palette (or on the contact to
place a contact). Hence, placing paths to wire your circuit becomes fairly easy. also remember to change the width as needed. Complete the wiring of the transistors gates.
Click Cancel on the prompt bar or hit Esc key to discontinue routing.
14. To establish a contact from poly and metal2 through a metal1 and via, draw a rectangular poly contact using Add>Shape palette menu option after selecting the
Contact_To_Poly from the layer palette. Define a poly contact as in Fig. 4a and Fig. 4b by drawing a rectangle using the left mouse button (the dimension can be read
from the Cursor field of the IC Status line - Refer Fig. 2.) Draw a rectangular poly surrounding the contact so that the poly overhangs the poly contact by 3microns
(scmos rules file.) Draw metal1, via and metal2 similarly to complete the connections. Ensure that the rules on minimum width and separation are followed.
15. Once you have the gates wired up, you need to place the ports for the inputs and outputs from your schematic. Execute the Setup>PortStyl palette menu option. In
the dialog box that appears, select Process Port to display the ports defined for this process.
16. The ports are placed on metal 2, so select the default line and then click on Preview to see its parameters. Notice that it is on metal 2 and it is 4x4 microns. Click OK
to select this as the default port style.
17. To place the ports, execute the Schem>M Port palette menu option. All nets with a port are selected and a port shape is created and placed above and to the left of the
current cell. As the appropriate nets are highlighted in succession, place the ports as in Fig. 4a and Fig. 4b. Respond Yes to the connectivity dialog box that appears after
you place each of these ports.
18. Now, you also will need to change the direction of all ports that are not inputs. This is because the port placement routine forces all ports to be IN. Power ports can be
ignored, but the output of the NAND gate should be changed to OUT. Select the output port. It's easiest to do this in the schematic window if you forgot which port was
which. Once the port is selected, use the Objects->Change->Port pull down menu to change the direction to OUT and make sure the type is Signal. Leave all other items
alone.
19. Once the wiring and port placement is complete, place the n-diffusion and p-diffusion contacts using the Add>Cell palette menu option. In the prompt bar enter the
location $MGC_HEP/tutorial/sdl/cells/nwell_contact for nwell contact (pwell_contact in place of nwell_contact for adding pwell contact). Get these contacts and abut
them to the two MOS devices in your layout as shown in Fig. 4a. Wire up these devices using paths.
20. As a final editing step, text can be added by executing the pop-up menu Add>Text: using the Right Mouse Button.

21. Now, perform DRC to find out any errors in the layout. Go back to the Session palette and then select ICrules. Click on Check palette menu. OK the dialog box that
appears. ICrules would check for any violation and would print a message in the message area (bottom of the IC Window). If the Results field shows a 0 (zero) then the
layout has passed the design check. Otherwise, fix DRC violation using the Set Scan To > First to see the first violation. The violation is highlighted in the IC window
and the message area displays the violation. Fix the violation by going back to the SDL menu. Once the error is fixed, go back to the ICrules and perform a Check again
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and fix errors, if any.

22. Once all DRC errors are fixed, save your cell using the pull down menu File>Cell>Save Cell>Current Context.
Miscellaneous
* Moving Edges
i) Press the F2 function key to unselect everything.
ii) Position the cursor at a point near the edge you want to select. Click the Ctrl-Select button. The nearest edge is selected. The edge can also be selected using the pop up
menu (use Right mouse button) Edit>Select>Select Edge.
iii) Press and hold the Ctrl-Select button.
iv) Drag the ghost image of the edge to the desired location. As you move the edge, the cursor readout provides a location reference. The edge can also be moved using
the pop up menu (use Right Mouse button) Edit>Move.
v) Release the Ctrl-Select button to move the selected edge. The moved edge remains selected.
* Copying One or More Objects
i) Select the object(s).
ii) Choose the Edit > Copy > Selected: pop up menu item (use Right Mouse Button).
iii) Position the object(s) in the desired location. As you move the object(s), a ghost image appears, allowing you to keep track of the location of the object(s) as you
position them.
iv) Once the object(s) are in place, click the Select button (Left Mouse button) to perform the copy. The copied objects remain selected.
* Stretching Objects

i) Select the objects that you wish to stretch.

ii) Choose the Edit > Stretch: pop up menu (use Right Mouse button) item.
iii) Draw a polygon that completely encloses the vertices that you wish to stretch.
iv) Position the cursor anywhere in the active window. Press and hold the Select (Left Mouse button) button.
v) Move the cursor in the direction and the distance that you wish to stretch the enclosed, selected vertices.
vi) Release the Select button (Left Mouse button). The enclosed vertices are moved in the direction and distance that you specified.
* Notching Objects

i) Select the object to notch.

ii) Notch in by performing the following steps:
a) Position the cursor outside the selected polygon, then press and hold the Shift-Ctrl-Select (Left Mouse button) button. Alternatively, use Edit>Notch>In pop up menu
(Right Mouse button).
b) Draw a rectangle that intersects the selected polygon.
c) Release the Shift-Ctrl-Select button.
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d) The area defined by the polygon that intersects the selected object is removed from the selected object.
iii) Notch out by performing the following steps:
a) Position the cursor inside the selected polygon, then press and hold the Shift-Ctrl-Select (Left Mouse button) button. Alternatively, use Edit>Notch>Out pop up menu
(Right Mouse button).
b) Draw a rectangle that intersects the at least one edge of the selected polygon.
c) Release the Shift-Ctrl-Select button. The area defined by the polygon that is outside the selected object is added to the selected object.
For more complex notches than simple polygons, you can also draw the notching polygon by clicking the Select button at the vertices of the desired polygon and then
double clicking the Select button to complete the polygon to define the notch area. After the notch area is defined, the selected object remains highlighted until you
unselect it.
* Flip & Rotate

i) Select the object to be rotated or flipped.

ii) Set the basepoint if you need to.
iii) To flip, use the pop up menu (Right Mouse button) Edit>Flip>Horizantal (horizontal flip) or Edit>Flip>Verical (vertical flip). To rotate, use the pop up menu
(Right Mouse button) Edit>Rotate>Angle of rotation.
* Measuring Distances
Use the pull down menu item Other>Measure Dist:. From the origin, click, drag and release the Select button (Left Mouse button). The distance would be displayed in
the message area of the IC Station.
* Changing the Aspect
i. Select the object.
ii. Execute the pull down menu item Objects>Change>Aspect. Use the choice stepper or Space Bar on the prompt bar to select Internal, External or Both.
iii. Click OK.
* Printing the Cell
With the IC Session window active, type print and press Return.
Exercise
Using the techniques that you have learned in this tutorial, layout a 3-input NOR gate. Ensure that the power lines are on the same level as that of the 2-input NAND gate
that you have laid out.

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