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VLSI Back End ASIC Flow

Ramesh Reddy B
SriKirti Somanath P@tridenttechlabs.com

September 2010

2010 Tanner EDA

Outline
Front End Schematic Design With S-Edit
Analog simulation With T-Spice and W-Edit
Back End IC Layout with L-Edit
Schematic Driven Layout, DRC, and Netlist Extraction

2010 Tanner EDA

2010 Tanner EDA

Front-End Tools: S-Edit Integration

2010 Tanner EDA

S-Edit Window Regions

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Properties Window

2010 Tanner EDA

View Types

2010 Tanner EDA

Front-End Tools: Data Flow


Cadence EDIF + CDF
Mentor EDIF + NCF
PSpice Schematics
Agilent ADS
ViewDraw EDIF
Laker EDIF

Capture

Excel
(CSV)

HSPICE netlist
Verilog-A models
Analyze
v15

Simulate

Manage and View


Results from Multiple Sims
Model Browser
2010 Tanner EDA

Front-End Tools: Data Interoperability


Verify

Capture
Export
SPICE
for LVS

Export Verilog
Export VHDL
Export EDIF
Export TPR
Export
SPICE
for sim

Flexible Netlisting
Control Remote Simulator
(including over network)

?
Simulate

HSPICE
SmartSpice
Eldo
Spectre

SPICE netlist
from Extract

External
Simulator

2010 Tanner EDA

SPICE Introduction

2010 Tanner EDA

SPICE Introduction

2010 Tanner EDA

SPICE Flow

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Command Wizard

2010 Tanner EDA

Analysis Types
DC Operating Point
Calculated For All anaysis Types
.OP

DC Sweep Analysis
.DC

AC Sweep Analysis
.AC

Transient Analysis
.TRAN

Temperature Analysis
Monte Carlo Analysis
Noise Analysis
Optimization

2010 Tanner EDA

W-Edit Waveform Viewer

2010 Tanner EDA

Back-End Tools: L-Edit Integration

2010 Tanner EDA

L-Edit Window Regions

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Layer Setup

2010 Tanner EDA

2010 Tanner EDA

Back-End Tools: DRC and Extract


v15
Calibre
DRC rules

Interactive DRC
Node Highlighting

Standard DRC
Calibre DRC
Dracula DRC
Assura DRC

Netlist
Extraction

Standard Extract
Calibre Extract (LVS)
Dracula Extract

2010 Tanner EDA

External
tools
Capture

SDL
Router

SPICE
or CDL

Schematic-Driven
Placement
v15

Recognize and
generate:
Differential pairs
Current mirrors

T-Cells

Layout

DevGen
T-Cells for:
Transistors
Resistors
Capacitors
2010 Tanner EDA

P&R

2010 Tanner EDA

Chip Cell Created With SPR

2010 Tanner EDA

Core Cell Components

2010 Tanner EDA

Global Signal Routing

2010 Tanner EDA

Tanner EDA Packages Building Blocks of Innovation

Tanner Tools Pro


T-Spice Pro

L-Edit

S-Edit
LVS Std.

DRC Std.

Dev Gen

Interactive DRC

SPR

Extract

W-Edit

SDL

Node Highlighting

Pad Map

2010 Tanner EDA

Tanner EDA partners with leading foundries to provide PDKs


Foundry Partners
Tanner EDA and Tower Semiconductor team up to help reduce design and fabrication cycle times
providing a competitive advantage to mutual customers.
Tanner EDA and MHS Electronics high performance analog design and fabrication solutions that
serve the Telecommunication, Automotive, Medical and Power Management semiconductor
markets.

Additional Foundry
Partners

AMIS (On Semiconductor)

Austria Microsystems

Atmel

Headquartered in Seoul, Korea, Dongbu HiTeks best-in-class foundry services encompass Analog,
High Voltage CMOS, CMOS RF and BCDMOS technologies, CMOS Image Sensor(CIS), and
Display Driver IC (DDI) chips as well as chips that incorporate NOR Flash memory functions at
nodes ranging from 90nm to 0.35um. Highlighting Dongbu HiTek's Analog Foundry Service is
specialized in processing, manufacturing and design support.

Chartered Semiconductor

HP

IBM

Peregrine

Tanner EDA and LFoundry foster high confidence customer partnerships that require flexibility and
technology customization. The comprehensive functionality, productivity and ease of use of the
Tanner EDA IC design tools, in conjunction with LFoundry processes can minimize design time and
risk, thus speeding concept to silicon.

Silterra

SMIC

ST Microelectronics

Tanner EDA and xFab work together to offer shared customers cost-efficient mixed signal analog
process design kits utilizing L-Edit, HiPer Silicon and HiPer PX.

TSMC

Zete

UMCs customer driven foundry solutions complements Tanner EDAs responsive customer focus.
Together UMC and Tanner EDA provide an affordable and comprehensive solution for analog mix
signal designs and processes.

Foundry Services
The EUROPRACTICE IC Service, offered by IMEC and Fraunhofer, provides Tanner EDA solutions
to qualified members of Europractice in academic and research institutes throughout
Europe. Design kits are provided in Tanner EDA format.
MOSIS provides access to fabrication of prototype and low-volume production quantities of
integrated circuits. MOSIS lowers the cost of access to fabrication by combining designs from
multiple customers on multi-project wafers (MPW). Design kits are provided in Tanner EDA format.

2010 Tanner EDA

Thank You

2010 Tanner EDA

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