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CE 6305 Computer Arithmetic

Ivor Page
Spring 2005, T/R 5:30 6:45pm, CN 1.102

This course is part of the Computer Engineering Master's degree. It can also be taken as an
elective in any of the school's MS programs.
Honor Code: There are no group projects in this course. All work that you
submit for grading must be your own. It is a violation of University Policy to
copy another's work without citing it, no matter if the work came from another
student, a publication, or a web page. You must not copy from solutions given
during previous iterations of the course. You must not collude with other
students or submit work that is not entirely your own, unless you properly cite
the contributions of others. Any violation of the University's honor code will
be reported to the Dean of Students and may result in a severe punishment,
including reduction in grade, an F grade for the course, withdrawal of TA-ship
or RA-ship, or expulsion from the university.

Content:
Number Systems and Representations: Unsigned, sign-magnitude, and 1's and 2's
complement systems, their ranges, and overflow detection. Redundant number
systems,digit sets, Generalized Sign-Digit systems, Binary Sign-Digit (BSD)
System, conversion, constant time addition, log time multiplication. Residue
number systems, conversion algorithms, addition, multiplication, and selection
of optimal residues.

Number systems give us choices that enable extremely fast computations and
compromises between speed, power consumption and size. We will study these
systems and make use of our analyses throughout the course.

High-speed Adder design: Ripple-carry adder, average delay calculations, Carry


Skip Adders, Carry Select Adders, Carry Look-Ahead systems, Ling Adders, Prefix
Carry Computation Systems, VLSI implementation of adders.

We will analyze the basic ripple-carry adder, various carry look-ahead adders,
and prefix-carry computation systems and consider their implementation in CMOS.

Multipliers: Multiplication by a constant, Shift-Add Multipliers, Bough-Wooley


Signed Multiplier, High Radix Multipliers, Booth algorithm, multi-bit recoding,
, Tree and Array Multipliers, Wallace tree, Selective Carry System, Carry-Save-
Add Multipliers, pipelining, BSD vs. Wallace Trees.

Dividers: Restoring and Non-Restoring Shift Subtract Dividers, SRT Division,


High Radix Division, p-d Plots, repeated multiplication iterative divider, and
Newton's iterative reciprocal algorithm.

Square Root algorithms: Newton's iterative method, and variations of the non-
restoring division algorithms, including those using redundant numbers.

CordicArithmetic System: digit-at-a-time log, square root, trig, and hyperbolic


function evaluation.

Floating point arithmetic systems, IEEE standard, rounding methods, sticky-bits


and guard-bits.
Error estimation techniques from numerical analysis.

Implementation issues, low power designs and layouts.


Throughout the course, we will consider VLSI implementation issues, tradeoffs,
and choices.

Text: Computer Arithmetic, Algorithms and Hardware


Designs, Behrooz Parhami, OxfordUniversity Press.

Assessment: There will be 2 exams, several home works a project. The overall
grade will be computed as follows: home works 15%, project 25%, mid semester
exam 25%, final exam 35%. These weights are subject to change.
Mid Term Test: March 3rd, 5:30 - 6:45pm
Final Test: TBA (week of April 25th)

Instructor: Ivor Page (ivor@utdallas.edu), 972-883-2160


Office Hours: Thursday 3:00 - 5:00pm, ECSS 4.410 or by appointment.

TA: TBA

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