EC2257 Lab Manual - Mahalakshmi Engineering College

MAHALAKSHMI
ENGINEERING COLLEGE
TRICHY-SALEM HIGHWAY NEAR NO.1 TOLLGATE,
THUDAIYUR POST, TIRUCHIRAPPALLI- 621 213
DEPARTMENT OF ELECTRONICS & COMMUNICATION

ENGINEERING
EC2257/ ELECTRONIC CIRCUITS-II &SIMULATION

LABORATORY MANUAL
FOR IV SEMESTER B.E. DEGREE COURSE
[REGULATION 2008]
As per the common syllabus prescribed by

ANNA UNIVERSITY, CHENNAI
2012-2013
PREPARED BY
Mr.K.SRINIVASAN.
A.P/ECE
EC2257 ELECTRONIC CIRCUITS II AND SIMULATION LABORATORY

LTPC
0032
DESIGN OF THE FOLLOWING CIRCUITS
1. Series and shunt feedback amplifiers:
Frequency response, input and output impedance calculation
2. RC phase shift oscillator, wien bridge oscillator
3. Hartley oscillator, colpitts oscillator
4. Tuned class C amplifier
5. Integrators, Differentiators, Clippers and Clampers
6. Astable, Monostable and Bistable multivibrators.
SIMULATION USING PSPICE
1. Differential amplifier
2. Active filters: Butterworth 2nd order LPF, HPF (magnitude & phase
response)
3. Astable, Monostable and Bistable multivibrator - transistor bias
4. D/A and A/D converters (successive approximation)
5. Analog multiplier
6. CMOS inverter, NAND and NOR
Total: 45
EX.NO:1
RC Phase Shift Oscillator.
AIM:
To design and construct a RC phase shift oscillator for a given frequency
and test the result with the design.
APPARATUS REQUIRED:
1. Transistor BC107
2. Capacitor 0.01F, 10f, 47F
3. Resistors 10K, 6.5K, 560, 50K, 2.4K
4. Cathode Ray Oscilloscope
5. Regulated Power Supply ( 0 30 )V
6. Bread board
7. Connecting wires
THEORY:
A common emitter amplifier is followed by three sections of RC phase shift
network, the output of the last section being returned to the input. In practice the
value of R is adjusted such that the phase angle becomes 60. If the values of R and
C are chosen so that for the given frequency the phase shift of each RC section is 60.
Thus such a RC ladder network produces a total phase shift of 180 between its input
and output voltages for only the given frequency the total phase shift from the base of
the transistor around the circuit and back to the base will be exactly 360 or 0, thereby
satisfying Barkhausan condition for oscillation. The RC phase shift oscillator is
suitable for audio frequencies only. Its main drawbacks are that the three capacitors
and resistors should be changed simultaneously to change the frequency of
oscillation and it is difficult to control the amplitude of oscillation without affecting the
frequency of oscillation.
PROCEDURE:
1. The connections are made as per the circuit diagram.
2. Measure the output sine wave form using CRO.
3. The value of frequency was calculated and compared with the design
CIRCUIT DIAGRAM:
DESIGN PROCEDURE:
Design of a Transistor circuit:
VCC = 12V, Ic = 2mA, = 100
IB = IC / =2.02mA
VCE = VCC / 2 =6V
VBE = 10% of VCC = 1.2V
VB = VRE + VBE = 1.2 + 0.7 = 1.9V
RE = VRE / IE = 1.2 / (2.02*10^-3) = 594 = 564
R2 = VB / (10* IB) = 9.5K = 10K
R1 = [VCC / (10* IB)] R2 = 50.5K = 51K
RC = (VCC VCE IERE) / IC = 2.4K
XCE must be equal to one tenth of value of RE at the lowest operating
frequency.
XCE = RE / 10 = 59.4 =2f
1/( CE) = 59.4
CE = 56F = 47F
Choose coupling capacitor = 10F
Design of Tank circuit:
Given frequency = 1KHZ and assume C = 0.01F
Design Equation:
Frequency f
= 1 / (2RC6)
=> R = 6.5K
Barkhausen Criterion:
K = Rc / R
= 2.4K / 6.5K
= 0.36
hfe = 4K + 23 +29 / K
= 104.99
TABULATION:
S.No
Amplitude in
Volts
Time period in
ms
Theoretical
frequency in
KHz
Observed
frequency in
KHz
MODEL GRAPH:
RESULT:
Thus the RC phase shift oscillator was constructed as per the design
and the performance was verified.
Designed frequency = 1 KHz
Obtained frequency =
EX.NO:2
Wein bridge Oscillator.
AIM:
To design and construct a wein bridge oscillator for a given frequency and
test the result with the design.
APPARATUS REQUIRED:
1. Transistor BC107
2. Resistors 2.2K, 10K,22K
3. Capacitors 0.1F,0.01F
4. RPS ( 0 -30)V
5. CRO 3MHz
6. Bread board
7. Connecting wires
THEORY:
Wein bridge oscillator is an audio frequency RC oscillator. The feedback
signal is connected to positive terminal so that the op-amp is working as a noninverting amplifier.
Therefore the feedback network need not provide any phase shift.
1
The frequency of oscillation f =
2 RC
PROCEDURE:
3. The value of frequency was calculated and compared with the design
CIRCUIT DIAGRAM:
DESIGN PROCEDURE:
Design of a Transistor circuit 1:
Assume Vcc= 12V,Ic = 4Ma = IE,VCE = VCC/2 = 6V, VE = VCC/10,
R11 = 120K
Z parallel =Rc / Xc = = 7.95K
Z series = R + Xc == 31.81K
Zf = 39.76K
To find RE2:
RE2 = VE / IE = 1K
To find RC2
RC2 = VCC / 2IC = 1.5K
To find R12
R11 || R12 > 10ZF
R12 = 100K
Design of a Transistor circuit 2:
Assume Vcc = 12V,Ic = 1.5mA = IE,VCE= VCC/ 2 = 6V ,VE = VCC/10 =1.2V,
R22 = 28K
To find RE1
RE1 = VE / IE = 800
To find RC1
RC1 = VCC / 2IC = 4K
VB = VBE + VE =1.9V
VB = VCC (RB2 / R22 + R21)
To find R21
R21 + R22 > 10ZF
R21 = 116.9K
Assume: f = 1 KHz, C = 0.01 f
F = 1 / 2 RC
R = 15.91K
Assume R4 = 50K
R3 / R4 = 2; R3 = 100K
TABULATION:
S.No
Amplitude in
Volts
Time period in
ms
Theoretical
frequency in
KHz
Observed
frequency in
KHz
MODEL GRAPH:
RESULT:
Thus the wein bridge oscillator was constructed as per the
design and the performance was verified.
Designed frequency = 1 KHz;
Observed frequency =
EX.NO:3
Hartley Oscillator.
AIM:
To design and construct a Hartley oscillator for a given frequency and test
the result with the design.
.
APPARATUS REQUIRED:
1. Transistor
BC107
2. Resistors
270k,340 k
3. Capacitor
0.01f,0.02f
4. Inductor box 30mH, 0.7mH

6. Power supply
(0-30)V
7. Bread board
8. Connecting wires
THEORY:
When the supply voltage +Vcc is switched on, a transient current is
produced in the tank circuit and consequently damped harmonic oscillations are
set up in the circuit. The oscillatory current in the tank circuit produces ac voltages
across L1 and L2. As terminal 3 is earthed it will be at zero potential. If terminal 1
is at positive potential with respect to 3 at any instant, terminal 2 will be a negative
potential with respect to 3 at the same instant. Thus the phase difference between
the terminals 1 and 2 is always 180. In the Ce mode, the transistor provides the
phase difference of 180 between the input and output. Therefore the total phase
shift is 360. Thus at the frequency determinant for the tank circuit, the necessary
condition for sustained oscillations is satisfied. If the feedback is adjusted so that
the loop gain A = 1 the circuit acts as an oscillator.
PROCEDURE:
3. The value of frequency was calculated and compared with the

design
CIRCUIT DIAGRAM:
DESIGN PROCEDURE:
Design of Transistor circuit:
Assume Vcc= 12V,Ic = 4mA = IE,VCE = VCC/2 = 6V, VE = VCC/10,
RE = VE / RE = 600
RC =VCC - VCE - VE
------------------- = 1.2K
IC
V2 = VBE + VE = 1.9V
VCC = V1 + V2 = 10.1V
R1 = V1/10*IB = 120K
R2 = V2/9*IB=25.13K
RB=R1 R2=20.78K
FO=10 KHz
XCE = RE / 10 = 30
CE=10 / 2* FO * RE =106F

Assume f = 30 KHz and C = 0.02F
Frequency of oscillation f = 1/ (2LC)
Then L = 1.4mH;
L = L1 + L2
Let L1 = L2
L1 = L / 2 = 0.7mH
L1 = L2 =0.7mH
hfe = L1 / L 2
= 0.7 mH / 0.7 mH=1
TABULATION:
S.No
Amplitude in
Volts
Time period in
ms
Theoretical
frequency in
KHz
Observed
frequency in
KHz
MODEL GRAPH:
RESULT:
Thus the Hartley oscillator was constructed as per the design
Designed frequency = 1 KHz;
Obtained frequency =
EX.NO:4
Colpitts Oscillator.
AIM:
To design and construct a Colpitts oscillator for a given frequency and test
the result with the design.
APPARATUS REQUIRED:
1. RPS
10V
2. Transistor
BC107
3. Resistor
270K,340K
4. Capacitor
0.01F
5. Inductor
5mH,30mH
6. CRO
0-30MHz
7. Bread board
THEORY:
The feedback network consisting of inductors L1 and L2 and capacitor C1
determines the frequency of the oscillator. When the supply voltage +Vcc is
switched on, a transient current is produced in the tank circuit and consequently
damped harmonic oscillations are set up in the circuit. The oscillatory current in
the tank circuit produces ac voltages across C1 and C2. As terminal 3 is earthed it
will be at zero potential. If terminal 1 is at positive potential with respect to 3 at any
instant, terminal 2 will be a negative potential with respect to 3 at the same
instant. Thus the phase difference between the terminals 1 and 2 is always 180. In
the Ce mode, the transistor provides the phase difference of 180 between the
input and output. Therefore the total phase shift is 360. Thus at the frequency
determinant for the tank circuit, the necessary condition for sustained oscillations
is satisfied. If the feedback is adjusted so that the loop gain A = 1 the circuit acts
as an oscillator.
PROCEDURE:
3. The value of frequency was calculated and compared with the
design
CIRCUIT DIAGRAM:
DESIGN PROCEDURE:
Assume f = 30 KHz and L = 5mH, C=5.6nF
Frequency of oscillation f = 1 / (2LC)
And C = C1C2 / (C1+ C2)
Let C1 =0.01F
C2 = 0.01F
hfe = C1 / C 2
= 0.01F / 0.01F= 1
TABULATION:
S.No
Amplitude in
Volts
Time period in
ms
Theoretical
frequency in
KHz
Observed
frequency in
KHz
MODEL GRAPH:
RESULT:
Thus the Colpitts oscillator was constructed as per the design
Theoretical frequency =
Practical frequency
EX.NO:5
Tuned class c amplifier.
AIM:
To design and construct the tuned class C amplifier and plot the frequency
response curve.
APPARATUS REQUIRED:
1. RPS
5V
2. Transistor
SL100
3. Resistor
470K,10K,680K
4. Capacitor
0.01F, 0.1F, 0.33F
5. Signal generator
2MHz
6. CRO
0-30MHz
7. Bread board
THEORY:
Class C operation means the collector current flows for less than 180 of
the a.c. input cycle. Because of current flows in pulses thus a tank circuit is used
as a load in an amplifier results in a sinusoidal output voltage, thus this amplifier is
known as class C tuned amplifier. When no bias is applied then VBE = 0. The input
junction is unbiased result in which no collector current will flow when an ac input
signal is applied. There is no collector current until VBE reaches 0.7V. The
purpose of the tank circuit is to produce the fundamental component of the class
C waveform, which has the same frequency as input. When the resultant
frequency of the tank circuit is made equal to the input frequency, the impedance
of the tank circuit is maximum, result in which the gain is maximum for all other
frequency impedance as well as gain are much smaller.
PROCEDURE:
2. Set the input voltage to a fixed value. Measure the output voltage for the various
input
Frequencies. Calculate the voltage gain in dB for each input frequency.
3. Plot the Graph: Frequency in Hz Vs Gain in dB.
CIRCUIT DIAGRAM:
DESIGN PROCEDURE:
Assume VBB = 5V, VCC = 15V, RL = 470 , IC = 10mA,C = 0.01F,fo = 50 KHz
f0 = 1 / (2LC)
L = 1mH
Choose input coupling capacitor = 0.1F
Output coupling capacitor = 0.4F
Quality factor = fo / BW
MODEL GRAPH:
TABULATION:
Vin =
S.NO
Frequency in HZ Amplitude in Volts
Voltage gain
Voltage gain in dB
RESULT:
Thus the frequency response characteristics of tuned class C amplifier were
obtained.
EX.NO:6
Integrator & Differentiator
AIM:
To design and construct the integrator, differentiators circuits and test the
performance.
APPARATUS REQUIRED:
1. Diode 1N4007
2. Resistor 1K, 10K
3. Capacitor 0.1uF
4. RPS ( 0- 30)V
5. CRO 30MHz
6. Bread board
7. Connecting wires
THEORY:
INTEGRATOR:
For a low pass RC circuit, if the time constant is very large as compared to the
time required by the input signal to make an appreciable change, the circuit acts
as an integrator. Under this case, the drop across C is negligible compared to
drop across R. Thus the entire input Vi (t) can be assumed to be appearing across
R. Then the current i is given by, Vr = Vi = iR;
i = Vi / R
DIFFERENTIATOR:
For a high pass RC circuit, if time constant is very small as compared to the
time required by the input signal to make an appreciable change the circuit acts as
a differentiator.
i = C (dVc / dt)
i = C (dVi / dt)
Vo = iR
Vo = RC (dVi / dt)
PROCEDURE:
1. The circuit connections are made as per the circuit diagram Integrator.
2. Apply the sine wave as a input signal to the circuit.
3. The time period and amplitude of the output wave is noted from CRO
and the wave form is drawn in a graph.
4. Interchange the resistor and capacitor position to get Differentiator

circuit, then Perform the steps 1,2,3.
INTEGRATOR:
TABULATION:
S.No
Amplitude in V
MODEL GRAPH:
Time period in ms
DIFFERENTIATOR:
TABULATION:
S.No
Amplitude in V
Time period in ms
MODEL GRAPH:
RESULT:
Thus differentiator and integrator circuits were constructed and their output
was obtained.
EX.NO.7
Clipper& Clamper
AIM:
To design and construct the clipper, clampers circuits and draw the
waveforms.
APPARATUS REQUIRED:
1. Diode 1N4007
2. Resistor 1K, 10K
3. Capacitor 0.1uF
4. RPS ( 0- 30)V
5. CRO 30MHz
6. Bread board
7. Connecting wires
THEORY:
CLIPPER:
Clipper is a circuit which is used to clip off unwanted portion of the
waveform, without distorting the remaining part of the waveform. When the diode
is connected in series with the load, such a circuit is called a series clipper. The
clipper level is determined by the reference voltage V ref and could be obtained by
the supply voltage. When the supply voltage is positive, the circuit is said to be
positive reference clipper.
CLAMPER:
The clamper which is used to add a dc level as per the requirements to the
ac output signal is called clampers. The capacitor, diode and resistors are the 3
basic elements of a clamper circuit. They are also called as dc inserter circuits or
dc resonators. They are positive and negative clampers depending on whether
positive dc or negative dc shift is introduced. A positive clamper adds a positive
level to the ac output. During the positive half cycle of Vi, the diode is reverse
biased and the capacitor starts discharge. During the negative half cycle, the
diode gets forward biased and the capacitor charges to maximum level Vm. A
negative clamper adds a negative level to the ac output.
PROCEDURE:
1. The circuit connections are made as per the circuit diagram.
2. Apply the sine wave as a input signal to the circuit.
3. The time period and amplitude of the output wave is noted from CRO
and the wave form is drawn in a graph.
4. Repeat the above procedures for all the circuit diagram.
Negative clipper:
TABULATION:
S.No
Amplitude in V
MODEL GRAPH:
Time period in ms
Positive clipper:
TABULATION:
S.No
Amplitude in V
MODEL GRAPH
Time period in ms
CLAMPER:
Positive clamper:
TABULATION:
S.No
Amplitude in V
MODEL GRAPH:
Negative Clamper:
Time period in ms
TABULATION:
S.No
Amplitude in V
Time period in ms
MODEL GRAPH:
RESULT:
Thus Clipper & clamper circuits were constructed and their output was
obtained.
EX.NO:8
Astable Multivibrators
AIM:
To design, construct the Astable multivibrator & test the performance.
APPARATUS REQUIRED:
1. Transistor
BC107
2. Resistors
2k,5.6 k
3. Capacitor
0.1F
4. RPSO
(0-30)V

6. Bread board
7. Connecting wires
THEORY:
Multivibrator are two stage switching circuits in which the output of the first stage
is fed to the input of the second stage and vice versa. The outputs of the two stages are
complementary.
The astable or free running multivibrator generates square wave without any external
triggering pulse. It has no stable states i.e. it has two quasi stable states. It switches back
and forth from one state to another, remaining in each state for a time depending upon
the discharging of a capacitive circuit. Transistor astable multivibrator in which
components in one half of a cycle of the circuit are identical to their counter part in the
other half. The square wave output can be taken from collector point of Q1 and Q2.
When the supply voltage Vcc is applied due to some circuit imbalance.
PROCEDURE:
2. The CRO connections are made at the base of Q1 and Q2
3. The graph is plotted between the time in ms and the amplitude in volts.
CIRCUIT DIAGRAM:
DESIGN PROCEDURE:
Assume VCC = 6V, IC (sat) = 2mA = IC2, VBE(sat) = 0.7V= VB2, VCE(sat) = 0.3
V= VC2,hfe=20
To find RC:
Rc = Vcc- VCE(sat) = 4.35K
Ic(sat)
To find IB2(sat):
IB2(sat)= Ic(sat)
hfe
IB2min= 0.1mA
IB2(sat) = 1.5X IB2min = 0.15mA
To find R1 & R2:
R1 = R2 =
Vcc- VBE(sat)
IB2(sat)
R1= R2 = 55.33K
Find C:
Assume T = 1ms
T = 1.38RC
C =0.01F
68k
4k
TABULATION:
S.No
Output
VCE1
VBE1
VCE2
VBE2
Amplitude in Volts
Time period in ms
MODEL GRAPH:
RESULT:
Thus the astable multivibrator was designed and its characteristics were studied.
EX.NO.9
Bistable Multivibrator
AIM:
To design, construct the Bistable multivibrator & test the performance.
APPARATUS REQUIRED:
Transistor, resistor, capacitor, RPS.
THEORY:
The circuit uses two npn transistors Q1 and Q2.The collector of Q2 isa
coupled to the base of Q1 through resistance R1 while the collector of Q1 is
connected to the base of Q2 through another resistance R1.The characteristics of
both the transistors are never identical hence after giving supply one of the
transistors start conducting ahead of the other. If a positive going pulse is
applied at the set or reset terminal it will drive the transistor Q 1 to saturation and
the transistor Q2 to cutoff. This is nothing but the second stable state through the
applied pulse is removed. It will remain in this state till another pulse is applied
to reset terminal.The change of states is totally dependent on the applied pulse
at the proper terminal i.e., set or reset terminal. The spacing of the triggering
pulses finally decides the shape of the output waveform.
PROCEDURE:
CIRCUIT DIAGRAM:
DESIGN PROCEDURE:
Assume VCC = 12V, IC (sat) = 2.526mA= IC2, IB2 (min) = 0.0847mA, IB2 = 0.1684mA, IB
(sat) =2 IB (min),
R1 = 3R2
VCN2 = VCE2 + VEN = VEN -------------- (1)

VBN2 = VBE2 +VEN = VEN --------------- (2)
VCN2 = VBN2 = VEN --------------------- (3)
Q1 OFF, VBE (cut off) = -1V
VBN1= VBE1 +VEN
VBN1 VEN = -1 ------------- (4)
I3 flows through R1 & R2, IB1 =0

To find VEN:
VCN2
I3 = ----------R1 + R2
VBN1 = I3*R2
VCN2
= ----------- R2
R1 + R2
VEN*R2
VBN1 =
------------
VEN
= --------------
3R2 +R2
VBN1 = 0.25 VEN

0.25 VEN- VEN = -1
- 0.75 VEN = -1
VEN = 1.33
To find RE:
VEN = IE2*RE
= (IB2 + IC2) RE
= IC2 * RE
1.33 = 2.562mA * RE
RE = 790 ohms
To find RC:
VCC- VCN2
I2 =
------------------RC
I2 = IC2 = 2.526 mA
VCC- VCN2
RC =
------------------- == 4.2 K
I2
To find R1 &R2:
IC2
2.526 mA
IB2 (min) = --------- = ----------- =.08mA

hfe (min)
30
IB2 = 2 *IB2 (min)

I1 = IB2 +I4
VBN2
I4 = -----------R2
1.333
I1 = IB2 + ------R2
VCC- VBN2
I1 = ---------------R1 +RC
1.33
I1 = 0.16m + -------R2
10.67
1.33
------------- = 0.16m + -------4.2K +3R2
R2
0
0.64R2 +0.48R22 + 5.32K+3.99R2-10.67R2 = 0
0.48 R22 +6.04R2 +5.33K = 0
6.04 SQRT ((6.04)2- 4(0.48m) (5.23K)
R2 = --------------------------------------------------2(0.48m)
6.04 5.1
R2 =
---------------
= 11 K
0.96 mA
R1 = 3*R2 = 3 *11K
30K
10 K
TABULATION :
S.No
Output
VC1
VC2
Amplitude in Volts
Time period in ms
MODEL GRAPH:
RESULT:
Thus the Bistable multivibrator was designed and its characteristics were studied.
EX.NO:10
Monostable Multivibrator
AIM:
To design, construct the Monostable multivibrator & test the performance.
APPARATUS REQUIRED:
1. transistor BC107
2. Diode 1N4007
3. Resistor 5.9K, 452 K, 10 K, 100 K
4. capacitor 3.2nF, 23pF
5. power supply (0-30)V
6. function generator (0-2M)Hz
7. cathode ray oscilloscope (0-30M)Hz
8. Bread board
9. Connecting wires
THEORY:
Monostable multivibrator has one stable state and one quasi stable state. It
is also known as one-shot multivibrator or Univibrator. It remains in its stable state
until an input pulse triggers it into its quasi stable state for a time duration
determined by discharging an RC circuit and the circuit returns to its original
stable state automatically. It remains there until the next trigger pulse is applied.
Thus a monostable multivibrator cannot generate square waves of its own like an
astable multivibrator. Only external trigger pulses will cause it to generate the
rectangular waveform.It consists of two identical transistors Q1, Q2 with equal
collector resistances of RC1 and RC2. The output of Q2 through a resistive
attenuator in which C1 is a small speed up capacitor to speed up the transition.
The values of R2 and VBB are chosen so as to reverse bias Q1 and keep it in
the OFF state. The collector supply +VCC and R will forward bias Q2 and keep it
in ON state. Actually this is the stable state for the circuit.
PROCEDURE:
CIRCUIT DIAGRAM:
TRIGGER CIRCUIT:
0
V1
6V
R1
1K
R3
10K
C1
R2
1K
0.1u
C2
R4
0.1U
10K
Q1
BC547
Q2
BC547
C3
1U
V1 = 5
V2 = 0
TD = 0
TR = 1ns
TF = 1ns
PW = 20us
PER = 40us
R5
20K
V3
V2
-1.5V
DESIGN PROCEDURE:
Assume Vcc=6V, VBB=-3.3V, hfe=20, Ic(sat) =6mA,VCE(sat) =0.3,Rc1=Rc2
To find Rc1 ,Rc2:
Rc1= Rc2 = Vcc- VCE(sat)
= 950
1k
Ic(sat)
To find IB2(sat):
IB2(sat) = Ic(sat)
= 0.3mA
hfe
To find R:
R=
Vcc- VBE(sat)
= 17.66K
18k
IB2(sat)
In quasi stable state:
Assume Q1 ON Q2 = OFF, T = 1ms , IBI = I3-I4
T =0.69RC
C = 0.08F
0.1 F
Consider equivalent circuit of quasi stable state

I3= Vcc- VBE(sat)
R1
I3 = 5.3/ R1
I4 = VBE(Sat)-VBB/R2
R2 =13.33k 8k
R1= 8.88k
Find C:
Assume T = 1ms
T =.69RC
C = 0.08F
.1 F
SPEED UP CAPACITOR:
R1C1 =1ms
C1 = C2 = .113 F
TABULATION:
S.No
Output
VC1
VB1
VC2
VB2
Amplitude in Volts
Time period in ms
MODEL GRAPH:
RESULT
Thus the Monostable multivibrator was designed and its characteristics were
studied.
EX.NO:11
Current series feedback amplifier.
AIM:
To design and test the current series feedback amplifier and calculate the
following parameter with & without feedback.
1. Midband Gain
2. Bandwidth & cutoff frequencies
3. Input & Output Impedance
APPARATUS REQUIRED:
1. Transistor ,Resistors ,Capacitors ,RPSO ,CRO,Function generator, Bread
board, Connecting wires
THEORY:
In current series feedback, a voltage is developed which is proportional to the
output current. This is called current feedback even though it is a voltage that subtracts
from the input voltage. Because of the series connection at the input and output, the
input and output resistances get increased. This type of amplifier is called
transconductance amplifier.When Ra is properly bypassed with a large capacitor Ce,
the output voltage is Vo and the voltage gain without feedback is A. When the capacitor
Ce is removed, and a.c. voltage will be developed across Ra due to emitter current
flowing through Ra and this current is approximately equal to the output collector
current.
Parameter
With feedback
Input Impedance
Increases
Output Impedance
Increases
Gain
Tran conductance amplifier : Decreases
Bandwidth
Increases
PROCEDURE:
2. Set the input voltage to a fixed value. Measure the output voltages for the
various input
3. Plot the Graph: Frequency in Hz Vs Gain in dB. for the amplifier with feedback..
4. Then the feedback element i.e. feedback resistor and capacitor is removed to
get the circuit without feedback.
5. The Steps (1, 2, and 3) are repeated for the amplifier without feedback.
6. The input & output impedance is measured with multimeter.
CIRCUIT DIAGRAM:
WITH FEEDBACK
WITHOUT FEEDBACK
DESIGN PROCEDURE:
Assumptions: VCC = 10v, VE = VCC/10 = 1V, VCE = VCC / 2 = 5; RL = 100 ohms
,FL=1KHz
Since IB is very small compare with Ic , IE ~ Ic = 2mA AV = 30; hfe =
120,S =5
1. Calculation of hie :
re = 26 mV / IE = 13
hie =hfe re = 1.56K.
2.Caluclation of Rleff
Av= hfe Rleff
hie
Rleff = 234
3. Calculation of RC :
Vcc = IcRc + VCE + IERE
IC
IE
Rc = 2K
4. Calculation of RE:
RE = VE / IE = 500
VB = VCC.RB1 / RB1 + RB2
VB = 1.3V
5. Calculation of RB:
S = 1 + (RB + RE)
RB = RB1 RB2
RB1 = 18.73K
RB2 = 2.8K
6. Calculation of Input impedance Zi :
ZI = hie RB
ZI = 0.87K
7. Calculation of Input impedance Z0 :
Z0 = Rc =2K
8. Calculation of Coupling Capacitors:
Xci = hie RE
Xci = 37.86
Xci =1 / 2CCIfc
CCI = 4F
Xc0 = Rc RL = 66.66
Xc0 = 1/2CC0fc
CC0 = 2F
WITH FEEDBACK
GM=-hfe / ( hie +) = -0.058
D = 1 + GM = 29
GMF = GM / D = 0.002
AVF = GMF * RLEFF = 0.468
Zif = ZiD = 25.23K
Zof = Z0D = 58K
Parameter
Without feedback
With Feedback
Input Impedance
Zi = Rth // hie = 0.87K
Zif = Zi D = 25.23K
Output Impedance
ZO = RC // RL= 2K
ZOf = ZO D = 58K
Gain
AV = hfe Rleff / Zi
=30
AV F = GMF Rleff
=0.468
TABULATION:
WITH FEEDBACK:
Vin =
S.NO
Voltage gain
Voltage gain in dB
WITHOUT FEEDBACK:
Vin =
S.NO
MODELGRAPH:
Voltage gain
Voltage gain in dB
OBSERVATIONS:
1. With feedback, MID Band gain is LOW; Bandwidth is decreased.
2. Without feedback, MID Band gain is HIGH; Bandwidth is increased.
RESULT:
Thus the frequency response characteristics of current series feedback amplifier
were obtained
Theoretical Value
Practical Value
With feedback Without feedbackWith feedback Without feedback

Input impedance
Output impedance
Gain(midband)
Bandwidth
Transconductance(Gm)
With Feedback
Lower cutoff Frequency fL
Upper cutoff Frequency fH
:
:
without Feedback
EX.NO:12
Current shunt feedback amplifier
AIM :
To design and test the current shunt feedback amplifier and calculate the
1. Midband Gain
APPARATUS REQUIRED:
Transistor, capacitor, resistor, power supply, connecting wires.
THEORY:
The output resistance can be measured by open circuiting the input source.
Stability and frequency response of this circuit improves. Frequency distortion
reduces and generally noise and non-linear distortion also reduces. Input
resistance decreases and output resistance increases.
PROCEDURE:
various input
Parameter
With feedback
Input Impedance
Decreases
Output Impedance
Increases
Gain
Decreases
Bandwidth
Increases
CIRCUIT DIAGRAM:
WITHOUT FEEDBACK
WITH FEEDBACK:
DESIGN PROCEDURE:
Assumptions: VCC =15v,AV1=30,AV2=20,
fL=1KHz,S=5,IE2=1.8mA,IE1=1.1mA, RL=4.7K .
FIRST STAGE:
1. Calculation of hie1 :
re = 26 mV / IE 1
hie1 = hfe1 re
2.Caluclation of ZIe
Av1 = hfe1 [Rc1 Zie]
hie1
3. Calculation of RC2 :
Vcc = Ic1Rc1 + VCE1 + IE1RE1
IC1
IE1
VB1 = VBE1 + VE1

=VCC.R2 / R1+R2
4. Calculation of RE2:
RE1 = VE1 / IE1
5. Calculation of RB1:
S = 1+ (RB1 + RE1)
RB1 = R1 R2
ZI1 = RB
[hie1+(1 + hfe1)(Rf RE1)]

Z01= Rc1
= RE2 / (RE2 + Rf)
XCE = R E1/10
R E1 = RE1 {(RB1 + hie1)/(1 + hfe1)}
XCE =1/2 fCE
XCf = Rf / 10
SECOND STAGE:
1. Calculation of hie2:
re = 26 mV / IE 2
hie2 = hfe2 re
Av2 = hfe2 RLeff
hie2
RLeff=Rc2 RL
IC2
IE2
VB2 = VCC.R4 / R3+R4

RE2 = VE2 / IE2
S = 1 + (RB2 + RE2 )
RB2 = R3 R4
ZI2=[ hie2 + (1 + hfe2)RE2 ] RB2
Z02 = Rc
RL

Xci = Zi2 / 10
Xc0 = Rc2
RL
OVERALL CURRENT GAIN WITH FEEDBACK

AI = AI1 * AI2 = hfe1 * hfe2
D = 1 + AI
AIF = AI / D
AVF = Av / D
Zif = Zi / D
zof = Z0D
Parameter
Without feedback
Input Impedance
ZI2=[hie2+(1+hfe2)RE2] RB2,
ZI1=RB
Output Impedance
Gain
[hie1+(1+hfe1)(Rf RE1)]
With Feedback
Zif = Zi/D
zof = Z0D
Z01=Rc1, Z02=Rc RL
Av1 = hfe1 [Rc1 Zie],
hie1
Av2 =
hfe2 RLeff
AVF = Av/D
hie2
TABULATION:
WITH FEEDBACK:
Vin =
S.NO
Voltage gain
Voltage gain in dB
WITHOUT FEEDBACK:
Vin =
S.NO
MODEL GRAPH:
Voltage gain
Voltage gain in dB
RESULT:
Thus the frequency response characteristics of current shunt feedback amplifier
were obtained.
Theoretical Value
Practical Value
With feedback Without feedbackWith feedback Without feedback

Input impedance
Output impedance
Gain(midband)
Bandwidth
Transconductance(AV)
With Feedback
:
:
without Feedback
EX.NO:13
Voltage Series feedback amplifier.
AIM:
To design and test the voltage Series feedback amplifier and
calculate the following parameter with & without feedback.
1. Midband Gain
APPARATUS REQUIRED:
Transistor, Resistors, Capacitors, CRO, Function generator, RPS , Bread board,
Connecting wires
THEORY:
In large signal amplifiers and electronic measuring instruments, the major problem
of distortion should be avoided as far as possible. Again the gain must be independent of
external factors such as variation in the voltage of the D.C. supply and of the values of the
circuit components. All this can be achieved by feedback. A portion of the output signal is
taken from the output of the amplifier and is combined with the normal input signal and
thereby the feedback is accomplished. Here the output voltage V o is much greater than the
input voltage Vi and is 180 out of phase with it. Since the feedback current is proportional
to the output voltage, this circuit is a voltage shunt feedback amplifier.
Parameter
With feedback
Input Impedance
Decreases
Output Impedance
Decreases
Gain
Decreases
Bandwidth
Increases
PROCEDURE:
various input

CIRCUIT DIAGRAM:
WITHOUT FEEDBACK:
WITH FEEDBACK:
DESIGN PROCEDURE:
Assumptions: VCC = 10v, AV1=30,AV2=20 fL=1KHz,S=3, IE2=1.8mA,
IE1=1.1mA,RL=100 , =0.03
FIRST STAGE:
1. Calculation of hie1 :
re = 26 mV / IE 1
hie1 = hfe1 re
Av1 = hfe1 [Rc1 Zie1]
hie1
IC1
IE1
VB1 = VBE1 + VE1

= VCC.R2 / R1 + R2
RE1=VE1 / IE1
S=1+ (RB1 + RE1)
RB1 = R1| R2
ZI1= RB
[hie1+ (1+hfe1) (Rf )]

Z01 = Rc1
= RF1 / (RF1+Rf2)
RF2 >> RF1
XC0 = Z02/10
XC0 = 1/2 Fc0
XCi = Zi2/10
XC0 = 1/2 Fc0
R E1 = RE1 {(RF1+{(RB1 + hie1)/(1+ hfe1)})}
SECOND STAGE:
1. Calculation of hie2:
re = 26 mV / IE 2
hie2 = hfe2 re
2.Caluclation of RC2
Av2 = hfe2 RC2
hie2
VE2 = VCC/10 , VCE2 = VCC/ 2
3. Calculation of RE2 :
Vcc= Ic2Rc2 + VCE2 +IE2RE2
IC2
IE2
VB2 = VCC.R4 / R3+R4

RE2 = VE2 / IE2
S=1+ (RB2 + RE2)
RB2 = R3 R4
ZI2 = hie2 RB2

Z02 = Rc2
Xci = Zi2/10
Xc0 = Rc2 RL
XE2 = RE2/10
R E2 = RE2 {(RB2 + hie2)/(1 + hfe2)}
OVERALL CURRENT GAIN WITH FEEDBACK
AV = AV1*AV2
D = 1+AV
AVF = Av / D
Zif = ZiX D
zof = Z0/D
Parameter
Without feedback
Input Impedance
With Feedback
Zi = Rth // hie = 23 ohms Zif = Zi D =
Output Impedance
ZO = RC // RL=
Gain
AV = - hfe Rleff / Zi
ZOf = ZO D =
=20.49
AV
= GMF Rleff
TABULATION:
WITHOUT FEEDBACK:
S.NO
Frequency in HZ
Vin =
Amplitude in Volts
Voltage gain
WITH FEEDBACK:
S.NO
Frequency in HZ
Voltage gain in dB
Vin =
Amplitude in Volts
Voltage gain
Voltage gain in dB
MODELGRAPH:
RESULT:
Thus the frequency response characteristics of voltage shunt feedback amplifier
were obtained.
Theoretical Value
Practical Value
With feedback Without feedback With feedback Without feedback

Input impedance
Output impedance
Gain(midband)
Bandwidth
With Feedback
:
:
without Feedback
EX.NO:14
Voltage Shunt feedback amplifier.
AIM
To design and test the voltage shunt feedback amplifier and calculate the
1. Midband Gain
APPARATUS REQUIRED:
Transistor, capacitor, resistor, power supply, connecting wires.
THEORY:
A portion of the output signal is taken from the output of the amplifier and is
combined with the normal input signal and thereby feedback is accomplished.
There are two types of feedback. Increases the stability of an amplifier reduces
the bandwidth and increases the distortion and noise. The property of positive
feedback is utilized in oscillators. The shunt connection at the output reduces the
output resistance.
Parameter
With feedback
Input Impedance
Increases
Output Impedance
Decreases
Gain
Decreases
Bandwidth
Increases
PROCEDURE:
various input
CIRCUIT DIAGRAM:
WITHOUT FEEDBACK
WITH FEEDBACK:
DESIGN PROCEDURE:
Assumptions: VCC = 10v, AV=30 fL=1KHz,S=2, IE=1.2mA,RL=4.7K , = 0.4;
1. Calculation of hie:
re = 26 mV / IE 2
hie = hfe re
Av= hfe Rc RL
hie
VE = VCC/10 , VCE = VCC/ 2
3. Calculation of RC :
Vcc=IcRc+VCE+IERE
IC IE
VB=VCC.R2/R1+R2
4. Calculation of RE:
RE=VE/IE
5. Calculation of RB:
S=1+(RB+RE)
RB=R1 R2
RI=hie RB RF
R0=Rc RF
Xci=Ri/10
Xc0= Rc RL
WITH FEEDBACK
D=1+A
AVF=Av/D
Rif=Ri/D
Rof= R0/D
Parameter
Without feedback
With Feedback
Input Impedance
RI=hie RB RF
Rif=Ri/D
Output Impedance
R0=Rc RF
Rof= R0/D
Gain
Av= hfe Rc RL
AVF=Av/D
hie
TABULATION:
WITHOUT FEEDBACK:
S.NO
Frequency in HZ
Vin =
Amplitude in Volts
Voltage gain
WITH FEEDBACK:
S.NO
Frequency in HZ
Voltage gain in dB
Vin =
Amplitude in Volts
Voltage gain
Voltage gain in dB
MODELGRAPH:
RESULT:
Thus the frequency response characteristics of voltage series feedback amplifier
were obtained.
Theoretical Value
Practical Value
With feedback Without feedback With feedback Without feedback

Input impedance
Output impedance
Gain(midband)
Bandwidth
With Feedback
:
:
without Feedback
SIMULATION USING PSPICE

EXP. NO.01
SIMULATION OF DIFFERENTIAL AMPLIFIER
DATE :
AIM : To Construct Differential amplifier circuit using PSPICE
Requirements:
1. ORCAD 9.1
2. Personal Computer
Theory:
Op-amp :
Definition : op-amp is a versatile electronic component having wide
applications in signal processing , instrumentation and control .It is a high
gain differential amplifier
Differential amplifier :
In the differential amplifier v1 and v2 are the input voltages with respect to
ground potential at the non-inverting and inverting input terminals
respectively.
Thus the op-amp amplifies the difference between the two input voltages.
The input voltages can be either ac or dc.
The gain of the differential amplifier can be calculated as follows:
V1 & V2 input voltage
V0 output voltage
Vo = Av(V2-V1)
Av- Voltage gain
Design of differential am[plifier :

Use V1=V2=10mv @ signal frequency of 1Khz,Determine Vo1 and Vo2
and Calculate Av
Circuit diagram:-
R7
1k
5.000V
15Vdc
AD741
2
-
V-
R5
OS1
1k
V
OUT
3
1k
5V
5.000V
OS2
1
6
5
U1
5.000V
10.00VV
V6
V5
V+
R6
5.000V
-15.00V
V7
10V
15.00V
R8
1k
V4
15v dc
0V
Procedure
create the project.
Design the circuit in the design wizard.
Select the components from the part (view menu).
Complete the design .
Perform simulation using pspice tool.
Set the necessary parameters.
Run the simulation
Verify the circuit operation.
Simulation :-
Result :
Thus the Differential amplifier using PSPICE is constructed and
output graph is noted
EXP. NO.02
ACTIVE FILTERS:BUTTERWORTH 2 nd ORDER

LPF,HPF(Magnitude and phase response)
DATE :
AIM : To simulate the Butterworth 2 nd Order LPF,HPF filter circuit using
PSpice.
Requirements:
1.ORCAD 9.1
2.Personal Computer
Theory :
Filters are used in communication systems, instrumentation and many other
applications to pass only the desired frequencies of the input signal to the output.
Filters are basically grouped into four categories, namely low-pass, high-pass and
notch filters. Some specific functions used in filter analysis and design are
amplitude function and group-delay function.
Filters can be realized with or without active devices .Filters without active devices
are called passive filters and those with active devices are called active filters. If
the power of s in the denominator is 2 ,the filter is a second order filter.
Procedure
create the project.
Run the simulation
Circuit diagram(Low pass)
Simulation
Simulation output
Circuit diagram(high pass):R5

-41.18uV
-41.18uV
1k
V2
15Vdc
-41.18uV
15.00V
7.07uf
3.0uf
U2
3
-79.72uV
C5
V+
C4
OS2
0V
V-
OUT
OS1
5
6
1
VDB
uA741
V1
1k
0
0
R3
R6
100mVac
15Vdc
1k
V3
0
-60.47uV
R4
1k
Simulation:-
Result :
Thus the Butterworth of LPF and HPF using PSPICE is constructed
and output graph is noted.
EXP. NO.03
DATE :
ANALOG MULTIPLIER
AIM :To simulate Analog multiplier circuit.

Requirements:
1.ORCAD 9.1
2.Personal Computer
Theory:An ideal single ended analog multiplier is two-input and a single output
circuit in which the output voltage is proportional to the product of the two
input analog signal voltages.
Procedure
create the project.
Run the simulation
Circuit diagram:C1
0V
D2
1
2
-1.291f V 1N4500
1000pf
-2.575f V
D1
V1
VAMPL = 5
VOFF = 0
C2
1N4500
1000pf
FREQ = 1khz
0V
Design:
Output=,W=(X1-X2)(Y1-Y2)/10V+Z
Simulation:output
Result ;
Thus the Analog multiplier using PSPICE is constructed and output graph is
noted
EXP. NO.04
ASTABLE , BISTABLE & MONOSTABLE

MULTIVIBRATOR
DATE :
AIM :To simulate Astable ,Bistable and monostable multivibrator circuit.
Requirements:
1.ORCAD 9.1
2.Personal Computer
Astable multivibrator:
V1
12Vdc
R3
R1
R2
1.5k
220k
4.7k
C1
C2
C3
1.5uf
6.5uf
0.01uf
R4
4.7k
V
R5
V1 = 0
V3
V2 = 5V
TD = 0
TR = 0
TF = 0
PW = 3ms
PER = 2ms
V2
12Vdc
Q1
Q2N2222
220k
Q2N2222
Q2
R6
0
0
2.7M
THEORY:Multivibrator are two stage switching circuits in which the output of the first stage is fed to
the input of the second stage and vice versa. The outputs of the two stages are
complementary.
The astable or free running multivibrator generates square wave without any external
triggering pulse. It has no stable states i.e. it has two quasi stable states. It switches back
and forth from one state to another, remaining in each state for a time depending upon
the discharging of a capacitive circuit. Transistor astable multivibrator in which
components in one half of a cycle of the circuit are identical to their counter part in the
other half. The square wave output can be taken from collector point of Q1 and Q2.
When the supply voltage Vcc is applied due to some circuit imbalance.
Bistable multivibrator:
R2
4.7k
R1
4.7k
D2
D1N4002
D3
D1
D1N4002
C1
C3
V1
D1N4002
10Vdc
1n
1n
R3
R4
220k
C2
220k
V1 = 0
1n
V3
V2 = 5V
TD = 0
TR = 0
TF = 0
PW = 1ms
PER = 2ms
Q1
Q2N2222
Q2
V2
10Vdc
Q2N2222
R6
R5
2.7k
2.7M
THEORY:
The circuit uses two npn transistors Q1 and Q2.The collector of Q2 isa
coupled to the base of Q1 through resistance R1 while the collector of Q1 is
connected to the base of Q2 through another resistance R1.The characteristics of
both the transistors are never identical hence after giving supply one of the
transistors start conducting ahead of the other. If a positive going pulse is
applied at the set or reset terminal it will drive the transistor Q1 to saturation and
the transistor Q2 to cutoff. This is nothing but the second stable state through the
applied pulse is removed. It will remain in this state till another pulse is applied
to reset terminal.The change of states is totally dependent on the applied pulse
at the proper terminal i.e., set or reset terminal. The spacing of the triggering
pulses finally decides the shape of the output waveform.
MONOSTABLE MULTIVIBRATOR:
R2
R3
4.7k
R1
220k
1.5k
R4
4.7K
C1
C2
1.5uf
6.5uf
C3
V1 = 0
0.01uf
R6
V2
V2 = 5v
TD = 0
TR = 0
TF = 0
PW = 1ms
PER = 1ms
V1
12Vdc
220k
V
Q2N2222
Q1
V3
12Vdc
Q2
Q2N2222
0
R5
2.7M
THEORY:
Monostable multivibrator has one stable state and one quasi stable state. It
is also known as one-shot multivibrator or Univibrator. It remains in its stable state
until an input pulse triggers it into its quasi stable state for a time duration
determined by discharging an RC circuit and the circuit returns to its original
stable state automatically. It remains there until the next trigger pulse is applied.
Thus a monostable multivibrator cannot generate square waves of its own like an
astable multivibrator. Only external trigger pulses will cause it to generate the
rectangular waveform.It consists of two identical transistors Q1, Q2 with equal
collector resistances of RC1 and RC2. The output of Q2 through a resistive
attenuator in which C1 is a small speed up capacitor to speed up the transition.
The values of R2 and VBB are chosen so as to reverse bias Q1 and keep it in
the OFF state. The collector supply +VCC and R will forward bias Q2 and keep it
in ON state. Actually this is the stable state for the circuit.
Result ;
Thus the Astable, bistable and monostable multivibrator using PSPICE is
constructed and output graph is noted
EXP. NO.05
DATE :
D/A CONVERTER AND A/D CONVERTER
AIM :To simulate D/A converter and A/D converter circuit.

Requirements:
1.ORCAD 9.1
2.Personal Computer
D to A converter:
R8
2k
V5
15Vdc
R2
R1
1k
1k
1k
V-
R3
OS1
3
R5
OS2
2k
R6
2k
2k
2k
15Vdc
V2
V3
5Vdc
5Vdc
5Vdc
U4
V4
V1
AD741
R7
R4
V+
OUT
THEORY:A Wide range of resister values is required in the design of binary weighted
resister D/A converter .In R-2R ladder D/A converter, resistors of only two values
i.e R and 2R are used . Hence it is suited well for integrated circuit fabrication .
The typical values of R used vary from 2.5k to 10k. The principle of operation
of a ladder type network for 4-bit D/A Conversion is shown in fig with 4-bit binary
input b1 b2 b3 b4 analog output V0 and one terminal resistor 2R.
In this ladder circuit the output voltage is a weighted sum of digital inputs. For
example if the 4-bit binary input b1 b2 b3 b4 , is 1000 ie., if MSB is 1 , while the
other three inputsa are 0 .
Analog to digital converter:
R8
R9
2k
2k
V5
V8
15Vdc
15Vdc
1k
OS1
3
R5
OS2
2k
R6
2k
1
R10
6
5
2k
2k
V2
V3
5Vdc
5Vdc
5Vdc
THEORY:-
OS2
4Vdc
V7
15Vdc
0
0
0
1
6
5
AD741
V6
15Vdc
V1
OS1
OUT
3
U4
V4
1k
AD741
R7
R4
V+
OUT
1k
V-
1k
V+
R1
R2
V-
R3
U5
The simultaneous type A/D converter is based on comparing an unknown analog

input voltage with a set of reference voltages. To convert an analog signal into
digital signal of n output bits (2 3 -1) number of comparators are required. For
example a 2-bit A/D converter requires 3 or (2 2 -1) comparators, while a 3-bit
converter needs 7 or (2 3 -1)comparators.
The counter type A/D converter is constructed using only one
comparator with a variable reference voltage. The variable reference voltage can
be obtained by a sequence or binary counter and a D/A converter.
Result ;
Thus the D/A converter and A/D converter using PSPICE is constructed and
EXP. NO.06
DATE :
CMOS INVERTER, NAND & NOR
AIM :To simulate CMOS inverter , NAND and NOR circuit.

Requirements:
1.ORCAD 9.1
2.Personal Computer
CMOS inverter:
V3
6Vdc
X3
MTD4P06/MC
R1
1Meg
X1
V1 = 0
V2
V2 = 5v
TD = 0
TR = 0
TF = 0
PW = 1ms
PER = 1ms
MTD2N50/MC
THEORY:The inverter is basic to the CMOS gate. A basic inverter connection is shown in
fig. The driver is transistor Q2 which is the n-channel and Q1 (the p-channel
device acts as the load. Notice that drains are connected together to provide the
output and that the source and substrate are connected together. The source of pchannel device is connected to +VDD and the source of n-channel is connected to
ground. The gates of the two devices are connected together as a common input.
CMOS NAND:
V3
5Vdc
MTD4P06/MC
MTD4P06/MC
X1
X2
V1 = 10v
V1
V2 = 0
TD = 0
TR = 0
TF = 0
PW = 1ms
PER = 1ms
X4
MTD10N05E/MC
0
X3
MTD10N05E/MC
V1 = 0
V2
V2 = 10v
TD = 0
TR = 0
TF = 0
PW = 1ms
PER = 1ms
THEORY:The teo-input NAND gate which consistes of two p-type units in parallel and ntype unots in series . nitice that Q1 and Q2 form one complement connection Q3
and Q4 form another.
If both inputs are HIGH both p-channel transistors turn OFF and
both n-channel transistor turn ON. The output has a low impedance to ground and
produces a LOW state. If any input is LOW the associated n-channel transistor is
turned OFF and the associated p-channel transistor is turned ON .
CMOS NOR:
V3
5Vdc
0
MTD2955/MC
X1
V1 = 10v
R1
V1
V2 = 0v
TD = 0
TR = 0
TF = 0
PW = 1ms
PER = 1ms
1k
0
MTD2955/MC
V
X2
X4
0
V1 = 0v
MTD2N50/MC
V2
V2 = 10v
TD = 0
TR = 0
TF = 0
PW = 1ms
PER = 1ms
X3
MTD2N50/MC
0
0
THEORY:
A Two input CMOS NOR gate using a pair of PMOS transistors (Q1 and Q2)
and NMOS transistor (Q3 and Q4) is shown in fig of the two inputs A and B either
of the inputs can turn ON the PMOS or NMOS device connected to it.
When both are low, both pmos devices are driven ON and both NMOS devices
OFF. The output is coupled to VDD and goes to the HIGH state .If any inputr is
HIGH the associated p-channel transistor is turned OFF and the associated nchannel transistor turns ON.
Result ;
Thus the CMOS Inverter ,NAND and NOR using PSPICE is constructed and
CONTENTS
SL.NO
EXPERIMENT NAME
PAGE NO.
1.
RC Phase shift oscillator
2.
Wein bridge oscillator
3.
Hartley oscillator
4.
Colpitts oscillator
12
5.
Tuned Class-C Amplifier
15
6.
Integrator & Differentiator
18
7.
Clippers & Clampers
21
8.
Astable multivibrators
26
9.
Bistable multivibrators
29
10.
Monostable multivibrators
34
11.
Current series feedback amplifiers
38
12.
Current Shunt feedback amplifiers
44
13.
Voltage series feedback amplifiers
51
14.
Voltage shunt feedback amplifiers
57
Simulation using PSPICE

1.
Differential Amplifier
62
2.
Active filters
64
3.
Analog Multiplier
67
4.
Multivibrators
69
5.
A/D & D/A Converters
74
6.
CMOS Inverters
77

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MAHALAKSHMI

DEPARTMENT OF ELECTRONICS & COMMUNICATION

EC2257/ ELECTRONIC CIRCUITS-II &SIMULATION

As per the common syllabus prescribed by

EC2257 ELECTRONIC CIRCUITS II AND SIMULATION LABORATORY

RC Phase Shift Oscillator.

Wein bridge Oscillator.

4. Inductor box 30mH, 0.7mH

3. The value of frequency was calculated and compared with the

Design of Tank circuit:

Tuned class c amplifier.

0.01F, 0.1F, 0.33F

Frequency in HZ Amplitude in Volts

Integrator & Differentiator

4. Interchange the resistor and capacitor position to get Differentiator

5. Cathode Ray Oscilloscope

VCN2 = VCE2 + VEN = VEN -------------- (1)

I3 flows through R1 & R2, IB1 =0

VBN1 = 0.25 VEN

IB2 (min) = --------- = ----------- =.08mA

IB2 = 2 *IB2 (min)

------------- = 0.16m + -------4.2K +3R2

Consider equivalent circuit of quasi stable state

Current series feedback amplifier.

Tran conductance amplifier : Decreases

Since IB is very small compare with Ic , IE ~ Ic = 2mA AV = 30; hfe =

Zi = Rth // hie = 0.87K

Frequency in HZ Amplitude in Volts

Frequency in HZ Amplitude in Volts

With feedback Without feedbackWith feedback Without feedback

Current shunt feedback amplifier

VB1 = VBE1 + VE1

[hie1+(1 + hfe1)(Rf RE1)]

7. Calculation of Input impedance Z0 :

VB2 = VCC.R4 / R3+R4

8. Calculation of Coupling Capacitors:

OVERALL CURRENT GAIN WITH FEEDBACK

Frequency in HZ Amplitude in Volts

Frequency in HZ Amplitude in Volts

With feedback Without feedbackWith feedback Without feedback

Voltage Series feedback amplifier.

6. The input & output impedance is measured with multimeter.

VB1 = VBE1 + VE1

[hie1+ (1+hfe1) (Rf )]

7. Calculation of Input impedance Z0 :

VB2 = VCC.R4 / R3+R4

7. Calculation of Input impedance Z0 :

Zi = Rth // hie = 23 ohms Zif = Zi D =

With feedback Without feedback With feedback Without feedback

Voltage Shunt feedback amplifier.

With feedback Without feedback With feedback Without feedback

SIMULATION USING PSPICE

SIMULATION OF DIFFERENTIAL AMPLIFIER

Design of differential am[plifier :

ACTIVE FILTERS:BUTTERWORTH 2 nd ORDER

Circuit diagram(Low pass)

Circuit diagram(high pass):R5

AIM :To simulate Analog multiplier circuit.

ASTABLE , BISTABLE & MONOSTABLE

D/A CONVERTER AND A/D CONVERTER

AIM :To simulate D/A converter and A/D converter circuit.

Analog to digital converter:

The simultaneous type A/D converter is based on comparing an unknown analog