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I. INTRODUCTION
HE negative environmental and sociopolitical impacts of
fossil fuel consumption coupled with finite fuel resources
has recently prompted environmental and oil independence initiatives in both federal and state governments. Many of these
initiatives focus on furthering the development of vehicular technology for both fully electric vehicles (EVs) and plug-in hybrid
EVs (PHEVs) [1]. Specifically, advances in power electronics
Manuscript received February 14, 2013; revised June 6, 2013 and August 7,
2013; accepted August 12, 2013. Date of current version January 10, 2014. This
work was supported in part by the Advanced Research Projects Agency-Energy
(ARPA-E), U.S. Department of Energy, under Award DE-AR-0000110. Recommended for publication by Associate Editor L. M. Tolbert.
B. Whitaker, A. Barkley, Z. Cole, B. Passmore, D. Martin, T. R. McNutt, and
A. B. Lostetter are with the Arkansas Power Electronics International (APEI),
Inc., Fayetteville, AR 72701 USA (e-mail: bwhitak@apei.net; abarkle@
apei.net; zcole@apei.net; bpassmo@apei.net; dmartin@apei.net; tmcnutt@
apei.net; alostet@apei.net).
J. S. Lee and K. Shiozaki are with the Toyota Research Institute, North
America Toyota Motor Engineering and Manufacturing North America, Inc.,
Ann Arbor, MI 48105 USA (e-mail: jae.lee@tema.toyota.com; koji.shiozaki@
tema.toyota.com).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPEL.2013.2279950
0885-8993 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications standards/publications/rights/index.html for more information.
WHITAKER et al.: HIGH-DENSITY, HIGH-EFFICIENCY, ISOLATED ON-BOARD VEHICLE BATTERY CHARGER UTILIZING SiC POWER DEVICES
TABLE I
CHARGER SYSTEM PERFORMANCE METRICS
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measurements, along with the volume and mass of the converter including a case, result in a volumetric power density of
5.0 kW/L and a gravimetric power density of 3.8 kW/kg. These
figures represent an order of magnitude improvement over the
2010 Toyota Prius Plug-in Hybrid battery charger and significant improvement over the projected future DOE targets.
II. FIRST STAGE: ACDC CONVERTER
A. Topology Selection
vin (t)
,
Vdc
vin > 0.
(1)
|vin (t)|
,
Vdc
vin < 0.
(2)
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Fig. 1.
Proposed two-stage vehicle battery charger comprised of a bridgeless boost acdc converter and a phase-shifted full-bridge isolated dcdc converter.
B. Theory of Operation
The PSFB converter operates with an approximately 50%
duty cycle for each switch position. Deadtime is inserted between the upper and lower devices in a given bridge leg to prevent shoot-through currents and to allow the resonant transition
for ZVS switching. Power flow is controlled by adjusting the
phase shift between bridge legs that effectively modulates the
time per switching cycle when diagonal switch pairs are simultaneously conducting. ZVS is achieved by utilizing the energy
stored in inductors downstream of the MOSFETs to discharge
their effective output capacitance before the device is turned on.
Idealized waveforms highlighting the fundamental operation of
WHITAKER et al.: HIGH-DENSITY, HIGH-EFFICIENCY, ISOLATED ON-BOARD VEHICLE BATTERY CHARGER UTILIZING SiC POWER DEVICES
2609
Fig. 3.
the converter are shown in Fig. 3. Key time instants (t0 through
t7 ) are denoted by dashed vertical lines.
At time t0 , the device S6 is turned off. This completes an
interval in which current is circulating through the converter,
via switches S5 and S6 , and initiates the voltage transition for
the lagging bridge leg. In the time interval between t0 and t1 ,
the current in the secondary begins to freewheel through the
rectifying diodes and the secondary circuit becomes decoupled
from the primary. Due to this decoupling, only the energy stored
in the resonant inductor Lr can be utilized to discharge the effective device capacitance. Thus, full soft-switching only occurs
when the following condition is satisfied
2Ce
iL r (t0 ) Vdc
(3)
Lr
where Ce is the effective capacitance of one full-bridge quadrant that includes the parallel combination of the MOSFET
output capacitance, diode junction capacitance, and other stray
parasitic capacitances. Reduced switching losses may still be
achieved at lower current levels where (3) is not met due to
partial soft-switching.
At time t1 , the voltage across S8 has reached zero and that
device turns on under ZVS conditions at time t2 . The peak amplitude of the resonant voltage transition occurs at approximately
one-quarter of the resonant period of the resonant inductor and
the effective capacitance of two quadrants, which is expressed
as
tres =
2Lr Ce .
(4)
2
The deadtime inserted between upper and lower devices on
the lagging leg should be set to this quarter resonance period to
allow the device to turn off at the peak of the resonant transition.
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TABLE II
ON-BOARD CHARGER INITIAL DESIGN SPECIFICATIONS
(7)
A total input inductance of 80 H was calculated. This inductance was split between two inductors fabricated on a common
core to improve the magnetic utilization. A ferrite core was used
because of its superior performance at high frequencies. The
coupled inductors were built using planar windings to minimize
the footprint and total volume.
The dc-bus capacitor was sized according to allowable lowfrequency ripple voltage on the dc-bus. The value of capacitance
was calculated using
Cdc
Po-ac/dc
=
2 (%V
2ffund Vdc
dc-ripple )
(8)
where Po-ac/dc is the output power of the acdc stage, ffund is the
fundamental frequency of the input ac voltage, and %Vdc-ripple
is the peak-to-peak voltage ripple at twice the fundamental frequency on the dc-bus as a percentage of the nominal dc-bus
voltage. For this calculation, the nominal dc-bus voltage was
assumed to be 350 V with a desired voltage ripple of 30% of
this value. The very high voltage ripple was selected due to the
relatively large size of commercially available film capacitors
that were utilized for this design in place of electrolytic capacitors. Due to the volume constraints, a final value of 300 F was
Vout-m ax
Vdc De -m ax
(9)
where De -m ax is the maximum effective duty cycle. A primaryto-secondary turns ratio of 1:1.5 was selected to balance the two
aforementioned considerations assuming a maximum effective
duty cycle of 80%. The transformer was implemented using a
ferrite core and a planar winding strategy. Particular attention
was given to the layering of the windings to reduce the ac
resistance caused by proximity effects.
The output inductor was designed to limit the output ripple
current occurring at twice the switching frequency. The inductance was designed according to
nVdc Vo De Tsw
Lo =
.
(10)
iL o
2
A calculated inductance of 20 H gives a maximum peakto-peak ripple current of approximately 5 A, which is 25% of
the maximum output current. The output inductor was designed
using a ferrite core with planar windings to minimize volume.
The cutoff frequency of the output filter was designed by
properly selecting the output capacitance. The required capacitance was calculated using
Co =
1
(2fc )2 Lo
(11)
WHITAKER et al.: HIGH-DENSITY, HIGH-EFFICIENCY, ISOLATED ON-BOARD VEHICLE BATTERY CHARGER UTILIZING SiC POWER DEVICES
Fig. 4.
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A conscious effort was made to simultaneously optimize electrical performance, minimize volume, and reduce thermal management requirements. Power stage components were grouped
in a way to minimize the required power bussing among components to reduce bus bar impedance and weight. Three X-5
power modules, each with different device configurations,
were utilized for the system. Module 1 contained two parallel
MOSFETs and one antiparallel Schottky diode per position for
the two lower quadrants (corresponding to switches S3 and S4 )
and a single Schottky diode per position for the two high side
quadrants. Module 2 contained two parallel MOSFETs and one
antiparallel Schottky diode in all four quadrants and Module
3 utilized a single Schottky diode in all four quadrants. A heat
sink was chosen to provide optimal heat transfer from the power
stages and magnetics to the ambient environment under minimal
airflow conditions. The heat sink was designed to span the base
of the entire system to maximize heat spreading. Additionally,
the power modules and all of the magnetic components of the
power stage are mounted directly to the heat sink via a thermal
interface material to improve thermal conductivity. A stacked
approach using board-to-board headers was utilized for the gate
driver and control boards. The control board itself was designed
such that large components could fill the voids between board
layers to achieve maximum system density. A rendering of the
system package that highlights individual component placement
is shown in Fig. 5.
A breakdown of the mass and volume of the system is given in
Fig. 6. The magnetics (inductors and transformer) add the most
mass to the system, but they only represent the third largest volume. The dc-link capacitors provide the second most mass as
well as the second highest overall volume. The heat sink represents the third largest mass and the largest overall volume using
a rectangular solid approximation. These three components represent 79% of the total mass and 70% of the total volume of the
system. Because of this, technological advancement for these
three areas should be targeted to further reduce system volume
and weight.
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TABLE IV
SUMMARY OF POWER STAGE COMPONENTS
Fig. 7.
V. EXPERIMENTAL RESULTS
The experimental prototype shown in Fig. 7 was built and
tested to verify proper operation. The first and second power
stages were initially tested independently and optimized for
maximum efficiency. The two stages were then cascaded and
tested as a fully-integrated charger system. A summary of the
power stage components used for the full system is given in Table IV. The efficiency measurements, as well as total harmonic
distortion (THD) and power factor, were made with a Voltech
PM6000 power analyser with a 40 MHz sampling rate.
A. First-Stage ACDC Converter Testing
The bridgeless boost acdc converter was first evaluated by
operating it as a simple dcdc boost converter. This was accomplished by modulating MOSFET S3 while holding S4 on and
applying a dc voltage to the input in place of the ac grid voltage.
This mode emulates the normal operation of the acdc converter
Fig. 8. Waveforms of the acdc power stage when operated with a dc input
and fixed duty cycles with V in = 240 V, Iin = 20 A, and V d c = 350 V: (a) S 3
turn-on event and (b) S 3 turn-off event.
WHITAKER et al.: HIGH-DENSITY, HIGH-EFFICIENCY, ISOLATED ON-BOARD VEHICLE BATTERY CHARGER UTILIZING SiC POWER DEVICES
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Fig. 9. Device S 3 drain-to-source voltage rise times (10%90%) and fall times
(90%10%) versus input current with V in = 240 V and V d c = 350 V.
Fig. 10. Efficiency versus output power at various switching frequencies for
the acdc power stage when operated with a dc input and fixed duty cycles for
V in = 264 V and V d c = 350 V.
Fig. 11. Operation of PSFB converter showing (a) ZVS of the leading leg and
partial soft-switching of the lagging leg with a low resonant inductor current
and (b) ZVS for both legs at a higher resonant inductor current.
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Fig. 12. Efficiency versus output power for the PSFB converter at various
switching frequencies for V d c = 350 V and V o = 400 V.
to account for the effective duty cycle loss and maintain a constant output voltage. The peak efficiency at the target switching
frequency of 500 kHz was found to be 93.9% with Vdc equal
to 350 V and an output voltage of 400 V. This efficiency at
this operation point was below the goal of 96% and required
the investigation of power stage performance at lower frequencies. Reducing the switching frequency for this converter trades
device switching loss and ac-resistance loss for additional magnetics core loss and higher current ripple. Additionally, ZVS
operation of the lagging leg is impaired at lower frequencies
because the output current becomes discontinuous. The switching frequency was swept down to 200 kHz but not taken any
lower to avoid saturation of the transformer. Overall, a large
improvement in efficiency was observed by operating at a lower
switching frequency. The highest overall peak efficiency was
found at a switching frequency of 200 kHz where it was measured to be 96.5%, which exceeds the design target. The experimentally measured efficiencies at various switching frequencies
are summarized in Fig. 12.
C. Full Charger System
Closed-loop control was added and the two converters were
cascaded to form the full charger system. The input was gridtied with an isolation transformer to protect the measurement
equipment and the output was resistively loaded. The PSFB converter was operated at 200 kHz because this operating condition
resulted in the highest peak efficiency. The acdc converter was
also operated at 200 kHz in order to synchronize the ADC sampling and pulsewidth modulated (PWM) gating signals in the
controller even though that stage met the efficiency target at
250 kHz. The input voltage and current, dc-bus voltage, and
output current waveforms are shown in Fig. 13 for an output
power of 3.1 kW. The input current is slightly distorted around
line voltage zero crossings; however, there is very little switching ripple and the current THD was measured to be 4.6%. The
input current is also well synchronized with the input voltage
and a power factor of 0.996 was measured. The harmonic con-
Fig. 13. Input and output waveforms of the two-stage charger system with
v in = 232 Vrm s , iin = 14 Arm s , Io = 9 Arm s , V d c = 359 Vrm s , and a
resistive load of 40 on the output.
tent of the input current was extrapolated from the input current
waveform and the results are compared to the EN 61000-3-2
Class A limits in Fig. 14. The current amplitude at the fundamental frequency is 19.9 Ap eak , however this isnt shown in the
figure because the y-axis has been scaled to 2.5 A for the sake
of legibility. The charger meets the standard for the lower order
harmonics however it exceeds the limits for a few higher order
harmonics such as the 15th harmonic.
The resistive load was increased and the output voltage was
held at 400 V to evaluate the efficiency of the system at various
power levels. The efficiency versus output power results are
shown in Fig. 15 for an input voltage of 240 Vrm s . The system
was tested up to a peak power of 6.1 kW where the target system
efficiency of 94% was achieved. An overall peak efficiency of
95% was measured at an output power of 3.1 kW. The efficiency
drops off significantly at lower power levels; however, its still
greater than 91.5% at an output power of 1.3 kW.
WHITAKER et al.: HIGH-DENSITY, HIGH-EFFICIENCY, ISOLATED ON-BOARD VEHICLE BATTERY CHARGER UTILIZING SiC POWER DEVICES
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TABLE V
PROTOTYPE CHARGER PERFORMANCE SUMMARY
Fig. 15. Efficiency versus output power for the two-stage charger system with
v in = 240 Vrm s , V o u t = 400 V, and both power stages switching at 200 kHz.
for this two-stage system was described in detail. Additional details on the packaging of the MCPM and the overall system were
discussed. A prototype was developed and testing results showcase the functionality of the design. The peak system efficiency
of 95% and a maximum output power of 6.06 kW both exceed
the initial design specifications. The final prototype volumetric
power density of 5.0 kW/L and gravimetric power density of
3.8 kW/kg represent a more than 10 improvement in current
technology used in the 2010 model Toyota Prius Plug-in Hybrid
and a more than 5 improvement in DOE targets for the year
2022. These results clearly demonstrate the potential improvements in system performance and miniaturization that can be
achieved through the use of SiC power devices.
ACKNOWLEDGMENT
Fig. 16. Loss distribution for full charger system at an output power of 3.1 kW
with v in = 240 Vrm s , V o u t = 400 V, and both power stages switching at
200 kHz.
The authors would like to acknowledge Toyota Motor Engineering and Manufacturing North America for their involvement and support in the development of this charger for the next
generation of Toyota plug-in hybrid EVs.
The information, data, or work presented herein was funded
in part by an agency of the United States Government. Neither
the United States Government nor any agency thereof, nor any
of their employees, makes any warranty, express or implied,
or assumes any legal liability or responsibility for the accuracy,
completeness, or usefulness of any information, apparatus, product, or process disclosed, or represents that its use would not
infringe privately owned rights. Reference herein to any specific
commercial product, process, or service by trade name, trademark, manufacturer, or otherwise does not necessarily constitute
or imply its endorsement, recommendation, or favoring by the
United States Government or any agency thereof. The views and
opinions of authors expressed herein do not necessarily state or
reflect those of the United States Government or any agency
thereof.
REFERENCES
[1] S. G. Wirasingha, N. Schofield, and A. Emadi, Plug-in hybrid electric vehicle developments in the US: Trends, barriers, and economic feasibility,
in Proc. IEEE Vehicle Power Propulsion Conf., Sep. 35, 2008, pp. 18.
[2] A. Emadi, Y. J. Lee, and K. Rajashekara, Power electronics and motor
drives in electric, hybrid electric, and plug-in hybrid electric vehicles,
IEEE Trans. Ind. Appl., vol. 55, no. 6, pp. 22372245, Jun. 2008.
[3] A. Emadi, S. S. Williamson, and A. Khaligh, Power electronics intensive
solutions for advanced electric, hybrid electric, and fuel cell vehicular
power systems, IEEE Trans. Power Electron., vol. 21, no. 3, pp. 567
577, May 2006.
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Bret Whitaker (S08M13) received the B.S. degree from the University of Arkansas, Fayetteville,
AR, USA, and the M.S. degree from Virginia Polytechnic Institute and State University (Virginia Tech),
Blacksburg, VA, USA, in 2008 and 2010, respectively, both in electrical engineering.
From 2008 to 2011, he was a Research Assistant at
the Future Energy Electronics Center, Virginia Tech.
In 2011, he joined Arkansas Power Electronics International (APEI), Inc., Fayetteville, USA, as a Design
Engineer. His current research interests include the
development of wide-bandgap power electronics for on-board vehicle battery
charging applications, single-phase and three-phase inverters, soft-switching
converters, energy storage systems, and power electronics for renewable energy
applications.
WHITAKER et al.: HIGH-DENSITY, HIGH-EFFICIENCY, ISOLATED ON-BOARD VEHICLE BATTERY CHARGER UTILIZING SiC POWER DEVICES
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Koji Shiozaki received the B.S. in applied chemical engineering from Tokyo Institute of Technology,
Tokyo, Japan, in 1983.
From 1983 to 1988, he was with the Central Research Laboratory, Sharp Co., Japan. During this
period, he was an Engineer for three-dimensional
stacked semiconductor device, the advanced research
project entrusted from MITI. From 1988 to 2008,
he had been with Toyota Motor Co., Japan, and
participated in automotive semiconductor developments, such as CMOS, SOI-BiCDMOS, IGBT, SiGeBiCMOS, etc. Since 2008, he has been with Toyota Technical Center, Ann Arbor,
MI, where he was involved in the start-up of Toyota Research Institute of North
America. He has been involved in the establishment and management of phased
array radar project, advanced cooling projects for PHV/EV, SiC high-power
battery charger project awarded from DOE ARPA-E, vehicle wireless charging
technology awarded from DOE VTP, etc.
Dr. Shiozakis team was awarded the 2013 R&D 100 Awards on Multi-Pass
Branching Microchannel Cold Plate in 2013.