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Memory on an Intel compatible processor is managed
on three levels:
Physical
Linear (paging)
Logical (segmentation)
A program never actually operates directly on the linear
or physical levels, although you will see that it is
possible to give this illusion. The linear address space is
typically handled by the paging mechanism. The paging
facilities on the processor allow us to remap physical
memory to suit the needs of the program running.
Logical addressing, or segmentation, allows us to
separate different aspects of the program from each
other, such as the program code itself and the stack.
I/O Ports :
I/O devices are connected to the computer through I/O
circuits. Each of these circuits contains several register
called I/O Ports. Some are used for data while others
are used control commands. Like memory locations,
the I/O ports have address and they are connected to
the bus system. These addresses are known as I/O
address and can only be use in input (IN) or output
(OUT) instructions.
Registers:
Data register
Address register
Status register
Index register
Segment register
Usage of Registers
Segment DS
BX, SI, & DI
Segment SS
BP & SP
BX can be used for indirect addressing
Instruction Execution:
To understand how the CPU operates, lets look at how an
instruction is executed. The machine instruction has two
major parts: an opcode and operands. The opcode
specifics the type of operation and operands are often
given as memory address to the data to be manipulated.
The two operation cycles of the microprocessor are:
(Fetch - Execute cycle)
Fetch:
1. Fetch an instruction from memory
2. Decode the instruction to determine the operation
3. Fetch data from memory if necessary.
Execute:
1. Perform the operation on the data
2. Store the result in memory if needed.