Sistem Komputer Berkinerja

Tinggi
http://www.unhas.ac.id/amil/S2TE/siskom_2014/

L #4 Memory System & Caches

Amil A. Ilham
http://www.unhas.ac.id/amil

Bookshelf analogy
Lots of books on shelves
A few books on my desk
One book Im reading at this moment

Shelves = main memory

Desk = cache
Book = block (Line)
Page in book = memory location

Problem in Computer System:

Processor Performance vs. Memory Performance

Memory in Computer System

CPU looks first for data in L1 cache, then in L2, then
in Main memory (RAM).

10

The Memory Hierarchy

11

Intel Pentium Memory Hierarchy

12

Cache Terminology
Instruction cache cache that only holds instructions.
Data cache cache that only caches data.
Unified cache cache that holds both instructions
and data

13

Cache Performance Metrics

Cache hit: memory references found in the cache
Hit time: time to deliver a line in the cache to the
processor (includes time to determine whether the line
is in the cache).

Cache miss: memory references not found in the

cache
Miss rate: fraction of memory references not found in
the cache (misses/references)

Miss penalty: additional time required because of a

miss (cycles to service a miss)
Typically 25-100 cycles for main memory
14

Average Memory Access Time (AMAT)

What is the average memory access time (AMAT)
in clock cycles if:
70% of references hit in cache
Cache hits take one clock cycle
Main memory references take 25 clock cycles

15

Impact of hit rate

Cache hit takes 1 cycle
Main memory references take 25 cycles
AMAT (cycles)

16

Memory Locality
The memory access of programs present different patterns
and memory hierarchies try to explore the memory locality
Memory locality is the principle that future memory
accesses are near past accesses
There are two types of memory locality:
Spatial Locality: near in space/distance.
The concept that likelihood of referencing a resource is higher if a
resource near it (close address) was just referenced

Temporal Locality: near in time

The concept that a resource that is referenced at one point in time will
be referenced again sometime in the near future

Why does code have locality?

repeating loops
accessing elements of an array/struct
17

Eight-block cache configured as direct mapped, twoway set associative, four-way set associative, and fully
associative

18

Where does the data go in the cache?

19

Eight-block cache configured as direct

mapped (one-way set associative)

20

Eight-block direct mapped cache

(Eight-block one-way set associative cache)

21

Eight-block direct mapped cache

(Eight-block one-way set associative cache)
The initial state of the cache after power-on
Index
000
001
010
011
100
101
110
111

Tag

Data

0
0
0
0
0
0
0
0
22

Eight-block direct mapped cache

(Eight-block one-way set associative cache)
Suppose that the processor will access data consecutively in the
following memory addresses (in decimal): 22,26,22,26,16,3,16,18
1.
2.
3.
4.
5.
6.
7.
8.

22 -> 10110 :
26 -> 11010 :
22 -> 10110 :
26 -> 11010 :
16 -> 10000 :
3 -> 00011 :
16 -> 10000 :
18 -> 10010 :

Index V
000

001

010

011

100

101

110

111

Tag

Data

23

Eight-block direct mapped cache

(Eight-block one-way set associative cache)
Suppose that the processor will access data consecutively in the
following memory addresses (in decimal): 22,26,22,26,16,3,16,18
1.
2.
3.
4.
5.
6.
7.
8.

22 -> 10110 : Miss

26 -> 11010 : Miss
22 -> 10110 : Hit
26 -> 11010 : Hit
16 -> 10000 : Miss
3 -> 00011 : Miss
16 -> 10000 : Hit
18 -> 10010 : Miss

Index V

Tag

Data

000

10

M[10000]

001

010

11
10

M[11010]
M[10010]

011

00

M[00011]

100

101

110

10

M[10110]

111

0
24