Escolar Documentos
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EASY ELECTRONICS
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1|Page
1. Introduction
2. Component Used
3. Circuit Diagram
4. Circuit Description
5. 8051 Microcontroller Architecture
6. IR Transmitter(TSAL 6200)
7. IR Receiver(TSOP 1738)
8. 555 Timer
9. Stepper Motor
10. Diode
11. LCD
12. Resistor
13. Crystal Oscillator
14. Voltage Regulator
15. Capacitor
16. Momentary switch
17. Source Code in Assembly
18. Bibliography
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Features :
Benefits :
3|Page
Sr. no.
1.
2.
3.
4.
5.
6.
7.
8.
Component used
89c51 microcontroller (base + IC)
Diode (4007, .7v)
10k resistance
4.7k resistance
470 ohms resistance
Crystal oscillator (12Mhz frequency)
buzzer
LCD (2 line LCD display)
Quantity (no.s)
1
4
1
7
12
1
1
1
9.
10.
Transformer (220v-909)
L.E.D.
1
1
11.
16 Pin connector
12.
13.
14.
15.
1
4
1
16.
17.
18.
19.
20.
21.
22.
23.
24.
Capacitor(1 pf)
IR Transmitter(TSAL 6200)
IR Receiver (TSOP 1738)
555 Timer(IC+Base)
Voltage regulator (7805)(+5v)
Pot (10k) (contrast controller)
Stepper motor
2-Pin connector
2- pin switches
4
4
4
4
1
4
2
1
2
25.
26.
Supply wire
2 mts
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This project utilizes two powerful IR transmitters and two receivers; one pair of
transmitter and receiver is fixed at up side (from where the train comes) at a level
higher than a human being in exact alignment and similarly the other pair is fixed
at down side of the train direction.
Sensor activation time is so adjusted by calculating the time taken at a certain
speed to cross at least one compartment of standard minimum size of the Indian
railway. Sensors are fixed at 1km on both sides of the gate.
We call the sensor along the train direction as foreside sensor and the other as
aft side sensor. When foreside receiver gets activated, the gate motor is turned
on in one direction and the gate is closed and stays closed until the train crosses
the gate and reaches aft side sensors. When aft side receiver gets activated
motor turns in opposite direction and gate opens and motor stops.
Buzzer will immediately sound at the fore side receiver activation and gate will
close after 5 seconds, so giving time to drivers to clear gate area in order to
avoid trapping between the gates and stop sound after the train has crossed
And every time when gates gets open and close it will be displayed on LCD.
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8051 Microcontroller
Pin Configuration:
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Pin Description:
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VCC:
Supply voltage.
GND:
Ground.
Port 0:
Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin
can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be
used as high impedance inputs. Port 0 may also be configured to be the
multiplexed low order
Address /data bus during accesses to external program and data memory. In this
mode P0 has internal pull ups. Port 0 also receives the code bytes during Flash
programming,
and outputs the code bytes during program verification. External pull ups are
required during program verification.
Port 1:
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output
buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they
are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port
1 pins that are externally being pulled low will source current (IIL) because of the
internal pull-ups. Port 1 also receives the low-order address bytes during Flash
programming and verification.
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Port 2:
Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output
buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they
are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port
2 pins that are externally being pulled low will source current (IIL) because of the
internal pull-ups.
Port 2 emits the high-order address byte during fetches from external program
memory and during accesses to external data memory that use 16-bit addresses
(MOVX @ DPTR). In this application, it uses strong internal pull-ups when
emitting 1s. During accesses to external data memory that use 8-bit addresses
(MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register.
Port 2 also receives the high-order address bits and some control signals during
Flash programming and verification.
Port 3:
Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output
buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they
are pulled high by the internal pull-ups and can be used as inputs. As inputs,
Port 3 pins that are externally being pulled low will source current (IIL) because
of the pull-ups. Port 3 also serves the functions of various special features of the
AT89C51 as listed below: Port 3 also receives some control signals for Flash
programming and verification.
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ALE/PROG:
Address Latch Enable output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG)
during Flash programming. In normal operation ALE is emitted at a constant rate
of 1/6 the oscillator frequency, and may be used for external timing or clocking
purposes. Note, however, that one ALE
Pulse is skipped during each access to external Data Memory. If desired, ALE
operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set,
ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is
weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller
is in external execution mode.
RESET:
Reset input. A high on this pin for two machine cycles while the oscillator is
running resets the device.
PSEN:
Program Store Enable is the read strobe to external program memory. When the
AT89C51 is executing code from external program memory, PSEN is activated
twice each machine cycle, except that two PSEN activations are skipped during
each access to external data memory.
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EA/VPP:
External Access Enable. EA must be strapped to GND in order to enable the
device to fetch code from external program memory locations starting at 0000H
up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally
latched on reset. EA should be strapped to VCC for internal program executions.
This pin also receives the 12-volt programming enable voltage (VPP) during
Flash programming, for parts that require 12-volt VPP.
XTAL1:
Input to the inverting oscillator amplifier and input to the internal clock operating
circuit.
XTAL2:
Output from the inverting oscillator amplifier.
Oscillator Characters:
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier
which can be configured for use as an on-chip oscillator, as shown in Figure 1.
Either a quartz crystal or ceramic resonator may be used. To drive the device
from an external clock source, XTAL2 should be left unconnected while XTAL1 is
driven as shown in Figure 2. There are no requirements on the duty cycle of the
external clock signal, since the input to the internal clocking circuitry is through a
divide-by-two flip-flop, but minimum and maximum voltage high and low time
specifications must be observed.
Idle Mode:
In idle mode, the CPU puts itself to sleep while all the on chip peripherals remain
active. The mode is invoked by software. The content of the on-chip RAM and all
the special functions registers remain unchanged during this mode. The idle
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Programming Algorithm:
Before programming the AT89C51, the address, data and control signals should
be set up according to the Flash programming mode table. To program the
AT89C51, take the following steps.
1. Input the desired memory location on the address lines.
2. Input the appropriate data byte on the data lines.
3. Activate the correct combination of control signals.
4. Raise EA/VPP to 12V for the high-voltage programming mode.
5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits.
The byte-write cycle is self-timed and typically takes no more than 1.5 ms.
Repeat steps 1 through 5, changing the address and data for the entire array or
until the end of the object file is reached.
Data Polling: The AT89C51 features Data Polling to indicate the end of a write
cycle. During a write cycle, an attempted read of the last byte written will result in
the complement of the written datum on PO.7. Once the write cycle has been
completed, true data are valid on all outputs, and the next cycle may begin. Data
Polling may begin any time after a write cycle has been initiated.
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Chip Erase: The entire Flash array is erased electrically by using the proper
combination of control signals and by holding ALE/PROG low for 10 ms. The
code array is written with all 1s. The chip erase operation must be executed
before the code memory can be re-programmed.
Reading the Signature Bytes: The signature bytes are read by the same
procedure as a normal verification of locations 030H, 031H, and 032H, except
that P3.6 and P3.7 must be pulled to a logic low. The values returned are as
follows.
(030H) = 1EH indicates manufactured by Atmel
(031H) = 51H indicates 89C51
(032H) = FFH indicates 12V programming
(032H) = 05H indicates 5V programming
Special Function Registers:
A map of the on-chip memory area called the Special Function Register (SFR)
space. Note that not all of the addresses are occupied, and unoccupied
addresses may not be implemented on the chip. Read accesses to these
addresses will in general return random data, and write accesses will have an
indeterminate effect. User software should not write 1s to these unlisted
locations, since they may be used in future products to invoke.
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Data Memory:
The AT89C52 implements 256 bytes of on-chip RAM. The upper 128 bytes
occupy a parallel address space to the Special Function Registers. That means
the upper 128 bytes have the same addresses as the SFR space but are
physically separate from SFR space. When an instruction accesses an internal
location above address 7FH, the address mode used in the instruction specifies
whether the CPU accesses the upper 128 bytes of RAM or the SFR space.
Instructions that use direct addressing access SFR space. new features. In that
case, the reset or inactive values of the new bits will always be 0.
Interrupt Registers:
The individual interrupt enable bits are in the IE register. Two priorities can be set
for each of the six interrupt sources in the IP register. specifies whether the CPU
accesses the upper 128 bytes of RAM or the SFR space. Instructions that use
direct addressing access SFR space. For example, the following direct
addressing instruction accesses the SFR at location 0A0H (which is P2).
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Instructions that use indirect addressing access the upper 128 bytes of RAM. For
example, the following indirect addressing instruction, where R0 contains 0A0H,
accesses the data byte at address 0A0H, rather than P2 (whose address is
0A0H).
Timer 0 and 1:
Timer 0 and Timer 1 in the AT89C52 operate the same way as Timer 0 and Timer
1 in the AT89C51.
Timer 2:
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event
counter. The type of operation is selected by bit C/T2 in the SFR T2CON. Timer 2
has three operating modes: capture, auto-reload (up or down counting), and
baud rate generator. The modes are selected by bits in T2CON. Timer 2 consists
of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is
incremented every machine cycle. Since a machine cycle consists of 12 oscillator
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periods, the count rate is 1/12 of the oscillator frequency. In the Counter function,
the register is incremented in response to a 1-to-0 transition at its corresponding
external input pin, T2.
In this function, the external input is sampled during S5P2 of every machine
cycle. When the samples show a high in one cycle and a low in the next cycle,
the count is incremented. The new count value appears in the register during
S3P1 of the cycle following the one in which the transition was detected. Since
two machine cycles (24 oscillator periods) are required to recognize a 1-to-0
transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure
that a given level is sampled at least once before it changes, the level should be
held for at least one full machine cycle.
Capture Mode:
In the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2
= 0, Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in
T2CON. This bit can then be used to generate an interrupt. If EXEN2 = 1, Timer
2 performs the same operation, but a 1- to-0 transition at external input T2EX
also causes the current value in TH2 and TL2 to be captured into CAP2H and
RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in
T2CON to be set. The EXF2 bit, like TF2, can generate an interrupt.
when the service routine is vectored . In fact, the service routine may have to
determine whether it was TF2 or EXF2 that generated the interrupt, and that bit
will have to be cleared in software. . The Timer 0 and Timer 1 flags, TF0 and TF1,
are set at S5P2 of the cycle in which the timers overflow.
The values are then polled by the circuitry in the next cycle.However, the Timer 2
flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer
overflows.
SERIAL COMMUNICATION:
Computers transfer data in two ways:
Parallel: Often 8 or more lines (wire conductors) are used to transfer data to a
device that is only a few feet away.
Serial: To transfer to a device located many meters away, the serial method is
used. The data is sent one bit at a time.
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At the transmitting end, the byte of data must be converted to serial bits using
parallel-in-serial-out shift register. At the receiving end, there is a serial inparallel-out shift register to receive the serial data and pack them into byte. When
the distance is short, the digital signal can be transferred as it is on a simple wire
and requires no modulation. If data is to be transferred on the telephone line, it
must be converted from 0s and 1s to audio tones.
This conversion is performed by a device called a modem,
Modulator/demodulator.
Serial data communication uses two methods; Synchronous method transfers
a block of data at a time Asynchronous method transfers a single byte at a time It
is possible to write software to use either of these methods, but the programs can
be tedious and long. There are special IC chips made by many manufacturers for
serial communications UART (universal asynchronous Receiver transmitter)
USART (universal synchronous asynchronous Receiver-transmitter). If data
can be transmitted and received, it is a duplex transmission. If data transmitted
one way a time, it is referred to as half duplex. If data can go both ways at a time,
it is full duplex.
A protocol is a set of rules agreed by both the sender and receiver on.
When the data begins and ends. Asynchronous serial data communication is
widely used for character-oriented transmissions;
Each character is placed in between start and stop bits, this is called framing.
Block-oriented data transfers use the synchronous method.
The start bit is always one bit, but the stop bit can be one or two bits The start bit
is always a 0 (low) and the stop bit(s) is 1 (high)
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SBUF is an 8-bit register used solely for serial communication. For a byte data to
be transferred via the TxD line, it must be placed in the SBUF Register. The
moment a byte is written into SBUF, it is framed with the start and stop bits and
transferred serially via the TxD line SBUF holds the byte of data when it is
received by 8051 RxD line. When the bits are received serially via RxD, the 8051
de-frames it by eliminating the stop and start bits, making a byte out of the data
received, and then placing it in SBUF
MOV SBUF,#D ;load SBUF=44h, ASCII for D
MOV SBUF,A ;copy accumulator into SBUF
MOV A,SBUF ;copy SBUF into accumulator
SCON is an 8-bit register used to program the start bit, stop bit, and data
bits of data framing, among other things.
SM0, SM1: They determine the framing of data by specifying the number of bits
per character, and the start and stop bits.
SM2: This enables the multiprocessing capability of the 8051.
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Description
TSAL6200 is a high efficiency infrared emitting diode in GaAlAs on GaAs
technology, molded in clear, bluegrey tinted plastic packages.
In comparison with the standard GaAs on GaAstechnology these emitters
achieve more than 100 % radiant power improvement at a similar wavelength.
The forward voltages at low current and at high pulse current roughly correspond
to the low values of the standard technology. Therefore these emitters are ideally
suitable as high performance replacements of standard emitters.
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Features
Extra high radiant power and radiant intensity
High reliability
Low forward voltage
Suitable for high pulse current operation
Standard T-1 (5 mm) package
Angle of half intensity = 17
Peak wavelength = 940 nm
Good spectral matching to Si photodetectors
Basic Characteristics
Tamb = 25 C, unless otherwise specified
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Parameter
Forward
voltage
Temp.
Coffecient
of V(f)
Test Condition
Symbol Min.
Type
I(f)=100mA
t(p)=20mS
V(f)
I(f)=1 A
t(p)=100us
V(f)
2.6
I(f)=100mA
Tk (vf)
-1.3
Max.
Unit
1.6
1.35
mV/K
Applications
Description
The TSOP17 series are miniaturized receivers for infrared remote control
systems. PIN diode and preamplifier are assembled on lead frame, the epoxy
package is designed as IR filter. The demodulated output signal can directly be
decoded by a microprocessor. TSOP17 is the standard IR remote control
receiver series, supporting all major transmission codes.
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Features
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The circuit of the TSOP17 is designed in that way that unexpected output pulses
due to noise or disturbance signals are avoided. A bandpassfilter, an integrator
stage and an automatic gain control are used to suppress such disturbances.
The distinguishing mark between data signal and disturbance signal are carrier
frequency, burst length and duty cycle. The data signal should fullfill the following
condition: Carrier frequency should be close to center frequency of the
bandpass (e.g. 38kHz).
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A stepper motor (or step motor) is a brushless, synchronous electric motor that
can divide a full rotation into a large number of steps. The motor's position can be
controlled precisely without any feedback mechanism (see Open-loop controller),
as long as the motor is carefully sized to the application. Stepper motors are
similar to switched reluctance motors (which are very large stepping motors with
a reduced pole count, and generally are closed-loop commutated.)
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Fundamentals of Operation
Stepper motors operate differently from DC brush motors, which rotate when
voltage is applied to their terminals. Stepper motors, on the other hand,
effectively have multiple "toothed" electromagnets arranged around a central
gear-shaped piece of iron. The electromagnets are energized by an external
control circuit, such as a microcontroller. To make the motor shaft turn, first one
electromagnet is given power, which makes the gear's teeth magnetically
attracted to the electromagnet's teeth. When the gear's teeth are thus aligned to
the first electromagnet, they are slightly offset from the next electromagnet. So
when the next electromagnet is turned on and the first is turned off, the gear
rotates slightly to align with the next one, and from there the process is repeated.
Each of those slight rotations is called a "step," with an integer number of steps
making a full rotation. In that way, the motor can be turned by a precise angle.
Stepper motor characteristics
1. Stepper motors are constant power devices.
2. As motor speed increases, torque decreases.
3. The torque curve may be extended by using current limiting drivers and
increasing the driving voltage.
4. Steppers exhibit more vibration than other motor types, as the discrete
step tends to snap the rotor from one position to another.
5. This vibration can become very bad at some speeds and can cause the
motor to lose torque.
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You may double the resolution of some motors by a process known as "halfstepping". Instead of switching the next electromagnet in the rotation on one at a
time, with half stepping you turn on both electromagnets, causing an equal
attraction between, thereby doubling the resolution.
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Figure 1
As you can see in Figure 2, in the first position only the upper electromagnet is
active, and the rotor is drawn completely to it. In position 2, both the top and right
electromagnets are active, causing the rotor to position itself between the two
active poles. Finally, in position 3, the top magnet is deactivated and the rotor is
drawn all the way right. This process can then be repeated for the entire rotation.
Figure 2
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There are several types of stepper motors. 4-wire stepper motors contain only
two electromagnets, however the operation is more complicated than those with
three or four magnets, because the driving circuit must be able to reverse the
current after each step. For our purposes, we will be using a 6-wire motor.
Unlike our example motors which rotated 90 degrees per step, real-world motors
employ a series of mini-poles on the stator and rotor to increase resolution.
Although this may seem to add more complexity to the process of driving the
motors, the operation is identical to the simple 90 degree motor we used in our
example.
An example of a multipole motor can be seen in Figure 3. In position 1, the north
pole of the rotor's perminant magnet is aligned with the south pole of the stator's
electromagnet. Note that multiple positions are alligned at once. In position 2, the
upper electromagnet is deactivated and the next one to its immediate left is
activated, causing the rotor to rotate a precise amount of degrees. In this
example, after eight steps the sequence repeats.
Figure 3
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a resistance proportional to its length and inversely proportional to its crosssectional area, and proportional to the resistivity of the material.
The resistance of a resistive object determines the amount of current through the
object for a given potential difference across the object, in accordance with
Ohm's law: I =V/R
R is the resistance of the object, measured in ohms, equivalent to Js/C2
V is the potential difference across the object, measured in volts
I is the current through the object, measured in amperes
For a wide variety of materials and conditions, the electrical resistance does not
depend on the amount of current through or the amount of voltage across the
object, meaning that the resistance R is constant for the given temperature and
ratio taken at any particular point, the inverse slope of a chord to an IV curve, is
sometimes referred to as a "chordal resistance" or "static resistance". [
(as in quartz wristwatches), to provide a stable clock signal for digital integrated
circuits, and to stabilize frequencies for radio transmitters and receivers. The
most common type of piezoelectric resonator used is the quartz crystal, so
oscillator circuits designed around them were called "crystal oscillators".
Quartz crystals are manufactured for frequencies from a few tens of kilohertz to
tens of megahertz.
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TYPES OF CAPACITOR:
Axial Leads
Radial Leads
Computer
Grade
Snap Mount
Twist Lok
Surface Mount
Wet Tantalum
Surface Mount
Tantalum Capacitors
Dipped
Tantalum
Ceramic Capacitors
Dip Guard
Monolithic
Monolithic
( Axial Leads ) ( Radial Leads )
Disc
Surface Mount
Film Capacitors
Polyester
Polyester
Polypropylene Polypropylene
Polystyrene
( Axial Leads ) ( Radial Leads ) ( Axial Leads ) ( Radial Leads ) ( Axial Leads )
Mica Capacitors
Dipped Mica
Metal Clad
Transmitting
Oil Capacitors
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Vacuum Capacitors
Trimmers
Feed Thru
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#include<reg51.h>
sbit RS=P1^2;
sbit RW=P1^3;
sbit EN=P1^4;
sbit LD1=P1^5;
sbit LD2=P1^6;
sbit MTR1=P3^0;
sbit MTR2=P3^1;
sbit SW1=P1^0;
sbit SW2=P1^1;
void delay(unsigned int value)
{
int i,j;
for(i=0;i<=value;i++)
for(j=0;j<=1275;j++);
}
void lcdcmd(unsigned char value)
{
P2=value;
RS=0;
RW=0;
EN=1;
delay(5);
EN=0;
delay(5);
}
lcddata(unsigned char value)
{
P2=value;
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RS=1;
RW=0;
EN=1;
delay(5);
EN=0;
delay(5);
}
void lcd_data_string(unsigned char *str) // Function to send data
to string
{
int i=0;
while(str[i]!='\0')
{
lcddata(str[i]);
i++;
delay(10);
}
}
void main()
{
SW1=1;
SW2=1;
LD1=0;
LD2=0;
MTR1=0;
MTR2=0;
MTR1=0;
MTR2=0;
lcdcmd(0x01);
lcdcmd(0x38);
lcdcmd(0x0E);
lcdcmd(0x06);
lcdcmd(0x80);
while(1)
{
if(SW1==1&&SW2==1)
{
lcdcmd(0x01);
lcdcmd(0x80);
lcd_data_string("Track Is Clear");
LD1=0;
LD2=1;
lcdcmd(0xC0);
lcd_data_string("Gates Are Open");
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while(SW1==1&&SW2==1)
{
delay(5);
}
}
if(SW1==0)
{
LD1=1;
LD2=0;
MTR1=0;
MTR2=1;
lcdcmd(0x01);
lcdcmd(0x80);
lcd_data_string("Train Is Coming");
lcdcmd(0xC0);
lcd_data_string("Clear The Track");
delay(500);
MTR1=0;
MTR2=0;
lcdcmd(0x01);
lcdcmd(0x80);
lcd_data_string("Gates Are Closed");
while(SW2==1)
{
delay(5);
}
if(SW2==0)
{
LD1=0;
LD2=1;
MTR1=1;
MTR2=0;
lcdcmd(0x01);
lcdcmd(0x80);
lcd_data_string("Track Is Clear");
lcdcmd(0xC0);
lcd_data_string("Gates Are Open");
MTR1=0;
MTR2=0;
while(SW2==0)
{
delay(5);
}
}
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}
}
}
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