BUZ71

Data Sheet

June 1999

14A, 50V, 0.100 Ohm, N-Channel Power

MOSFET

Features

This is an N-Channel enhancement mode silicon gate power

field effect transistor designed for applications such as
switching regulators, switching converters, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
This type can be operated directly from integrated circuits.

rDS(ON) = 0.100

File Number 2418.2

14A, 50V

SOA is Power Dissipation Limited

Nanosecond Switching Speeds
Linear Transfer Characteristics
High Input Impedance

Formerly developmental type TA9770.

Majority Carrier Device

Ordering Information
PART NUMBER
BUZ71

PACKAGE
TO-220AB

Related Literature
- TB334 Guidelines for Soldering Surface Mount
Components to PC Boards

BRAND
BUZ71

NOTE: When ordering, use the entire part number.

Symbol
D

Packaging
JEDEC TO-220AB

DRAIN (FLANGE)

11

SOURCE
DRAIN
GATE

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright Intersil Corporation 1999

BUZ71
TC = 25oC, Unless Otherwise Specified

Absolute Maximum Ratings

Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS

Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR
Continuous Drain Current, TC = 55oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
DIN Humidity Category - DIN 40040 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IEC Climatic Category - DIN IEC 68-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg

BUZ71
50
50
14
56
20
40
0.32
100
-55 to 150
E
55/150/56

UNITS
V
V
A
A
V
W
W/oC
mJ
oC

300
260

oC
oC

CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 125oC.

Electrical Specifications

TC = 25oC, Unless Otherwise Specified

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Drain to Source Breakdown Voltage

BVDSS

ID = 250A, VGS = 0V

50

Gate to Threshold Voltage

VGS(TH)

VGS = VDS, ID = 1mA (Figure 9)

2.1

20

250

100

1000

Zero Gate Voltage Drain Current

Gate to Source Leakage Current

Drain to Source On Resistance (Note 2)

IDSS

IGSS

VGS = 20V, VDS = 0V

10

100

nA

rDS(ON)

ID = 9A, VGS = 10V (Figure 8)

0.09

0.1

gfs

VDS = 25V, ID = 9A (Figure 11)

3.0

5.2

20

30

ns

Forward Transconductance (Note 2)

Turn-On Delay Time

td(ON)

Rise Time

tr

Turn-Off Delay Time

TJ = 25oC, VDS = 50V, VGS = 0V

TJ = 125oC, VDS = 50V, VGS = 0V

VCC = 30V, ID 3A, VGS = 10V, RGS = 50,

RL = 10

55

85

ns

td(OFF)

70

90

ns

tf

80

110

ns

480

650

pF

280

450

pF

160

280

Fall Time
Input Capacitance

CISS

Output Capacitance

COSS

Reverse Transfer Capacitance

CRSS

VDS = 25V, VGS = 0V, f = 1MHz

(Figure 10)

pF

Thermal Resistance Junction to Case

RJC

3.1

oC/W

Thermal Resistance Junction to Ambient

RJA

75

oC/W

Source to Drain Diode Specifications

PARAMETER

SYMBOL

Continuous Source to Drain Current

ISD

Pulsed Source to Drain Current

ISDM

Source to Drain Diode Voltage

VSD

Reverse Recovery Time

trr

Reverse Recovery Charge

QRR

MIN

TYP

MAX

UNITS

TC = 25oC

TEST CONDITIONS

14

TC = 25oC
TJ = 25oC, ISD = 28A, VGS = 0V, (Figure 12)
TJ = 25oC, ISD = 14A, dISD/dt = 100A/s,
VR = 30V

56

1.6

1.8

120

ns

0.15

NOTES:
2. Pulse Test: Pulse width 300s, duty cycle 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 10V, starting TJ = 25oC, L = 820H, IPEAK = 14A. (See Figures 14 and 15).

12

BUZ71
Typical Performance Curves

Unless Otherwise Specified

18

1.2

VGS 10V

POWER DISSIPATION MULTIPLIER

16
1.0
14

ID, DRAIN CURRENT (A)

0.8

0.6
0.4

12
10
8
6
4

0.2
2
0
0

25

50
75
100
TC , CASE TEMPERATURE (oC)

125

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

ZJC, TRANSIENT THERMAL IMPEDANCE

150

50
100
TC, CASE TEMPERATURE (oC)

150

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

0.5
1
0.2
0.1

0.1

0.05
0.02
0.01
0

PDM

t1
t2

NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZJC + TC
0.01
10-5

10-4

10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (s)

100

101

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

102

ID, DRAIN CURRENT (A)

101

TJ = MAX RATED
SINGLE PULSE
TC = 25oC

100s
1ms
OPERATION IN THIS

10ms
100ms
DC

AREA MAY BE LIMITED

100 BY r
DS(ON)

ID, DRAIN CURRENT (A)

30
5s
10s

PD = 40W

VGS = 20V

10V

PULSE
DURATION = 80s
DUTY
CYCLE = 0.5% MAX
VGS = 8.0V

20

VGS = 7.5V
VGS = 7.0V
VGS = 6.5V
VGS = 6.0V

10

VGS = 5.5V
VGS = 5.0V

10-1
100

101
102
VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA

13

103

VGS = 4.5V
VGS = 4.0V
0

3
4
5
2
VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 5. OUTPUT CHARACTERISTICS

BUZ71

15

Unless Otherwise Specified (Continued)

0.4

PULSE DURATION = 80s

DUTY CYCLE = 0.5% MAX
VDS = 25V
TJ = 25oC

rDS(ON), DRAIN TO SOURCE

ON RESISTANCE ()

IDS(ON), DRAIN TO SOURCE CURRENT (A)

Typical Performance Curves

10

5
VGS, GATE TO SOURCE VOLTAGE (V)

0.20

0.10

40

VGS(TH), GATE THRESHOLD VOLTAGE (V)

ON RESISTANCE ()

rDS(ON), DRAIN TO SOURCE

VGS = 10V, ID = 9A
PULSE DURATION = 80s
DUTY CYCLE = 0.5% MAX

-40

80

120

-50

gfs, TRANSCONDUCTANCE (S)

C, CAPACITANCE (nF)

CISS
COSS
CRSS

10
20
30
VDS, DRAIN TO SOURCE VOLTAGE (V)

40

FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

14

30

50

100

150

FIGURE 9. GATE THRESHOLD VOLTAGE vs JUNCTION

TEMPERATURE

VGS = 0, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS CDS +CGS

10
20
ID, DRAIN CURRENT (A)

TJ, JUNCTION TEMPERATURE (oC)

100

10-2

160

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs

JUNCTION TEMPERATURE

10-1

20V

VDS = VGS
ID = 1mA

TJ , JUNCTION TEMPERATURE (oC)

101

10V

0.1

FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT

0.30

9V

0.2

10

FIGURE 6. TRANSFER CHARACTERISTICS

VGS = 5V 5.5V 6V 6.5V 7V 7.5V 8V

0.3

0
0

PULSE DURATION = 80s

DUTY CYCLE = 0.5% MAX

PULSE DURATION = 80s

DUTY CYCLE = 0.5% MAX
VDS = 25V
TJ = 25oC

5
4
3
2
1
0

5
10
ID, DRAIN CURRENT (A)

FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT

15

BUZ71
Typical Performance Curves

15
PULSE DURATION = 80s
DUTY CYCLE = 0.5% MAX

101
TJ = 150oC

TJ = 25oC

100

10-1

ID = 18A

VGS, GATE TO SOURCE VOLTAGE (V)

ISD, SOURCE TO DRAIN CURRENT (A)

102

Unless Otherwise Specified (Continued)

0.5
1.0
1.5
2.0
2.5
VSD, SOURCE TO DRAIN VOLTAGE (V)

VDS = 10V
10
VDS = 40V

3.0

20

10

30

Qg, GATE CHARGE (nC)

FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE

FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Test Circuits and Waveforms

VDS

BVDSS
tP

VDS

IAS
VARY tP TO OBTAIN
REQUIRED PEAK IAS

VDD

RG

VDD
-

VGS
DUT
tP

0V

IAS
0.01

tAV

FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT

FIGURE 15. UNCLAMPED ENERGY WAVEFORMS

tON

tOFF

td(ON)

td(OFF)
tf

tr
RL

VDS

90%

90%

RG

VDD

10%

10%

DUT

90%
VGS

VGS

FIGURE 16. SWITCHING TIME TEST CIRCUIT

15

10%

50%

50%
PULSE WIDTH

FIGURE 17. RESISTIVE SWITCHING WAVEFORMS

BUZ71
Test Circuits and Waveforms

(Continued)
VDS
(ISOLATED
SUPPLY)

CURRENT
REGULATOR

12V
BATTERY

0.2F

VDD
Qg(TOT)

SAME TYPE
AS DUT

50k

Qgd
Qgs

0.3F

Ig(REF)

VDS
DUT

0
IG CURRENT
SAMPLING
RESISTOR

VGS

VDS
ID CURRENT
SAMPLING
RESISTOR

FIGURE 18. GATE CHARGE TEST CIRCUIT

Ig(REF)
0

FIGURE 19. GATE CHARGE WAVEFORMS

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

Sales Office Headquarters

NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240

16

EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05

ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029