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Features
Description
20-SSOP
Soft Start
PWM Control at Fixed Frequency
Analog and Burst Dimming Function
Programmable Striking Frequency
www.fairchildsemi.com
May 2005
RT
OUTA
OSCILLATOR
Output
Driver
max. 2V
OUTB
CT
min. 0.5V
Output
Control
Logic
+
+
6uA
PGND
OUTC
S_S
RT1
Output
Driver
OUTD
MRT1
Striking
Logic
OLP
S_S
1.4uA
EA_OUT
UVLO
ADIM
+
Q
Error Amp.
CLR
UVLO
2.5V
Solr
BCT
min. 0.5V
VOLP
2.5V 1.5V
OLR
Voltage
Reference
&
Internal
Bias
2V
2.5VREF
REF
Sburst
BDIM
1.4V
VIN
UVLO
-
2
FAN7311 Rev. 1.0.0
ENA
VIN
+
AGND
OLP
Solr
105uA
Sburst 85uA
Va+
max. 2V
VOLP+
EA_IN
SET
UVLO 5V
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Pin Assignments
RT1
OUTB
OUTA
VIN
PGND
OUTC
OUTD
CT
RT
BCT
20
19
18
17
16
15
14
13
12
11
10
FAN7311
1
OLP
OLR
ENA
S_S
GND
REF
ADIM
BDIM
EA_IN EA_OUT
Pin Definitions
No
Name
Function/Description
No
Name
Function/Description
OLP
11
BCT
OLR
12
RT
Timing Resistor
ENA
Enable Input
13
CT
Timing Capacitor
S_S
Soft Start
14
OUTD
GND
Analog Ground
15
OUTC
REF
16
PGND
Power Ground
ADIM
17
VIN
Supply Voltage
BDIM
18
OUTA
EA_IN
19
OUTB
10
EA_OUT
20
RT1
3
FAN7311 Rev. 1.0.0
www.fairchildsemi.com
For typical values Ta=25C, Vcc=12V and for min/max values Ta is the operating ambient temperature range with
-25C Ta 85C and 5V Vcc 25.5V, unless otherwise specified.
Symbol
Value
Supply Voltage
Characteristics
VCC
5 ~ 25.5
Topr
-25 ~ 85
Tstg
-65 ~ 150
RJA
112
C/W
Pd
1.1
Power Dissipation
Unit
Note:
1. Thermal resistance test board
Size: 76.2mm * 114.3mm * 1.6mm(1S0P)
JEDEC standard: JESD51-3, JESD51-7
2. Assume no ambient airflow
4
FAN7311 Rev. 1.0.0
www.fairchildsemi.com
For typical values Ta=25C, Vcc=12V and for min/max values Ta is the operating ambient temperature range with
-25C Ta 85C and 5V Vcc 25.5V, unless otherwise specified.
Characteristics
Symbol
Test Condition
Min.
Typ.
Max.
Unit
Vref
5 VCC 25.5V
25
mV
2.45
2.5
2.55
Ta = 25C, Ct = 270pF
Rt = 18k
108
115
122
Ct = 270pF, Rt = 18k
106
115
124
V25
OSCILLATOR SECTION(MAIN)
Oscillation Frequency
fosc
kHz
CT High Voltage
Vcth
2.0
CT Low Voltage
Vctl
0.5
OSCILLATOR SECTION(BURST)
Oscillation Frequency
foscb
195
225
255
Hz
Vbcth
Vbctl
0.5
80
dB
1.5
MHz
2.0
2.27
2.54
Veh
EA_IN = 0V
lsin
EA_OUT = 1.5V
-1
mA
lsur
EA_OUT = 1.5V
mA
Iolr
75
105
135
uA
Iburst
Vfbh
R(EA_IN) = 60k
61
85
109
uA
Va+0.1
Va+0.4
Va+0.7
uA
ISS
S_S=2V
Vssh
PROTECTION SECTION
Open Lamp Protection Voltage 0
Volp0
2.2
2.5
2.8
Volp1
1.3
1.5
1.7
Volr
1.75
2.25
Iolp
0.7
1.4
2.1
uA
Vth
Start Up Current
Ist
VCC = Vth-0.2
130
180
uA
Iop
VCC = 12V
1.5
mA
Stand-by Current
Isb
VCC = 12V
200
370
uA
ON/OFF SECTION
On State Input Voltage
Von
Voff
0.7
5
FAN7311 Rev. 1.0.0
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Electrical Characteristics
For typical values Ta=25C, Vcc=12V and for min/max values Ta is the operating ambient temperature range with
-25C Ta 85C and 5V Vcc 25.5V, unless otherwise specified.
Characteristics
Symbol
Test Condition
Min.
Typ.
Max.
Unit
OUTPUT SECTION
PMOS Gate High Voltage
Vpdhv
VCC = 12V
Vcc
Vphlv
VCC = 12V
Vcc-10.5
Vcc-8.5
Vcc-6.5
Vndhv
VCC = 12V
6.5
8.5
10.5
Vndhv
VCC = 12V
Vpuv
VCC = Vth-0.2
Vcc-0.3
Vnuv
VCC = Vth-0.2
0.3
Rising Time
Tr
200
500
ns
Falling Time
Tf
200
500
ns
fosc=100KHz
fosc=100KHz
100
PDR_A/NDR_B
Rt=18k
450
ns
PDR_C/NDR_D
Rt=18k
450
ns
MAX./MIN OVERLAP
DELAY TIME
6
FAN7311 Rev. 1.0.0
www.fairchildsemi.com
burst
3.75
= ----------------------------------64 R T BC T
19
f op = ------------------------------32 R T C T
7
FAN7311 Rev. 1.0.0
www.fairchildsemi.com
Function Description
8.5V
8.5V
VIN
8.5V
8.5V
Open lamp regulation & open lamp protection: It is necessary to suspend power stage operation if an open lamp occurs,
because the power stage has high gain. When a voltage higher
than 2V is applied to the OLR pin, the part enters regulation
mode and controls the EA_OUT voltage. This limits the lamp
voltage by summing 105uA into the feedback node. At the same
time, the OLP capacitor, connected to the OLP pin, is charged
by the 1.4uA internal current source. Once it reaches 2.5V, the
IC enters shut down where all the output is high.
8
FAN7311 Rev. 1.0.0
www.fairchildsemi.com
VIN
The FAN7311 uses the improved phase-shift control full-bridge to drive CCFL. As a result, the temperature difference between the left
and the right leg is almost zero. The detail timing is shown below.
EA_OUT
CT
SYNC
T1
POUT A
NOUT B
POUT C
NOUT D
9
FAN7311 Rev. 1.0.0
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Timing Diagram
VCC
C25
100u
IC1 FAN7311
R25
0
0.1u
OLR
OUTB
ENA
OUTA
S_S
VIN
C22
1u
C8
RT1
R26
10k
10k
OUTB
R24
ENA
C27
1u
RT
R6 120k
OLP
OUTA
10k
C28
10n
REF
REF
TX1
REF
OUTC
ADIM
OUTD
BDIM
CT
10u
PGND
M2
FDS8958A
OUTC
1u
R2
56k
C7
C6 1u
GND
C2
R4
22k
M1
FDS8958A
C1 1u
OUTD
C5 220p
DIM(0~3.3V)
CCFL
C10
15p
R5 27k
C21
10n
R3
20k
EA_IN
RT
C3
C4 4.7n
EA_OUT
OLP1
BCT
OLR
4.7n
RT
R8
R15
FB
FB
D4
BAV99
C14
20n
D6
BAV99
R16
1.5k
2k
100k
R9
8.2k
OLR
R14
C16
100k
2.2n
OLP1
OLP
R1
330k
Q1
KST2222
C9
1u
D1
D1N4148
R22
10k
D11
D1N4148
C19
2.2n
10
FAN7311 Rev. 1.0.0
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Package
Dimensions in millimeters
20-SSOP
11
FAN7311 Rev. 1.0.0
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Mechanical Dimensions
Ordering Information
Product number
FAN7311G
FAN7311GX
Package
Operating Temperature
20-SSOP
-25C ~ 85C
12
FAN7311 Rev. 1.0.0
www.fairchildsemi.com
13
FAN7311 Rev. 1.0.0
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