Modeling and Simulation of a SiC BJT

T.K. Gachovska1, B. Du*1, J.L. Hudgins1, A. Grekov2, A. Bryant3, E. Santi2, H.A. Mantooth4 and A. Agarwal*2
1

Departament of Electrical Engineering ,University of Nebraska, Lincoln, NE 68588-0511 USA

Departament of Electrical Engineering ,University of South Carolina, Columbia SC, 29208 USA
3
School of Engineering, University of Warwick, Coventry, CV4 7AL, UK
4
Departament of Electrical Engineering ,University of Arkansas, Fayetteville, AR 72701 USA
*1
Danfoss Drives, Division of Danfoss Inc., Loves Park, IL 61111 USA
*2
Cree, Inc, 4600 Silicon Dr., Durham, NC 27703
1

tgachovska2@unlnotes.unl.edu

AbstractThe objective of this study was to develop a physicsbased model of a SiC BJT and verify its validity through
experimental testing. Two physical models were considered: a
lumped charge model and the Fourier series solution used to
solve the ambipolar diffusion equation (ADE). These models
were realized using Matlab and Simulink. The simulation and
experimenatl results of static and switching waveforms are given.
Keywords SiC BJT, Modeling, Simulation, Fourier Series

I. INTRODUCTION
In the recent years, silicon carbide (SiC) has been
recognized as a potential candidate for using in high power,
high frequency and high temperature area due to its electronic
properties such as wider bandgap, higher-saturation velocity,
higher electric field strength and higher thermal conductivity
compared to Si and GaAs.
The SiC Schottky diode is the first commercially available
power switch [1]. SiC power MOSFET has drawn a lot of
attention due to the advantage of a unipolar device and an
easier to realize gate control. However; the poor reliability of
MOS-channel mobility and the dielectric oxide, especially in
high electric fields, has greatly hampered the development of
the SiC MOSFET [2]. The traditional technology of bipolar
devices like the power bipolar transistor (BJT), gate turn-off
thyristor (GTO) and insulated gate bipolar transistor (IGBT)
provides a new way to fully utilize the advantage of SiC
material in high power and high temperature applications.
Bipolar junction transistors (BJTs) based on 4H-SiC have
the advantage of no gate oxide and low on-resistance due to
two-sided high-level injection, which is preferable in high
temperature conditions. The first 6H-SiC BJT with a blocking
voltage of 50 V and current gain of 4-8 was fabricated in 1978
[3]. The first 4H-SiC BJT was reported to have a capability of
blocking voltage rated at 800 V and a current gain of 9 [4].
Recently, the 4H-SiC NPN BJT with a 4 kV open-base
blocking voltage (VCEO) and 56 m-cm2 specific on-resistance
has been reported with a corresponding common-emitter
current gain of 9 [5].
In power electronics SiC BJTs could be used as switches
having two states: on and off. These states are important in
determining the efficiency and applicability of the BJT, while
the transient processes between the two states have an

978-1-4244-2893-9/09/$25.00 2009 IEEE

important role in determining the energy losses, reliability and

performance of the circuit.
The objective of this study is modeling, simulation and
validation of the transient processes in 4H-SiC BJT (1200V5A SiC BJT, Cree, Durham, NC).
II. MODELING
Although the SiC power BJT has been fabricated and
measured in laboratories for years, there are very few physicsbased simulation models that can provide fast and robust
characterization. In this section, modeling of a SiC power BJT
based on Fourier series for solution of the ADE equation using
Matlab and Simulink will be presented after a review of a
familiar lumped charge model.
A. Lumped Charges model of SiC BJT
Lumped charges models of Si-based power diode, BJT,
SCR and power MOSFET have been successfully created [6] [9]. The basic idea is to divide the device into several critical
regions; each of these regions contains one charge storage
node and up to two connection nodes. The electron and hole
values of charge at each node are equal to the product of the
region volume and carrier concentration at each node. Then,
charge nodes are linked using a set of equations related by
semiconductor physics and circuit theory.

Fig. 1 Schematic structure of lumped charge model of the SiC BJT

The basic structure of the lumped charge model of the SiC

power BJT is shown in Fig.1. The BJT is divided into four
critical regions with seven lumped charge nodes. The N+
collector layer and N+ emitter are represented only by nodes 0
and 7, respectively, due to the heavy doping concentration and
small depth. The N- collector-drift region and P+ base region

979

TABLE I.

are the most important parts for describing the BJT switching
characteristic. Each of these regions contains three nodes.
Node 2 and 5 are the storage nodes for the excess stored
charge during conduction. Nodes 1, 3, 4 and 6 are connection
nodes at the boundaries of each region. All the currents can be
expressed by the lumped charge values at the nodes. All the
nodes are connected by the following equation groups: current
transport equations; charge neutrality equations; continuity
equations; Boltzmanns relation; Poissons equation; KCL and
KVL.
The details of each physical equation are described in [10].
Based on the physical equations, the injected carrier
distribution inside the BJT is determined with a given external
circuit condition. The voltage drops across each segment are
calculated based on the carrier distribution at different nodes.
The lumped charge model captures some of the physical
behaviour of the device, but fails to provide adequate detail
for descriptions of the injected carrier profile in the base and
low-doped collector regions as well as producing models not
easily adaptable to incorporation of all thermal dependencies
nor provide as easy an implementation for use in circuit
simulators. The Fourier models do provided these options.

PARAMETER SET OF LUMPED CHARGES MODEL

Parameter

Definition

Value

Active area of the device

0.01 cm2

WN, WP

Thickness of N- and P+

50, 2 m

NB, PB

Doping of N- and P+

4x1014, 2x1017cm-3

p, n

Minority lifetime in N- and P+

5, 2 s @300K

n, p

Electrons and hole mobility

720, 90 cm2/(Vs)

Emitter
Base

Base

N+ ,0.9 m 1E19 cm-3

P+

P+

P+, 1m 2E17 cm-3

J3
J2

N-, 40m, 1.1E15 cm-3

B. Simulation Model in MATLAB/SIMULINK

Due to the complexity of the lumped charge model of the
SiC BJT, it is difficult to build an equivalent circuit model for
dynamic analysis. A more convenient way is to use the
general-purpose mathematical software Matlab.

J1

N+ Substrate
Collector
Fig. 3. Schematic view of 4kV 4H-SiC power BJT

C. Fourier-series-based Model of SiC BJT

The Fourier-series based electrical model for power devices
has been thoroughly introduced in [11]-[13]. The basic idea is
to solve ADE through a Fourier-series expansion. Since the
excess injected carrier concentration in the carrier storage
region is determined by the ADE, the behavior of injected
carriers can be characterized with a finite Fourier-series.
The basic one-dimensional structure of the SiC BJT is
plotted in Fig. 4. The whole model is divided into several
segments.
JB
Fig. 2. Schematic of inductive load switching test

JC

Jdisp1
px1

The SiC BJT under an inductive load switching condition is

simulated in Matlab. The circuit schematic is plotted in Fig. 2.
The inductive load is represented as a current source. An ideal
freewheeling diode is employed in the simulation model in
order to simplify the current commutation. The snubber
circuits are paralleled with the inductive load and main
switches separately. Table I provides the BJT parameters used
in the simulation and the Fig.3 shows the structure of the SiC
BJT.

Jp3

Jp2
Jn2

Jp1
Jn1

N+

Jn3

Jdisp2
px2
P+

N-

J1

JE

J2

N+
J3

Fig. 3. Structure of SiC BJT

N- Region
The voltage drop is primarily located in this region when
the BJT is turned on. The injected excess carrier concentration
is determined by the ADE. As for all power switches, high
level injection and quasi-neutral conditions exist. Under high-

980

level injection conditions, the ADE describes the carrier

dynamics in the majority of this region by the equation:
D

2 p ( x, t ) p ( x, t ) p ( x, t )
=
+
t

x 2

(1)

where D is the ambipolar diffusion coefficient, is the highlevel carrier lifetime within the drift region and p(x, t) is the
excess carrier concentration. The Fourier-series solution of the
excess carrier distribution has been proposed in [14] as the
solution of the second order partial differential diffusion
equation by being converted into an infinite set of first order
linear differential equation (solutions in equation 2).

k ( x x1 ) ,
(2)
p( x, t ) = p0 (t ) + pk (t ) cos

k =1
x 2 x1
where:
p0 (t ) =

pk (t ) =

1
x2 x1
2
x2 x1

x2

p( x, t )dx

x1

Fig. 5 Charge and boundary current components in P base.

(3)

x2

Using the continuity equation for the base region, the

injected minority carrier charge can be described by the
relation:

k ( x x1 )
dx
x2 x1

p( x, t )cos

x1

The solution to the ADE can be determined by using the

boundary condition at the edges of the charge storage region
(CSR). The representation requires the width of the
undepleted region and the hole and electron currents at the
boundaries of the region, which give the gradients of the
carrier concentrations at x1 and x2, respectively. The required
boundary conditions are given in equation (4).
p
x

=
x1

1 Jn J p

and
2q Dn D p
x1

p
x

=
x2

1 Jn J p

2q Dn D p
x2

for k > 0
dp (t ) 1
Dk 2 2
= k + +
p (t )
2 k
dt
x2
x1
( x2 x1 )

2
n 2 dx1
dx dx
n + k dx2

+ pn 1 2
+

(
1)
(
)
p
t
n

2
2
x2 x1 n =1 n k dt
dt
dt

dt
n k

(1) k

p ( x, t )
x

(5)
for k = 0
D p ( x, t )

x2 x1 x

x2

p( x, t )
x

dp (t ) p (t )
= 0 + 0

dt
x1

1
dx
dx1
(1) n 2 pn (t )
x2 x1 n =1 dt
dt

dQB QB
+
= I n 3 I n 2 = I p 2 + I B + I disp 2 I p 3 ,
dt BHL

(6)

where, BHL is the high-level lifetime in the P+-base region.

The displacement currents Idisp1 and Idisp2 are due to the
changing depletion widths at junctions J1 and J2,

(4)

where Dn and Dp are electron and hole diffusivities,

respectively. The solution to the ADE can be given by the
following first-order differential equation (5) as each of them
refers to a harmonic pk of the total minority carrier density
p(x):

2 D p ( x, t )

x2 x1 x

P+-base region
The P+-base region is used to find the boundary current at
junction J2. The lumped charge method can be use to model
the charge behavior in the base region due to high doping
level and comparatively narrow base width. The injected
carrier distribution when the BJT is conducting is plotted in
Fig. 5.

I disp1 = C J 1

dVd 1
1 dVd 1
=A
dt
Wd 1 dt

I disp 2 = CJ 2

dVd 2
1 dVd 2
=A
dt
Wd 2 dt

(7)

Wd1 and Wd2 are the widths of the N-N+ and N-P+ depletion
layers respectively. Vd1 and Vd2 are the voltages across the NN+ and N-P+ depletion layers, respectively, and can be
calculated by following equations:
if px1 > 0,
0
Vd 1 =
otherwise.
K FV Px1
(8)
if px1 > 0,
0
Vd 2 =
otherwise.
K FV Px 2
The feedback constant KFV is set to 10-12, which gives good
convergence and minimal error. The associated depletion
widths Wd1 and Wd2 are calculated using a step doping
concentration change on each side the junction.
2 Vd 1
Wd 1 =
I
qN N + c
Avsat
(9)
2 Vd 2
Wd 2 =
I
qN N + c
Avsat

981

where NN - is the doping concentration in the N- region and

vsat is the saturation velocity. The boundary position x1 and x2
are calculated by:
x1 = Wd 1
(10)
x2 = WN Wd 2

and J3, the voltage across the two depletion regions Vd1 and
Vd2, and the voltage across the carrier storage region, VCSR.
(18)
VCE = V j1 + V j 2 + VJ 3 + Vd 1 + Vd 2 + VCSR
The junction voltages are calculated by the following
equations:
p
V j1 = VT ln x1
NE
p
V j 2 = 2VT ln x 2
ni
n (n + N )
V j 3 = VT ln b3 b32 B
ni

The electron concentration at the base region boundary, nb2,

is related to px2 by the doping concentration of the base NB by
the equation:
nb 2

N
= 2B
px 2

(11)

The total electron charge in the base can be expressed as:

n +n
QB = b 2 b 3 qAWB
(12)
2
where nb3 is the electron concentration at the base region
boundary from the emitter side and WB is the base width.
Since the diffusion length in the base region is much greater
than the base width, the gradient of the electron concentration
may be approximated linearly, giving the electron current at
the base-emitter junction, J3, as:
I n 2 = qDn A

nb3 nb 2
WB

(19)

where the value for the carrier densities px1 and px2 are limited
to a minimum of ni2 / N B . NE is the emitter doping.
The voltage drop in the carrier storage region VCSR is
calculated based on the injected carrier concentration [13].
The one-dimensional charge distribution in the CSR during
the on-state is illustrated in Fig 6.

(13)

The base-emitter voltage VBE can be calculated by the

equation:
n N

VBE = VT ln b3 2 B + 1
ni

(14)

where ni is intrinsic carrier concentration on SiC and VT is

thermal voltage (kT/q).
N+ Emitter and N+ Collector Buffer
The N+ emitter and N+ collector layer can be simply
characterized as hole sinks. The hole current at junction J3 can
be obtained by the equation:

I p 3 = qA h n n b23

(15)

The constant hn is N+ emitter recombination parameter,

which depends on the emitter properties such as doping level
(NE), hole diffusivity (Dp) and lifetime (p).
hn =

NE
ni2

Dp

(16)

For the N+ collector layer, the boundary current

components at junction J1 are determined by:

I p1 = qAhn p x21
I n1 = I c I p1

Fig. 6. Carrier distribution in CSR.

The CSR is divided into equal segments such that the

number of points (M) is the same as the number of terms in
the truncated Fourier series. The carrier distribution at every
point can be generated through the inverse Fourier
transformation, while the carrier distribution between two
points is a linear approximation. Based on [13] the voltage
drop VCSR at any time can be calculated by:

VCSR

IC
x2 x1
qA( n + p ) 1

=0

T (k )

pT ( k )
1
ln
pT ( k 1) pT ( k 1)

n p px 2
ln
(20)
+ VT
n + p px1

where n and p are electron and hole mobilities and the

carrier distribution pT ( k ) can be calculated as:

k ( x2 x1 ) n N B

+
pT ( k ) = p x1 +
1 n + p

(17)

Voltage Drop
The voltage drop VCE across the SiC BJT is comprised of
five components including voltages across the junctions J1, J2

982

(21)

III. REALIZATION IN SIMULINK

The physical model of the Fourier-series-based SiC BJT
was implemented using Matlab incorporated with Simulink. It
is straightforward to couple Simulink to the numerical
algorithm to solve differential equations [14]. Solution of the
differential equations in Simulink requires usage of a stiff
solver. Suitable solvers are ode15s and ode23tb. The solver
ode23tb has been found to give the most stable results [15].
The electrical circuit(Fig.2) of the SiC BJT under clamped
inductive switching tests has been realized in the
Matlab/Simulink environment. Each branch of the electrical
circuit is represented by a subsystem with branch voltages as
inputs and the current passing through the branch as outputs,
or vice versa.
The most important and complicated subsystem capturing
the BJT model is presented in Fig. 7. It has two inputs,
collector and base current, and two outputs, base-emitter and
collector-emitter current. The BJT subsystem further contains
embedded subsystems of the carrier storage region, feedback,
displacement current, the P+ base, the N+N- junction, the drift
region voltage drop, and total voltage drop.

The CSR subsystem provides the solution to the ADE,

equation (1) by using the equation (5) and boundary
conditions of equation (4). The feedback subsystem uses the
output data from the CSR subsystem, the charge carrier
densities px1 and px2 as inputs. These carrier densities are then
used to determine Vd1 and Vd2 from equation (8). The
boundary positions x1 and x2 are calculated using equations (9)
and (10). They are input signals to the CSR subsystem, and
also to the displacement current subsystem. The displacement
current subsystem is used to calculate the displacement
currents at junctions J1 and J2 using the equations (7). The P+
base subsystem is used to calculate the currents In2, Ip3 and
voltage VBE using equations (9)-(13).
The N+N- junction subsystem calculates In1, Ip1 (15). The
subsystem drift region voltage drop uses the parameters of the
other subsystems and it is used to calculate the voltage drop in
the storage region (18 and 19). The total voltage subsystem
calculates the VCE as sum the junction voltages, the depletion
region voltages and the depletion layer voltages (17).

Fig. 7. SiC BJT subsystem model.

983

The simulation results of the SiC BJT under clamped

inductive switching tests realized in Matlab/Simulink for the
turn-on and turn-off are presented on Figure 8. The parameters
for the switching circuit, base circuit and snubber circuits are
listed in Table II.

2.0
1.8
1.6

Curent I C, A

1.4

TABLE II.
CIRCUIT PARAMETERS

Vdc
V
100

Rb

Snubber I
/ nF
2 /100

Snubber II
/ nF
2 /100

Ls
H
2

Lb
H
0.1

1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.0

0.3

0.5

0.8

1.0

1.3

1.5

1.8

2.0

Voltage(V); Current (A)

Voltage VCE, V

(a)
5

IB = 90 mA
4

Curent I C, A

10 mA

Fig. 8. Simulated switching waveforms for inductive load switching test of

SiC BJT at 100 V

IV. MEASUREMENT RESULT OF SIC BJT

To evaluate the behavior of the power semiconductor
switches, two basic tests are usually employed, a static test
and a dynamic test [16]. Generally, the static measurement is
to validate dc current and voltage characteristics while the
dynamic test is for measuring transient switching behavior.
The static measurement includes the I-V and C-V
characteristics of semiconductor devices under dc conditions,
breakdown voltage and on-state voltage drop. The BJT die
used for measurements are rated as 1200V-5A. The I-V curve
is measured with a curve tracer, Tektronix TEK 371A.
The measured common emitter I-V curves at room
temperature for two different ranges of collector emitter
voltage VCE 0-2 V and 0- 10 V are plotted in Fig. 9. The base
current was increased from 0 to 90 mA in steps of 10 mA.
Typically increasing the collector-emitter voltage when the
transistors are operating in the active region results in a slight
positive slope due to the Early effect. Instead, for the SiC
BJTs tested, it was observed that the collector current
remained constant for low base current values (IB < 50 mA).
For base currents higher than 50 mA, an increasing VCE leads
to a decrease in collector current. This is thought to be due to
self-heating which reduces the carrier mobility and effects
from the large N-collector width.

0
0

10

Voltage VCE, V

(b)
Fig. 9. Common emitter I-V curve of SiC BJT at room temperature: a) Vce =
0 -2 V; b) Vce = 0 -10V.

The results of the inductive switching tests on the SiC BJT

at 500 V are presented in Fig.10. There were approximately a
97 ns delay for the collector current to rise and approximately
145 ns collector emitter voltage VCE to fall after the base
current was injected (base voltage waveform shown). The
delays were significantly smaller compare to the turn on
during the turn-off switching. As for the falling of the
collector current it was approximately 34 ns and for the rising
of collector voltage delay was 93 ns.

984

devices tested designed seem robust and not prone to turn-off

failure during inductive switching.
Further refinements in the Fourier modeling are underway
and will be extended to other bipolar structures such as a GTO.

10
8

ACKNOWLEDGMENT
This work was supported by the U.S. Office of Naval
Research under Grant No. N00014-07-1-0611. The support of
Cree, Inc., which provided the SiC BJT samples used for
characterization in this work, is gratefully acknowledged.

6
4
2

REFERENCES

0
-0.2

-0.1

-2

[1]

0.1

0.2

0.3

0.4
[2]

-4

[3]

Vbe

[4]

1.2

[5]

[6]

0.8
[7]

0.6
[8]

0.4

[9]

0.2

[10]

0
-0.2

-0.1

-0.2

0.1

Ic/Imax

Vce/Vs

0.2

0.3

0.4

[11]

[12]
Fig. 10. Switching characteristics of SiC BJT at 500 V: a) base emitter
voltage; b) IC/Imax (Imax = 5 A) and VCE/ Vs (Vs=500 V).

[13]

V. CONCLUSIONS
At the current density switched, 400 A/cm2, the BJT
exhibits about a 2 V forward collector-emitter drop. This is
about 0.5 V larger than in a Si IGBT rated for the same
breakdown. However, at higher breakdown ratings, the SiC
BJT should exceed the Si IGBT performance in internal
power loss and exhibit superior thermal behavior, both in
junction temperature and thermal conductivity.
It should also be noted that the SiC BJT does not exhibit a
quasi-saturation region as is typical in Si power bipolar
transistors. It is yet to be determined if SiC BJTs exhibit
second breakdown effects as their Si counterparts do. The

[14]
[15]

[16]

985

W. J. Schaffer, G. H. Negley, K. G. Irvine, and J. W. Palmour,

Conductivity anisotropy in epitaxial 6H and 4H SiC, in MRS Proc.
Vol. 339 (Diamond, SiC, and Nitride Wide Bandgap Semiconductors),
1994, pp. 595600.
S. H. Ryu, A. K. Agarwal, R. Singh, and J. W. Palmour, "1800 V NPN
Bipolar Junction Transistors in 4H-SiC", IEEE Electron Device
Letters, Vol. 22, pp.119 -120, March 2001.
W.V. Muench and P. Hoeck, Silicon carbide bipolar transistor,
Solid-State Electronics, 1978, Vol. 21, p.479-480.
Y. Luo, L. Fursin and J.H. Zhao, Demonstration of 4H-SiCpower
bipolar junction transistors, IEE Electronics Letters, 2000, Vol. 36,
No.17, p.1496-1497.
S. Balachandran, T. P. Chow, A. Agarwal, C.Scozzie and K.A. Jones,
4kV 4H-SiC Epitaxial Emitter Bipolar Junction Transistors, IEEE
Electron Device Letters, Vol. 22, pp.119 -120, March 2001.
P. Lauritzen and Cliff L. Ma, A Simple Power Diode Model with
Reverse Recovery, IEEE Tran. on Power Electronics, Vol. 6, No. 2,
pp. 188-191, April, 1991.
Cliff L. Ma, P. 0. Lauritzen, P. Turkes, H. J. Mattausch,A Physicallybased Lumped-Charge SCR Model, IEEE Power Electronics
Specialists Conference, Seattle, WA, June 1993, p. 53-59.
I. Budihardjo, B. Kongsang, P. 0. Lauritzen, A Power MOSFET
Model Based on a Lumped-Charge Approach, IEEE PELS Workshop
on Computers in Power Electronics, Berkeley, CA, 1992, p.165-171.
N. Talwalkar, P. O. Lauritzen, B. Fatemizadeh &D. Perlman, A power
BJT model for circuit simulation, PESC'96 Rec., 1996, p. 50-55.
Cliff L. Ma, P. 0. Lauritzen, Pao-Yi Lin, I. Budihardjo, A Systematic
approach to Modeling of Power Semiconductor Devices Based on
Charge Control Principles, Power Electronics Specialists Conference,
PESC '94 Record., 25th Annual IEEE , June 1994, p. 31-37.
P.R. Palmer, E. Santi, J. L. Hudgins, X. Kang, J.C. Joyce, P.Y. Eng,
"Circuit Simulator Models for the Diode and IGBT with Full
Temperature Dependent Features," IEEE Transactions on Power
Electronics, Vol. 18, no. 5, pp. 1220-1229, September 2003, p.21712177.
X. Kang, Characterization and Modeling of Trench Gate IGBT, PhD
dissertation, Department of Electrical Engineering, University of South
Carolina, Dec. 2002.
Angus Brant, Simulation and optimization of diode and IGBT
interaction in a chopper cell, PhD Dissertation, University of
Cambridge, Jan. 2005.
Web address: http://www.mathworks.com.
P.R. Palmer, A.T. Bryant, J. Hudgins, E. Santi, Simulation and
optimisation of oiode and IGBT interaction in a chopper cell using
MATLAB and Simulink, IEEE Industry Applications Society Annual
Meeting, Pittsburgh, October 2002, p.2437-2444.
A. N. Githiari, Benjamin M. Gordon, Richard A. McMahon, Zhongmin
Li and Philip A. Mawb, A comparison of IGBT models for use in
circuit design, IEEE Trans. on Power Electronics, Vol. 14, No. 4,
pp.607613, July 1999.