Escolar Documentos
Profissional Documentos
Cultura Documentos
1 Microcomputer Architecture
In this week, we will do a short general introduction to: (1) computer and computer architecture,
(2) microprocessor architecture, (3) microcontroller, and (4)PIC 18 microcontroller
ME3241-week01.docx
3241
The first general purpose electronic computer Electronic Numerical Integrator and Computer
(ENIAC) - was developed in 1945-1946. Eniac weighs 27 tons and uses 1800 sqft space. It is
programmable, but rewiring is required to program the machine, hence is rather inflexible.
In 1946, Electronic Discrete Variable Automatic Computer (EDVAC) was developed. EDVAC
can store program using punch card, and is the first stored program electronic computer. Based on
EDVAC, John von Neumann draft a report which lies the foundation of modern von Neumann
Machine.
ME3241-week01.docx
3241
Classes of Computers:
Depends of the difference in speed, instruction repertoire, number of CPU registers, word length,
main memory size, complexity of I/O modules, operating system complexity, physical size, cost,
virtual address space, secondary memory size, degree of multiprogramming, modern computers
can be catergorized in to three clases: Mainframe, Minicomputer, Microcomputer. Notice that
speed is not the only difference, and often microcomputer can be faster than minicomputer or
even mainframe. Also, division between the computer classes are increasingly unclear.
Mainframe is a powerful computer used for critical application. The difference of mainframe
with other classes is not so much of spped, but high reliability and security.
Minicomputer is a mid-range computer. It is originally designed to connect microcomputer with
mainframes. It uses own Unix operating system, and is often incompatible with other machines.
Minicomputers are giving ways to microcomputers.
Microcomputer is a computer whose Central Processing Unit (CPU) is a microprocessor.
Recall notion of microprocessor: a processor that contrains the whole CPU (including control unit,
arithmetic and logic unit, and register) one one single IC chip.
Compare with the notion of micro-controller: the whole CPU and all peripheral functions (i.e.,
the whole computer system) that is implemented on one IC chip.
ME3241-week01.docx
3241
A memory for holding both instructions and data required by the instructions
A control unit for fetching the instruction from memory
An arithmetic processor for performing the specific operation
Input/output and peripheral devices for transferring data to and from the system
Architechture of Microcomputer:
A von Neumann Machine can be a mainframe, a minicomputer or a microcomputer. We now
discuss the architechture of microcomputer. Almost all microcomputers are von Nermann
machines.
A microcomputer is made up of three fundamental elements: a central processor, memory and
input/output device - minimum structure. Notice that compare with the general von Neumann
machine structure, the control unit and the arithmetic processor are integrated together as the
central processor. (Why?)
System interconnection:
In microcomputer, system interconnection is done with the Bus Interconnection Scheme, see
below figure. Here, Bus refers to a set of 2 or more conductors grouped together to form a parallel
ME3241-week01.docx
3241
information path to and/or from the processor. In a microcomputer, typically three buses coexist,
namely, data bus, address bus and control bus.
Data bus is responsible for transferring data between processor and memory or processor and I/O.
Data bus width (in terms of number of bits) correlates with the default processing capacity of the
processor. For example, PIC 18 has a 8-bit data bus, and the processing capacity is one byte (=8
bit). Hence, PIC 18 is a 8-bit processor.
Address bus is responsible for transferring addresses from processor to memory or to I/O. The
width of address bus is hence correlated with the size of memory that the computer supports. For
example, a 16-bit address bus can support 65k memory.
Control bus is responsible for the control signals necessary to interface the various devices within
the microcomputer.
Memory:
Memory refers to any component that stores data and programs used by the processor. Since
1970s, the use of semiconductor memory (aka solid-state memory) has been dominant. Semiconductor memory has been through many generations: 1K, 4K, 16K, 256K, 1M (in late 1980s)
and now 1G bits on a single chip.
To access the memory, memory address and memory map are needed. Memory address is an n-bit
number that the processor uses to select a specific memory location. Hence, the number of unique
addresses =2n. A memory map designates the memory addresses that are connected to physical
memory locations and indicates which locations are unused. That is, it maps the address with the
physical memory. See below diagram.
ME3241-week01.docx
3241
Types of memory:
There are two types of memory: RAM (Random access memroy) and ROM (Read only memory).
RAM is volatile, i.e., it needs power to sustain data. It is called RAM because same amount of
time is required to access any location on the same chip. There are two types of RAM: Dynamic
random-access memory (DRAM) which needs period refersh, and Static random-access memory
(SRAM) which doesnt. DRAM is typically used for primary memory and SRAM for cache.
ROM can only be read but not written to by the processor. Mask-programmed read-only memory
(MROM) can only be programmed when being manufactured, while Programmable read-only
memory (PROM) can be programmed by the end user via a special equipment. PROM can only
be programmed once. EPROM can be programmed many time, but it must be done in a bulk
manner ie the whole chip in one erasure operation. EEPROM can be programmed many times,
either one location, one row or the whole chip. Flash memory can be programmed many times, in
bulk manner (either a block or the whole chip).
Input/output:
Input/output refers to any subsystem that has the responsibility of receiving data for the processor
(input) and sending data out from the processor (output). A port is an I/O connection that allows
the movement of data between computer and I/O device. A serial port allows two-way transfer of
data as a serial data stream (ie one bit a time). A parallel port transfers data in parallel (multiple
bit simultaneously). Analog interface is needed to cnvert analog to digital data or vice versa.
ME3241-week01.docx
3241
control information. The control unit is the specific component of CPU that controls the CPU
operations, by issueing control signals or instructions.
ME3241-week01.docx
3241
Early computers have many chips for each different components of a CPU. Later on,
microprocessor contains all three units of the CPU in one chip. For modern microprocessor
(especially those general purpose ones), the CPU also contains memory on chip (aka cache
memory) for faster access.
A special type of microprocessor is microcontroller. Microcontroller contains all components of a
computer system (i.e., CPU, memory, I/O) in one single chip. See below table for comparison
between microprocessor and microcontroller.
ME3241-week01.docx
3241
There are two ways to implement the control unit design. The hardwired control unit views the
control unit as a sequential logic circuit to generate fixed sequences of control signals. The
advantage is its speed of operation. The disadvantage is very inflexible to changes after built, and
costly to design and debug. The microprogrammed control unit uses microprograms to interest
and execute instruction, and hence easy to design and modify.
ALU is the unit to perform mathematical and logical operations on the data. Modern processors
often contain separate units for integer and floating point computation (floating point unit). Also,
modern processors use multiple execution units to execute instructions in parallel (e.g., dual-core,
quad-core etc).
Register is a small storage area to temporarily store data that the microprocessor is using. There
are some special regiserts which we elaborate. Accumulator is a special register that is directly
linked to ALU to assist with arithmetic operation (i.e, store one operand and the result of the
operation). Program counter (or instruction counter) keeps track of address of the next location in
memory that will be accessed. Status register contains bits to indicate certain results/status of the
last operation. Other special registers include stack pointer, address register etc.
ME3241-week01.docx
3241
10
ME3241-week01.docx
3241
11
1.3 Microcontroller
Microcontroller (C or MCU) is an integration of all of the computer components (i.e., one or
more microporcessors (Ps), memory and I/O devices) on one chip. it is typically intended as a
single chip solutions for systems requiring low to moderate processing power
Examples of early microprocessors include the following:
Intel 4044 (1971): first chip to contain all components of a CPU
Born of microprocessor
Intel 8008 (1972), Intel 8080 (1974)
8-bit microprocessors built by Intel
Other 8-bit microprocessors built in Mid 70s
Motorola: M6800, Signetics: 6502, Zilog: Z80, Texas Instruments: T9900,
National Semiconductor: IMP-8 etc.
Example of microprocessors developed since late 70s and beyond:
in late 70s
Intel 8086
Microcomputer XT Intel 8088
Motorola 68000
Zilog Z8000 etc
Later - CISC
Intel 80X86
Microcomputer AT Intel 80286
Motorola 680X0
Motorola 68020
ME3241-week01.docx
3241
12
Later - RISC
Power PC
SUN Microsystems
Examples of micro-controllers:
Intel: 8031, 8051, 80188, 8096 etc
Motorola: MC6805, MC68HC11, MC68HC12 (16-bit) etc
Microchip: PIC16, PIC18
Classification of Microcontrollers:
Microcontrollers are typically classified according to the processing capacity of the processors
equivalently the width of the data bus. It can be catergorized as 4-bit microcontroller, 8-bit
microcontroller, 16-, 32-, 64-bit microcontroller. The larger the data bus width, the more powerful
the microcontroller (and more expensive). Hence, low end microcontrollers are used for cheap
applications (eg toys, intelligent consumer product etc), while high end ones are used for complex
machines, industrial controllers etc.
8-bit CPU
16-bit instruction width, 70+ instructions
2 MB program memory space
256 bytes to 1KB of data EEPROM
Up to 3968 bytes of on-chip SRAM
4 KB to 128KB flash program memory
Operates at up to 40 MHz crystal oscillator
Instruction pipelining
A simpliefied block diagram see below. You should be able to tell from the diagram the data bus
width, instruction width, address bus width, and the maximum amount of memory supported.
ME3241-week01.docx
3241
13
ME3241-week01.docx
3241
14
A PIC 18 MCU can have up to 4096 bytes of data memory (recall 12-bit register address bus).
Data memory is implemented in SRAM and consists both general purpose registers (used to hold
dynamic data) and spcial-function registers (used to control the operation of peripheral functions).
A special property of PIC 18 data memory is that it is divided into banks. This property has
very profound impact on programming with PIC 18. Data memory is divided into 16 banks, each
bank has 256 bytes. At any time, only one bank is active. Which bank is active is specified by the
BSR register. Thus, to access data from another bank, one need to do bank switching this is an
overhead and can be error-prone. To reduce bank switching, PIC implemented the access bank.
Access bank is a special region of the data memory it consists of the lowest 96 bytes and highest
160 bytes of the data memory space. One can access memory locations within the access bank
regardless of which bank is active.
The group of registers from The group of registers from 0xFD8 to 0xFFF are dedicated to the
general control of MCU operation in CPU. Two examples are WREG and STATUS register. The
WREG register is involved in the execution of many instructions. The STATUS register holds the
status flags for the instruction execution
In terms of the program memory the program memory address bus and the program counter
(PC) are 21 bit long, hence the maximum amount of program memory supported is 2MB. PIC 18
also has a 31-entry stack to hold the return address of subrounting call. When power on, PIC18
starts to executre instruction from address 0. The location 0x08 is reserved for high-priority
interrupt service routine, 0x18 is reserved for low-priority interrupt service routine. Part of the
program memory is inside the chip (depends on the models, currently up to 128kb) and part of the
program memory is outside the side.
ME3241-week01.docx
3241
15
2. Byte-to-byte operations: eg. movff 0x100, 0x200. Here, no bank selection is needed since
12 bits are used to address a memory location
ME3241-week01.docx
3241
16
5. Control operations instructions that change the program exection sequence and make
subroutine calls they all have different formats
Addressing mode:
There are five addressing modes (ways to identify locations of the operands) in PIC 18:
1. Register direct: Use an 8-bit value to specify a data register. Eg. movf 0x20, W, A. Here
0x20 is a register that is directly addressed
2. Immediate Mode: A value in the instruction to be used as an operand. Eg., movlb 3. Here
number 3 is a number that is immediately addressed
3. Inherent Mode: an implied operand. Eg, movf 0x20, W, A, here the register WREG is
inherently addressed
4. Indirect Mode: A special function register (FSRx) is used as a pointer to the actual data
register. Eg. movwf INDF0. This command copies the contents of the WREG register to
the data memory whose location is stored in FSR0.
5. Bit direct: deal with individual bit. E.g., BCF PORTB, 3, A. This command Clears bit 3
of the data register PORTB
Because in most instruction, only 8 bit is used to identify a file register, while we have 4096 bytes
of file register (212 bytes), we have to divide into banks- each bank have 256 bytes (28 bytes) .
Refer to page 14 for the information of bank and access bank.
ME3241-week01.docx
3241
17
1.4.3 Pipelining
The PIC18 divide most of the instruction execution into two stages: instruction fetch and
instruction execution. Hence, up to two instructions are overlapped in their execution - One
instruction is in fetch stage while the second instruction is in execution stage, see below diagram.
Notice that this is made possible since the fetch stage accessess program memory and the
execution stage accesses data memory (i.e., file registers). Since the two memory are separated
with individual buses, pipelineing is possible. Because of pipelining, each instruction appears to
take one instruction cycle to complete. For example, suppose for unpiplined version, one
instruction takes 60ns, and assume latch requires 3ns, then for the pipelined version, each time
cycle = 60/2+3=33 ns.
ME3241-week01.docx