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Dielectrophoretic alignment of gallium nitride nanowires (GaN NWs) for use in device
applications

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2006 Nanotechnology 17 3394
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INSTITUTE OF PHYSICS PUBLISHING

NANOTECHNOLOGY

Nanotechnology 17 (2006) 33943399

doi:10.1088/0957-4484/17/14/009

Dielectrophoretic alignment of gallium

nitride nanowires (GaN NWs) for use in
device applications
T H Kim1,4 , S Y Lee1,4 , N K Cho1,2 , H K Seong3 , H J Choi3 ,
S W Jung2 and S K Lee1,5
1

Department of Semiconductor Science and Technology, SPRC, Chonbuk National

University, Jeonju 561-756, Korea
2
Nano Mechatronics Research Center, Korea Electronics Technology Institute (KETI),
Seongnam 463-816, Korea
3
School of Advanced Materials Science and Engineering, Yonsei University, Seoul 120-749,
Korea
E-mail: sk lee@chonbuk.ac.kr

Received 10 April 2006

Published 15 June 2006
Online at stacks.iop.org/Nano/17/3394
Abstract
We report on a simple and effective ac and dc dielectrophoresis (DEP)
method that can be used to align and manipulate semiconductor gallium
nitride (GaN) nanowires (NWs) with variations in the type of electrical fields
as well as variations of frequency. We observed that the ability of the
alignment and the formation of the assembling nanowires (single or a bundle
configuration) strongly depend on the magnitude of both the ac and dc
electric fields. The yield results indicate that the GaN NWs, using ac DEP,
are better aligned with a higher yield rate of approximately 80% over the
entire array in the chip than by using dc DEP. In addition, we first
demonstrated the simple hybrid pn junction structures assembled by n-type
GaN nanowires together with a p-type silicon substrate (n-GaN NW/p-Si
substrate) using dielectrophoresis. From the transport measurements, the pn
junction structures show well-defined current rectifying behaviour with a low
reverse leakage current of approximately 3 104 A at 25 V. We believe
that our unique pn junction structures can be useful for electronic and
optoelectronic nanodevices such as rectifiers and UV nano-LEDs.
(Some figures in this article are in colour only in the electronic version)

1. Introduction
The one-dimensional semiconductor nanowire (NW) offers
a good system for investigating the dependence of the
electrical and thermal transport or mechanical properties on
dimensionality and size reduction or quantum confinement
effect [1, 2]. These nanowires are very interesting building
blocks for the fabrication of various devices on a nanoscale
range because of their own superior properties such as the
capability of the doping modulation and the selectivity of the
4 These authors contributed equally to this work.
5 Author to whom any correspondence should be addressed.

0957-4484/06/143394+06$30.00

carriers. In addition, they can be synthesized using diverse

techniques such as laser-assisted catalytic growth, chemical
vapour deposition (CVD), hydride vapour phase epitaxy
(HVPE), and metal-organic chemical vapour deposition
(MOCVD) [15].
Furthermore, theoretical calculations
indicate that the chemical and physical properties of a NW
could be much better than those of bulk or thin film [6]. The
ability to manipulate and align these individual nanostructures
is necessary for wafer-based large scale integration, proper
electric device applications, and characterization of their
electrical properties.
Dielectrophoresis (DEP) has been utilized to manipulate nanoparticles [7], carbon nanotubes [812], metallic

2006 IOP Publishing Ltd Printed in the UK

3394

Dielectrophoretic alignment of gallium nitride nanowires (GaN NWs) for use in device applications

(a)

(b)

(c)

AC

Figure 1. ((a), (b)) Images of the dielectrophoresis (DEP) measurement set-up connected to a function generator and power supply for
supplying the ac and dc electric field. (c) Scanning electron microscope (SEM) images of opposing pairs of the Ti/Au electrodes prior to the
DEP. The circle denotes the electrode gap where the GaN nanowires are aligned.

nanowires [13, 14], and semiconductor nanowires such as indium phosphide (InP), tin oxide (SnO2 ), and zinc oxide (ZnO)
nanowires [1517]. Duan et al (2001) first demonstrated InP
nanowire pn junction structures with electroluminescence and
photoluminescence using a fluidic assembly method. Duan
et al (2001) also reported the possibility of using an electricfield assisted assembly technique (dc dielectrophoresis) to
align and control the nanowires [15]. But they did not present
the device performance using dc dielectrophoresis technique.
Recently, Lao et al (2006) reported on ZnO nanobelt Schottky diodes which are formed by ac dielectrophoresis and suggested that the Schottky diode behaviour comes from asymmetric contacts during dielectrophoresis [17]. However, there
are few publications regarding the systematic studies of dielectrophoresis connected to device applications with semiconductor nanowires.
In this paper, we present a systematical investigation of
the DEP process used to align the semiconductor gallium
nitride nanowires (GaN NWs) across a pair of round-shaped
metal electrodes with variation of types of electrical fields
and variations in the frequency. We also demonstrate simple
pn junction structures, which are assembled by combining
the n-type GaN NWs together with the p-type Si substrate
using dielectrophoresis. We show the electrical characteristics
of these pn junction structures. In addition, some of
the material characterizations such as from x-ray diffraction
(XRD), photoluminescence (PL), and field-emission scanning
electron microscopy (FE-SEM), are also reported.

2. Experimental details
We prepared the gallium nitride nanowires (GaN NWs) by
hot-wall chemical vapour deposition (CVD). c-plane sapphire
wafers were used as substrates for the GaN NW growth. The
substrates, deposited on a 2 nm layer of Ni by sputtering,
were placed in the region of uniform temperature in a quartz
tube reactor. Gallium (Ga) and nitrogen (N) components
were supplied to the substrate by using metallic Ga and NH3
gas. Typically, the system was heated to 900 C under a flow
of NH3 at a rate of 20 cm3 min1 and maintained for 6 h,
and then cooled down to room temperature. For the DEP
experiments we prepared the GaN nanowire suspensions by
sonicating a 10 ml IPA (isopropyl alcohol) solution. The
metal electrodes (Ti/Au = 50/100 nm) were prepared with
a standard photolithography process on a 4 inch thermally
oxidized Si(100) wafer (n-type, resistivity 510
cm). One
chip (5 5 mm2 ) consisted of 200 opposing pairs of the
electrodes. Its geometry included a 4 m gap between two
Ti/Au electrodes as shown in figure 1(c). Figures 1(a) and (b)
show the image of the dielectrophoresis measurement setup
and images of the metal electrodes (200 pairs). A drop of
the GaN NW suspension (3 l) was placed on the selected
gap using a micropipette while the electrical field was being
applied across the electrodes (one of them grounded and the
other applied with dc or a sinusoidal ac voltage). The electric
field was continuously applied until the suspension completely
dried out. Then, the samples were taken for imaging by
3395

T H Kim et al

(a)

(b)

350

(d)

250

Emission from NWa (A.U.)

sapphire

300

100
50
0
20

30

40

50

60

(100)

(110)

(102)

150

(200)
(112)
(201)

200
(100)
(002)

Intensity (A.U.)

1.2

(101)

(c)

70

1.0
0.8
0.6
0.4
GaN Nanowire
0.2
0.0

80

400

2 (degree)

500
600
Wavelength (nm)

700

800

Figure 2. (a) A typical scanning electron microscope (SEM) image of GaN nanowires grown on a c-plane sapphire substrate with an enlarged
image shown in (b). (c) X-ray diffraction (XRD) spectra of GaN nanowires. (d) Photoluminescence (PL) spectrum from GaN nanowires
measured at room temperature.

Table 1. Summary of the sample preparation for all samples (D1D14).

DC

Samples

Frequency

D1D4

D5D9
D10D14

10 kHz
20 MHz

DC voltage
(V)

AC peakpeak voltage
(Vpp )

1(D1), 5(D2),
15(D3), 20(D4)

Not performed.

a scanning electron microscope (SEM) or ultraviolet (UV)

optical microscope to characterize the morphology and the
yield rate of the aligned nanowires between the electrodes.
The yield rate, the percentage of the number of the metal
electrodes where at least one GaN nanowire aligns out of
200 entire electrodes, was calculated by counting the GaN
nanowires aligned in the gap across the electrodes. For the
DEP experiment, we prepared 14 different samples (D1D14).
The first 4 samples (D1D4) were applied dc electric field (1,
5, 15, 20 V) while the other 10 samples (D5D14) were applied
ac electric field (1, 5, 10, 15, 20 Vpp ) at two frequencies
of 10 kHz and 20 MHz as shown in table 1. For the DEP
experiment, we selected two frequencies (10 kHz and 20 MHz)
to investigate the effect of the modulating frequency.
To demonstrate the possibility of wafer-based large
scale integration with the nanodevices, we also fabricated
3396

1(D5), 5(D6), 10(D7), 15(D8), 20(D9)

1(D10), 5(D11), 10(D12), 15(D13), 20(D14)

hybrid pn junction structures which were assembled

having the n-type GaN nanowires on a patterned p-type
silicon substrate by means of dielectrophoresis. Current
voltage ( I V ) measurements were performed on several pn
junction structures at room temperature using an HP 4156A
semiconductor parameter analyser in the range 20 fA100 mA.

3. Results and discussion

Figures 2(a) and (b) show scanning electron microscope (SEM)
images of the GaN nanowires prepared on a c-plane sapphire
substrate. The GaN NWs were distributed over the entire area
of the sapphire substrate (8 8 mm2 ) and had diameters in
the range 50300 nm and length of several m. The x-ray
diffraction (XRD) pattern of the GaN NWs was indexed to
a hexagonal based wurtzite structure as shown in figure 2(c).

Dielectrophoretic alignment of gallium nitride nanowires (GaN NWs) for use in device applications

rate increased with increasing both the dc and ac voltage. To

understand such behaviours observed in the GaN nanowires
with the applied electric field, we should consider the wellknown standard model of DEP exerted on nanowires. For a
homogeneous cylindrical shape and a long rod (in our case
nanowire) with its major axis parallel to an inhomogeneous
alternating electric field, the DEP force is given by [16, 19, 20]

100
90

Alignment yield (%)

80

ac at 10 kHz
ac at 20 MHz
dc

70
60
50

v
r 2l
2
2
 Erms
 Erms
)=
m K ()(
)
FDEP = m K ()(
2
2

40
30
20
10
0
0

10

15

20

25

DC Voltage (V) or AC Peak-to-Peak Voltage (Vp-p)

Figure 3. The yield of the aligned GaN nanowires in the gap over
200 opposing electrodes as a function of the dc and ac electric field.
For the ac measurement, the frequency was fixed at 10 kHz and
20 MHz.

Photoluminescence (PL) emission peaks shown in figure 2(d)

were observed at the centre wavelengths of 374 nm (3.31 eV
in photon energy) with a HeCd CW laser excitation source
at room temperature. Figure 3 shows the alignment yield of
the GaN nanowires in the gap when applying a dc and ac
electric field at the frequencies of 10 kHz and 20 MHz. In
figure 3, the results indicate that the alignment yield of the
GaN nanowires strongly depends not only on the dc electric
field, but also on the ac electric field, although it was observed
that the yield of GaN NWs did not increase after 15 V for
the dc electric field. Generally, it was observed that the yield

(1)

where v is the volume of the nanowires, K () is the real part

of the ClausiusMosotti factor, r is the radius of the nanowires,
and l is the length of the nanowires. K () is related to the
nanowire dielectric constant n and liquid medium dielectric
constant m by



n m
.
K () Re
(2)

m
Here, the asterisk ( ) denotes that the dielectric constant is
a complex quantity. It can be related to the conductivity
and the angular frequency through the standard formula,
= i(/). Equation (1) clearly indicates that the DEP
force highly depends highly on the volume of the nanowire,
ClausiusMosotti factor, and the gradient of the electric field.
Dong et al 2005 also reported that the alignment of the
nanotubes is not only controlled by the DEP force but also by
the torque T exerted on the induced electrical dipole moment.
The torque is given by

T = q d E

(3)

where q is the induced electrical charge on the nanowires,

Figure 4. SEM images of the aligned GaN nanowires on the patterned 200 electrodes. (a) The general shape and the morphology of the chip
for the sample D2 (dc 5 V) and D9 (ac 20 Vpp ) after the dielectrophoresis. The aligned GaN nanowires in the gap across the electrode (b) for
the samples D1D4 and (c) for the samples D5D9.

3397

T H Kim et al

d is the displacement between the induced charges, and E

is the electric field. For the electric field dependence in
figure 3, by increasing the dc (up to 20 V) and the ac (up to
20 Vpp ) electric field, we achieve a high yield rate of the
aligned GaN nanowires in the electrodes. This can be simply
explained by high dc and ac dielectrophoresis force with a high
electric field as predicted in equations (1) and (3). The higher
electric field (both dc and ac) has forced the GaN nanowires
to align across the electrodes such that the assembling yield
is reached around 80% over the entire electrode array in
the chip. In order to understand the frequency dependence
of the yield rate, we should notice the value of the K ()
factor. For the GaN nanowires with the IPA liquid medium, the
theoretical calculation of K () at different angular frequency
is bounded by the limits 1.7 107 < K (/2) < 1.0 in
the frequency range 1 kHz to 80 MHz. The conductivity and
dielectric constant for the GaN nanowires and the IPA are n =
104 S m1 [2, 18], n = 12.20 [21] and m = 6 106 S m1 ,
m = 18.30 [22], respectively. The sign of K () denotes the
direction of the electric field. Thus, in our case the nanowires
at two frequencies of 10 kHz and 20 MHz are attracted to the
electrode edges since the values of the K () factor for the
two frequencies are positive (known as positive DEP) [19]. In
figure 3 the alignment yield for applying a frequency of 10 kHz
is slightly higher than that for 20 MHz.
We have also investigated how the nanowires act on
the substrate in the DEP. As shown in figure 4(a), when
a dc electric field is applied to the electrodes of sample
D2, many GaN nanowires including a metal impurity, which
is not aligned across the electrodes, are deposited on the
charged electrodes and prevent the deposition of more than one
nanowire across the electrodes. On the other hand, we did not
observe any impurities and nanowires on the electrodes for ac
electric field (sample D9) as shown in figure 4(a). Most of
the nanowires were aligned in the gap across the electrodes
and the edge of the electrodes, not on the electrodes as seen
for dc electric field. From our measurement, we found that ac
dielectrophoresis was clearly superior to dc dielectrophoresis
in terms of the alignment of the nanowires. For the dc and ac
electric field it was observed that the number of the aligned
nanowires across the electrodes increased with the applied dc
and ac voltage. From figures 4(b) and (c) we observed that the
morphology of the aligned GaN nanowires in the gap across the
electrodes changed from single to bundle types of nanowires.
The optimum DEP process for alignment of the GaN nanowires
with a single nanowire over the electrode array is from the
ac electric field DEP process with 10 Vpp at the frequency
between 10 kHz and 20 MHz.
To demonstrate the potential of the dielectrophoresis
approach in large scale nanodevice applications, we fabricated
hybrid pn junction structures assembled by the bottomup assembly of n-type GaN nanowires together with the
top-down processed p-type silicon structures as shown in
figure 5. Huang et al (2005) implemented a similar hybrid
top-down/bottom-up approach by using lithography to pattern
p-type silicon wires on a silicon-on-insulator (SOI) substrate,
and then assembling n-type CdS nanowires on top of the silicon
structures to form an array of pn junction structures [23].
They used a layer-by-layer fluidic directed assembly technique
(a fluidic assembly method) to align the CdS nanowires on
3398

SiO2

(a)

P-Si (100)

(b)

P-Si (100)
Cathode metal (Ti/Au)

(c)

P-Si (100)
N-GaN NW

(d)

P-Si (100)

Anode metal (Al)

Figure 5. Schematic diagram of the process (steps ((a)(d))) for the
fabrication of the pn junction structures formed by dielectrophoresis
(DEP) on a Si(100) wafer. The pn junction structures are assembled
by coupling the n-type GaN nanowires together with p-type Si
substrate (n-GaN NW/p-Si) using DEP.

the patterned SOI substrate. Here, we first demonstrated

the hybrid pn junction diodes by coupling the n-type GaN
nanowires with p-type Si substrates using DEP techniques to
align and manipulate the nanowires on the silicon substrates.
Figure 5 shows the schematic fabrication processes of the
hybrid pn junction structures. The cathode electrodes
(Ti/Au = 50/100 nm) for contact to n-type GaN nanowires
were patterned on the oxidized Si(100) wafer (p-type) by
the standard photolithography and lift-off process. The
anode contacts were defined on the backside of the p-Si
substrate as shown in figure 5(d). The Al (150 nm) film
was evaporated on the highly doped backside Si substrate
after removal of the native oxide by dipping in diluted
hydrofluoric (HF) acid for 5 min. The DEP for these pn
junction structures was performed at a frequency of 10 kHz
with 15 Vpp . Figure 6(a) shows the SEM image of the
hybrid pn diode structures formed by the DEP process. As
shown in figure 6(a), GaN nanowires are well-aligned around
the electrodes after the DEP process, as expected from the
above DEP experiment. Currentvoltage ( I V ) measurements
show well-defined current rectifying behaviour as shown in
figure 6(b). Especially, little leakage current and no breakdown
are observed in reverse bias up to 25 V for these pn junction
diode structures. The observed reverse leakage current was
to be 3 104 A at 25 V of reverse bias voltage at room
temperature. To investigate the reproducibility of the n-GaN

Dielectrophoretic alignment of gallium nitride nanowires (GaN NWs) for use in device applications

electrode array in the chip. This can be simply explained by the

high dielectrophoresis force in the gap across the electrodes.
The yield results indicate that ac dielectrophoresis is much
more successful in aligning and manipulating the nanowires
in the gap than a dc electric field. The aligned single or
bundle types of the nanowires are capable of being building
blocks to fabricate high sensitivity and selectivity chemical
sensor applications. In addition, we have demonstrated that
pn junction structures can be easily fabricated by coupling
the n-type GaN nanowires with a p-type silicon substrate using
dielectrophoresis and that these hybrid pn junction structures
show highly reproducible rectifying behaviour from the I V
measurements.

(a)

Acknowledgments
300.0u

This work was supported by the Korea Research Foundation

Grant funded by the Korean Government (MOEHRD) (KRF2005-005-J07501). HJC is grateful for support from the Korea
Research Foundation (KRF-2005-042-D00203).

(b)

Current (A)

200.0u
Diode #1
Diode #2
Diode #3
100.0u

References

0.0

-100.0u
-15

-10

-5

10

Bias Voltage (V)

Figure 6. (a) SEM image of the DEP prepared pn junction diodes.
(b) Currentvoltage ( I V ) characteristics of DEP prepared pn
junction diodes (n-GaN NWs/p-Si). The measurements were
performed with three pn junction diodes located in different regions
on the same chip (5 5 mm2 ).

nanowire/p-Si substrate junction structures, we have fabricated

several samples under the same conditions of DEP and found
that all of the samples have a similar rectifying behaviour
and are clearly working with low leakage current as shown in
figure 6(b). The sheet resistances ( RS ) for these DEP prepared
pn junction diodes were determined to range from 7 to 12 k

from the inverse of the slope in the I V curve in figure 6(b).
The high sheet resistance is because of the pure metal contacts
to Si and n-GaN NWs as well as the high resistivity of the
n-GaN NWs. A more detailed study of these nanowire pn
junction structures is being initiated for their potential use in
well-aligned large scale photonic as well as electronic device
applications.

4. Conclusions
In summary, a simple and effective dielectrophoresis on
semiconductor GaN nanowires was investigated. We exploited
the influence of various types of electric fields and varied the
applied frequency on the controls of the GaN nanowires using
dielectrophoresis. The higher ac electric field has forced the
GaN nanowires to align across the electrodes and then an
assembling yield around 80% was reached over the entire

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3399