CAPACITOR SIZE REDUCTION FOR MULTIPLE

INVERTER SYSTEMS
G.I. Orfanoudakis*, S.M. Sharkh* and M.A. Yuratich
*University of Southampton,UK, g.i.orfanoudakis@soton.ac.uk, suleiman@soton.ac.uk
TSL Technology Ltd, UK, mike.yuratich@tsltechnology.com

Keywords: Multiple inverter systems, DC-link capacitors.

Abstract
Multiple inverter systems are examined from the aspect of
their DC-link capacitors. A common capacitor is assumed and
its current spectrum is derived for single and three-phase
inverter systems. The effect of introducing a phase shift
between the inverter reference or carrier waveforms is
investigated, to reveal potential reductions in DC-link
capacitor rms (ripple) current. It is shown that significant
reductions of 40% - 50% in the capacitor rms current can be
achieved, especially for three-phase inverter systems. The
results are verified by simulations using MATLAB-Simulink.

1 Introduction
During the last decade, multiple inverter systems have been
extensively incorporated in high-power applications. In
addition to high-power electric motor drives, comprising
multiple inverters that share the total drive current, multiple
inverter systems have been used to drive multi-phase motors,
or different motors in multiple motor applications. Key
examples of such applications are conveyor belts and electric
vehicles with direct drive wheel motors.
This study examines multiple inverter systems from the
perspective of their DC-link capacitors, which are sensitive
elements of an inverter and a common source of failures, and
should therefore be selected and treated carefully. The DClink capacitor current contains harmonics (ripple) which give
rise to capacitor voltage fluctuations as well as capacitor
losses. Voltage and thermal stresses induced, respectively,
from these effects are the main factors that shorten the
capacitor lifetime. In order to mitigate them, additional
capacitors have to be connected in parallel.
In a conventional multiple inverter system, each inverter is
connected to its own DC-link. The present study investigates
potential reduction in overall capacitor size and losses that
can be achieved in multiple inverter systems, by using a
common DC-link capacitor as shown in Figure 1. The study
covers a range of cases for multiple inverter systems, defined
by the number of inverters (N), the number of inverter phases
(1/3), and the phase angles of the inverter reference
waveforms.

Figure 1: Block diagram of multiple inverter system with N

inverters sharing a common DC-link capacitor.

2 DC-link Capacitor Selection

The selection of DC-link capacitors is determined by the
required capacitance, voltage and ripple current ratings. The
capacitance is selected according to the expected lowfrequency capacitor current harmonics (Ih at frequency fh, for
h = 1, 2, ...) and the maximum affordable amplitude of DC
voltage oscillations (Vdc /2). Each current harmonic results in
a respective voltage harmonic at the DC-link. Assuming that,
in the worst case, all current harmonics (or equivalently all
peaks of voltage harmonics) can be in phase, the required
capacitance is given by Equation (1):

1
Vdc / 2

Ih
2 f h

(1)

According to this equation, high-frequency capacitor current

harmonics, which appear due to the switching (PWM)
operation of the inverter, have a small effect on the capacitor
voltage ripple. However, they contribute to the DC-link
capacitor losses and internal heat dissipation, thus increasing
the required capacitor ripple current rating.
The voltage rating is typically higher than the operating DC
voltage of the inverter, to account for voltage oscillations and
other effects such as input (grid) voltage fluctuations and
regenerative operation of the inverter.

3 Harmonic Analysis of Capacitor Current

Methods are available in the literature for analyzing the DClink capacitor current of a single inverter, with respect to both
its rms value [2, 4, 8, 10] and its harmonic components [1, 5].
A study on the DC-link capacitor rms current of a twoinverter system can also be found in [7]. Expressions giving
the capacitor current rms value can be used for estimating
capacitor losses, given the capacitor Equivalent Series
Resistance (ESR). The derivation, however, of the amplitude,
frequency and phase for each capacitor current harmonic,
provides additional capabilities. Regarding DC-link capacitor
selection, harmonic analysis can give an accurate estimate of
the required capacitance, according to Equation (1).
Moreover, it offers a more accurate approximation of
capacitor losses, in cases where the capacitor ESR varies with
frequency [4, 6]. Pertaining to multiple inverter systems,
harmonic analysis additionally offers the basis for examining
the possible capacitor current harmonic reductions or
cancellations that can be achieved by connecting two or more
inverters to a common DC-link.
Section 3.1, below, summarizes the results of the DC-link
capacitor current harmonic analysis, for single and threephase inverters (Figure 2). The effect of connecting multiple
inverters to a common DC-link is discussed in section 3.2. It
has to be noted that the contribution of the systems front-end,
commonly a rectifier, on the DC-link capacitor current is not
examined in this study. The current harmonics due a 6-pulse
rectifier can be calculated as shown in [9], and superimposed
onto the inverter harmonics to obtain the complete capacitor
current spectrum.

Figure 2: Single-phase H-bridge and three-phase two-level

inverter topologies.
Baseband harmonics (m = 0, n = 1 or 2):

I L j
j2 e ,

0n
iV 1 =
MI L e j ,
j 4

3.1 Single inverter DC-link capacitor current harmonics

The DC-link capacitor current harmonics of a three-phase,
two-level inverter were initially analyzed in [1]. The authors
based their calculations on the Geometric Wall Model
technique, which has been extensively applied in [3] for the
harmonic analysis of inverter (PWM) output voltage
waveforms. Using this technique, the DC-link capacitor
current is expressed as a Fourier series, with Fourier
coefficients corresponding to individual current harmonics. A
different approach, which takes advantage of the known
output phase voltage spectrum of the two-level inverter, was
adopted in [5], giving the same result. In both cases, the first
step of the derivation was the analysis of the current through
the IGBT/diode module V1, shown in Figure 2. Assuming
naturally sampled sine-triangle modulation (triangular carrier
and sinusoidal reference waveforms), the Fourier coefficients
of this current are derived in [1, 5]. After some manipulation
and conversion to their complex form, these coefficients are
given by Equations (2) for baseband, and (3) for carriersideband harmonics. Superscripts m and n denote the order of
the harmonic, defining its frequency as fh = mfc + nf0, where fc
and f0 are the inverter carrier (switching) and fundamental
frequencies, respectively. The symbols IL, M and stand for
the peak output current, inverter modulation index and load
power angle, respectively.

for n = 1
(2)

for n = 2

Carrier (m 0, n = 0) and sideband (m 0, n 0) harmonics:

mn

iV 1 =

jm

j e 2 IL

cos (m + n )
m
2

(3)

j

j
e J n+1 m 2 M e J n1 m 2 M

A current harmonic, mn h , in the above complex form, can be

expressed in the time domain using Equation (4):
mn

h( t ) =

mn

{ h}
{ h}

Im
Re

= tan 1

mn

h cos n [c t + c ] + m [0 t + 0 ] mn ,
mn

mn

(4)

where c and 0 are the carrier and fundamental angular

frequencies, equal to 2fc and 2f0, while c and 0 are the
phase angles of the carrier and reference waveforms,
respectively [3].

By convention, the phase angles c and 0 are set to zero for

module V1 (c,V1 = 0,V1 = 0). Use of other than zero values
for c and 0 introduces a shift of mc + n0 to the phase of the
mnth harmonic. An equivalent way of introducing the same
phase shift is multiplying the complex form by a rotating
factor, r, given by Equation (5):

r = e j (mc + n0 )

(5)

This factor will be used below, to derive the DC-link

capacitor current harmonic coefficients for a single-phase and
a three-phase inverter, as well as for a multiple inverter
system with a common DC-link.

3.2 Common DC-link capacitor current harmonics

This section discusses the effect of introducing a carrier phase
shift between the inverters of an N-inverter system. It is
assumed that the kth inverter (1 k N) has its own carrier
waveform, shifted by c,k compared to the 1st inverter (c,1 =
0), and that this waveform is used to switch all its phase legs.
Moreover, the reference waveform for module V1 of the kth
inverter is assumed to be shifted by 0,k in relation to the
respective waveform of the 1st inverter (0,1 = 0). The
reference waveforms for the other modules are shifted
accordingly, as explained in sections 3.1.1 and 3.1.2.
According to Equation (5), the rotating factors, rk, for the
harmonics of the kth inverter will be:

rk = e

3.1.1 Single-phase H-bridge inverter

Under the assumption that the inverter is supplied by a source
providing purely DC current, Idc, the DC-link ripple (AC)
current is totally carried by the capacitor (Figure 2). Apart
from its DC component, the positive DC-link current, id, is
therefore equal and opposite to the capacitor current, iC, at
any instant. Neglecting the negative sign, the current
harmonics of id and iC are then the same, and can be found by
adding the respective harmonic coefficients for modules V1
and V2. The two modules are switched using the same carrier
waveform (c,V2 = 0), while the reference waveform for V2 is
shifted by 180 deg (0,V2 = ). Thus, the harmonic coefficients
for the capacitor current are given by Equation (6), below:
mn

2 mn iV 1 , for n even
(6)
iC ,1 = mn iV 1 1 + e jn =
for n odd
0,

According to Equations (2) and (6), the DC-link capacitor

current of an H-bridge inverter contains a baseband harmonic
(m = 0, n = 2) at twice the fundamental frequency:
02

iC ,1 =

MI L j
e
j2

(7)

3.1.2 Three-phase two-level inverter

The harmonic coefficients for the DC-link capacitor current
of a three-phase, two-level inverter can be derived following a
similar procedure. The positive DC-link current is now the
sum of the currents of modules V1, V3 and V5. A common
carrier waveform is used for all modules (c,V3 = c,V5 = 0),
while the reference waveforms for V3 and V5 are shifted by 120 deg (0,V3 = -2/3) and 120 deg (0,V5 = 2/3),
respectively. The harmonic coefficients for the three-phase
inverter capacitor current are given by Equation (8). No
baseband harmonics remain in this case.
mn

iC ,3 = mn iV 1 1 + e j 2 n / 3 + e j 2 n / 3
3mn iV 1 , for n mod 3 = 0
=
for n mod 3 0
0,

)
(8)

j (m c , k + n 0 , k )

(9)

Hence, the harmonic coefficients of the common DC-link

capacitor current will be given by Equation (10), below:
mn

iC = mn iC ,1 / 3 rk

(10)

4 System cases - Results

Different multiple inverter systems configurations are
examined in this section. The aim is to investigate whether
the required DC-link capacitor size can be reduced by the
introduction of an appropriate phase shift to the inverter
reference or carrier waveforms. Given that the capacitor
voltage rating is primarily determined by the system
specifications and therefore cannot be decreased, a reduction
to the capacitor size can arise from a reduction of the
capacitance or the ripple current requirements. As explained
in sections 2 and 3, the required capacitance is mainly
affected by the low-frequency capacitor current harmonics,
while the ripple current rating is determined by the capacitor
current rms value. With reference to the presented harmonic
analysis, the low-frequency harmonics will be considered to
be the baseband harmonics, while the capacitor rms current
will be calculated using Equation (11), below:

I C , rms

=
m n

mn

iC

(11)

Multiple inverter systems with two (N = 2) and three (N = 3)

inverters will be examined. The inverter loads are assumed to
be identical, having a power factor cos = 0.85, which is a
typical value for motors. The phase shifts 0,k of the inverter
reference waveforms are fixed to different values to represent
different system configurations. Then, the carrier phase shift
is varied, to determine the value that yields the optimum
(minimum) capacitor rms current. The optimal current value
is finally compared to the conventional practice of using the
same carrier for all inverters. The analytically derived current
rms values are verified by simulations in MATLABSimulink. The simulated results are shown as points in the
relative figures.

0.8

0.8

Rms current ratio

Rms current ratio

0.6
0.4

M=1
M = 0.8
M = 0.6

0.2
0

30

60

90

120

150

0.6
0.4

180

M=1
M = 0.8
M = 0.6

0.2
0

30

60

90

120 150 180

0.8
Norm. rms current

Norm. rms current

1
0.6
0.4
0.2
IC,rms|90

0.2

0.4

IC,rms|0

0.6

0.8

0.8
0.6
0.4
0.2
0

IC,rms|60

0.2

0.4

4.1 Single-phase inverter systems

The DC-link capacitor current of a single-phase H-bridge
inverter contains a baseband harmonic, described by Equation
(7). According to Equation (10), the coefficient for this
harmonic in a multiple inverter system will be given by:

MI L j
j 2
e e 0 ,k
j2
k

0.8

(12)

It can be noticed that the above expression is only dependent

on the inverter reference phase shifts, 0,k. Given that 0,1 is
defined to be zero, the baseband harmonic can be eliminated
for N = 2 if 0,2 = 90 deg, while for N = 3 if 0,2 = 60 deg and
0,3 = -60 (or 120 and -120) deg.
These two cases of interest are examined with respect to their
capacitor rms current, in Figures 3 and 4, respectively. The
upper plots illustrate how the capacitor rms current varies
with c. If IC,rms|c is the common capacitor rms current when
the inverter carriers are shifted by c, then the variation is
shown by plotting the ratio IC,rms|c /IC,rms|0 for different values
of c. The optimal value for c, c,opt, proves to be equal to 90
and 60 deg for N = 2 and N = 3, respectively. Adopting c,opt
as a carrier phase shift for each case, the resulting capacitor
rms current, IC,rms|c,opt, is subsequently plotted together with
IC,rms|0 against the inverters modulation index, M. The rms
values are normalized to the output rms current.
The ripple current rating of the inverter DC-link capacitors is
determined by the maximum rms current that the capacitors
may have to carry within the inverter operating range. For the
two cases presented in Figures 3 and 4, the maximum
(normalized) rms current values are given in Table 1.

Figure 4: Capacitor rms current versus c and M for singlephase inverter system with N = 3, 0 = 60/120 deg.
N 0 (deg) c,opt (deg) max IC,rms|c,opt max IC,rms|0 Decr.
2 90
90
0.6
0.71
15.5%
3 60/120 60/120
0.68
1
32%
Table 1: Summary of results for the examined single-phase
inverter systems.
The above analysis can be extended to systems incorporating
inverters with other values of 0. The carrier phase shift, c,opt,
that minimizes the required ripple current rating of the DClink capacitor can be determined for each value of 0. It is
assumed that 0,2 = -0,3 = 0 and c,2 = -c,3 = c. In the case of
single-phase inverter systems, the study showed that c,opt
does not change with 0: for N = 2, c,opt is 90 deg and for N =
3, 60/120 deg. However, the maximum capacitor rms current
varies significantly with 0, as shown in Figure 5, below.
2
Max norm. rms current

Figure 3: Capacitor rms current versus c and M for singlephase inverter system with N = 2, 0 = 90 deg.

iC =

0.6
M

02

IC,rms|0

1.5
1
0.5
IC,rms|

c,opt

30

60

90
0

IC,rms|0

120 150 180

Figure 5: Maximum capacitor rms currents IC,rms|c,opt and

IC,rms|0 versus 0, for single-phase inverter systems with N = 2
and N = 3 (bold lines).

0.8

0.8

Rms current ratio

Rms current ratio

0.6
0.4

M=1
M = 0.8
M = 0.6

0.2
0

30

60

90

120

150

M=1
M = 0.8
M = 0.6

0.2
0

30

60

90

120

150

180

1.5
Norm. rms current

Norm. rms current

0.4

180

1.5

0.5
IC,rms|90

0.6

0.2

0.4

0.5

IC,rms|0

0.6

0.8

IC,rms|60

4.2 Three-phase inverter systems

Assuming a balanced operation, the DC-link current of a
three-phase, two-level inverter does not contain any baseband
harmonics. Under the same assumption, no baseband
harmonics appear in the DC-link of a multiple three-phase
inverter system either.
The case of 0 = 30 deg is examined as an example in Figures
6 and 7, for systems with N = 2 and N = 3, respectively. The
value of c,opt and the maximum capacitor rms current for
each case are shown in Table 2. The results are the same for
0 = 90 deg.

0.2

0.4

0.6

0.8

Figure 7: Capacitor rms current versus c and M for threephase inverter system with N = 3, 0 = 30/90 deg.

N 0 (deg) c,opt (deg) max IC,rms|c,opt max IC,rms|0 Decr.

2 30/90
90
0.65
1.07
39.3%
3 30/90
60
0.78
1.51
48.3%
Table 2: Summary of results for the examined three-phase
inverter systems.
180
150
120
c,opt

Figure 6: Capacitor rms current versus c and M for threephase inverter system with N = 2, 0 = 30/90 deg.

IC,rms|0

90

Further investigation, regarding other values of 0, yields

different optimal phase shifts in the case of three-phase
inverter systems. Figure 8 illustrates how c,opt varies with 0
and plots the corresponding values of the maximum capacitor
rms current.

60

According to section 4.1 and Figures 5 and 8, a carrier phase

shift of approximately 90 deg is optimal, for both single and
three-phase inverter systems with N = 2. For systems with N
= 3, the optimal phase shift is 60 or 120 deg. It is therefore
indicated that these phase shifts affect certain carrier and
sideband harmonics similarly to the single-phase inverter
baseband harmonic, according to Equation (12). Other carrier
and sideband harmonics may be increased when using the
specific phase shifts. Nevertheless, the overall capacitor
current rms value is decreased. A mathematical analysis that
could theoretically examine this effect is beyond the scope of
the present study.

30

Max norm. rms current

30

60
0

90

120

1.5
1
0.5
IC,rms|

c,opt

30

60
0

IC,rms|0

90

120

Figure 8: Optimal carrier phase shift and maximum capacitor

rms currents IC,rms|c,opt and IC,rms|0 versus 0, for three-phase
inverter systems with N = 2 and N = 3 (bold lines).

5 Discussion
This section discusses a number of considerations regarding
the applicability of the outcomes from this study.
The first relates to the power factor of the inverter loads. A
power factor of 0.85 was assumed in section 4, and was used
as a constant throughout the study. The capacitor current of a
multi-inverter system was therefore treated as a function of
the inverter output current and modulation index, as well as of
the angles 0 and c. A preliminary investigation, however,
indicated that the optimal phase shifts and current rms values
are significantly different for low load power factors, below
0.5. The presented results are therefore valid when the
inverter systems are used as motor drives, but have to be
rederived in case of low power factor applications.
A second comment refers to the effect of the inverter
modulation strategy. The naturally sampled sine-triangle
strategy was assumed for this study because analytical
derivation of harmonic coefficients is intricate for other
modulation strategies. For these strategies, the harmonic
amplitudes can be calculated by numerical convolution of the
output phase voltage and current spectra, according to [5].
The effect of using a modulation strategy other than SPWM
on the presented results will depend on the degree of
resemblance between their two capacitor current spectra.
Furthermore, it was assumed that 0 is fixed, as it happens for
example in a multi-phase machine, and therefore the carrier
phase shift can be set to the corresponding c,opt. However,
there are applications where 0 varies with time. In such
cases, the carrier phase shift should be controlled to the
respective optimum value. On the other hand, if there is
freedom to select the value of 0, this should be done along
with c,opt, to minimize the capacitor rms current according to
Figures 5 and 8.
A final note refers to the physical layout of the studied
multiple inverter systems. It is well known that a lowinductance connection, typically a flat bus bar, should be
present between the DC-link capacitor and the switching
modules of an inverter. A common DC-link capacitor was
used in the examined multiple inverter systems, therefore
assuming that all inverters can be laid physically close (in the
same cabinet) to the capacitor and to each other.

6 Conclusions
This study investigated the effect of introducing a reference
or carrier waveform phase shift to multiple inverter systems
using a common DC-link capacitor. It was based on an
analytical derivation of the capacitor current harmonics and
the mathematical representation of introducing a
reference/carrier phase shift. The study covered single and
three-phase systems, comprising two (N = 2) or three (N = 3)
inverters. Regarding the single-phase inverter systems, it was
shown that for N = 2 and N = 3, a decrement in the capacitor
rms current of approximately 15% and 35%, respectively, can
be achieved by selecting an appropriate carrier phase shift for

each case. For three-phase inverter systems, the potential

decrements were in the order of 40% and 50%, respectively.
The results were verified by simulations using MATLABSimulink.

Acknowledgements
We would like to thank EPSRC and TSL Technology Ltd for
funding this research as part of a PhD studentship.

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