Advanced Logic Circuit

Boolean Algebra
A mathematical system that can be
used in simplifying logic expressions.
The logic expressions represent logic
circuits.
AND operation means multiplication in
Boolean algebra.
OR operation means addition in
boolean algebra.

Combinational Logic Design Principles

* Property of STI
Page 1 of 49

Advanced Logic Circuit

Boolean Algebra
A Boolean operator can be completely
described using a truth table.
The AND operator is also known as a
Boolean product. The OR operator is
the Boolean sum.

Truth table for the Boolean operators AND

and OR

Combinational Logic Design Principles

* Property of STI
Page 2 of 49

1 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
2 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Boolean Algebra
The NOT operation is most often
designated by an overbar.
It is sometimes indicated by a prime
mark ( ) or an elbow ().

Truth table for the Boolean NOT operator

Combinational Logic Design Principles

* Property of STI
Page 3 of 49

Advanced Logic Circuit

Boolean Algebra

Combinational Logic Design Principles

* Property of STI
Page 4 of 49

3 __________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
4 __________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Combinational Circuits
Combinations of gates implement
Boolean functions.
The circuit below implements the
function:

Combinational Logic Design Principles

* Property of STI
Page 5 of 49

Advanced Logic Circuit

Combinational Circuits

The three simplest gates are the AND,

OR, and NOT gates.

Combinational Logic Design Principles

* Property of STI
Page 6 of 49

5 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
6 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Combinational Circuits

NAND and NOR truth tables

Combinational Logic Design Principles

* Property of STI
Page 7 of 49

Advanced Logic Circuit

Combinational Circuits

Exclusive OR (XOR) gate

Combinational Logic Design Principles

* Property of STI
Page 8 of 49

7 __________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
8 __________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Minterms and Maxterms

Minterms

These are AND terms with every

variable present in either true or
complemented form.
Given that each binary variable may
appear normal (e.g., x) or
complemented (e.g., x ), there are 2n
minterms for n variables.
Thus there are four minterms of two
variables.

X Y
X Y
X Y
X Y

Example of Minterms

Combinational Logic Design Principles

* Property of STI
Page 9 of 49

Advanced Logic Circuit

Minterms and Maxterms

Maxterms

These are OR terms with every variable

in true or complemented form.
Given that each binary variable may
appear normal (e.g., x) or
complemented (e.g., x ), there are 2n
maxterms for n variables.
Example: Two variables (X and Y)
produce
2 x 2 = 4 combinations:
(both normal)
(x normal, y complemented)
(x complemented, y normal)
(both complemented)

XY
XY
XY
XY

Example of Maxterms

Combinational Logic Design Principles

* Property of STI
Page 10 of 49

9 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
10 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Minterms and Maxterms

Minterms and Maxterms for 2
variables

Two variable minterms and maxterms.

The minterm mi should evaluate to 1
for each combination of x and y.
The maxterm is the complement of the
minterm.

Combinational Logic Design Principles

* Property of STI
Page 11 of 49

Advanced Logic Circuit

Minterms and Maxterms

Minterms and Maxterms for 3

variables

Combinational Logic Design Principles

* Property of STI
Page 12 of 49

11 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
12 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Implementing
Combinational Logic
Circuit
Boolean expression logic circuit

For every Boolean expression there is a

logic circuit, and for every logic circuit
there is a Boolean expression

X AB CDE
X AB (CD EF )

X AB(CD EF ) ABCD ABEF

Whats the benefit?

Combinational Logic Design Principles

* Property of STI
Page 13 of 49

Advanced Logic Circuit

Implementing
Combinational Logic
Circuit

Combinational Logic Design Principles

* Property of STI
Page 14 of 49

13 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
14 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Implementing
Combinational Logic
Circuit
Steps in designing SOP logic circuit:
1.

2.

3.

Implement each Minterm in the logic

expression with an AND gate with the
same number of inputs as there are
variables in the Minterm. (i.e., AB = 2
input gate, ABC = 3 input gate, ABCD
= 4 input gate, etc.)
OR together the outputs of the AND
gates to produce the logic expression.
If necessary, gates can be cascaded to
create gates with more inputs.

Combinational Logic Design Principles

* Property of STI
Page 15 of 49

Advanced Logic Circuit

Implementing
Combinational Logic
Circuit
Example:

Design a Logic Circuit for the SOP logic

expression shown below.

F2 A B C D B C D A B

Combinational Logic Design Principles

* Property of STI
Page 16 of 49

15 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
16 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Implementing
Combinational Logic
Circuit

Steps in designing POS logic circuits:

1.

2.

3.

Implement each Maxterm in the logic

expression with an OR gate with the
same number of inputs as there are
variables in the Maxterm. (i.e., A+B = 2
input gate, A+B+C = 3 input gate,
A+B+C+D = 4 input gate, etc.)
AND together the outputs of the OR
gates to produce the logic expression.
If necessary, gates can be cascaded to
create gates with more inputs.

Combinational Logic Design Principles

* Property of STI
Page 17 of 49

Advanced Logic Circuit

Implementing
Combinational Logic
Circuit

F4 W X Y Z W X Y W Z

Combinational Logic Design Principles

* Property of STI
Page 18 of 49

17 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
18 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Sum-of-Minterm (SOM)
Sum-Of-Minterm (SOM) canonical
form:
Sum of minterms of entries that
evaluate to 1
Focus on the 1 entries

Combinational Logic Design Principles

* Property of STI
Page 19 of 49

Advanced Logic Circuit

Sum-of-Minterm (SOM)
Truth table logic circuit

Combinational Logic Design Principles

* Property of STI
Page 20 of 49

19 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
20 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Sum-of-Minterm (SOM)
Truth table logic circuit

Combinational Logic Design Principles

* Property of STI
Page 21 of 49

Advanced Logic Circuit

Product-of-Maxterm
(POM)
Product-Of-Maxterm (POM) canonical
form:
Product of maxterms of entries that
evaluate to 0

Combinational Logic Design Principles

* Property of STI
Page 22 of 49

21 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
22 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Product-of-Maxterm
(POM)

Conversion between canonical forms

Combinational Logic Design Principles

* Property of STI
Page 23 of 49

Advanced Logic Circuit

Combinational Circuit
Design
Procedures to be followed in designing
combinational circuit:
1.

2.

3.

4.

Determine the number of inputs and

outputs
Derive the truth table for the output
functions
Obtain simplified Boolean functions for
each output
Draw the logic diagram using gates
and verify the design (simulation,
manually)

Combinational Logic Design Principles

* Property of STI
Page 24 of 49

23 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
24 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Combinational Circuit
Design
Example:

Problem: Number-of-1s Counter

Design a circuit that counts the number
of 1s present on three inputs a,b,c and
outputs that number in binary using
two outputs, y and z.
abc=001 yz=01
abc=011 yz=10

Combinational Logic Design Principles

* Property of STI
Page 25 of 49

Advanced Logic Circuit

Combinational Circuit
Design

y=ac+bc+ab

z is an odd-function

Combinational Logic Design Principles

* Property of STI
Page 26 of 49

25 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
26 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Combinational Circuit
Design
Half Adder

Combinational Logic Design Principles

* Property of STI
Page 27 of 49

Advanced Logic Circuit

Combinational Circuit
Design
Full Adder

Combinational Logic Design Principles

* Property of STI
Page 28 of 49

27 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
28 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Combinational Circuit
Design
4-Bit Binary Adder

Combinational Logic Design Principles

* Property of STI
Page 29 of 49

Advanced Logic Circuit

Multi-level Logic
Circuits
Two circuit realizations can be used:

Minimum Sum-of-Products expressions

Minimum Product-of-Sums expressions

Both forms of Boolean expressions are

realized as two-level logic circuits

AND-OR circuit
OR-AND circuit

SOP
POS

There are a maximum of two logic

gates between every input and the
output(s).

Combinational Logic Design Principles

* Property of STI
Page 30 of 49

29 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
30 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Multi-level Logic
Circuits
A two-level logic circuit is usually
efficient for Boolean expressions of a
few variables.
As the number of inputs increases, a
two-level logic circuit may encounter in
fan-in problems.

Fan-in refers to the number of inputs to

a logic gate

Whether fan-in is an issue is

dependent upon the technology used
to implement the logic circuit.

Combinational Logic Design Principles

* Property of STI
Page 31 of 49

Advanced Logic Circuit

Multi-level Logic
Circuits
Universal Logic Gates

AND and OR Gates

2-input gates realized with 6 CMOS
transistors
3-input gates realized with 8 CMOS
transistors

NAND and NOR Gates

2-input gates realized with 4 CMOS
transistors
3-input gates realized with 6 CMOS
transistors

More cost efficient to design logic

circuits using NAND and NOR gates.

Combinational Logic Design Principles

* Property of STI
Page 32 of 49

31 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
32 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Multi-level Logic
Circuits
NAND and NOR gates

F = (ABC) = A + B + C

F = (A + B + C) = ABC

Combinational Logic Design Principles

* Property of STI
Page 33 of 49

Advanced Logic Circuit

Multi-level Logic
Circuits
NAND Gate

Any logic function can be realized using

only NAND gates.

Combinational Logic Design Principles

* Property of STI
Page 34 of 49

33 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
34 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Multi-level Logic
Circuits
NOR Gate

Any logic function can be realized using

only NOR gates. Consequently, it, too,
is said to be a functionally complete set
of gates.

Combinational Logic Design Principles

* Property of STI
Page 35 of 49

Advanced Logic Circuit

Multi-level Logic
Circuits
Design of Multi-level NAND Gate

Simplify the switching function to be

realized.
Design a multi-level circuit of AND and
OR gates.
The output gate must be an OR gate.
The gates must alternate: AND, OR,
AND, OR,

Number the levels starting with the

output gate.

Replace all gates with NAND gates,

leaving
interconnections
between gates unchanged.
Leave inputs to gates at levels 2, 4, 6,

unchanged; invert
literals that appear as inputs to
gates at levels 1, 3, 5,

The output gate is level 1.

Combinational Logic Design Principles

* Property of STI
Page 36 of 49

35 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
36 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Multi-level Logic
Circuits

Combinational Logic Design Principles

* Property of STI
Page 37 of 49

Advanced Logic Circuit

Multi-level Logic
Circuits
Design of Multi-level NOR Gate

Simplify the switching function to be

realized.
Design a multi-level circuit of AND and
OR gates.
The output gate must be an AND gate.
The gates must alternate: OR, AND, OR,
AND,

Number the levels starting with the

output gate.

Replace all gates with NOR gates,

leaving
interconnections
between gates unchanged.
Leave inputs to gates at levels 2, 4, 6,

unchanged; invert
literals that appear as inputs to
gates at levels 1, 3, 5,

The output gate is level 1.

Combinational Logic Design Principles

* Property of STI
Page 38 of 49

37 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
38 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Multi-level Logic
Circuits

Combinational Logic Design Principles

* Property of STI
Page 39 of 49

Advanced Logic Circuit

Exclusive OR and
Exclusive NOR
The eXclusive-OR (XOR) function is an
important Boolean function used
extensively in logic circuits
The XOR function may be:

Implemented directly as an electronic

circuit (true gate)
Implemented by interconnecting other
gate types (XOR is used as a convenient
representation)

The eXclusive-NOR (XNOR) function is

the complement of the XOR function

XOR and XNOR gates are complex

gates

Combinational Logic Design Principles

* Property of STI
Page 40 of 49

39 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
40 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Exclusive OR and
Exclusive NOR
XOR

XNOR

X Y

XY

X Y

XY

0 0

0 0

0 1

0 1

1 0

1 0

1 1

XOR Symbol

Combinational Logic Design Principles

1 1

1
XNOR Symbol

* Property of STI
Page 41 of 49

Advanced Logic Circuit

Parity Generators and

Checkers
A parity bit added to n-bit code
produces (n+1)-bit code with an odd
(or even) count of 1s
Odd Parity bit: count of 1s in (n+1)-bit
code is odd
So use an even function to generate
the odd parity bit
Even Parity bit: count of 1s in (n+1)-bit
code is even
So use an odd function to generate the
even parity bit
To check for odd parity
Use an even function to check the
(n+1)-bit code
To check for even parity
Use an odd function to check the
(n+1)-bit code

Combinational Logic Design Principles

* Property of STI
Page 42 of 49

41 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
42 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Parity Generators and

Checkers
n-bit
code Parity

(n+1)-bit
code

Generator

Parity
Checker

Sender

Error
Receiver

Problem: Design an even parity generator

and checker for 3-bit codes
Solution:

Use 3-bit odd function to generate even

parity bit
Use 4-bit odd function to check
for
errors in even parity codes

Operation:

(X,Y,Z) = (0,0,1) gives

(X,Y,Z,P) =
(0,0,1,1) and E = 0
If Y changes from 0 to 1 between generator
and checker, then E = 1 indicates an error
X

Y
E

Y
P

Z
P

Combinational Logic Design Principles

* Property of STI
Page 43 of 49

Advanced Logic Circuit

Karnaugh Maps
K-Maps are a convenient way to
simplify Boolean Expressions.
They can be used for up to 4 or 5
variables.
They are a visual representation of a
truth table.
Expression are most commonly
expressed in sum of products form.

Combinational Logic Design Principles

* Property of STI
Page 44 of 49

43 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
44 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Karnaugh Maps
Truth Table to Kmaps

AB P
00 1
01 1
10 0
11 1

B
A

0 1

Combinational Logic Design Principles

* Property of STI
Page 45 of 49

Advanced Logic Circuit

Karnaugh Maps
K-Maps

Adjacent 1s can be paired off

Any variable which is both a 1 and a
zero in this pairing can be eliminated
Pairs may be adjacent horizontally or
vertically

a pair

B
A 0
0 1
1

Combinational Logic Design Principles

1
1
1

another
pair

* Property of STI
Page 46 of 49

45 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
46 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Karnaugh Maps
Grouping the Pairs

BC
A 00 01 11 10

1 1

Combinational Logic Design Principles

* Property of STI
Page 47 of 49

Advanced Logic Circuit

Karnaugh Maps
Groups of 4

Groups of 4 in a block can be used to

eliminate two variables:

B 0 0 1 1
C 0 1 1 0
A
0
1 1
1
1 1
The solution is B because it is a 1 over the whole block
(vertical pairs) = BC + BC = B(C + C) = B.
Combinational Logic Design Principles

* Property of STI
Page 48 of 49

47 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
48 _________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________

Advanced Logic Circuit

Karnaugh Maps
Dont Care State

Sometimes in a truth table it does not

matter if the output is a zero or a one
Traditionally marked with an x.
We can use these as 1s if it helps.

A 0 0 1 1
B 0 1 1 0
C
0
1 1
1 x x 1
Combinational Logic Design Principles

* Property of STI
Page 49 of 49

49 ________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________
___________________