Poornima Group of Colleges, Jaipur

Session: 2013-14 (ODD Sem.)

Name of College: Poornima College of Engineering

Department of : Computer Science

Zero Lecture
Name of Faculty: Dr. Ajay Khunteta

Branch: Computer Science

1). Name of Subject with Code: COMPUTER ARCHITECTURE Code: 5CS01

2). Self-Introduction:
a). Name: Dr. Ajay Khunteta
b). Qualification : Ph.D.
c). Designation: Professor
d). Research Area: Distributed Systems
e). E-mail Id: khutetaajay@poornima.org
f). Other details: Information about areas of proficiency/ expertise such as subject taught, laboratory
taken:
Subject taught: DSA, ADS, DAA, RTS, Compiler Design, LFP, ISS, TOC etc.
Lab: X-windows, DSA, C, Network etc.
3). Introduction of Students: Students can learn the subject easily many real life examples are included
in this students are interesting in learning new ideas, they are highly interested in learning practical topics
and case studies.
a). Identifying and keeping records of students
b). Achievement of students in previous years

S. No.

POORNIMA COLLEGE OF ENGINEERING, JAIPUR

RESULT (LAST THREE YEARS)
Sub. Code
Sub Name
Sec
% Result

SESSION

5CS01

Computer
Architecture

93.06

09-10-ODD

5CS01

Computer
Architecture

93.06

09-10-ODD

5CS01

Computer
Architecture

92.65

10-11-ODD

5CS01

Computer
Architecture

82.61

10-11-ODD

4). Instructional Language: - 60% English; 40% Hindi (English not less than 60%)
5). Introduction to subject: - Computer Architecture is the coordination of abstract levels of a
processor under changing forces, involving design, measurement and evaluation. It also includes the
overall fundamental working principle of the internal logical structure of a computer system.

a). Relevance to Branch: Computer Architecture deals with the structures and behavior of the various
functional modules of the computer and how they interact to provide the provide the processing needs of
the user. Thus it is a basic need of a computer engineering student to understand the computer
organization & design.
b). Relevance to Society: Computer Architecture is very important in yielding performance biased
products. For an example, if you are a software engineer and you are working on a project, you need to
know the processing ability of the target processors. If it is some old processors, you need to optimize
your software in order to gain the most possible outcome from those processors while keeping the
performance indicators intact.
Further, if you are in to developing utility software; say multimedia decoder, you should know what
would make the best use of the processor and place that in to the right section. You need to know the
cache inefficiencies n the traffic flow that occurs and have to mitigate it in order to optimize the
performance it. Further, if you know enough about the architecture to dip into design, then you can
design and enhance the architecture in order to work best with the implied project.
Another important use of knowing how the internal systems work is in making a buying decision. Say
you are the techie of a company and it needs you to buy products for a specific task. The processor you
are going to buy should be cost effective as well as performance biased for that task. In order to do that as
their engineer, you need a thorough understanding of the architecture of the processor and in which way
they would facilitate the implementation of the required program. For an example, some processors have
internal circuitry that makes them perform better than other chips running at the same clock speed in
certain specific tasks while they outperform the latter by a considerable margin in other processes.
Sometimes certain tasks need additional components in the processor as well; for an example, to
implement a virtual system, a processor needs a special feature called VT to perform the real time tasks
efficiently and with 100% speed as if it were performed in the real system which has become a trend
dealing with security issues. Thus you need to analyse it in a cost beneficial way and choose what should
be the best for the company. Further, you may have to consider the power consumption and the area cost
of the processor as well which is governed by its architecture. A person who is competent in Computer
Architecture would be able to perform this task efficiently.
Even as an average buyer, you can still make your buying decision is the most cost-and-performance
effective way. For an example, as an average user, buying a 64-bit processor would not add much benefit
compared to its cost. You can go for that if that is task specific and is essential.
c). Relevance to Self: CA Introduces the underlying working principles of electronic computers. The organization and
architecture of computer components are discussed. The course expounds on details of memory
hierarchy, I/O organization, computer arithmetic, processor and control unit design, instruction set
architecture, instruction-level parallelism, and the ways functional components interact together.
Upon successful completion of the course, the student will be able to:
1. Explain the importance of studying computer architecture.
2. Evaluate various trade-offs while designing a computer system.
3. Describe how various computer components interact in order to exchange information.
4. Explain the need for the use of memory hierarchy (cache, main memory, storage devices) to ensure the
design of a balanced computer system.
5. Describe how I/O systems work.
6. Discuss the relationship between the design of a computer system and the design of an operating
system to operate it.

7. Describe the fundamental principles of CPU and control unit design.

8. Evaluate various trade-offs in designing the instruction set architecture.
9. Design fast ALU circuitry.
10. Identify and evaluate various techniques for improving contemporary processor performance.
d). Relation with laboratory: Computer architecture lab is designed according to RTU syllabus in which
assembly programming is done on PCSPIM simulator which has a relevant relation to the computer
architecture subject.
e). Connection with previous year and next year: In last year you have studied microprocessor and digital
electronics subjects whose concepts can be utilized in many topics of computer architecture. The
concepts & knowledge of computer architecture subject will be utilized in next year subjects such as
Advanced Computer Architecture, Distributed system.
6). Syllabus of Rajasthan Technical University, Kota
a). Index Terms/ Key Words: Index Terms/ Key Words: RTL( Register transfer language) , Booth's
algorithm, Addressing Modes, Instruction Formats.
b). RTU Syllabus with Name of Subject & Code: COMPUTER ARCHITECTURE 5CS1
Units

II

III
IV
V

Contents of the subject

Introduction to Computer Architecture and Organization. Von Neumann Architecture,
Flynn Classification. Register Transfer and Micro operations: Register transfer
language, Arithmetic Micro-operations, Logic Micro-operations, Shift Microoperations, Bus and memory transfers. Computer Organization and Design: Instruction
cycle, computer registers, common bus system, computer instructions, addressing
modes, design of a basic computer
Central Processing Unit: General register organization, stack organization, Instruction
formats, Data transfer and manipulation, program control. RISC, CISC characteristics.
Pipeline and Vector processing: Pipeline structure, speedup, efficiency, throughput and
bottlenecks. Arithmetic pipeline and Instruction pipeline.
Computer Arithmetic: Adder, Ripple carry Adder, carry look Ahead Adder,
Multiplication: Add and Shift, Array multiplier and Booth Multiplier, Division:
restoring and Non-restoring Techniques. Floating Point Arithmetic: Floating point
representation, Add, Subtract, Multiplication, Division.
Memory Organization: RAM ROM, Memory Hierarchy, Organization, Associative
memory, Cache memory, and Virtual memory: Paging and Segmentation.
Input-Output Organization: Input-Output Interface, Modes of Transfer, Priority
Interrupt, DMA, IOP processor.

c). ABC analysis (RGB method) of unit & topics

Units

II

Contents of the subject

Introduction to Computer Architecture and Organization. Von Neumann Architecture,
Flynn Classification. Register Transfer and Micro operations: Register transfer
language, Arithmetic Micro-operations, Logic Micro-operations, Shift Micro
operations, Bus and memory transfers. Computer Organization and Design: Instruction
cycle, Computer registers, Common bus system, computer instructions, addressing
modes, design of a basic computer
Central Processing Unit: General register organization, stack organization, Instruction
formats, Data transfer and manipulation, program control. RISC, CISC characteristics.

Pipeline and Vector processing: Pipeline structure, speedup, efficiency, throughput and
bottlenecks. Arithmetic pipeline and Instruction pipeline.

III

Computer Arithmetic: Adder, Ripple carry Adder, Carry look Ahead Adder,
Multiplication: Add and Shift, Array multiplier and Booth Multiplier, Division:
restoring and Non-restoring Techniques. Floating Point Arithmetic: Floating point
representation, Add, Subtract, Multiplication, Division.

IV

Memory Organization: RAM, ROM, Memory Hierarchy, Organization, Associative

memory, Cache memory, and Virtual memory: Paging and Segmentation.

Input-Output Organization: Input-Output Interface, Modes of Transfer, Priority

Interrupt, DMA, IOP processor.

7). Books/ Website/Journals & Handbooks/ Association & Institution:

a). Recommended Text & Reference Books and Websites:
S.
Title of Book
Authors
No.
Text Books
T1 Computer
architecture
and Hwang & briggs
parallel processing
T2 Computer
organization
& William stallings
architecture
T3 Computer System Architecture
M. Morris mano
Reference Books
R1 Computer
Organization
Architecture
R2
R3

and William Stallings

Computer
Organization
and John P. Hayes
Architecture
Computer Organization
V. Carl. Hamacher

Publisher

Cost (Rs.)

No. of books
in Library

TMH
PHI
Pearson
Prentice
Pearson
Education
Asia
McGraw
-Hill
McGrawHill

Websites related to subject

1
2

http://forum.jntuworld.com/showthread.php?10191-Advanced-Computer-Architecture(ACA)-Study-Material-Notes
http://forum.jntuworld.com/showthread.php?10191-Advanced-Computer-Architecture(ACA)-Study-Material-Notes

b). Journals & Handbooks: - To give information about different Journals & Handbooks available in
library related to the subject and branch.
c). Associations and Institutions: - To give information about different Associations and Institutions
related to the subject and branch.
8). Syllabus Deployment: a). Total weeks available for academics (excluding exams/ holidays) as per PGC calendarSemester
I
III
V
VII
No. of Working days available(Approx.)
52
52
52
52
No. of Weeks (Approx.)
13
13
113
13
Total weeks available for covering RTU syllabus- 10-11 weeks (Approx.)

 Total weeks available for special activities (as mentioned below)- 02 weeks (Approx.)
Note: Individual faculty must calculate the exact no. of lectures available according to time table
etc. after consultation with HOD.
b). Special Activities (To be approved by HOD, Dean & Campus Director & must be mentioned in
deployment):

Open Book Test- Once in a semester

Quiz (50% Technical & 50% Aptitude)- Once in a semester
Special Lectures (SPL)- 10% of total no. of lectures including following
i. One PPT by the faculty, who is teaching the subject
ii. SPL by expert faculty at PGC level
iii.
SPL by expert from industry/academia (other institution)
Revision classes:- 1 to 3 turn at the end of semester (Before II Mid Term Exam)
Solving Important Question Bank- 1 Turn before I & II Mid Term Exam (each) - Total Two turn.

c). Lecture schedule per week

i). University scheme (L+T+P) = 3+1/0+0
ii). PGC scheme (L+T+P) = 3/4+1/0+0
Sr.
No.

Name of Unit

No. of
lectures

Broad Area

Degree of
difficulty
(High/Medium/
Low)

No. of
Question in
RTU Exam.

Text/ Reference
books

Introduction to Computer
Architecture
and
Organization,
Register
Transfer
and
Micro
operations
Computer
Organization & Design

14

Introduction to CA and
Organization: It deals
with
the
processor
registers, read write
operations on registers.

Normal to
Hard

M. Moris Mano,
William Stallings
John P. Hayes

II

Central Processing Unit

RISC CISC Characteristics
Pipeline
and
Vector
Processing

12

CPU,
Pipeline
and
Vector
Processing:
various
instruction
formats and addressing
Modes. Pipelining &
various CPU operations

Normal to
Hard

William
M. MorisStallings
Mano
William Stallings
Hwang & Briggs

III

Computer Arithmetic

12

Computer
Arithmetic:
Various
arithmetic
operations performed by
ALU

Hard

M. Moris Mano

IV

Memory Organization

12

Easy
to
Normal

M. Moris Mano

Input Output Organization

12

Memory
Arithmetic:
Memory Hierarchy and
Organization,
Associative
Memory,
Cache Memory
I/O Organization: Input
Output Interface, Modes
of Transfer, Priority
Interrupt, DMA , IOP

Easy
to
Normal

M. Moris Mano

d). Introduction & Conclusion: Each subject, unit and topic shall start with introduction & close with
conclusion. In case of the subject, it is Zero lecture.
e). Time Distribution in lecture class: - Time allotted: 60 min.
First 5 min. should be utilized for paying attention towards students who were absent for last lecture
or continuously absent for many days + taking attendance by calling the names of the students and
also sharing any new/relevant information.
ii.
Actual lecture delivery should be of 50 min.
i.

iii.
iv.
v.

Last 5 min. should be utilized by recapping/ conclusion of the topic. Providing brief introduction of
the coming up lecture and suggesting portion to read.
After completion of any Unit/Chapter a short quiz should be organized.
During lecture student should be encouraged to ask the question.

9). Tutorial: - An essential component of Teaching- Learning process in Professional Education.

Objective: - To enhance the recall mechanism.
To promote logical reasoning and thinking of the students.
To interact personally to the students for improve numerical solving ability.
a). Tutorial processing: - Tutorial sheet shall be provided to each students
Ist Phase: - It is consisting of questions to be solved in the class assignment session in test mode on
perforated sheet given in tutorial notebook and to be collected & kept by respective faculty for
review & analysis (20 minutes).
IInd Phase: - Indicating/Initializing the weak issues/ drawback and Evaluating and providing the
grade. Making a group with good student for assisting the weak students to explain/solve questions
by every student on plain papers given in tutorial note book (20 minutes).
IIIrd Phase: - Solving/ explaining difficulties of lecture class and providing the new home assignment
(20 minutes). To be done in tutorial note book.
b). Home assignment shall comprise of two parts:
Part (i) Minimum essential questions, which are to be solved and submitted by all with in specified
due date.
Part (ii) Other important questions, which may also be solved and submitted for examining and
guidance by teacher.
10). Examination Systems:
Sr.
No.

Name of the Exam

Max.
Marks

1.
2.
3.

Ist Mid Term Exam

40
IInd Mid Term Exam 40
University
(End) 80
Term Exam

% of passing
marks

Nature of paper
Theory + Numerical

40%
40%
30%

Theory + numerical

Syllabus coverage
(in %)

60%
40%
Theory + numerical 100%
Theory

Conducted
by

PCE
PCE
RTU

11). Any other important point:

Place & Date:

Jaipur
10-07-2013

Name of Faculty with Designation

Dr. Ajay Khunteta
Professor