18 Power Amplifiers

EERF 6330- RF IC Design
Power Amplifiers
Prof. Bhaskar Banerjee
Bhaskar Banerjee, EERF 6330, Sp2013, UTD
Power Amplifier
What is a Power Amplifier (PA)?
The final stage of amplification in a transmitter
Needs to drive a large power into an antenna.
Basic Amplifier
RFC
Matching
N/W
X
vin
M1
RL
Voltage-Swing at X: 2Vdd (Inductor allows for that swing)

dc Stress for M1
Large Signal Impedance Matching
Conjugate Matching?
Even if it worked ~ 50% efficiency!
Figure-Of-Merits
Efficiency
Drain efficiency ()
Power Added Efficiency (PAE)
IDC
PRFin
VDC
PA
PRFout
Figure-Of-Merits
Linearity
AM-AM distortion (Gain compression)
AM-PM distortion
PA
Figure-Of-Merits
Linearity
AM-AM distortion (Gain compression)
IP1dB: Input P1dB
OP1dB: Output P1dB
Psat: Saturation power
Pout(dB)
Psat
OP1dB
1dB
IP1dB
Pin(dB)
6
Figure-Of-Merits
Linearity
Spectral regrowth
Adjacent Channel Power or Leakage Ratio (ACPR/ACLR)
ACPR
Figure-Of-Merits
Linearity
Spectral regrowth in CDMA
Adjacent Channel Power Ratio (ACPR)
Figure-Of-Merits
Linearity
Constellation distortion
Error Vector Magnitude (EVM)
Used to determine errors and their cause
Measured Vector Reference Vector = Error Vector
Measured = Actual signal magnitude and phase
Reference = Ideal signal based on knowledge of data
(ie. bit rate, number of symbols, filtering, etc.)
Serror
Sideal
Trade-off: Efficiency and Linearity

Efficiency improves with drive level, highest when the gain is
several dB compressed
Gain compression, phase distortion, and inter-modulation
cause the bandwidth limited signal to distort and spill over into
adjacent channels, resulting in spectral regrowth and increase
in EVM
10
Power Performance Measurement

Load-pull and Source-pull system configuration
Tuner for Source-pull
Tuner for load-pull
11

Load-pull and Source-pull measurement
Finding optimum load and source impedances for..
maximum power gain
maximum output power
maximum PAE
minimum ACPR
Varying the impedances seen by the Device Under Test
(DUT) with tuners and measures its performance
12

Contours with constant gain, output power, PAE, or ACPR
with specified step values
Contours can be overlapped to find the optimum impedance
region to meet the multiple specifications
Optimum impedance region
Constant gain contours
Constant PAE contours

Overlap of
constant gain and
PAE contours
13

Measurement example
Load-pull measurement
Constant output power contours to find maximum output power
impedance region
S22* = Small Signal Conjugate

Output Impedance
14

Measurement example
Load-pull measurement
Constant output power contours to find maximum output power
impedance region
S22* = Small Signal Conjugate

Output Impedance
15
Amplifier Classification
Class of operation
The manner in which transistors are operated or biased
Output current waveform when the input is applied
Non-switch mode amplifiers (Conduction Angle based )
Power transistors behave as current sources

Linearity and efficiency are trade-off
Class A, B, AB, C
Conduction angle = (fraction of a cycle the transistor is turned
on) 360
Switch mode amplifiers (Harmonic Termination based)
Power transistors behave as switches

100% efficiency can be achieved in theory
Nonlinear
Class D (switch mode), E (switching), F (harmonically
terminated).
16
Non-switch mode amplifiers (Conduction angle based)
Class A :
The device conducts current during the entire cycle of the
input waveform (conduction angle is 360 degrees)
Class B :
The device conducts current during the half of the cycle of the
input waveform (conduction angle is 180 degrees)
Class AB :
The device conducts current more than half but less than the
entire cycle of the input waveform (conduction angle is
180-360 degrees)
Class C :
The device conducts current less than half of the cycle of the
input waveform (conduction angle is 0-180 degrees)
*Conduction angle: the portion of the input cycle for which the
transistor conducts and an output current flows.
17
Class operation
Class A
IDS
IDS
IDS
VGS=0
Im
VGS
Im
VGS=VP
2VP
Vk
VP
VDD
VDSmax
VGS
VDS
Q
P
2P
VDS
2P
18
Class operation
Class B
IDS
IDS
IDS
VGS=0
Im
VGS
Im
VGS=VP
2VP
Vk
VP
VDD
VDSmax
VGS
VDS
Q
P
2P
VDS
2P
19
Class operation
Class AB
IDS
IDS
IDS
VGS=0
Im
VGS
Im
VGS=VP
2VP
Vk
VP
VDD
VDSmax
VGS
VDS
Q
P
2P
VDS
2P
20
Class operation
Class C
IDS
IDS
IDS
VGS=0
Im
VGS
Im
VGS=VP
2VP
Vk
VP
VDD
VDSmax
VGS
VDS
Q
P
2P
VDS
2P
21
Non-switch mode amplifiers
Voltage and Current at the output
VD
VD
VD
t
ID
t
ID
ID
Class A
Class B
Class C
22
Class A Operation
similar to small-signal but on steroids!
23
Class A Operation
similar to small-signal but on steroids!
iD = IDC + irf sin
v0 =
Prf
irf R sin
0t
0t
i2rf R
=
2
IDC = irf =) PDC = IDC VDD = irf VDD

Drain efficiency,
i2rf /2R
Prf
irf R
=
=
=
PDC
irf VDD
2VDD
Maximum value of irf R is VDD =)

max
1
= 50%
2
24
Class B Operation
Bias is arranged to shut off the output device for half of every
cycle. (duty cycle = 50%).
25
Class B Operation
non linearity (not in terms of input-output waveforms, but in
terms of input-output power proportionality).
iD = irf sin 0 t for iD > 0.
if und
2 TR/2
=
irf (sin
T 0
vout
irf
0 t)(sin 0 t) dt =
2
irf
R sin
2
0t
2VDD
R
2
VDD
=
2R
vout,max = VDD =) irf,max =

Pout
iD
vo2
=
=) Pout,max
2R
2
1 R T /2 2VDD
2VDD
2VDD
=
sin 0 tdt =
=) PDC =
T 0
R
R
R
Pout,max
) =
= 0.785 = 78.5%
PDC
4
26
Class C Operation
Bias is arranged to shut off the output device for more than
half of every cycle. (duty cycle < 50%).
Maximum efficiency ~ 100% (when it is always off!)
27
Non-switch mode amplifiers
Trade-off between Efficiency and Linearity
Conduction angle = (fraction of a cycle the transistor is turned on) 360

Efficiency =
output RF power
DC power
28
Influence of conduction angel
29
Harmonics
Idc
Imax 2sin( /2)

cos( /2)
=
2
1 cos( /2)
Imax
I1 =
2 1
In =
Imax
(1 cos( /2))
1
n
sin(n
1)
sin
cos( /2)
2
1
cos( /2)sin(n /2) +
sin(n + 1)
n
n+1
2
30
Influence of conduction angle
Fundamental
Imax
Amplitude
DC
Imax/
2nd
2
3rd
4th
Conduction Angle
31
Summary
32
Class A PA Example
Frequency = 1 GHz, POUT = 1 W into a 50 load, Vdd = 3.3 V
Pmax
2
VDD
(3.3)2
=
=
0.1 W
2R
2 50
Hence for 1 W power we need impedance transformation
Rmax
2
VDD
(3.3)2
=
=
5.4
2Pmax
21
In practice, R would be less than this (~ 4 ), and hence, bias
current:
IDC
VDD
=
= 825 mA
R
Ipeak = 2 IDC = 1.65 A
Pout
1W
=
=
37%
PDC
0.825 A 3.3 V
33
Class A PA Example
When such a large current flows through a transistor, Ron becomes
critical.
Can lose say 200 mV => Ron < 200 m

Transistor width ~ several mm
Also, = 37%, hence 1 W output power => 1.7 W dissipated
Packaging and Heat Sink becomes very critical!
Class A - if input drive = 0 ; Power dissipated = 2.7 W!
Design for worst case
Use adaptive bias1
1 A. Saleh, and D. Cox, IEEE Trans. Microw. Theory Tech., v. 31, no. 1, Jan 1983, pp. 51-56.
34
Class A Example
VDD
Id
RFC
vOUT
vin
DC Block
RL = 50
L
35
Class A Example
Output Filter is a simple parallel LC
BW = 100 MHz, f0 = 1 GHz => Q = 10
One solution is XL = XC = 5
5
XL = 5 => L =
= 0.8 nH
2 1 GHz
1
XC = 5 => C =
= 31.8 pF
5 2 1 GHz
RFC should be at least 10-15 times larger than R (4 )
RFC > 6.4 nH
Also need matching network to transform 50 to 4
L-matching network
36
Class A Example
Transformation ratio (50/4) sets the Q = 3.5
L-matching n/w:
RL
50
L1 =
2.3 nH
9
0 Q
2 10 3.5
1
1
C1 =
11.7 pF
9
0 QRS
2 10 3.5 4
Combine these values with the filter L and C values
37
Class A Example
3.3 V
825 mA
>6.4 nH
vOUT
vin
11.7 pF
RL = 50
0.6 nH
32 pF
38
Class A Example
3.3 V
Ibias/n
825 mA
vin
>6.4 nH
vOUT
11.7 pF
RL = 50
A/n
0.6 nH
32 pF
39
3 Stage PA Configurations
Matching
Network
On-Chip
Off-Chip
3 dBm
Matching
Network
Matching
Network
Self-Bias
Indep. Bias
Self-Bias
Indep. Bias
Self-Bias
Indep. Bias
Class of
Operation
Class of
Operation
Class of
Operation
Device
Size:40/32
12 dB Gain
15 dBm
Device
Size: 40
9 dB Gain
24 dBm
Device
Size: 160
Matching
Network
On-Chip
Off-Chip
30 dBm
Push-Pull
Single Device
6 dB Gain
40
Addressing Vds(Vce),Vdg(Vcb) Breakdown

Methods to overcome voltage breakdown
Decrease effective output resistance by increasing current
Distribution of the power output over multiple devices.
Cascode design
Stacked power amplifier
Balanced power amplifier
Power Combining
41
CMOS Power Amplifier
Power Amplifiers in RF transmitters

Consume Most of Power in Transmission Mode
Linearity
Cost
Cost Reduction Strategy

Silicon-Based Technology
High levels of Integration
42
Issues in CMOS PA Design

Transistor Characteristics
Low Breakdown Voltage
High Knee Voltage
Passive Component
Lossy Si substrate
Thin Metal Layers
43
CMOS PA Example
Power combining with transformers
ref: Aoki, et. al., JSSC 2002, vol. 37, no. 3.

44
CMOS PA Example
45

18 Power Amplifiers

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EERF 6330- RF IC Design

Prof. Bhaskar Banerjee

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Voltage-Swing at X: 2Vdd (Inductor allows for that swing)

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Trade-off: Efficiency and Linearity

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Power Performance Measurement

Tuner for Source-pull

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Tuner for load-pull

Power Performance Measurement

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Power Performance Measurement

Optimum impedance region

Constant gain contours

Constant PAE contours

Power Performance Measurement

S22* = Small Signal Conjugate

Power Performance Measurement

S22* = Small Signal Conjugate

Non-switch mode amplifiers (Conduction Angle based )

Power transistors behave as current sources

Switch mode amplifiers (Harmonic Termination based)

Power transistors behave as switches

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

IDC = irf =) PDC = IDC VDD = irf VDD

Maximum value of irf R is VDD =)

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

vout,max = VDD =) irf,max =

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Conduction angle = (fraction of a cycle the transistor is turned on) 360

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Imax 2sin( /2)

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Hence for 1 W power we need impedance transformation

In practice, R would be less than this (~ 4 ), and hence, bias

Ipeak = 2 IDC = 1.65 A

Can lose say 200 mV => Ron < 200 m

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

Addressing Vds(Vce),Vdg(Vcb) Breakdown

Bhaskar Banerjee, EERF 6330, Sp2013, UTD

CMOS Power Amplifier

Power Amplifiers in RF transmitters

Cost Reduction Strategy

Bhaskar Banerjee, EERF 6330, Sp2013, UTD