DIGITAL VLSI DESIGN

Contact Hours/ Week :

3 +2+0 (L+T+P)

Total Lecture Hours

39

CIE Marks : 50

Total Tutorial Hours :

26

SEE Marks : 50

Sub. Code

IT71

Credits : 4.0

Module-I
Introduction: Introduction, Abstraction levels in Digital IC Design, VLSI Design
Flow: FPGA and ASIC Design Flow, VLSI Design Styles: Full Custom Design,
Standard cell based design and FPGA based design, Fabrication process flow,
CMOS n-well process, Layout Design rules.
MOS Transistor: Metal Oxide Semiconductor Structure, MOS System under
external bias, Structure and Operation of MOSFET.
8+5 Hours
Module-II
MOS Transistor: MOSFET Current Voltage Characteristics, MOSFET
Capacitances, Scaling the MOSFET.
MOS Inverters: Introduction, Resistive load inverter, Inverter with n-type
MOSFET Load, Static CMOS Inverter an Intuitive perspective, Static
Characteristics of CMOS inverter: Switching threshold, Noise Margin, Device
variations, Dynamic Characteristics of CMOS inverter: Propagation delay from
a design perspective, BiCMOS Inverters, Latch-up in CMOS circuits.
8+5 Hours
Module-III
Designing Combinational Logic gates in CMOS: Introduction, Static CMOS
Design style: Complementary CMOS, Ratioed logic, Pass Transistor Logic,
Dynamic CMOS Design Style: Dynamic Logic Basic Principles, Speed and
power dissipation of Dynamic Logic, Issues in Dynamic Design, Cascading
Dynamic Gates.
Designing Sequential Logic Circuits: Introduction: Timing metrics for
sequential circuits, Classification of Memory elements, Static Latches and
Registers: The Bistability principle, SR Flip-Flops, Multiplexer based latches,
Master slave edge triggered registers.
8+5 Hours
Module-IV
Designing Sequential Logic Circuits: Dynamic Latches and Registers:
Dynamic Transmission gate edge triggered registers, Clock skew and its effect
on registers, C2MOS A Clock skew insensitive approach, Pipelining: An
approach to optimize sequential circuits.
Designing Arithmetic Building Blocks: Adder: Binary Adder, Full Adder
Circuit Design Consideration: Static Full Adder Circuit, Mirror Adder,
Transmission gate based full adder, Manchester Carry chain, Binary Adder
Logic Design Consideration: Carry Bypass Adder, Linear Carry select Adder,
Square root Carry select adder, 4-bit Monolithic Carry Look-ahead adder, Array
Multiplier, Multiplier using Carry save addition, Wallace tree Multiplier, Barrel
Shifter.
8+6 Hours

Module-V
Semiconductor Memories: Introduction, Memory Classification, Memory
Architecture and Building Blocks, Dynamic Random Access Memory (DRAM),
Static Random Access Memory (SRAM), Read only Memories, Non Volatile Read
write Memories, Memory Peripheral Circuitry: Address Decoders, Sense
Amplifiers.
7+5 Hours
Text Book:
1. Digital Integrated Circuit A Design Perspective by Jan M Rabaey, Anantha
Chandrakasan, Borivoje Nikolic 2nd Edition PHI.
Reference Book:
1. CMOS Digital Integrated Circuits Analysis and Design by Sung-Mo Kang
and Yusuf Leblebici Third Edition, TMH publications
2. Microelectronics by Sedra and smith
3. Basic VLSI Design by Douglas A Pucknell and Kamran Eshraghian.

INDUSTRIAL CONTROL SYSTEMS & AUTOMATION

Contact Hours/ Week :

4 +0+0 (L+T+P)

Total Lecture Hours

52

Total Tutorial Hours :

Sub. Code

IT73

Credits : 4.0
CIE Marks : 50
SEE Marks : 50

Module I
Introduction to programmable logic controllers:
PLC hardware components: Input status file, output status file, I/O modules
addressing, analog I/O modules, PLC memory.
Input modules: Discrete AC input module, DC input modules.
Output modules: Discrete output modules, solid state output module
switching, TTL output modules, relay output modules, module selection
considerations, choosing the proper output module, isolated output modules,
surge suppression, emergency-stop switches and plc applications, I/O modules
in hazardous locations.
Fundamentals of logic: The binary concept, AND, OR and NOT functions,
Boolean algebra, developing circuits from Boolean expressions, producing the
Boolean equation from a given circuit, priority of logic hardwired logic versus
programming logic.
12 Hours
Module II
Relay-type instructions: Internal relay instructions normally open and
normally closed instructions, output latching instructions, one shot

instructions, negated output instruction, interfacing start stop pushbutton and

motor to plc, developing ladder diagram with analytical problems.
Timer instructions: Mechanical timing relay, timer instruction, on delay and
off delay and retentive timer instructions, cascading timers. Developing ladder
diagram with analytical problems.
Counter instructions: Counter instructions, PLC counter up and down
instructions, cascading counters, combining counters and timers. Developing
ladder diagram with analytical problems.
10 Hours
Module III
Comparison, data handling and sequencer instructions: Comparison
instructions, data handling instructions, sequencer instructions, programming
sequence output instructions, developing ladder diagram with analytical
treatment.
Program flow instructions: Subroutines - jump to subroutine instruction,
subroutine file, conditioned return in subroutine, nested subroutines, jump to
label instruction multiple jumps to same label, rung operation within a jump
zone, immediate input with mask instruction, refresh instruction, master
control reset instruction.
Math
instructions:
Addition
instruction,
subtraction
instruction,
multiplication instruction, division instruction, other word-level math
instructions, file arithmetic operations.
Shift register instructions: Shift registers and word shift registers.
10 Hours
Module IV
SCADA systems, hardware and software: Introduction and brief history of
SCADA - Fundamental principles of modern SCADA systems - SCADA
hardware - SCADA software - Modem use in SCADA systems- DCS concepts as
LAN of PLCs, Comparison of the terms SCADA, DCS, PLC and smart
instrument - SCADA system - benefits of SCADA system - Remote terminal
units , PLCs used as RTUs - The SCADA software package , Redundancy ,
System response time, Expandability of the system - Specialized SCADA
protocols - Error detection - Distributed network protocol - New technologies in
SCADA systems
10 Hours
Module V
Distributed control system (DCS): Overview of a distributed control system,
DCS software configuration, DCS communication, DCS supervisory computer
tasks, DCS integration with PLCs and computers.
Central control Room facility, Maintenance and troubleshooting:
Recommended installation practice, Ergonomic requirements, Design of the
computer displays, Alarming and reporting philosophies, troubleshooting the
telemetry system
10 Hours
TEXT BOOKS:

1. Introduction to programmable logic controller 2nd edition, thomson isbn:

981-240-625-5
Garry Dunning.
2. Practical SCADA for Industry, David Bailey and Edwin wright, Newnes An
imprint of Elsevier, 2003, ISBN 07506 58053
3. Computer based Industrial Control by Krishna Kant, PHI
4. Programmable Logic Controllers, JR Hackworth, Pearson Education
5. Programmable Logic Controllers, W Bolton, Elsevier
6. Computer control of processe, narosa publishing - M.Chidambaram
7. Computer based industrial control prentice hall of india - Krishna Kant
8. Computer aided process control,S.K. Singh
REFERENCE BOOKS:
1. Process control instrumentation technology, prentice hall of india - Curtis
Johnson
2. Instrumentation engineers hand book process control chilton book
company, pennsylvania - Bela G Liptak.

DSP ARCHITECTURE
Contact Hours/ Week :

3 +0+0 (L+T+P)

Total Lecture Hours

39

Total Tutorial Hours :

Sub. Code

IT74

Credits : 3.0
CIE Marks : 50
SEE Marks : 50

Module-I
Introduction To Digital Signal Processing: Introduction to Digital Signal
Processing, A Digital Signal Processing System, The Sampling Process, Discrete
time Sequences, Decimation and Interpolation, Convolution, correlation,
Discrete Fourier Transform (DFT) & Fast Fourier Transform(FFT), Classification
of Digital Filters.
Number formats for Signals and co-efficient in DSP systems: Fixed point
format, Double precession fixed point format, Floating point format, Block
floating point format, Multiplication of Fixed point numbers and Floating point
numbers, dynamic errors in DSP system.
8 Hours
Module- II
TMS320C54xx Programmable Digital Signal processor: Introduction,
Architecture overview of TMS320C54xx
Digital Signal Processors, Bus
structure, Central processing unit (CPU) : Arithmetic Logic Unit(ALU),
Accumulators, Barrel shifter, Multiplier/Adder, compare select & store unit,
Exponent encoder. Memory Organization: Memory space, Program memory,
extended program memory, Data memory, I/O-memory. Data types, Data

addressing: Immediate, Absolute, Accumulator, Direct, Indirect, Memory

mapped Register, Stack. Program memory addressing: Program Counter (PC),
Branches, Calls, Returns, Conditional operations, repeating a single
instruction, repeating a block of instructions, reset operation.
8Hours
Module- III
Instruction Set, On-Chip Peripherals and Pipeline Operation of
TMS320C54xx DSP: Instruction set: Arithmetic, Logical, Program control,
Load & store operations. On-chip Peripherals: Introduction, GPIO, peripheral
memory mapped registers Timer, Clock generator, Serial port interface synchronous serial port, Interrupts: Interrupt context save, interrupt latency,
Pipeline operation.
8Hours

Module- IV
Implementation Of Basic DSP Algorithms: Introduction, The Q-notation, An
FFT algorithm for DFT computation, A butterfly computation, Overflow and
Scaling, Bit Reversed index generation, FFT implementation on the
TMS320C54xx, Computation of the signal spectrum. FIR Filters, IIR Filters,
Interpolation Filters, Decimation Filters, PID controller, Adaptive Filters, 2-D
Signal processing.
8 Hours
Module- V
Interfacing Memory And Parallel I/O Peripherals To Programmable DSP
Devices: Introduction, Memory space organization, External bus interfacing
signals, Memory interface, Parallel I/O interface, Programmed I/O, Interrupts
and I/O, Direct memory access (DMA). Interfacing Serial Converters to a
Programmable DSP device: Introduction, Synchronous Serial Interface (SSI).
Multichannel Buffered Serial port(MCBSP)
7 Hours
TEXT BOOKS
1. Digital Signal Processing: Avtar Singh and S. Srinivasan, Thomson
Publishing, 2004, Singapore.
2. Modern Digital signal processing: Dr. V Udaya shankara, 2nd Edition, PHI
2012
3. TMS320C54x DSP Reference Set Volume 1: CPU and Peripherals Texas
Instruments
4. TMS320C54x DSP Reference Set Volume 2: Mnemonic Instruction Set Texas
Instruments
REFERENCE BOOKS
1. Digital Signal Processing: A Practical Approach, Emmanuel C Ifeachor and
B W Jervis, Pearson Education, New Delhi.
2. Digital Signal Processing: B Venkataramani and M Bhaskar, Tata- McGraw
Hill, New Delhi, 2002.

Professional Elective: III

MEDICAL IMAGING
Contact Hours/ Week :

3 +0+0 (L+T+P)

Total Lecture Hours

39

Total Tutorial Hours :

Sub. Code

ITE731

Credits : 3.0
CIE Marks : 50
SEE Marks : 50

Module-I
Introduction: Imaging Modalities-X Ray, Ultrasound and MRI.
X-RAYS: Interaction between X-Rays and matter, Intensity of an X-Ray,
Attenuation, X-Ray Generators, Beam Restrictors and Grids, Intensifying
screens, fluorescent screens and Image intensifiers. X-Ray detectors.
7 Hours
Module-II
X-RAY DIAGNOSTIC METHODS: Conventional X-Ray radiography, Digital
radiography, Dynamic spatial reconstructor, X-Ray image characteristics,
Biological effects of ionizing radiation.
8 Hours
Module-III
X-RAY COMPUTED TOMOGRAPHY: Basic Principle, components.
THERMAL
IMAGING:
Medical
thermography,
Infrared
detectors,
Thermographic equipment.
8 Hours
Module-IV
ULTRASOUND IMAGING: Attenuation, Absorption and Scattering Generation
and Detection of Ultrasound Ultrasonic transducers, Arrays, Pulse Echo
systems: A mode, B mode, M mode scanners, Tissue characterization, Color
Doppler flow imaging.
8 Hours
Module-V
RADIONUCLIDE IMAGING: Interaction of nuclear particles and matter,
nuclear sources, Radionuclide generators, nuclear radiation detectors,
rectilinear scanner, scintillation camera, SPECT, PET scanning technique.
8 Hours
TEXT BOOKS:
1. Principles of Medical Imaging- Kirk shung, Academic Press.
2. Handbook of Biomedical Instrumentation- Khandpur, TMH, 2nd Edition.

THIN FILM INSTRUMENTATION

Contact Hours/ Week :

3+0+0 (L+T+P)

Total Lecture Hours

39

Total Tutorial Hours :

Sub. Code

ITE732

Credits : 3.0
CIE Marks : 50
SEE Marks : 50

Module-I
Kinetic Theory of gases and Vacuum Terminology: Ideal gas equations,
Mean free path, Conduction of gas flow, Molecular flow, molecular velocity or
speeds, Gas impingement on surfaces, Gas flow Regimes, adsorption, out
gasing & throughput.
7Hours
MODULE-II
Rotary, Roots and sorption Pumps: Introduction, Rotary Vacuum pumps,
Roots Pumps & Sorption pumps
High Vacuum Pumps: Principles, Selection of backing Pumps, Selection of
vapour fluid, Diffusion pump fluids, Magnifications to the Diffusion pumps,
Turbo molecular pumps, cryopumps, sputter ion pump & integrated vapour
pumps.
8Hours
Module-III
Measurement of Vacuum: Introduction, Different types of Vacuum gauges:
Hydrostatic gauges, Thermal conductivity gauges, Ionization gauges,
capacitance gauge and Spinning rotor gauge.
Leak Detection Techniques: Introduction, Leak rate & units, Rate Rise
measurement, Leak Detector: Tesla Coil, Halogen leak Detector, Thermal
Conductivity gauge, Helium leak detector
8Hours
Module-IV
Thin Film Deposition Techniques : Introduction, Different techniques of
deposition
Physical vapor Deposition (PVD): Introduction, Resistive
Evaporation, flash Evaporation, E-beam Evaporation, Sputter deposition- DC
diode bias, Triode, Magnetron, RF sputtering, Chemical Deposition Methods:
Introduction, overview and history-Electro deposition (Electrolytic, Electro less,
Anodization), Chemical Vapour deposition: Plasma CVD, PE CVD and LP CVD.
8Hours
Module-V
Thin film Characterization: Overview of thin film characterization, Imaging
techniques: Scanning electron microscopy (SEM), AFM, Structural properties:
X-ray diffraction (XRD), Electrical properties: Resistance/resistivity four point
probe, Vander Pauw, Mechanical properties: Stress-curvature measurements.
8Hours
TEXT BOOKS:
1. John A. Venables, Introduction to Surface and Thin Films Processes,
Cambridge University Press, 2000.
2. M. Ohring, Materials Science of Thin Films: Deposition and Structure, 2002.

3. Leon I. Maissel and Reinhard Glang, Ed., Handbook of Thin Film

Technology, McGraw-Hill Publishing Company, New Delhi (1970)

COMPUTER NETWORKS
Contact Hours/ Week :

3+0+0 (L+T+P)

Total Lecture Hours

39

Total Tutorial Hours :

Sub. Code

ITE733

Credits : 3.0
CIE Marks : 50
SEE Marks : 50

Module I
INTRODUCTION: Network Hardware, Network Software, OSI Reference Model,
TCP/IP reference model.
PHYSICAL LAYER:
Guided Transmission Media, Wireless Transmission, The Public Switched
Telephone Network, The Mobile Telephone System.
8 Hours
Module II
DATA LINK LAYER: Data Link Layer Design Issues, Error Detection and
Correction, Elementary Data Link Protocols, Sliding Window Protocols, Protocol
Verification, HDLC, The data link layer in the internet, point to point protocol.
8 Hours
Module III
NETWORK LAYER : Network Layer Design Issues, Routing Algorithms:
optimality principle, shortest path routing, Distance vector routing, flooding,
link state routing.
8 Hours
Module IV
TRANSPORT LAYER: The transport service, Elements of transport protocols,
Simple transport protocol, the internet transport protocols: UDP, TCP.
8Hours
Module V
APPLICATION LAYER: Domain Name System (DNS), electronic mail,
worldwide web.
7 Hours
TEXT BOOK:
1. Computer Networks : Andrews S. Tanenbaum, 4th Edition, Pearson
Education.
REFERENCE BOOKS:
1. ATM Protocol concepts- HONDEL AND FLUBER, Addison Wesley.
2. Data and computer networks- W STALLINGS 5th Edition, Prentice Hall of
India 1998.

Professional Elective: IV
COMPUTER ARCHITECTURE
Contact Hours/ Week :

3+0+0 (L+T+P)

Total Lecture Hours

39

Total Tutorial Hours :

Sub. Code

ITE741

Credits : 3.0
CIE Marks : 50
SEE Marks : 50

Module-I
Introduction: Introduction to Computer Architecture, Quantitative principles
of computer design, basics of How to Flow chart for hardware
Pipelining Basic and Intermediate Concepts: Basics of Pipelining, Basics of
RISC instruction set and its Implementation.
9 Hours
Module-II
Pipelining Basic and Intermediate Concepts: Classic 5-stage pipelining for a
RISC processor, Basic performance issues in pipelining, Pipelining Hazards, A
simple Implementation of MIPS pipeline.
7 Hours
Module-III
Pipelining: Pipelining implementation difficulties, Extending MIPS pipeline to
Handle Multi-cycle Operations.
Instruction level Parallelism: ILP Concepts, Basic Compiler Techniques for
exposing ILP, Reducing Branch Costs with prediction, Overcoming Data
Hazards with Dynamic Scheduling, Hardware threading.
8 Hours
Module-IV
Instruction level Parallelism: Hardware based speculation, Static Branch
prediction, Static Multiple issue: The VLIW approach, limitations of ILP.
8 Hours
Module-V
Memory Hierarchy Design: Introduction, Review of the ABCs of Cache, Cache
Performance, Reducing Cache miss Penalty and miss rate, Reducing Hit rate,
Memory Technology and Optimization, Virtual Memory .
7 Hours
TEXT BOOK:
1. Computer Architecture A Quantitative Approach by John L. Hennessy and
David A. Patterson 3rd Edition.
REFERENCE BOOKS:
1 Computer Architecture A Quantitative Approach by John L. Hennessy and
David A. Patterson 4th Edition.

2 Computer Organization by John L. Hennessy and David A. Patterson.

DIGITAL IMAGE PROCESSING

Contact Hours/ Week :

3+0+0 (L+T+P)

Total Lecture Hours

39

Total Tutorial Hours :

Sub. Code

ITE742

Credits : 3.0
CIE Marks : 50
SEE Marks : 50

Module-I
FUNDAMENTALS: Introduction, Fundamental steps in digital image processing
(DIP), components of DIP system, A simple image formation model, Image
sampling and quantization, Basic relationship between pixels, Color image
processing: color fundamentals, Color models: RGB, CMY and CMYK, HIS.
7 Hours
Module-II
IMAGE ENHANCEMENT IN SPATIAL DOMAIN: Background, Point processing
Image negatives, Log transformations, Power law transformations, Contrast
stretching, Gray level slicing, Bit plane slicing, Histogram processing
Histogram
equalization,
Histogram
matching
(specification),
Local
enhancement, Arithmetic/Logic operations Image subtraction, Image
averaging, SPATIAL FILTERING : Smoothing spatial filters Smoothing linear
filters, order statistics filters, Sharpening spatial filters Foundation, Laplacian
and gradient.
8 Hours
Module-III
IMAGE ENHANCEMENT IN FREQUENCY DOMAIN: Introduction to the
Fourier Transform and the frequency domain , Basic filtering in the frequency
domain, Basic filters and their properties, Smoothing frequency domain filters
Ideal low-pass filters, Butterworth low-pass filters, Gaussian lowpass filters,
Sharpening frequency domain filters Ideal high-pass filters, Butterworth
high-pass filters, Gaussian high-pass filters, Homomorphic filtering.
8 Hours
Module-IV
IMAGE COMPRESSION: Fundamentals: Coding redundancy, interpixel
redundancy, psychovisual redundancy, Image Compression models: Source
encoder and decoder, Channel encoder and decoder, Error Free compression:
Variable length coding, LZW coding, Bit plane coding, Lossless predictive
coding, Lossy Compression: Lossy predictive coding, transform coding
fundamentals,
image
compression
standards:
basics,
JPEG.
8 Hours
Module-V
IMAGE SEGMENTATION: Detection of discontinuities: point detection, Line
detection, edge detection, Edge Linking and boundary Detection: Local

Processing, Global processing via the Hough transform, Introduction, Global

processing via Graph theoretic Techniques, Thresholding: Foundation, Role of
illumination, Basic Global thresholding, Basic Adaptive thresholding, Optimal
global and adaptive thresholding, Region-based segmentation: Basic
Formulation, region growing, Region splitting & merging.
8 Hours
TEXT BOOK:
1. Digital Image Processing - Rafael C. Gonzalez & Richard E. Woods, Second
Edition. Pearson Education Inc.
REFERENCE BOOK:
1. Fundamentals of Digital Image Processing- Anil K. Jain, 2nd Edition,
Prentice Hall of India.

AIR CRAFT INSTRUMENTATION

Contact Hours/ Week :

3+0+0 (L+T+P)

Total Lecture Hours

39

Total Tutorial Hours :

Sub. Code

ITE743

Credits : 3.0
CIE Marks : 50
SEE Marks : 50

Module I
Aircraft instruments: Introduction, instruments grouping, instruments
display, quantitative and qualitative displays, director displays, cockpit layout,
standard atmosphere, basic air data system, pitot static probe, heating circuit
arrangements.
8 Hours
Module II
Air data instruments: Air speed indicator, square law characteristics,
match/air speed indicator, altimeters, affects of atmospheric temperatures,
vertical air speed indicators, air temperature indicator, air data alternating
system, match warning system, altitude alert system .
8 Hours
Module III
Gyroscopic flight instruments: The gyroscope and its properties, determining
direction of precession, limitations of gyroscopes, operating gyroscopic
instruments, gyro horizons, erection systems for gyro horizons, errors due to
acceleration and turning, direction indicator, turn and bank indicator.
8 Hours
Module IV
Fuel quantity indicating systems: capacitance type system, indicating
system, affects of fuel temperature changes, measurement of fuel quantity by
weight, construction of probes, and location of probes.
7 Hours
Module V

Engine power and control instruments: RPM measurement, generator and

indicating system, tacho probe and indicator system, torque monitoring,
exhaust gas temperature, engine pressure ratio measurement, fuel flow
measurement, integrated flow meter system.
8 Hours

TEXT BOOK:
1.
Aircraft instruments and integrated systems, EHJ Pallet, Longman
Scientific & Technical, 1992.
REFERENCE BOOKS:
1. WH Coulthard, Air craft Instrument Design, Pitman & sons, 1981
2. C A Williams, Aircraft Instruments, Golgotia Pub., New Delhi

DIGITAL SIGNAL PROCESSING LAB

Contact Hours/ Week :

0+0+3 (L+T+P)

Sub. Code

ITL75

Credits : 3.0
CIE Marks : 50
SEE Marks : 50

1. Conduct experiment to verify sampling theorem

2. Conduct experiment to determine linear convolution, circular convolution
and correlation of two given sequences. Verify the result using theoretical
computations
3. Determine the linear convolution of two given point sequences using FFT
algorithm.
4. Determine the correlation using FFT algorithm.
5. Determine the spectrum of given sequence-using FFT.
6. Design and test FIR filter using windowing method. [type of window: 1.
Hamming window. 2. Kaiser window for the given order and cut off
frequency.
7. Design and test FIR filter using frequency sampling method.
8. Design and test Butterworth second order low pass filter
9. Design and test Butterworth second order high pass filter
10. Design and test Chebyschev second order low pass filter.
11. Design and test Chebyschev second order high pass filter.
12. Conduct experiment to generate and detect DTMF signal using MATLAB
software only
Note:
1. All the experiments (Except 12) are to be conducted using DSP kit.

2. The result of the experiments should also be verified using MATLAB.

All other experiments should be conducted using C cross complier or
Assembler.

PROCESS AUTOMATION LAB

Contact Hours/ Week :

0+0+3 (L+T+P)

Sub. Code

ITL76

Credits : 3.0
CIE Marks : 50
SEE Marks : 50

1. Using P, PI, PD, PID controllers to obtain the optimum response of the
given flow controller.
2. Using P, PI, PD, PID controllers to obtain the optimum response of the
given level controller.
3. Using P, PI, PD, PID controllers to obtain the optimum response of the
given Pressure controller.
4. Using P, PI, PD, PID controllers to obtain the optimum response of the
given temperature controller.
5. Using P, PI, PD, PID controllers to obtain the optimum response of the
given Multi process control.
6. Simulate bottle-filling process using PLC. The logic should be solved
using ladder diagram technique.
7. Simulate Elevator using PLC. The logic should be solved using ladder
diagram technique.
8. Simulate drilling a hole in an object moved on a conveyor belt using PLC.
The logic should be solved using ladder diagram technique.
9. Tuning of PID Controller using Zeigler Nichols method for temperature
control.
10.
Study of control valve characteristics.
11.
Implementation of Deadbeat Algorithm using Simulink.
Note:

Experiments 1 to 4 - PC based control with On-Off / P / I / PI / PD / PID

control modes.
Experiment 5 is on level, Flow, Cascade, Feed forward and Ratio control.
Experiments 1 to 10 - for both Continuous Internal Evaluation (CIE) and
Semester End Examination (SEE).
Experiment 11- for only Continuous Internal Evaluation (CIE).