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Datasheet No PD97381
IRS20957S
Protected Digital Audio Driver
Features
Product Summary
Typical Applications
Topology
Half-Bridge
VOFFSET (max)
+/- 100 V
Selectable deadtime
15/25/35/80ns
OC protection delay
500ns (max)
Shutdown
propagation delay
250ns (max)
Package
Note: Please refer to Lead Assignments for correct pin configuration. This diagram shows
electrical connections only.
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IRS20957S
Table of Contents
Page
Description
Qualification Information
Electrical Characteristics
10
Lead Definitions
11
Lead Assignments
11
Waveform definitions
12
12
Package Details
13
14
15
Ordering Information
16
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IRS20957S
Description
The IRS20957S is a high voltage, high speed MOSFET driver with a floating PWM input designed for Class
D audio amplifier applications.
Bi-directional current sensing detects over current conditions during positive and negative load currents
without any external shunt resistors. A built-in protection control block provides a secure protection
sequence against over-current conditions and a programmable reset timer.
The internal dead-time generation block enables accurate gate switching and optimum dead-time setting
for better audio performance, such as lower THD and lower audio noise floor.
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IRS20957S
Qualification Information
Qualification Level
Industrial
Comments: This family of ICs has passed JEDECs
Industrial qualification. IRs Consumer qualification level is
granted by extension of the higher Industrial level.
MSL2260C
SOIC16N
(per IPC/JEDEC J-STD-020)
Class B
(per JEDEC standard EIA/JESD22-A115)
Class 2
(per EIA/JEDEC standard JESD22-A114)
Class I , Level A
(per JESD78)
Yes
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IRS20957S
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All
voltage parameters are absolute voltages referenced to VSS; all currents are defined positive into any lead.
The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air
conditions.
Symbol
VB
VS
VHO
VCSH
VCC
VLO
VDD
VSS
VIN
VCSD
VDT
VOCSET
VREF
IDDZ
ICCZ
IBSZ
IOREF
d VS /dt
d VSS /dt
d VSS /dt
Pd
RthJA
TJ
TS
TL
Definition
High side floating supply voltage
High side floating supply voltage
High side floating output voltage
CSH pin input voltage
Low side fixed supply voltage
Low side output voltage
Floating input supply voltage
Floating input supply voltage
PWM input voltage
CSD pin input voltage
DT pin input voltage
OCSET pin input voltage
VREF pin voltage
Min.
-0.3
VB-15
Vs-0.3
Vs-0.3
-0.3
-0.3
-0.3
(See IDDZ)
VSS -0.3
VSS -0.3
-0.3
-0.3
-0.3
-
Max.
215
VB+0.3
VB+0.3
VB+0.3
20
VCC +0.3
210
VDD+0.3
VDD+0.3
VDD+0.3
VCC +0.3
VCC +0.3
VCC +0.3
10
10
10
5
50
50
Units
50
V/ms
-55
-
1.0
115
150
150
300
mA
V/ns
C/W
C
VDD - VSS, VCC -COM and VB - VS contain internal shunt zener diodes. Please note that the
voltage ratings of these can be limited by the clamping current.
For the rising and falling edges of step signal of 10V. Vss=15V to 200V.
Vss ramps up from 0V to 200V.
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IRS20957S
Recommended Operating Conditions
For proper operation, the device should be used within the recommended conditions below. The Vs and
COM offset ratings are tested with supplies biased at IDD=5mA, VCC=12V and VB-VS=12V.
Symbol
VB
VS
IDDZ
VSS
VHO
VCC
VLO
VIN
VCSD
VDT
IOREF
VOCSET
TA
Definition
High side floating supply absolute voltage
High side floating supply offset voltage
Floating input supply zener clamp current
Floating input supply absolute voltage
High side floating output voltage
Low side fixed supply voltage
Low side output voltage
PWM input voltage
CSD pin input voltage
DT pin input voltage
Reference output current to COM
OCSET pin input voltage
Ambient Temperature
Min.
Vs+10
1
0
Vs
10
0
VSS
VSS
0
0.3
0.5
-40
Max.
Vs+14
200
5
100
VB
15
VCC
VDD
VDD
VCC
0.8
5
125
Units
V
mA
mA
V
C
Logic operational for Vs equal to 5V to +200V. Logic state held for Vs equal to 5V to VBS.
Nominal voltage for VREF is 5V. IOREF of 0.3 0.8mA dictates total external resistor value on
VREF to be 6.3k to 16.7k .
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IRS20957S
Electrical Characteristics
VCC,VBS= 12 V, IDD=5mA, VSS=20V, VS=0V,CL=1nF and TA=25C unless otherwise specified.
Symbol
Description
Low Side Supply
VCC supply UVLO positive
UVCC+
threshold
VCC supply UVLO negative
UVCCthreshold
IQCC
Low side quiescent current
Low side zener diode clamp
VCLAMPL
voltage
High Side Floating Supply
High side well UVLO positive
UVBS+
threshold
High side well UVLO negative
UVBSthreshold
IQBS
High side quiescent current
High to Low side leakage
ILKH
current
High side zener diode clamp
VCLAMPH
voltage
Floating Input Supply
VDD, VSS floating supply
UVDD+
UVLO positive threshold
VDD, VSS floating supply
UVDDUVLO negative threshold
Floating Input quiescent
IQDD
current
Floating Input zener diode
VCLAMPM
clamp voltage
Floating input side to Low side
ILKM
leakage current
Floating PWM Input
Logic high input threshold
VIH
voltage
Logic low input threshold
VIL
voltage
IIN+
Logic 1 input bias current
IINLogic 0 input bias current
Protection
VREF
Reference output voltage
Low side OC threshold in Vs
VthOCL
VthOCH
Vth1
Vth2
ICSD+
ICSD-
Min
Typ
Max
Units
Test Conditions
8.4
8.9
9.4
8.2
8.7
9.2
mA
VDT = VCC
19.6
20.4
21.6
ICC=5mA
8.0
8.5
9.0
7.8
8.3
8.8
mA
50
VB=VS =200V
14.7
15.3
16.2
IBS=5mA
8.2
8.7
9.2
VSS =0V
VSS =0V
7.7
8.2
8.7
mA
VDD=9.5V +Vss
9.8
10.2
10.8
IDD=5mA
50
VDD=VSS =200V
2.3
1.9
1.9
1.5
40
1
4.8
5.1
5.4
1.1
1.2
1.3
1.1+ Vs
1.2+ Vs
1.3+ Vs
V
A
VIN =3.3V
VIN = VSS
IOREF =0.5mA
OCSET=1.2V,
Figure 3
Vs=200V,
Figure 4
0.62xVDD
0.70xVDD
0.78xVDD
VSS =0V
0.26xVDD
0.30xVDD
0.34xVDD
VSS =0V
VSD = VSS +5V
VSD = VSS +5V
70
70
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100
100
130
130
IRS20957S
Protection (continued)
Symbol
Description
Shutdown propagation delay
tSD
from VCSD > VSS + VthOCH to
Shutdown
Propagation delay time from
tOCH
VCSH > VthOCH to Shutdown
Propagation delay time from
tOCL
Vs> VthOCL to Shutdown
Gate Driver
Output high short circuit
Io+
current (Source)
Output low short circuit
Iocurrent (Sink)
Low level out put voltage
VOL
LO COM, HO VS
High level out put voltage
VOH
VCC LO, VB HO
tr
Turn-on rise time
tf
Turn-off fall time
High and low side turn-on
Ton_1
propagation delay, floating
inputs
High and low side turn-off
Toff_1
propagation delay, floating
inputs
High and low side turn-on
Ton_2
propagation delay, nonfloating inputs
High and low side turn-off
Toff_2
propagation delay, nonfloating inputs
Deadtime: LO turn-off to HO
DT1
turn-on (DTLO-HO) & HO turnoff to LO turn-on (DTHO-LO)
Deadtime: LO turn-off to HO
DT2
turn-on (DTLO-HO) & HO turnoff to LO turn-on (DTHO-LO)
Deadtime: LO turn-off to HO
DT3
turn-on (DTLO-HO) & HO turnoff to LO turn-on (DTHO-LO)
Deadtime: LO turn-off to HO
turn-on (DTLO-HO) & HO turnDT4
off to LO turn-on (DTHOLO)VDT= VDT4
VDT1
DT mode select threshold 1
VDT2
DT mode select threshold 2
VDT3
DT mode select threshold 3
Min
Typ
Max
250
500
500
1.0
1.2
0.1
Units
Test Conditions
Figure 2
ns
Figure 4
Figure 3
Vo=0V,
PW<10S
Vo=12V,
PW<10S
Io=0A
V
-
1.4
15
10
95
80
95
80
15
22
VDT>VDT1,
VSS = COM
15
25
35
VDT1>VDT> VDT2,
VSS = COM
20
35
50
VDT2>VDT> VDT3,
VSS = COM
50
80
110
VDT3>VDT,
VSS = COM
0.51xVcc 0.57xVcc
0.32xVcc 0.36xVcc
0.21xVcc 0.23xVcc
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0.63xVcc
0.40xVcc
0.25xVcc
Io=0A
ns
VDT = VCC,
VS = 100V,
VSS = 100V
VDT = VCC,
VS = 100V,
VSS = 100V
VDT = VCC,
VS = 100V,
VSS = COM
VDT = VCC,
VS = 100V,
VSS = COM
IRS20957S
Functional Block Diagram
FLOATING INPUT
UV
DETECT
VDD
VB
UV
HIGH
SIDE
CS
INPUT
LOGIC
HO
15.3V
IN
CSH
UV
DETECT
10.2V
HV
LEVEL
SHIFT
VSS
HV
LEVEL
SHIFT
VS
HV
LEVEL
SHIFT
5V REG
VCC
UV
DETECT
CHARGE/
DISCHARGE
CSD
SD
DT
20.4V
DEAD-TIME
HV
LEVEL
SHIFT
PROTECTION
CONTROL
LO
COM
HV
LEVEL
SHIFT
LOW SIDE CS
5.1V REFERENCE
OCSET
VREF
DT
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IRS20957S
I/O Pin Equivalent Circuit Diagrams
VB
ESD
Diode
HO
15 V
Clamp
ESD
Diode
VS
200 V
V CC
VCC
ESD
Diode
20 V
Clamp
LO
ESD
Diode
COM
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IRS20957S
Lead Definitions
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
VDD
CSD
IN
VSS
NC
VREF
OCSET
DT
COM
LO
VCC
NC
VS
HO
VB
CSH
Description
Floating input positive supply
Shutdown timing capacitor, referenced to VSS
PWM non-inverting input, in phase with HO
Floating input supply return
5V reference output for setting OCSET
Low side over current threshold setting, referenced to COM
Input for programmable dead-time, referenced to COM
Low side supply return
Low side output
Low side logic supply
High side floating supply return
High side output
High side floating supply
High side over current sensing input, referenced to VS
Lead Assignments
16
CSH
CSD
15
VB
IN
14
HO
VSS
13
VS
NC
12
NC
VREF
11
VCC
OCSET
10
LO
COM
DT
IRS20957
VDD
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11
IRS20957S
Waveform definitions
Vth1
CSD
90%
HO/LO
tSD
VS
VthOCH
CSH
VthOCL
VS
90%
90%
LO
HO
tOCL
tOCH
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IRS20957S
Package Details: SOIC16N
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IRS20957S
Package Details: SOIC16N, Tape and Reel
LOADED TAPE FEED DIRECTION
D
F
NOTE : CONTROLLING
DIM ENSION IN M M
E
G
16SOICN
Imperial
Min
Max
0.311
0.318
0.153
0.161
0.618
0.641
0.291
0.299
0.252
0.260
0.402
0.409
0.059
n/a
0.059
0.062
D
C
B
A
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IRS20957S
Part Marking Information
Part number
IRSxxxxx
Date code
YWW ?
IR logo
Pin 1
Identifier
?
MARKING CODE
? XXXX
Lot Code
(Prod mode
4 digit SPN code)
Assembly site code
Per SCOP 200-002
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15
IRS20957S
Ordering Information
Standard Pack
Base Part Number
IRS20957S
Package Type
SOIC16N
Form
Quantity
Tube/Bulk
45
IRS20957SPBF
2500
IRS20957STRPBF
The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no
responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement
of patents or of other rights of third parties which may result from the use of this information. No license is granted by implication or
otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to
change without notice. This document supersedes and replaces all information previously supplied.
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