04 UMG8900 Hardware System

UMG8900 Hardware
System(SSM256)
www.huawei.com
Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.
Objectives
Upon completion this course, you will be able to:
Perform UMG8900 shelf frame and boards classifications,

functions and interfaces
Know UMG8900 logical subsystem
Perform the concatenation
Page1
References
UMG8900 System Description
UMG8900 Hardware Description Manual
UMG8900 Architecture and Principle
Page2
Contents
1. Overview
2. Board Function
3. Signaling Flow
4. Concatenation and Cables
Page3
R4 Networking
Page4
Shelf and Frame

(1)
(2)
(4)
(5)
(3)
(1) Frame lintel
(2) 9U board
(4) 8U board
(5) Filter box
Page5
(3) Integrated fan
Shelf and Frame

(1) Frame lintel
(2) Mounting angle
(3) Embedded fan box
(1) Mounting angle
(2) Power-in terminal of frame
(3) Interface for monitoring cable
(4) Standby power-in terminal of fan box
(5) Interface for alarm cable
(6) Power-out terminal of fan box
(7) Power-in terminal of fan box
(8) DIP switch for setting frame ID
Page6
Frame Classification
The main control frame: Manages and controls the whole

UMG8900 equipment and provides clock signals for other frames.
The central switching frame: Implements frame subtending
function.
The service frame : Implements service processing and interfacing

functions.
The extended control frame: It is configured when the networking

with large capacity is required. It is responsible for protocol
processing and connection management, and implements
controlling and managing the service frames.

Page7
Frame Configuration
Power distribution frame
Service frame
#2
Service frame
#5
Extended control frame

#8
Air defence frame
Air defence frame
Air defence frame
Main control frame

#1
Service frame
#4
Service frame
#7
Air defence frame
Air defence frame
Air defence frame
Central switch frame

#0
Service frame
#3
Service frame
#6
Dummy panel
Fiber coiler
Dummy panel
Fiber coiler
Dummy panel
Fiber coiler
Page8
DIP Switch
1
8
OFF
ON
DIP switch setting

SW4
SW3
SW2
SW1
Binary
number
Frame ID
ON
ON
ON
ON
0000
ON
ON
ON
OFF
0001
ON
ON
OFF
ON
0010
ON
ON
OFF
OFF
0011
ON
OFF
ON
ON
0100
ON
OFF
ON
OFF
0101
ON
OFF
OFF
ON
0110
ON
OFF
OFF
OFF
0111
OFF
ON
ON
ON
1000
Page9
Slot Distribution
Service board
Service board
Service board
Service board
O
R
M
P
U
M
P
U
Service board
Service board
Service board
Service board
Service board
Page10
Service board
Service board
O
R
Service board
O
M
U
Service board
O
M
U
Service board
Front boards slot distribution
15
14
13
11 12
8
9 10
7
6
5
4
3
2
1
0
Slot Distribution
N
E
T
T
N
U
Service board
Service board
T N
N E
U T
Service board
Service board
Service board
Service board
Service board
Service board
10
Service board
11
Service board
13 12
Service board
14
Service board
15
Back boards slot distribution
Page11
Questions
Please describe the classification, function and location in

the shelf of the UMG8900 frames.
How to set the DIP switch?
Please describe the slot distribution of UMG8900.
Page12
Summary
Frame classification, function and distribution in shelf
Slot distribution in frame
Dip switch setting.
Page13
Contents
1. Overview
2. Board Function
3. Signaling Flow
Page14
Contents
2
Board Function
2.1 Hardware System Introduction
2. 2 Operation and Maintenance Subsystem
2.3 Gateway Control Subsystem
2.4 Packet Service Processing Subsystem
2.5 TDM Service Processing Subsystem
2.6 Service Resource Subsystem
2.7 Signaling Forwarding Subsystem
2.8 Clock Subsystem
2.9 Cascading Subsystem
Page15
Hardware System
LMT/iManager
MGC(MSOFTX3000)
O&M Subsystem OMU/MPU Packet

MBus
Switch
PP
U
CMU
Gateway Control
Subsystem
Packet Service Processing Subsystem

ATM
A4L/
A4L/EAC
EAC
IP
E8T/
E8T/E1G
E1G
Service Resource
Subsystem
ASU
ASU
NET
VPU
RPU
HRB
Cascading Subsystem
CLK
Clock Subsystem
SPF
TNU
BLU/FLU
E32/T32
E32/
T32
S2L/S2E
S2L/
S2E
Signaling Forwarding
Subsystem
TDM
TDM Service Processing Subsystem
Page16
Contents
2
Board Function
2.8 Clock Subsystem
Page17
OMU(MOMU)
As the management and control center of the whole

equipment, the master and slave MOMUs are inserted in
front slots 7 and 8 in the main control frame.
MOMU
RUN
ALM
ACT
Providing packet switching function at the control plane to

communicate with all the boards with FE control interfaces
RESET
and to exchange information with other frames and manage
Embedding a BAM, which provides MML and Telnet

interfaces to configure and maintain boards, and saves log
COM0 FE0
interfaces in the multi-frame cascading case.
OFFLINE
files and alarm information.
HUAWEI
Page18
OMU(MOMU)
Other frame
MPU
(Master)
OMU
(Master)
board
board
OMU
(Slave)
board
board
Main control frame
MPU
(Slave)
board
board
board
board
board
MPU
(Slave)
board
MPU
(Master)
board
board
Board
Other frame
Monitoring and managing the states of all boards in the equipment. When
multiple frames are cascaded, the MOMU monitors and manages MMPUs in
other frames through cascaded control planes.
Implementing state monitoring and power-on/off management on the

equipment through special MBus modules; avoiding attack from instant currents
by controlling board power-on sequence.
Page19
MPU(MMPU)
Implementing control information interaction between the

boards and inter-frame control information interaction as
well as interface management in the case of multiple
MMPU
RUN
ALM
ACT
frames subtended.
Monitoring and managing the status of all boards in the
RESET
frame.
Implementing status querying, monitoring and power-on or

power-off management to the equipment through special
maintenance module, and controlling board power-on
COM0 FE0
OFFLINE
sequence to avoid impact from instant current.

HUAWEI
Page20
Contents
2
Board Function
2.8 Clock Subsystem
Page21
MGW Control Subsystem

MGC(MSOFTX3000)
H.248(FE)
PPU
FE-Switch
CMU
OMU/MPU
Gateway Control
Subsystem
Page22
PPU(MPPB)
Sending manipulation results to the MGC in
MPPB
the form of H.248 messages.
RUN
ALM
Implementing H.248 transcoding, and
FE0
resolving transport-layer and network-layer

protocols.
RESET
RANAP
SCCP
COM0
H.248
SCTP/UDP
IP
M3UA
SCTP
IP
OFFLINE
HUAWEI
Stack for Mc interface Stack for SG function
Page23
CMU(MCMF/MCMB)
HRB
ATM
IP
VPU
TDM
Page24
CMU(MCMF/MCMB)
Providing internal interface to connect with the

PPU to implement interaction of H.248 messages.
Providing interfaces to connect with the HRB,
ASU, TNU to control the boards to convert media
streams.
Providing interface to connect with the MPU/OMU
to implement data configuration and output
alarms, debugging information and logs.
It includes two types: CMF (Front board) and

CMB (back board)
RUN
ALM
ACT
RESET
COM0
MCMF
OFFLINE
HUAWEI
Page25
MCMB
RUN
ALM
ACT
RESET
COM0
OFFLINE
HUAWEI
Contents
2
Board Function
2.8 Clock Subsystem
Page26
Packet Service Processing

Subsystem
CLK/GE/FE
TCU
TCU
VPU
NET
ATM
A4L/
TAC
EAC/
TAC
ASU
ASU
HRU
HRB
Packet service processing

subsystem
OMU/MPU
Page27
E8T/
IP
E8T/
G1O/
G1O/
P1H/P4L
P1H/P4L
ASU(MASU)
MASUb
Processing ATM services.
RUN
ALM
ACT
Providing the standard AAL2/ AAL5

Segmentation and Reassembly (SAR)
function.
Supporting direct forwarding over PVC, OAM

cell extraction and luUP interface processing
COM0
functions.
Monitoring and managing the states of the
OFFLINE
board and the corresponding back boards.
HUAWEI
Supporting 1+1 backup.
Page28
Back Board Corresponding to MASU

MA4L
Providing four 155 M singlemode/multi-mode ATM optical
interfaces.
AC
A
4
L
A
4
L
A
S
U
(m)
A
S
U
(s)
AC
AC
AC
Providing the 1+1 backup function

by collaborating with the service
processing board MASU.
NK
LI 0
TX 0
X
RK
N
LI 0
TX 0
X
R
NK
I
L X0
T 0
X
R
NK
LI X0
T 0
X
R
8K_OUT
RUN
ALM
ACT
OFFLINE
HUAWEI
Page29
HRB(MHRU)
Processing IP routes, and converging and distributing IP

services.
Monitoring and managing the states of the board and the

corresponding back boards.
Supporting the Internet Protocols over ATM (IPoA) function.

After the MHRU finishes the adaptation of the IP data packets
to the ATM, the ATM interface board forwards them on.
Page30
HRB(MRPU)
Processing Internet Protocol (IP) routes, and converging and

distributing IP services.
Monitoring and managing the states of the board and the

corresponding back boards.
Resolving the RTP/Real-time Transport Control Protocol (RTCP)

protocols.
Jitter-buffering RTP services.
Nb UP
RTP/ RTCP
UDP
IP
Page31
Back Board Corresponding to MRPU
MRPU corresponding back boards include MG1O, MP4L and ME8T.
Example: MG1O function
Providing one GE interface in conformity with the IEEE8002.3z standard.

Providing the 1+1 backup function by collaborating with the service
processing board MRPU.
P P
4 4
L L
E E
1 1
G G
G G
1 1
O O
E E
8 8
T T
H H
R R
B B
(m) (s)
H H
R R
B B
(m) (s)
H H
R R
B B
(m) (s)
H H
R R
B B
(m) (s)
Page32
NET(MNET)
exchange service data between all packet service boards in the frame.
Cascading two frames instead of cascading boards. The embedded

cascading module in the MNET enables interworking of 2 GE
service data planes and interworking of 2 FE service control planes.
Providing service control and maintenance interfaces for the

corresponding front boards such as the MOMU and MMPU to address
RUN
ALM
ACT
AC
AC
back cabling requirements.
MNET
CLK1_IN CLK0_IN FE1 FE0 MIR OMC
Providing packet service switching channels in its own frame to
Receiving clock signals from the MCLK, and sending them to TDM
NK
LI X0
T 0
X
R
NK
I
L X0
T 0
X
R
COM0
OFFLINE
service processing boards after phase lock, signal driving and

HUAWEI
distributing.
Page33
NET(MNET)
The internal clocks synthesized and distributed by the MNET are as

follows:
32.768 MHz clock: the TDM HW synchronous clock signals for the TDM
bearer processing
38.88 MHz clock: the TDM SDH synchronous clock, including the
synchronous clock required by the ATM and POS services in the SDH
transmission mode
77.76MHz clock: the clock signal for the SDH 155 MHz line interface
2 kHz clock: the TDM SDH frame clock
The TNU, E32, T32, S2L, S1L, TCU, BLU, SPF and ECU use 32.768
MHz, 38.88 MHz and 2 kHz clock signals. Besides the three clock
signals, S1L and S2L use 77.76 MHz signal. The A4L and P1H only use
the 38.88 MHz clock signal.
Page34
Contents
2
Board Function
2.8 Clock Subsystem
Page35
TDM Service Processing

Subsystem
TDM service processing
subsystem
TDM
4*TDM
Packet processing
subsystem
TNU
E32/T32/
E32/T32/
S2L/S2E
S2L/S2E
VPU
VPU
VPU
OMU/MPU
Page36
TNU(MTNB)
Establishing and releasing TDM timeslots in cooperation
with TDM service interface boards, and providing 8 K or 1
K switching capacity for each interface board.
MTNB
RUN
ALM
ACT
AC
Connecting with the MTNB of another frame directly or
AC
through the UG02MBLU by multi-mode optical fibers, and
AC
providing 32 K timeslot cascading capacity.
AC
NK
LI 0
TX 0
X
R
NK
I
L X0
T 0
X
R
K
N
LI X0
T 0
X
R
NK
LI X0
T 0
X
R
Managing and maintaining the boards through the

specified MBus module. Reporting the status and version
of the boards to the main control board of the local frame.
Communicating with the main control board of the local
OFFLINE
HUAWEI
frame through the FE interface.
COM0
Page37
S2L(MS2L)
MS2L
RUN
ALM
ACT
AC
the two 155 M optical interfaces.

NK
LI X0
T 0
X
R
NK
I
L 0
TX 0
X
R
Processing overheads of regenerator section

and multiplex section of optical signals and
checking communication over optical channels.
8K_OUT
AC
Extracting clock signals and forming frames at
Implementing SDH mapping, de-mapping and
COM0
processing overheads of high-order path and

low-order path.
OFFLINE
HUAWEI
Forming 2 63 E1
Page38
E32(ME32)
Providing 32 E1 interfaces.
Providing 32 E1 frames.
Providing the function of drawing the line signaling of
ME32
E1/T1_16-31 8K_OUT E1/T1_0-15
RUN
ALM
OFFLINE
HUAWEI
the R2 signaling or inserting the signaling.
Providing 8 kHz line clock reference source for the

master and slave MCLKs by distributing cables at
the board panel.
Receiving SSM information from the E1 interface

and sending it to the clock system.
Providing service link loopback at all levels and

service channel detection within the board.
Page39
Contents
2
Board Function
2.8 Clock Subsystem
Page40
VPU(MVPB)
Supporting functions such as announcement playing, digit

collecting, audio mixing and Multiple Frequency Control (MFC).
Implementing IP packet adaptation of voice services based on
UDP, Real-time Transport Protocol (RTP), and IP. Supporting

varied voice codec types including G.711A, G.711, G.723, G.726,
G.729, AMR, AMR 2 and FR/HR/EFR.
Accepting resource control and management from the CMU..
Page41
VPU(MTCB)
Supporting announcement playing, digit collecting, audio mixing and MFC.
Implementing IP packet adaptation of voice services based on UDP, RTP

and IP. Supporting varied voice codec types including G.711A, G.711,
G.723, G.726, G.729, AMR, AMR 2 and FR/HR/EFR.
Processing IuUP and NbUP at the same time and being fully in line with
the 3GPP TS 25.415 TS 29.415 protocol.
Providing the EC function, supporting 32 ms, 64 ms and 128 ms tail delay,

being in line with the G.168-2000 standard and supporting G.164/165
tone detection.
Receiving the resource control and management of the CMU.
Page42
Contents
2
Board Function
2.8 Clock Subsystem
Page43
SPF(MSPF)
Implementing signaling gateway functions. The pinch boards that attached on the
MSPF, receives signaling from TDM switching boards and then deals with it at
TDM level, and then the MSPF adapts TDM signaling to IP packets.
Implementing the core function of a signaling gateway by M3UA//M2UA/V5UA/IUA

adaptation on signaling, and forwarding adapted messages to the MGC.
SEP
SS7
UMG8900
IP
S7UP
S7UP
MTP3
MTP2
MTP1
MSOFTX3000
TDM
M2UA-NIF
M2UA
MTP2
SCTP
IP
MTP1
MAC
MTP3
IP
M2UA
SCTP
IP
MAC
Page44
Contents
2
Board Function
2.8 Clock Subsystem
Page45
Clock Subsystem
Page46
CLK(MCLK)
CLK is the system clock board, responsible for receiving line
clock signals extracted by interface boards and external
synchronous clock signals provided by BITS.
Each MGW frame is configured with two NET boards. In the

main control frame, the clock boards provide 16-kHz clock
signals to the NET boards of the frame through the
backplane. In other MGW frames, the clock boards provide
16-kHz clock signals to the NET boards through the
distributed cables.
MCLK
RUN
ALM
ACT
8K_IN2 8K_IN1
2M_IN 2M_OUT CLK_OUT2 ANT CLK_OUT1 CLK_OUT0
OFFLINE
The CLK also outputs external synchronous clock signals.

HUAWEI
Page47
Contents
2
Board Function
2.8 Clock Subsystem
Page48
Cascading Subsystem
1#
0#
B
L
U
2#
B
L
U
B
L
U
B
L
U
B
L
U
3#
B
L
U
T
N
U
N
E
T
N
E
T
T
N
U
T
N
U
N
E
T
N
E
T
T
N
U
4#
4*8K TDM
B
L
U
5#
N
E
T
8#
B
L
U
B
L
U
B
L
U
6#
B
L
U
B
L
U
7#
N
E
T
2*GE
1*FE
Page49
BLU(MBLU)
Providing 4x8 K TDM narrowband data channels to directly
MBLUb
connect frames through multi-mode optical fibers that are no more
Providing 2x1.25 G broadband packet data channels to directly

connect frames through multi-mode optical fibers that are no more
than 50 m spaced.
FE0
RUN
ALM
ACT
than 50 m spaced.
GE
T
AC
T
AC
TDM
T
AC
Providing 1x100 M IP control data channels to directly connect
T
AC
NK
LI 0
TX 0
RXK
N
LI 0
TX 0
RXK
N
LI 0
TX 0
RX
NK
LI 0
TX 0
RX
frames through category-5 twisted pair or super category-5 twisted
T
AC
pair that are no more than 50 m spaced.
T
AC
Providing board management and maintenance by the dedicated
COM0
NK
LI 0
TX 0
RX
NK
LI 0
TX 0
RX
MBus module of the board, communicating with and reporting
OFFLINE
board status and version to the main control board through FE

channels.
Page50
HUAWEI
FLU(MFLU)
Providing 1x8 K TDM data cascading channel for the MBLU.
Providing 1x1.25 G IP data cascading channel for the MBLU.
Providing 2x8 K TDM data cascading channels and 2x1.25 G GE

data cascading channels for the MBLU by two MFLU boards in
load-sharing mode.
Interacting with the main control board through a dedicated

maintenance module to monitor board temperature, voltage and
control power-on/off.
Page51
Questions
Please describe the UMG8900s boards classifications and

each classs function
Page52
Summary
UMG8900s logical subsystem
UMG8900s boards classification and each function
Page53
Contents
1. Overview
2. Board Function
3. Signaling Flow
Page54
Contents
3
Signaling Flow
3.1 Service Signaling Flow
3.2 Clock Signaling Flow
3.3 Loading Signaling Flow
3.4 Alarm Signaling Flow
Page55
Service Signaling Flow
Gateway Signal Control Flow (IP bearer)

MGC
Back
P
P
U
T
N
U
N
E
T
C
M
U
E
3
2
E
8
T
A
4
L
T
C
U
R
P
U
A
S
U
FE
Front
FE
O
M
U
S
P
F
C
M
U
Page56
Transfer flow for the UMTS access network signaling (PPU

adaptation)
MGC (MSOFTX3000)
RNC
MSOFTX3000
Back
P
P
U
N
E
T
RNC
T
N
U
A
4
L
FE
Front
FE
O
M
U
S
P
F
A
S
U
Page57
Transfer flow for the UMTS access network signaling (SPF

adaptation) MGC(MSOFTX3000)
RNC
MSOFTX3000
Back
P
P
U
N
E
T
RNC
T
N
U
A
4
L
FE
Front
FE
O
M
U
S
P
F
A
S
U
Page58
SS7 transfer flow

BSC/LE/V5AN/MSC
MSOFTX3000
BSC
Back
E
3
2
MGC
T
N
U
N
E
T
C
M
U
O
M
U
V
P
U
FE
TDM
Front
FE
TDM
S
P
F
Page59
Bearer Data Flow (TDMIP)

TDM
Back
E
3
2
IP
N
E
T
T
N
U
E
8
T
Front
GE
TDM
V
P
U
H
R
B
Page60
Bearer Data Flow (TDMATM)

ATM
TDM
Back
E
3
2
N
E
T
T
N
U
A
4
L
Front
GE
TDM
V
P
U
A
S
U
Page61
Bearer Data Flow (ATMIP)

IP
IP
ATM
ATM
Back
A
4
L
N
E
T
A
S
U
O
M
U
T
N
U
E
8
T
Front
GE
TDM
H
R
B
Page62
Bearer Data Flow (IPIP)

IP (Domain 0)
IP (Domain 1)
IP (Domain 1)
IP (Domain 0)
Back
E
8
T
N
E
T
H
R
B
O
M
U
T
N
U
E
8
T
Front
GE
TDM
H
R
B
Page63
Service Resource Signal Flows
Announcement Playing Signal Flow
Back
A
4
L
T
N
U
E
3
2
C
M
U
E
8
T
Front
A
FE
S
GE
TDM U
V
P
U
S
P
F
H
R
B
Page64
Contents
3
Signaling Flow
Page65
Clock Extraction
Page66
Clock Distribution
Page67
Contents
3
Signaling Flow
Page68
FTP Server
LMT
FE crossover
network cable
C
L
K
A
4
L
T
N
U
N
E
T
N
E
T
T
N
U
P
4
L
E
8
T
G
1
O
S
2
L
E
3
2
master/ slave
FE control bus
V
P
U
A
S
U
FE crossover
network cable
FTP service
O
M
U
O
M
U
H
R
U
RS232 cable
hyper terminal
Page69
OMU Embedded BAM

O
M
U
T
N
U
N
E
T
O
M
U
main control
frame
master/slave
FE bus
N
E
T
T
N
U
N
E
T
T
N
U
1*FE
N
E
T
M
P
U
M
P
U
service
F
L
U
T
N
U
board
B
L
U
central exchange
frame
master/slave
FE bus
Page70
OMU Embedded BAM

O
O
M
M
U
U
main control frame
master/slave
FE bus
T N
T
N E NE N
U T T U
central exchange frame
M M
P P
U U
F
L
U
B
L
U
T
N
U
N
E
T
N
E
T
F
L
U master/slave
FE bus
T
N
U
B
L
U
1*FE+2*GE+4*TDM
T
T
N N N N
E E
U T T U
service frame
M M
P P
U U
T
T
N
N
N E E N master/
U T T U slave
FE bus
master/slave
FE bus
M M
P P
U U
extended control frame
service
board
M M
P P
U U
master/slave
FE bus
T N N T
N E E N
U T T U
service frame
Page71
Contents
3
Signaling Flow
Page72
Alarm Path
LMT
Note: when LMT is connected

with the host through LanSwitch,
the straight-thru cable is used
crossover network
cable
service
board
C
L
K
A
4
L
M
T
N
U
N
E
T
N
E
T
T
N
U
P
4
L
M
S
2
L
M
E
3
2
master/ slave
master/ slave
A
S
U
O
M
U
O
M
U
H
R
U
V
P
U
service
board
V
P
U
FE bus
Mbus
Page73
Alarm Path
T
N
U
O
M
U
O
M
U
N
E
T
N
E
T
main control frame

master/
slave
FE bus
T
N
U
1*FE+2*GE+4*TDM
F
L
U
T
N
U
N
E
T
M
P
U
N
E
T
T
N
U
service
board
B
L
U
central exchange frame
M
P
U
master/
slave
Mbus bus
R
P
U
Page74
Alarm Path
main control frame

O O
M M master/slave
U U
FE bus
T
T
N N N N
U E E U
T T
F
L
U
M M
P P
U U
F
L
U maste
r/slave
FE bus
central
exchange
frame
B T N N T B
L N E E N L
U U T T U U
1*FE+2*GE+4*TDM
T
T
N N
N N
E
E
U T T U
service frame
M M
P P
U U
extended control frame
T
T
N N N N
U E E U master/
T T
slave
Mbus
M M
P P
U U
sevice
board
M M
P P
U U
master/
slave
Mbus
T
T
N N
N N
E
E
U T T U master/
slave
Mbus
service frame
Page75
Questions
Please describe all kinds of signaling flow.
Page76
Summary
Service signaling flow
Clock signaling flow
Loading signaling flow
Alarm signaling flow
Page77
Contents
1. Overview
2. Board Function
3. Signaling Flow
Page78
Contents
4
Concatenation and Cables

4.1 Cascading Cable Distribution
4.2 Clock Cable Distribution
4.3 Monitoring Cable Distribution
Page79
Two Frames Cascading
1#
T
N
U
N
E
T
N
E
T
T
N
U
2#
T
N
U
N
E
T
N
E
T
T
N
U
4*8K TDM
2*GE
1*FE
Page80
More than Three Frames

Cascading
1#
0#
B
L
U
2#
B
L
U
B
L
U
B
L
U
B
L
U
3#
B
L
U
T
N
U
N
E
T
N
E
T
T
N
U
T
N
U
N
E
T
N
E
T
T
N
U
4#
4*8K TDM
B
L
U
5#
N
E
T
8#
B
L
U
B
L
U
B
L
U
6#
B
L
U
B
L
U
7#
N
E
T
2*GE
1*FE
Page81
Contents
4

Page82
Clock Extraction
Page83
Clock Cable Distribution

Master clock cable
M
C
L
K
M
C
L
K
M
N
E
T
M
N
E
T
M
N
E
T
M
N
E
T
M
N
E
T
M
N
E
T
M
N
E
T
M
N
E
T
M
N
E
T
M
N
E
T
M
N
E
T
M
N
E
T
M
N
E
T
M
N
E
T
M
N
E
T
M
N
E
T
M
N
E
T
M
N
E
T
Slave clock cable
Page84
Contents
4

Page85
Monitoring Cable Distribution

Power distribution frame DB15
Service frame
Power distribution frame DB15
Service frame
DB9
Fan box
DB15
Air deflector
DB9
Fan box
Air deflector
Main control frame
Service frame
DB9
Fan box
DB15
DB9
Fan box
Air deflector
Air deflector
Central switch frame
Service frame
DB9
Fan box
DB15
DB15
Main control cabinet
DB15
DB9
Fan box
DB15
Service cabinet
Page86
Questions
If there are 4 frames, how to cascade them?
Page87
Summary
Cascading cable distribution
Clock cable distribution
Monitoring cable distribution
Page88
Summary
Board functions
Signaling flow
Concatenation and cables
Page89
Thank you
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04 UMG8900 Hardware System

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04 UMG8900 Hardware System

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UMG8900 Hardware

Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.

Upon completion this course, you will be able to:

Perform UMG8900 shelf frame and boards classifications,

Know UMG8900 logical subsystem

Perform the concatenation

Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.

UMG8900 System Description

UMG8900 Hardware Description Manual

UMG8900 Architecture and Principle

Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.

4. Concatenation and Cables

Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.

Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.

Shelf and Frame

(1) Frame lintel

(5) Filter box

Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.

(3) Integrated fan

Shelf and Frame

(2) Mounting angle

(3) Embedded fan box

(1) Mounting angle

(2) Power-in terminal of frame

(3) Interface for monitoring cable

(4) Standby power-in terminal of fan box

(5) Interface for alarm cable

(6) Power-out terminal of fan box

(7) Power-in terminal of fan box

(8) DIP switch for setting frame ID

Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.

The main control frame: Manages and controls the whole

The central switching frame: Implements frame subtending

The service frame : Implements service processing and interfacing

The extended control frame: It is configured when the networking

controlling and managing the service frames.

Power distribution frame

Power distribution frame

Extended control frame

Air defence frame

Air defence frame

Air defence frame

Main control frame

Air defence frame

Air defence frame

Air defence frame

Central switch frame

Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.

DIP switch setting

Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.

Front boards slot distribution

Back boards slot distribution

Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.

Please describe the classification, function and location in

How to set the DIP switch?

Please describe the slot distribution of UMG8900.

Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.

Frame classification, function and distribution in shelf

Slot distribution in frame

Dip switch setting.

Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.

4. Concatenation and Cables

Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.

Copyright 2006 Huawei Technologies Co., Ltd. All rights reserved.