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other one at the first floor. The bulb can be turned ON and also can be turned OFF by
any one of the switches irrespective of the state of the other switch. The logic of
switching of the bulb resembles
(A) AND gate (B) OR gate (C) XOR gate (D) NAND gate
(GATE-2013)
Answer : (C)
Solution: Let the two bulbs be p1 and p2
P1
OFF
OFF
ON
ON
P2
OFF
ON
OFF
ON
OUTPUT
OFF
ON
ON
OFF
B) XY,XYZ,XYZ
D)XYZ,XYZ,XYZ,XYZ,
(GATE-2012)
Answer: ( A )
Solution:
C)11111001 D)111111001
Answer: (B)
Solution: P=11101101 Q=11100110
Subtract Q hence find out 2s complement=00011010
P=11101101 Q=00011010 Discard the carry 00000111
(GATE-2008)
4) Which of the Boolean expression correctly represents the relation between P,Q,R and M1?
(GATE 2008)
A) M1 = (P OR Q) XOR R
B) M1 = (P AND Q) XOR R
C) M1 = (P NOR Q) XOR R
D) M1 = (P XOR Q) XOR R
Answer : ( D )
Solution: M1=[(PQ)(P+Q)] XOR R
=[(P+Q)(P+Q)] XOR R
=(PQ+PQ) XOR R
=P XOR Q XOR R.
5 ) For the circuit shown in the figure I0-I3 are inputs to the 4:1 multiplexer R(MSB0 and
are control bits
(GATE-2008)
(GATE-2007)
Answer : ( D )
7) In the following circuit, output at the second mux x is given by (GATE-2007)
A)
B)
C)
D)
X = ABC+ABC+ABC+ABC
X = ABC+ABC+ABC+ABC
X = AB+BC+AC
X = AB+BC+AC
Answer: ( A )
Solution : For MUX 1
A(S1)
0
0
1
1
B(S1)
0
1
0
1
Y1
0
1
1
0
Y1=AB+AB
For MUX 2
Y1(S1)
0
0
1
1
C(S0)
0
1
0
1
Y
0
1
1
0
Y=Y1C+Y1C
= (AB+AB)C+(AB+AB)C
Therefore Y = ABC+ABC+ABC+ABC
8 ) For the circuit shown, the counter state (Q1,Q0) follows the sequence (GATE-2007)
Answer: (B)
Solution: D0=(Q0+Q1)=Q0. Q1 and D1=Q0
Q1(t)
0
0
1
0
.
.
Q0(t)
0
1
0
0
.
.
Q1(t+1)=D1=Q0(t)
0
1
0
0
.
.
Q1(t+1)=D0=(Q0+Q1)
1
0
0
1
.
.
Answer : ( A )
10) For the circuit shown in figure below,two 4-bit parallel-in-serial-out shift registers are
loaded with the data shown are used to feed the data to full adder. Initially,all the flip=flops are
in clear state.After applying two clock pulses,the outputs of the full-adder should be
(GATE 2006)
(A) S = 0
(B) S = 0
(C) S = 1
(D) S = 1
C0 = 0
C0 = 1
C0 = 0
C0 = 1
Answer: (D)
11) Decimal 43 in Hexa-decimal and BCD number system is respectively
(A) B2,0100 0011
(B) 2B, 0100 0011
(C) B2, 0011 0100
(D) B2, 0100 0100
(GATE-2005)
Answer: ( B )
Solution: First, convert the given code to BCD code and then to binary code.
12) The Boolean function f implemented in the figure using two multiplexers using two input
multiplexers is
(GATE-2005)
(A) ABC+ABC
(B) ABC+ABC
(C) ABC+ABC
(D) ABC+ABC
Answer:(A)
Solution:Selection line B can be 0 or 1
When B=0 CBA
When B=1 CBA
Therefore f=ABC+ABC
(GATE-2004)
-31 to +31
-63 to +64
-64 to +63
-32 to +31
Answer: (A)
Solution: Complement range of numbers is 2n-1 +1 to 2n-1 -1
When n=6 it ranges from -31 to +31
15) A digital system is required to amplify a binary-encoded audio signal. The user should be
able to control the gain of the amplifier from a minimum to a maximum of 100 increments.
The minimum number of bits required to encode,in straight binary ,is (GATE-2004)
(A) 8
(B) 5
(C) 6
(D) 7
Answer: (D)
Solution:2 to the power of 7 =128
Therefore for 100 increments 7 bits are required.
16) Choose the correct one from among the alternatives A,B,C,D after matching an item from
Group-1 with the most appropriate item in Group-2
(GATE-2004)
Group-1
P:Shift Register
Q:Counter
R:Decoder
A)
B)
C)
D)
Group-2
1:Frequency Division Multiplexing
2:Addressing in memory chips
3:Serial to parallel data conversion
P-3,Q-2,R-1
P-3,Q-1,R-2
P-2,Q-1,R-3
P-1,Q-2,R-2
Answer : (B)
17) The figure shows the internal schematic of a TTL AND-OR-INVERT(AOI) gate.For the
inputs shown in figure, the output Y is
(A) 0 (B) 1 (C) AB (D) (AB)
(GATE-2004)
Answer : (A)
Solution:In TTL AND-OR inverter gate,propagation delay of transistor depends on
RC elements,When inputs are floating output is zero.
(GATE-2011)
19) When the output Y in the circuit below is 1it implies that data has
A) Changed from 0 to 1
B) Changed from 1 to 0
C) Changed in either direction
D) Not changed
(GATE-2011)
Answer: (A)
Solution: When data is0 Q is 0
And if q is 1 first fliopflop data is changed to 1
Qis 1it results in first D
Q is connected to2nd flipflop so that Q2=1
So that inputs of AND gate is 1.Hence Y=1
(GATE-2011)
Answer: (D)
Solution:0 is connected to I0 and I3
1 is connected to I1 and I2
Therefore F=PQ+PQ=XOR(P,Q)
21) In an 8085 microprocessor, the instruction CMP B has been executed while the content of
the accumulator is less than that of register B. As a result
(A) Carry flag will be set but Zero flag will be reset
(GATE 2003)
(B) Carry flag will be rest but Zero flag will be set
(C) Both Carry flag and Zero flag will be rest
(D) Both Carry flag and Zero flag will be set
ANS:A
SOL : CMP B
If A<R
22)
(GATE 2004)
(ii) Two computers exchange data using a pair of 8255s. Port A works as a bidirectional
data port supported by appropriate handshaking signals.
The appropriate modes of operation of the 8255 for (i) and (ii) would be
(A) Mode 0 for (i) and Mode 1 for (ii)
(B) Mode 1 for (i) and Mode 2 for (ii)
(C) Mode for (i) and Mode 0 for (ii)
(D) Mode 2 for (i) and Mode 1 for (ii)
Ans: D
SOL :
For 8255, various modes are described as following.
Mode 1 : Input or output with hand shake
In this mode following actions are executed
1. Two port (A & B) function as 8 - bit input output ports.
2. Each port uses three lines from C as a hand shake signal
3. Input & output data are latched.
Form (ii) the mode is 1.
Mode 2 : Bi-directional data transfer
This mode is used to transfer data between two computer. In this mode port A
can be configured as bidirectional port. Port A uses five signal from port C as
handshake signal.
For (1), mode is 2
Hence (D) is correct answer.
(GATE 2004)
23)
The number of memory cycles required to execute the following 8085 instructions
(i) LDA 3000 H
(ii) LXI D, FOF1H
would be
(A) 2 for (i) and 2 for (ii) (B) 4 for (i) and 3 for (ii)
(C) 3 for (i) and 3 for (ii) (D) 3 for (i) and 4 for (ii)
ANS: B
SOL : LDA 16 bit & Load accumulator directly this instruction copies data byte
from memory location (specified within the instruction) the accumulator.
It takes 4 memory cycle-as following.
1. in instruction fetch
LXI H, 9258H
MOV A, M
; (9258H) A
CMa
MOV M, A
; AM
(GATE 2004)
25)
It is desired to multiply the numbers 0AH by 0BH and store the result in the
accumulator. The numbers are available in registers B and C respectively. A partof the
8085 program for this purpose is given below
MVI A, 00H
LOOP -----------
----HLT
END
The sequence of instructions to complete the program would be
(A) JNX LOOP, ADD B, DCR C
(B) ADD B, JNZ LOOP, DCR C
(C) DCR C, JNZ LOOP, ADD B
(D) ADD B, DCR C, JNZ LOOP
ANS:D
SOL :
MVI A, 00H
; Clear accumulator
LOOP ADD B
DCR C
; Decrement C
JNZ LOOP
HLT
END
This instruction set adds the contents of B to accumulator to contents of C times.
Hence (D) is correct answer.
(GATE2005)
26)
010BH ADD M
ANS:B
(GATE 2008)
34) For the 8085 assembly language program given below, the content of the accumulator
after the execution of the program is
Ans: C
SOL:
(GATE 2011)
35) An 8085 assembly language program is given below. Assume that the carry flag is Initially
unset. The content of the accumulator after the execution of the program is
(GATE 2013)
37) The number of hardware interrupts (which require an external signal to interrupt)
Present in an a 8085 microprocessor are
a)1 b)4
c) 5
(GATE2000)
d)13
Ans: C
Sol: 1) Trap
2) RST 7.5
3) RST 6.5
4)RST 5.5
5)INTR
39) The contents of Register B and accumulator A of 8085 microprocessor are 49H and 3AH
respectively. The contensts of A nad the status of carry flag(cy) and sign flag(S) after
execting SUB B instructions are
a) A=F1,CY=1,S=1 B) A=0F,CY=1,S=1
C) A=F0,CY=-0,S=0 D) A=1F,CY=1,S=1
ANS:A
SOL:
A3AH=00111010
B49H=01001001
(GATE 1993)
SUB A11110001
CY=1,S=1,A=F1.
40) An instruction used to set the carry fag in a computer can be classified as
a) data transfer instruction
b) arithimetic
c) logical
(GATE2000)
d) program control
Ans:B
SOL: After performing an arithmetic operations the status of the flags is changed.
41) In a microprocessor, the address the next instruction to be execute, is stored in (Gate1993)
b) Stack pointer b) address latch c) program counter d) general purpose register.
Answer:C
SOL: Program counter is one which stores the address of next instruction to be executed.
(GATE 1995)
(GATE 1995)