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PCI-E 1X Add-in card adapter for Mini PCI-E card Notebook PC

Reference Schematic Rev. 1.00


Schematic update note:
First released..............2008/May/6

V1.00

(CTXn + TXn) and (CTXp + TXp) are a 100


ohm differential impedance pair (50 ohm
single ended) and must be length matched
with 5 mils. i.e. CTXp must be within 5
mils of CTXn, TXp must be within 5 mils
of TXn, and (CTXp + TXp) must be within
5 mils of (CTXn + TXn).The coupling
capacitors must be placed as close to
the PCI Express Edge connector as
possible.

CDBA140-G
Q1
MTM55N10
C1

1
GATE

680p

U1

C4

C5

100u

Card dimensions and design should match


requirements for the standard half
length PCI-Express card and should be
designed to use the card retainer as
detailed in the PCI Express
Electromechanical specification rev
1.0a. Height may be increased to allow
for placement of all components but
width and thickness must be as required
in the specification

PCI Clocks should be slightly longer than


the longest trace on the PCI bus. Clocks
should be length matched to each other
within 10 mils. The PCI_FBCLK trace
must be 2.5 inches (2500 mils) longer
than the length of the other clock
signals (this is for the total trace
length which is the sum of the net
between U1.P3 and C111 and the the net
from C111 to U1.B10).

D1

GSRH63_10uH

C6
10u

Vin

EXT

DELAY

VFB

CE

0.22u

GND

C2 C3

TXp
TXn
RXp
RXn

All 32 bit PCI slots must be placed so


the slot can be put on the board as
either a 3V or a 5V slot. All pins used
as keying pins (A12, A13, A50, A51, B12,
B13, B50, B51) should be put on the board
and connected to the GND plane. Mounting
holes must be placed on either side of
the socket.

CLK+
CLK-

WAKE#

R4
0

15
13
11
9
7
5
3
1

10u

DVCC_3.3V

Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V

16
14
12
10
8
6
4
2

GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#

9K

DC/DC circuit 3.3V to 12V/200mA For PCI-E 1X slot

Voltage Regulator

+3.3VAUX
DVCC_12V

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3VAUX
PERST#
Reserved
GND
Mechanical Key

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

+
100u

R3

R1211N002B

+3.3V +1.5V
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
Reserved
Reserved

100K

R2
30K

CN1
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

R1

RXp and RXn are a 100 ohm differential


impedance pair (50 ohm single ended) and
must be length matched with 5 mils.
C

L1

All PCI Signals should be length


matched within 50 mils with the
following exceptions: clk pins (see
note below), nets: PCI_PRST, PCI_INTA#,
PCI_INTB#, PCI_INTC#, PCI_INTD#,
PCI_ACK64#, PCI_M66EN, and PCI_PME# are
not synchronous and may be of any
length.

SOURCE

PCB Layout Guideline

DVCC_12V
3
DRAIN

DVCC_3.3V

DVCC_3.3V
B

CN2

SMDAT
SMCLK
AUX
PERST#

SMCLK
SMDAT

R5
0
C7 + +

AUX
WAKE#
C8 + +

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11

+12V
+12V
+12V
GND
SMCLK
SMDAT
GND
+3.3V
JTAG1
3.3VAUX
WAKE#

PRSNT1#
+12V
+12V
GND
JTAG2
JTAG3
JTAG4
JTAG5
+3.3V
+3.3V
PERST#

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11

GND
REFCLK+
REFCLKGND
PERp0
PERn0
GND

A12
A13
A14
A15
A16
A17
A18

C9 + +

PERST#

Mechanical Key
10u
+3.3V

100u_DIP

B12
B13
B14
B15
B16
B17
B18

TXp
TXn

RSVD
GND
PETp0
PETn0
GND
PRSNT2#
GND

100u_DIP
CLK+
CLKRXp
RXn

PCIE-1X

MINI PCI-E CARD

Mini PCI-E Card

PCI-E 1x Slot
Title
Mini PCI-E to PCI-E 1x
Size
A3
Date:

Document Number
MINI PCI-E CARD
Tuesday, May 06, 2008

Rev
1.0

Aeneas Electronics Co,. Ltd.


Sheet
1

of

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