FLIP-FLOPS

Flip-flops are the most common and basic memory devices used for information storage in
sequential circuits. A flip-flop can stay in one of two logical states. To change its state we
need a new input signal. This makes the flip-flop a 1 bit memory device. There are three basic
types of flip-flops:

Memory flip-flops have special inputs to be set or reset. The flip-flop preserves its state
as long as there is no new input signal
Delay flip-flops output the state their input had one cycle ago. If the input signal
changes at step n the output changes at step n+1
Toggle flip-flop or T flip-flop changes its output on each clock cycle if the input
given to T is high (or 1). If the input of T is low (or 0) the output does not change,
meaning it is preserved

EXPERIMENT

OBJECTIVES:
Investigate the operation of RS flip-flop.

Equipment and ICs:

Digital Trainer Circuit

IC-7400
Wires and Probes

THEORY :
Reset Set (RS) Flip-flop
A simple memory flip-flop is the RS FF. This device has two inputs - S for setting and R for
resetting the flip-flop (hence its name). The RS flip-flop preserves its states as long as the inputs
S and R are 0. If it receives a set signal, it turns to 1, regardless of its former state. A reset signal
enforces a 0 state. This behavior is illustrated by the truth table below (Q n is the preceding state of
Qn+1).

Truth-Table for RS-Flip-flop

The most common realizations of RS FFs are based on NOR or NAND gates. But we will
perform only by NAND Gates. The following is the NAND-Gate representation and symbol:

NAND Gate Implementation

PROCEDURE:
1. First we took a digital trainer kit ,checked it, and connected it to main
power supply.
2. Then we took IC-7400 along with wires/probes and checked the
operations.
3. Then we made a clean and tidy circuit on the bread-board with the help of
circuit diagram above.
4. Then we provided the inputs and varied them with the help of ports given
for changing the inputs.
5. We observed the outputs by the on/off of LEDs provided for displaying
output.
6. Recorded the values in the truth table.

RESULT:
The designing of RS flip-flop using NAND Gates has been successfully made and
the desired output has been observed and recorded.

PRECAUTIONS/SOURCES OF ERRORS:
1.
2.
3.
4.

Check the IC before use.

Circuit should be clean and connections should be tight.
Observe output carefully.
Avoid short-circuit.

EXPERIMENT
OBJECTIVES:
Investigate the operation of JK flip-flop.

Equipment and ICs:

Digital Trainer Circuit

IC-7400
Wires and Probes

THEORY:
Jump Kill (JK) Flip-flop
The RS FF presented in the previous section has a serious disadvantage. For an RS FF one
input combination is not allowed. The JK FF is a modified RS FF (J corresponds to the set and
K to the reset input), which inverts its state when the input J = 1 and K = 1 occurs. Since it has
no forbidden input combinations, the JK FF can be easily used to generate other types of
flipflops.

4The characteristic equations for the JK FF is Q n +1 = K Q n + J Q n .The most common

realizations of JK FFs are based on NOR or NAND gates. But we will perform only by NAND
Gates. The following is the NAND-Gate representation and symbol:

NAND Gate Implementation

Logic Symbol

PROCEDURE:
1. First we took a digital trainer kit , checked it, and connected it to main
power supply.
2. Then we took IC-7400 along with wires/probes and checked the
operations.
3. Then we made a clean and tidy circuit on the bread-board with the help of
circuit diagram above.
4. Then we provided the inputs and varied them with the help of ports given
for changing the inputs.
5. We observed the outputs by the on/off of LEDs provided for displaying
output.
6. Recorded the values in the truth table.

Observation table for JK Flip-Flop

RESULT:
The designing of JK flip-flop using NAND Gates has been successfully made and
the desired output has been observed and recorded.

PRECAUTIONS/SOURCES OF ERROR:
1.
2.
3.
4.

Check the IC before use.

Circuit should be clean and connections should be tight.
Observe output carefully.
Avoid short-circuit.

EXPERIMENT
OBJECTIVES:
Investigate the operation of D flip-flop.

Equipment and ICs:

Digital Trainer Circuit

IC-7400,7404
Wires and Probes

THEORY:
Delay (D) Flip-flop
As the name implies the purpose of a D FF is to temporary store (or delay) a single bit. A
signal of 0 or 1 present at the input D is transferred to the output Q whenever the clock CLK is
set to 1.
A delay flip-flop uses only the situations where the J and K inputs are different.

Logic Symbol

Circuit Diagram

_
The equation for a D FF built from JK FF would be: D = J =K.

Realization using JK FF

Truth Table

PROCEDURE:
1. First we took a digital trainer kit ,checked it, and connected it to main
power supply.
2. Then we took IC-7400,7404 along with wires/probes and checked the
operations.
3. Then we made a clean and tidy circuit on the bread-board with the help of
circuit diagram above.
4. Then we provided the inputs and varied them with the help of ports given
for changing the inputs.
5. We observed the outputs by the on/off of LEDs provided for displaying
output.
6. Recorded the values in the truth table.

Observation Table

RESULT:
The designing of D flip-flop using NAND Gates has been successfully made and
the desired output has been observed and recorded.

PRECAUTIONS/SOURCES OF ERROR:
1.
2.
3.
4.

Check the IC before use.

Circuit should be clean and connections should be tight.
Observe output carefully.
Avoid short-circuit.

EXPERIMENT
OBJECTIVES:
Investigate the operation of T flip-flop.

Equipment and ICs:

Digital Trainer Circuit

IC-7400
Wires and Probes

THEORY:
Toggle (T) Flip-flop
A toggle flip-flop is just a JK FF in disguise. Fig. below shows the gate symbol of a T FF built
from a JK FF merely by connecting its J and K terminals together. The T FF is a complementing
flip-flop. When T=0(J=K=0) a clock edge does not change the output. When T=1(J=K=1) a clock
edge complements the output. It will toggle between 0 and 1 with every clock impulse. One of the
T FF properties is that its output signal runs at half the frequency of the input.
The characteristic equations for the T FF can be obtained from the truth table:
Qn+1=T Qn

Truth Table

Logic Symbol

Implementation by NAND Gates

PROCEDURE:
1. First we took a digital trainer kit ,checked it, and connected it to main
power supply.
2. Then we took IC-7400 along with wires/probes and checked the
operations.
3. Then we made a clean and tidy circuit on the bread-board with the help of
circuit diagram above.
4. Then we provided the inputs and varied them with the help of ports given
for changing the inputs.
5. We observed the outputs by the on/off of LEDs provided for displaying
output.
6. Recorded the values in the truth table.

Observation Table

RESULT:
The designing of T flip-flop using NAND Gates has been successfully made and
the desired output has been observed and recorded.

PRECAUTIONS/SOURCES OF ERROR:
1.
2.
3.
4.

Check the IC before use.

Circuit should be clean and connections should be tight.
Observe output carefully.
Avoid short-circuit.