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Transceiver (NA5TR1)
Datasheet
Version 2.3
NA-09-0230-0388-2.3
This document contains information on a pre-engineering chip.
Specifications and information herein are subject to change
without notice.
Document Information
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Document Information
Document Title:
Document Version:
2.3
Published (yyyy-mm-dd):
2010-03-04
Current Printing:
2010-3-4, 10:15 am
Document ID:
NA-09-0230-0388-2.3
Document Status:
Released
Disclaimer
Nanotron Technologies GmbH believes the information contained herein
is correct and accurate at the time of release. Nanotron Technologies
GmbH reserves the right to make changes without further notice to the
product to improve reliability, function or design. Nanotron Technologies
GmbH does not assume any liability or responsibility arising out of this
product, as well as any application or circuits described herein, neither
does it convey any license under its patent rights.
As far as possible, significant changes to product specifications and
functionality will be provided in product specific Errata sheets, or in new
versions of this document. Customers are encouraged to check the Nanotron website for the most recent updates on products.
Page ii NA-09-0230-0388-2.3
Trademarks
All other trademarks, registered trademarks, and product names are the
sole property of their respective owners.
This document and the information contained herein is the subject of
copyright and intellectual property rights under international convention.
All rights reserved. No part of this document may be reproduced, stored
in a retrieval system, or transmitted in any form by any means, electronic, mechanical or optical, in whole or in part, without the prior written
permission of Nanotron
Technologies GmbH.
Copyright 2010 Nanotron Technologies GmbH.
Table of Contents
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Table of Contents
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v
1 Chip Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Key Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Quick Reference Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3 nanoLOC NA5TR1 Block Diagram - Simplified . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
4 Sample Application With Recommended Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5 Main Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
6 General Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
7 nanoLOC System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
8 Target Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
9 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
10 Nominal Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
11 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12 Pin Connections and Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12.1
12.2
12.3
12.4
12.5
12.6
12.7
12.8
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin 2: RRef External Precise Reference Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pins 19-22: D0 to D3 Programmable Digital I/Os. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin 27: CIRQ Microcontroller Interrupt Request. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin 28: VDD1V2_Cap 1.2 V Digital Power Supply Decoupling . . . . . . . . . . . . . . . . . . . . . . . .
Pin 30: /POnReset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin 47: VBalun DC voltage for RF output stage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chip Memory Spaces and Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
13
13
13
13
14
14
14
13 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
13.1 General / DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.2 Transmitter (TX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.2.1 General Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.2.2 Chirp Specification (CSS - Chirp Spread Spectrum) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.3 Receiver (RX) General Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.4 Dynamic Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.5 Quartz Controlled Oscillator for Reference Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.6 Quartz Controlled Oscillator for Real Time Clock (RTC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.7 Local Oscillator (LO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.8 Digital Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.9 Power Supply for the External Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.10 Power Management States and Current Consumption. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
16
16
16
17
17
18
18
18
19
20
20
14 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
14.1
14.2
14.3
14.4
14.5
14.6
14.7
14.8
14.9
14.10
14.11
14.12
21
21
22
22
22
23
23
23
24
25
25
26
Table of Contents
nanoLOC TRX Transceiver (NA5TR1) Datasheet
28
28
28
28
28
29
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCB Layout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RF Test Module Bill of Materials (BOM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
43
43
47
50
Page iv NA-09-0230-0388-2.3
List of Tables
nanoLOC TRX Transceiver (NA5TR1) Datasheet
List of Tables
Table 1: Quick reference data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Table 2: Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 3: Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 4: RRef (pin 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 5: VDD1V2_Cap (Pin 28) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 6: VBalun (Pin 47) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 7: General / DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 8: Transmitter general parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 9: Transmitter Chirp specification (CSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 10: Receiver general parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 11: Dynamic performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 12: Quartz controlled oscillator for reference frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 13: Quartz Controlled Oscillator for Real Time Clock (RTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 14: Local Oscillator (LO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 15: Digital Interface to Sensor / Actor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 16: Power supply for external microcontroller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 17: Power management states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 18: SPI bus timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 19: Typical output power for RfTxOutputPower register values . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 20: VFQFPN-48 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 21: Recommended footprint dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 22: Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 23: Tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 24: Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 25: Example Application bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 26: RF Test Module bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
List of Figures
Figure 1: nanoLOC block diagram (simplified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 2: Sample application showing recommended circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 3: nanoLOC TRX Transceiver (NA5TR1) block diagram (simplified) . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 4: nanoLOC TRX Transceiver (NA5TR1) pin assignment (through top view) . . . . . . . . . . . . . . . . . 11
Figure 5: /POnReset timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 6: Turn-on time Rx: time = tRxTO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 7: Turn-on time Tx: time = tTxTO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 8: Switch time from Tx to Rx (from ACK to DATA mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 9: Switch time from Tx to Rx (from DATA to DATA mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 10: Switch time from Tx to Rx (from DATA to ACK mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 11: Switch time from Rx to Tx (from ACK to DATA mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 12: Switch time from Rx to Tx (from DATA to DATA mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 13: Switch time from Rx to Tx (from DATA to ACK mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 14: 32 MHz crystal start-up time: time = tXtalSU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 15: Start-up time for LO frequency calibration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 16: SPI bus write timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 17: SPI bus read timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 18: nanoLOC output power control measured at RF Test Module SMA connector . . . . . . . . . . . . 27
NA-09-0230-0388-2.3 Page v
List of Figures
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Page vi NA-09-0230-0388-2.3
Chip Summary
nanoLOC TRX Transceiver (NA5TR1) Datasheet
1 Chip Summary
The nanoLOC TRX Transceiver is a lowpower, highly integrated mixed signal chip
with ranging capabilities utilizing Nanotrons unique wireless communication
technology Chirp Spread Spectrum (CSS).
Adjustable Frequencies
Supporting a freely adjustable center frequency with three non-overlapping frequency channels, nanoLOC enables
multiple physically independent networks
and improved coexistence with existing 2.4 GHz wireless technologies.
Ranging and Robust Wireless Communication
With its unique ranging feature, nanoLOC TRX measures the link distance between two nodes,
thus supporting location-aware applications. Example applications include location-based services
(LBS), enhanced RFID, and asset tracking (2D/3D RTLS). As ranging is performed during regular
data communication, additional infrastructure, power, and/or bandwidth is not required.
The nanoLOC TRX Transceiver includes a sophisticated MAC controller with CSMA/CA, TDMA,
and FDMA. Forward Error Correction (FEC) and 128 bit hardware encryption are selectable.
To minimize software and microcontroller requirements, scrambling, automatic address matching,
and packet retransmission can be enabled. Furthermore, data rates are selectable from 2 Mbps to
125 kbps.
1.1
Key Features
+
Software controlled power supply for external microcontroller allows further energy
saving
Note: For more a more detailed list, see 5. Main Features on page 5.
NA-09-0230-0388-2.3 Page 1
Parameter
Value
Unit
2.7
2.3
dBm
Mbps
-95
dBm
-97
dBm
25
mA
30
mA
35
mA
35
mA
33
mA
In shut-down mode
-40 to +85
Number
Number
14
Number
22
MHz
80
MHz
2.5
2.5
a.
b.
c.
Page 2 NA-09-0230-0388-2.3
VDDA_DCO
Digital
IO
Xtal32MP
Xtal32MN
RRef
D3
D2
D1
32 kHz
Osc
D0
Xtal32kP
Battery
Management
Xtal32kN
DigitalGND
DigitalVcc
Analog GND
CReset
C
Management
Analog Vcc
/POnReset
CVcc
Synthesizer
RTC
CIRQ
VBalun
LPF
Chirp
Pulse
Sequencer
DAC
LPF
PA
IQ MOD
DAC
TxP
TxN
VDD1V2Cap
Tx/Rx
SpiClk
SpiSSn
Digital
Processing
VGA
VGA
LPF
ADC
SpiRxD
LPF
ADC
VGA
IQ DEMOD
SpiTxD
RxP
RxN
LNA
VGA
VDDA_ADC
NA-09-0230-0388-2.3 Page 3
Bandpass Filter
Balun
VCC
nc
nc
VSSA
VSSA
RxN
RxP
VSSA
TxN
TxP
VSSA
VBalun
VDDA
GND
VCC
48 47 46 45 44 43 42 41 40 39 38 37
VDDA
RRfef
VSSA
VDDA_DCO
Xtal32kP
Xtal32kN
Xtal32MP
Xtal32MN
Tx/Rx
VSSD
VSSD
VDDD
36
35
34
33
nanoLOC TRX
NA5TR1
5
6
32
31
30
29
28
10
27
11
26
12
25
VDDA
VCC
VDDA
VSSA
VCC
nc
VDDA_ADC
VCC
VSSD
/POnReset
CVcc
VDD1V2_Cap
CIRQ
CReset
VSSD
VCC
VDDD
VSSD
D3
D2
D1
D0
SpiRxD
SpiTxD
/SpiSsn
SpiClk
VSSD
VDDD
13 14 15 16 17 18 19 20 21 22 23 24
Actor
Temperature
Control
Unit
VCC
Microcontroller
Note: For more details, see Appendix 1: Example Application - RF Module on page 37.
Page 4 NA-09-0230-0388-2.3
Main Features
nanoLOC TRX Transceiver (NA5TR1) Datasheet
5 Main Features
+
Sleep-mode/wake-up operation
expands battery lifetime and reduces
human exposure.
Small Package
+
Low data rate over air interface in relationship with theoretical data rate for this
particular modulation.
nanoLOC Networks
+
Additional Features
+
1.
NA-09-0230-0388-2.3 Page 5
General Description
nanoLOC TRX Transceiver (NA5TR1) Datasheet
6 General Description
Fully Integrated Chip
nanoLOC is a fully integrated single chip transceiver with ranging capabilities, consisting of:
+
Upchirp
Downchirp
Application software can define and select different data rates between 125 kbit/s and 2
Mbit/s.
Receiver Sensitivity
The sensitivity of the nanoLOC chip is defined
by the raw data mode (when data is not coded)
where BER = 0.001. The typical sensitivity is:
Psensitivity = -95 dBm or better
which is achieved at nominal conditions1. The
typical link budget is equal to:
Alink_budget = 95 dB
If two transceivers that attempt to establish a
wireless communication link are equipped with
an identical patch antenna (each with gain GA
= 3 dBi), then for BER = 0.001 and
P transmitted_max = 0 dBm the maximum link
attenuation between the two antennas is equal
to:
Apath_att_max = Ptransmitted_max + 2*GA +
Psensitivity = 101 dB
To increase the Link Budget value and/or
increase the quality of the wireless link (for
example, reduce BER value), FEC can be activated. When FEC is on (activated), the typical
receivers sensitivity is2:
Psensitivity_FEC = -97 dBm or better
For this scenario, maximum link attenuation is
increased to:
Apath_att_max_fec = 103 dB
Maximum Transmission Output Power
The maximum transmission power of the
nanoLOC chip is1:
Ptransmitted-max = 0 dBm
1.
2.
nanoLOC System
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Frame Buffers
Due to nanoLOCs use of frame buffers, even a
very slow microcontroller can work with this
high speed chip. nanoLOCs 4 kbit receive or
transmit buffers can store several frames
(depending of the frame length). For instance,
several receive and transmit frames can be
stored simultaneously in the buffers.
These buffers eliminate potential congestion
caused by different peak data rates between
the following interfaces:
+
Additional features of nanoLOC which are supported and controlled by software include:
+
Wake-up circuitry
Encryption/decryption
Automatic retransmissions
Handshake modes
7 nanoLOC System
Ranging Capabilities Based on SDS-TWR
A key feature of the nanoLOC chip is its built-in
precise ranging capability. This allows the chip
to provide both a wireless communication link
and the ability to estimate the link distance
between two communicating nanoLOC nodes.
Ranging in nanoLOC is based on precise time
measurements of the signals propagating
between two nodes 1 . The nanoLOC system
provides two ranging bandwidths:
+
2.
8 Target Applications
The nanoLOC chip is ideal for applications that
require a robust wireless link over short distances, but are license-free, operate with a bat 2010 Nanotron Technologies GmbH.
NA-09-0230-0388-2.3 Page 7
Target Applications
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Inventory management
Page 8 NA-09-0230-0388-2.3
Patient monitoring
Condition monitoring
Value1
Unit
85
95
125
242
2.7
2.7
250
mW
1000
Parameter
Temperature:
Voltages:
Power:
Total power dissipation
Electrostatic Discharge Protection (ESD Protection):
Maximum ESD input potential, Human Body Model
1.
It is critical that the ratings provided in Absolute Maximum Ratings be carefully observed. Stress exceeding one
or more of these limiting values may cause permanent damage to the device.
10 Nominal Conditions
Nominal conditions are specified below, except otherwise noted:
+
Receiver synchronized
Tjunct = 30C
Bit scrambling
Nominal process
No CRC
No FEC
No encryption
For link distance measurement, two identical nanoLOC systems are used
1.
NA-09-0230-0388-2.3 Page 9
11
Block Diagram
nanoLOC TRX Transceiver (NA5TR1) Datasheet
LNA
RxN
RxP
Tx/Rx
TxN
PA
Synthesizer
VDDA_DCO
Q
LPF
ADC
VGA
VGA
Xtal32MN
LPF
IQ DEMOD
ADC
Xtal32MP
TxP
VBalun
11 Block Diagram
IQ MOD
LPF
LPF
DAC
DAC
RRef
Xtal32kN
RTC
Xtal32kP
32 kHz
Osc
D0
VGA
D1
VGA
D2
Digital
IO
D3
Chirp
Pulse
Sequencer
VDDA_ADC
SpiRxD
SpiTxD
/SpiSSn
Digital
Processing
SpiClk
C
Management
CVcc
/POnReset
VDD1V2Cap
AnalogueVcc
CIRQ
AnalogueGND
CReset
DigitalVcc
Battery
Management
DigitalGND
Page 10 NA-09-0230-0388-2.3
12
nc
nc
VSSA
VSSA
RxN
RxP
VSSA
TxN
TxP
VSSA
VDDA
GND
Exposed die
attach pad
VBalun
48 47 46 45 44 43 42 41 40 39 38 37
Pin 1 Identification
VDDA
36
VDDA
RRfef
35
VDDA
34
VSSA
33
nc
32
VDDA_ADC
31
VSSD
VSSA
VDDA_DCO
Xtal32kP
nanoLOC TRX
NA5TR1
4
5
Xtal32kN
Xtal32MP
30
/POnReset
Xtal32MN
29
CVcc
28
VDD1V2_Cap
VSSD
10
27
CIRQ
VSSD
11
26
CReset
VDDD
12
25
VSSD
Tx/Rx
VDDD
VSSD
D3
D2
D1
D0
SpiRxD
SpiTxD
/SpiSsn
SpiClk
VSSD
VDDD
13 14 15 16 17 18 19 20 21 22 23 24
Figure 4: nanoLOC TRX Transceiver (NA5TR1) pin assignment (through top view)
12.1
Pin Descriptions
Table 3: Pin description
Pin
Name
Type
Description
GND
Ground
(analog)
VDDA
Supply
RRef
Analog IO
VSSA
Supply
VDDA_DCO
Supply
Xtal32kP
Analog IO
Xtal32kN
Analog IO
Xtal32MP
Analog IO
Xtal32MN
Analog IO
Tx/Rx
Digital Output
10
VSSD
Supply
11
VSSD
Supply
12
VDDD
Supply
NA-09-0230-0388-2.3 Page 11
12
Pin
Name
Type
Description
13
VDDD
Supply
14
VSSD
Supply
15
SpiClk
Digital Input
SPI Clock.
16
/SpiSSn
Digital Input
17
SpiTxD
Digital Output
18
SpiRxD
Digital Input
19
D0
Digital IO
20
D1
Digital IO
21
D2
Digital IO
22
D3
Digital IO
23
VSSD
Supply
24
VDDD
Supply
25
VSSD
Supply
26
CReset
Digital Output
27
CIRQ
Digital Output
Microcontroller interrupt request. Can be used to send an interrupt request to an external microcontroller. Logic levels can be
programmed.2
28
VDD1V2_Cap
Supply
29
CVcc
DC Output
30
/POnReset
Digital Input
31
VSSD
Supply
32
VDDA_ADC
Supply
33
nc
Not connected.
34
VSSA
Supply
35
VDDA
Supply
36
VDDA
Supply
37
nc
38
nc
39
VSSA
Supply
40
VSSA
Supply
41
RxN
RF Input
42
RxP
RF Input
43
VSSA
Supply
44
TxN
RF Output
45
TxP
RF Output
46
VSSA
Supply
47
VBalun
DC Output
48
VDDA
Supply
Page 12 NA-09-0230-0388-2.3
1.
2.
3.
4.
5.
12.2
12
RRef (Pin 2)
12.3
Value
Unit
Nominal resistance
10
Note: For more details, see the nanoLOC TRX Transceiver (NA5TR1) User Guide.
12.4
pin can be driven by either a transmitter interrupt, a receiver interrupt, a baseband timer
interrupt, or a local oscillator interrupt using
register 0x0F.
Note: For more details, see the nanoLOC TRX Transceiver (NA5TR1) User Guide.
12.5
Value
Unit
100
nF
NA-09-0230-0388-2.3 Page 13
12
12.6
/POnReset signal is active low. Figure 5 shows a timing diagram for pin 30 /POnReset.
V level
High = Vdddd * 0.7
tmin
tdelay
5 s
400 s
Threshold
levels
Start of
internal reset
Stop
Time
Figure 5: /POnReset timing diagram
12.7
Value
Unit
27
pF
47
pF
12.8
128 byte programmable chip register (register block) for chip configuration settings
Page 14 NA-09-0230-0388-2.3
Correlator memory
Electrical Specifications
nanoLOC TRX Transceiver (NA5TR1) Datasheet
13
13 Electrical Specifications
This section provides the fundamental electrical specifications of the major blocks of the nanoLOC
chip (NA5TR1). Typical values represent the mean production values (nominal process) at nominal
operating conditions (See 10. Nominal Conditions on page 9). The minimum/maximum values are
guaranteed values over the entire operating range (unless otherwise stated). For a balanced signal, all impedances, signal voltages, and so on, refer to the differential signal.
13.1
General / DC Parameters
Table 7: General / DC Parameters
Parameter
Value
Unit
2.4
2.3 2.7
Chirp
-40 +85
23
mA
25
mA
24
mA
28
mA
mA
10
mA
mA
20
mA
30
mA
35
mA
Rx Mode
33
mA
48
mA
100
nF
10
10
mA
Nominal resistance
10
NA-09-0230-0388-2.3 Page 15
13
Electrical Specifications
13.2
Transmitter (TX)
Parameter
Value
Unit
dBm
37.5
dB
64
Number
200
Ohm
Balanced
-80
dBm/Hz
-20
dBc
Number
14
Number
70
ppm
171
kHz
Load impedance
Type of load
Number of frequency channels (FDMA Mode, non-overlapping channels), according to IEEE 802.15.4a standard1
Number of frequency channels (FDMA Mode, overlapping channels),
according to IEEE 802.15.4a standard2
1.
2.
3.
For a list of frequency allocations for Europe and USA, see 13.7. Local Oscillator (LO) on page 18.
For a list of frequency allocations, see 13.7. Local Oscillator (LO) on page 18.
Warming-up, temperature drift and voltage supply changes will cause a drift of the oscillator frequency. Therefore
the calibration of the oscillator should be repeated regularly.
Parameter
Value
Unit
0.5, 1, 2, and 4
Symbol rate:
Nominal
Mbaud
Reduced
Mbaud
32
MHz
244.175
MHz
Page 16 NA-09-0230-0388-2.3
13
Electrical Specifications
nanoLOC TRX Transceiver (NA5TR1) Datasheet
13.3
Parameter
Value
-3
-95
dBm
-97
dBm
Balanced
3.5
dB
-20
dBm
Number
14
Number
22
MHz
80
MHz
70
ppm
171
kHz
Type of RX input
Typical noise figure
Maximum input signal @ BER=10
-3
Number of frequency channels (FDMA Mode, non-overlapping channels), according to IEEE 802.15.4a standard2
Number of frequency channels (FDMA Mode, overlapping channels),
according to IEEE 802.15.4a standard3
1.
2.
3.
4.
13.4
Unit
Dynamic Performance
Note: See figures in 14. Timing Diagrams on page 21.
Table 11: Dynamic performance
Parameter
Figure
Variable
Value
Unit
Figure 6
tRxTO
Figure 7
tTxTO
24
Figure 8
tTxRxAckData
24
Figure 9
tTxRxDataData
Figure 10
tTxRxDataAck
Figure 11
tRxTxAckData
24
Figure 12
tRxTxDataData
24
Figure 13
tRxTxDataAck
Figure 14
tXtalSU
ms
Calibration time
Figure 15
tLOFQ
ms
1.
2.
NA-09-0230-0388-2.3 Page 17
13
Electrical Specifications
13.5
Parameter
Value
Unit
32
MHz
Fundamental
40
ppm
20
ppm
10
ppm
10
ppm
40
12
pF
Yes
Xtal32MP
Frequency fREF
Oscillation type of the reference quartz resonator
Recommended reference quartz resonator
13.6
Parameter
Value
Unit
Frequency fRTC
32768
Hz
Fundamental
20
ppm
80
12.5
pF
Yes
Xtal32kP
Value
Unit
Number
2412
MHz
2442
MHz
2472
MHz
2412
MHz
2437
MHz
2462
MHz
13.7
Parameter
Number of frequency channels (FDMA Mode, non-overlapping channels) according to IEEE 802.15.4a standard
Page 18 NA-09-0230-0388-2.3
Electrical Specifications
nanoLOC TRX Transceiver (NA5TR1) Datasheet
13
Parameter
Value
Unit
14
Number
2412
MHz
2417
MHz
2422
MHz
2427
MHz
2432
MHz
2437
MHz
2442
MHz
2447
MHz
2452
MHz
2457
MHz
2462
MHz
2467
MHz
2472
MHz
2484
MHz
70
ppm
100
ppm
mode1
13.8
Warming-up, temperature drift and voltage supply changes will cause a drift of the oscillator frequency. Therefore
the calibration of the oscillator should be repeated regularly.
Digital Interface
Note: The following table refers to the Digital IOs D0, D1, D2, D3, CReset, CIRQ, SpiTxD,
SpiClk, SpiSSn, Tx/Rx.
Table 15: Digital Interface to Sensor / Actor
Symbol
Parameter
Value
Unit
Number
Bit
Direction
In/Out (bi-directional,
open-drain with pullup
Type
Programmable
2.5
pF
CIN
VIL
0.2 x VDDD
VIH
0.7 x VDDD
Output Voltage
VOL
0.3
VOH
VDDD - 0.3
mA
50
RUP
NA-09-0230-0388-2.3 Page 19
13
Electrical Specifications
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Symbol
13.9
Parameter
Value
Unit
RUP
193
RDN
50
RDN
275
Parameter
Value
VDD-0.04 1
10
10
mA
1.5
ms
1.
13.10
Unit
VDD=2.3 2.7 V
State
Current
Consumption1
PwrDownModeFull
under 2.5 A
PwrDownModePad
650 A (typ.)
PowerUp
750 A (typ.)
StandBy
# 2.5 mA
Ready
# 4 mA
Page 20 NA-09-0230-0388-2.3
A1
Schematics
NA-09-0230-0388-2.3 Page 37
Application - RF Module
A1 Example
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Page 38 NA-09-0230-0388-2.3
A1
NA-09-0230-0388-2.3 Page 39
Application - RF Module
A1 Example
nanoLOC TRX Transceiver (NA5TR1) Datasheet
A1.2
PCB Layout
Note: As this example application includes level shifters, it can be used in a variety of 3 volt environments, controllers, and other circuits. To work in a 2.5 volt environment, voltage converters are not required. The board dimensions are 30 mm x 20 mm.
Scale = 3:1
A1.3
A1
Company
Description
Resistor
Label
Value
Qty
Remarks
Package
Supplier
Order Number
R2
0R
Not specified
0402
Not specified
Not specified
R3, R4, R5
2k2
63mW, 5%
0402
Not specified
Not specified
R1
Capacitor
Inductor
10k, 1%
63mW, 1%
0402
Not specified
Not specified
R6, R7
100k
63mW, 5%
0402
Not specified
Not specified
C21
n.a.
Not specified
0402
Not specified
Not specified
C22, C23
5.6pF
NPO, 50V, 5%
0402
Not specified
Not specified
C7, C9
22pF
NPO, 50V, 5%
0402
Not specified
Not specified
C12, C15
18pF
NPO, 50V, 5%
0402
Not specified
Not specified
C20
33pF
NPO, 50V, 5%
0402
Not specified
Not specified
C2, C3,
C8, C10,
C13, C16,
C18
100pF
NPO, 50V, 5%
0402
Not specified
Not specified
C4
1nF
NPO, 50V, 5%
0402
Not specified
Not specified
C30
10nF
0402
Not specified
Not specified
C1, C5,
C6, C11,
C14, C17,
C19, C24,
C25, C26,
C27, C29
100nF
12
0402
Not specified
Not specified
C28
2.2uF
0603
Not specified
Not specified
L1
3.9nH
WE-MK
0402
Wuerth Elektronik
WE 744784039
L3
5.6nH
WE-MK
0402
Wuerth Elektronik
WE 744 784056
L2, L4
8.2nH
WE-MK
0402
Wuerth Elektronik
WE 744 784082
Balun
50R:200R
BALUN1
WE 748422245
ISM 2.44GHz,
50R:200R
BAL0805
Wuerth Elektronik
WE 748422245
Bandpass
Filter 2.4GHz
BPF1
WE-748351124
ISM 2.44GHz
WEBPF1008
Wuerth Elektronik
WE 748351124
Clock Crystal
Q1
32.768kHz
20ppm @ -40C
... +85C,
CL=12.5pF
MS1V-TK
GOLLEDGE
MS1V-T1K
32.768kHz
20ppm
Q2
32.000MHz
20ppm @ -40C
...+85C,
CL=12pF
TSX-3225
Epson Toycoon
Q32.0000TS
X3225+ET0
P-Channel
MOSFET
T1
IRLML5203
TrenchMOS
enhancement
mode FET
SOT-23
International
Rectifier
IRLML5203PbF
N-Channel
MOSFET
T2
PMV60EN
HEXFET Power
MOSFET
SOT-23
Philips
Semiconductor
PMV60EN
nanoLOC TRX
Transceiver
IC1
NA5TR1
nanoLOC chip
VFQFPN4
8
Nanotron
Technologies
NA5TR1
Level Shifters
IC2, IC3
SN74AVC4T24
5
TSSOP16
Texas Instruments
SN74AVC4
T245PWT
Voltage
Regulator
IC5
TPS79425DGN
LD Voltage
Regulator
MSOP-8
Texas Instruments
TPS79425DGNT
PCB
PCB
P138
Not specified
30 x 20
mm
Nanotron
Technologies
P138
NA-09-0230-0388-2.3 Page 41
Application - RF Module
A1 Example
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Page 42 NA-09-0230-0388-2.3
Timing Diagrams
nanoLOC TRX Transceiver (NA5TR1) Datasheet
14
14 Timing Diagrams
Note: The time values in the following diagrams are based on Table 11 on page 17.
14.1
SpiRxD
...
/SpiSSn
...
RxP, RxN
Command requesting
packet reception
tRxTO
Packet reception
14.2
...
TxP, TxN
SpiClk
SpiRxD
...
/SpiSSn
Command requesting
packet transmission
tTxTO
Packet transmission
NA-09-0230-0388-2.3 Page 21
14
Timing Diagrams
14.3
...
ACK Packet
...
RxP, RxN
tTxRxAckData
DATA Packet
14.4
...
DATA Packet
...
RxP, RxN
tTxRxDataData
DATA Packet
14.5
...
DATA Packet
...
RxP, RxN
tTxRxDataAck
ACK Packet
1.
Assuming RX is initialized.
Page 22 NA-09-0230-0388-2.3
Timing Diagrams
nanoLOC TRX Transceiver (NA5TR1) Datasheet
14.6
14
...
ACK Packet
...
TxP, TxN
tRxTxAckData
DATA Packet
14.7
...
DATA Packet
...
TxP, TxN
tRxTxDataData
DATA Packet
14.8
...
DATA Packet
...
TxP, TxN
tRxTxDataAck
ACK Packet
NA-09-0230-0388-2.3 Page 23
14
Timing Diagrams
14.9
The start-up time, tXtalSU, for the 32 MHz quartz oscillator until it reaches a stable frequency generation is 5 ms.
Frequency deviation for 32 MHz
reference quartz oscillator
Start of 32 MHz
quartz oscillation
Allowed frequency
deviation
Time
SpiClk
SpiTxD
...
/SpiSSn
Command starting
32 MHz reference quartz oscillator
tXtalSU
Page 24 NA-09-0230-0388-2.3
Timing Diagrams
nanoLOC TRX Transceiver (NA5TR1) Datasheet
14.10
14
Calibration Time
The calibration time, tLOFQ, is 6 ms.
LO frequency deviation
from nominal value
[MHz]
+1
+ 0.5
0
Time
-1
LO frequency drift
LO frequency calibration
LO frequency drift
- 0.5
LO frequency calibrated
SpiClk
SpiTxD
...
/SpiSSn
Command requesting
LO frequency calibration
tLOFQ
14.11
tHC
...
SpiClk
tHRxD
tSRxD
Bit 0
SpiRxD
...
tHS
tSS
/SpiSsn
Bit N
...
Figure 16: SPI bus write timing
NA-09-0230-0388-2.3 Page 25
14
14.12
Timing Diagrams
nanoLOC TRX Transceiver (NA5TR1) Datasheet
...
...
SpiClk
tHTxD / tPTxDZ
tPDTxD
...
Bit 0
SpiTxD
Bit N
tHS
/SpiSsn
...
...
Figure 17: SPI bus read timing
The following table lists the timing values for the SPI bus:
Table 18: SPI bus timing values
Parameter
Minimum
Maximum
fmax
27 MHz
tLC
18.5 ns
tHC
18.5 ns
tSS
4 ns
/SpiSsn Setup
tHS
2 ns
SpiSsn Hold
tSRxD
4 ns
SpiRxD Setup
tHRxD
2 ns
SpiRxD Hold
tPDTxD
18.5 ns
tHTxD
2.5 ns
tPTxDZ
18.5 ns
Page 26 NA-09-0230-0388-2.3
Description
SpiClk
15
Figure 18: nanoLOC output power control measured at RF Test Module SMA connector
Table 19: Typical output power for RfTxOutputPower register values
Register
Value
Pout /
dBm
Register
Value
Pout /
dBm
Register
Value
Pout /
dBm
Register
Value
Pout /
dBm
-36.20
16
-23.28
32
-12.07
48
-3.33
-35.30
17
-22.48
33
-11.41
49
-2.87
-34.47
18
-21.75
34
-10.80
50
-2.45
-33.65
19
-21.03
35
-10.20
51
-2.05
-32.83
20
-20.31
36
-9.61
52
-1.66
-32.02
21
-19.60
37
-9.03
53
-1.28
-31.21
22
-18.89
38
-8.46
54
-0.92
-30.41
23
-18.19
39
-7.91
55
-0.57
-29.54
24
-17.44
40
-7.31
56
-0.23
-28.70
25
-16.70
41
-6.74
57
0.12
10
-27.92
26
-16.02
42
-6.22
58
0.42
11
-27.14
27
-15.36
43
-5.71
59
0.72
12
-26.37
28
-14.70
44
-5.21
60
1.00
13
-25.60
29
-14.04
45
-4.73
61
1.28
14
-24.85
30
-13.40
46
-4.26
62
1.54
15
-24.09
31
-12.76
47
-3.80
63
1.79
NA-09-0230-0388-2.3 Page 27
16
nanoLOC Ranging
nanoLOC TRX Transceiver (NA5TR1) Datasheet
16 nanoLOC Ranging
Ranging in the nanoLOC chip uses two types
of transmissions, which are Data packet and
hardware Acknowledgments, to obtain two
types of time measurements:
16.1
TX Propagation Delay
Processing Delay
Time Measurements
16.1.1 TX Propagation Delay
This delay is the time for a data or acknowledgement packet to be transmitted from one
station to another. As the speed of a signal
propagating through the air is known (the
16.2
Ranging Modes
16.2.1 Normal Ranging Mode
Normal ranging mode uses a ranging methodology developed by Nanotron called Symmetrical Double-Sided Two-Way Ranging (SDSTWR).1 This ranging methodology is symmetrical in that the measurement from the local
nanoLOC station to the remote nanoLOC station is mirrored by a measurement from the
1.
Node 1 (Tag)
First Measurement
Node 1 - Node 2 - Node 1
Node 2 (Anchor)
Node 1 (Tag)
Second Measurement
Node 2 - Node 1 - Node 2
Node 2 (Anchor)
Page 28 NA-09-0230-0388-2.3
nanoLOC Ranging
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Ranging States
Node 2
RANGING_READY State
Request Ranging
RANGING_START State
Initiate acknowledged
data packet transmission
DATA Packet
T2
Processing
Delay
T1
Propagation
Delay
First Measurement
Call from
application
Node 1
16
ToaOffsetMeanData
HW Ack Packet
ToaOffsetMeanAck
TxRespTime
ANSWER1 State
Initiate acknowledged
data packet transmission
Returned
distance
value
T4
Processing
Delay
T3
Propagation
Delay
Second Measurement
DATA Packet
ToaOffsetMeanData
HW Ack Packet
ToaOffsetMeanAck
TxRespTime
ANSWER2 State
DATA Packet
Ranging measurements between two nanoLOC stations in normal ranging mode are
obtained using the following formula:
Distance =
( T1 T2 ) + ( T3 T4 )
------------------------------4
Determining ANSWER2
Answer2 = T3 - T4 where
Determining ANSWER1
Answer1 = T1 - T2 where
Node 1
speed at which ranging values can be determined, but without the additional validity of the
second measurement in normal ranging mode.
First Measurement
Node 1 - Node 2 - Node 1
Node 2
NA-09-0230-0388-2.3 Page 29
16
nanoLOC Ranging
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Ranging States
PDSap()
RANGING_START State
T2
Processing
Delay
T1
Propagation
Delay
DATA Packet
HW Ack Packet
ToaOffsetMeanAck
TxRespTime
ToaOffsetMeanData
ANSWER2 State
Remote Station
RANGING_READY State
Initiate acknowledged
data packet transmission
Measurement
Call from
application
Local Station
Initiate final
data packet transmission
DATA Packet
getDistance()
Figure 22: Fast ranging mode using SDS
Distance =
Page 30 NA-09-0230-0388-2.3
( T1 T2 )
------------2
Determining ANSWER2
Answer2 = Answer1 = T1 - T2
+
17
17.1
MicroLeadFrame QFN
The nanoLOC chip uses the MicroLeadFrame (MLF), (QFN - Quad Flat No-Lead) package. It is a
leadless leadframe based Chip Scale Package (CSP) that enhances chip speed, reduces thermal
impedance, and reduces the printed circuit board area required for mounting. The small size and
very low profile make it ideal for the nanoLOC chip.
MicroLeadFrame (QFN - Quad Flat No-Lead) package is a near CSP plastic encapsulated package with a copper leadframe substrate. This package uses perimeter lands on the bottom of the
package to provide electrical contact to the PCB. The package also offers Exposed Pad technology as a thermal enhancement by having the die attach paddle exposed on the bottom of the package surface to provide an efficient heat path when soldered directly to the PCB. This enhancement
also enables stable ground by use of down bonds or by electrical connection through a conductive
die attach material.
Figure 23 below shows the basic construction and view of the MLF QFN package.
Die Attach Material
Mold Compound
Gold Wire
Die
Cu
Exposed
Contact
Standard MLF
Exposed Die
Attach Pad
NA-09-0230-0388-2.3 Page 31
17
17.2
Figure 24 below shows the nanoLOC chip encapsulated in the VFQFPN-48 package.
Figure 24: nanoLOC chip VFQFPN2-48 package: 7 mm x 7 mm, 48 pins, 0.5 mm pitch
Table 20 and figure 25 below provide the dimensions of the VFQFPN-48 package.
Table 20: VFQFPN-48 package dimensions
Ref
Min.
Typ.
Max.
0.85
.90
A1
0.01
0.05
A2
0.65
0.70
A3
0.20
0.18
0.23
0.30
b1
0.60
6.90
7.00
7.10
D1
6.75
D2
D3
6.90
7.00
7.10
E1
6.75
E2
E3
0.50
0.30
0.40
0.50
0.24
0.42
0.60
12
ddd
0.08
Notes
Degrees
2.75
2.90
3.05
E2
2.75
2.90
3.05
5.45
5.60
5.75
E3
5.45
5.60
5.75
Page 32 NA-09-0230-0388-2.3
17
Pin #1 Identifier
D1/E1
ddd
A3
A1
A2
D
D3
D2
e
Plastic
E3
E2
Two grooves
in die pad
Pin #1 Identifier
L
Groove
Ring
Scale 10:1
Dimensions are in millimeters
Bottom View
Figure 25: Dimensions for package VFQFPN2-48 used to encapsulate nanoLOC chip
NA-09-0230-0388-2.3 Page 33
17
17.3
Table 21 and figure 26 below provide the recommended footprint data (dimensions) for the nanoLOC chip (NA5TR1).
Scale 10:1
Dimensions are in millimeters
A
J
B
E
F
Page 34 NA-09-0230-0388-2.3
Ref
Value
7.5
0.28
0.5
5.75
0.65
0.225
7.5
0.7
5.75
3.75
18
18.1
Reel Dimensions
Table 22 and figure 27 below provide the nanoLOC chip carrying reel dimensions.
Table 22: Reel dimensions
1.
Reel Diameter
13
2,500
13/4
Lab
el
330
(13.00)
16.5 min
Outside dimension:
30.0
Note: Dimensions are in millimeters
Figure 27: Reel dimensions
NA-09-0230-0388-2.3 Page 35
19
Ordering Information
18.2
Tape Dimensions
Table 23 and figure 28 below provide the nanoLOC chip carrying tape dimensions.
Table 23: Tape dimensions
Package Type
Number of
Leads
Nominal
Package Size
Carrier Tape
Width
Carrier Tape
Pitch
Leader/Trailer
VFQFPN-48
48
7 x 7 x 1 mm
16 mm
12 mm
EIA
1.
Length1
A0 = 7.25
B0 = 7.25
K0 = 1.00
Notes:
1. Dimensions are in millimeters
2. 10 sprocket hole pitch cumulative tolerance 0.2
3. Carrier in compliance with EIA 481
4. Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole
Figure 28: Tape dimensions
19 Ordering Information
Note: To order the product described in this datasheet, use the following information.
Table 24: Ordering information
Part Description
nanoLOC TRX Transceiver
(NA5TR1)
Page 36 NA-09-0230-0388-2.3
Part Number
NLSG0501A
Additional Information
nanoLOC Development Kit and nanoLOC Driver are
also available.
A2
Overview
The nanoLOC RF Test Module was designed for testing and measurement purposes only. It was
used during measurements and simulations to determine parameters published in this document,
unless otherwise specified. For conducting tests purposes, the nanoLOC RF Test Module includes
a 50 coaxial SMA connector.
A2.2
Schematics
The following schematics represents the following major blocks of the design:
+
Schematic 1: Power supply for nanoLOC chip and connection with crystal resonators.
Schematic 2: RF interface between nanoLOC chip and SMA connector (impedance matching
circuitry for Rx and Tx, balun).
NA-09-0230-0388-2.3 Page 43
RF Test Module
A2 nanoLOC
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Page 44 NA-09-0230-0388-2.3
A2
NA-09-0230-0388-2.3 Page 45
RF Test Module
A2 nanoLOC
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Page 46 NA-09-0230-0388-2.3
A2.3
A2
PCB Layout
Scale = 2:1
NA-09-0230-0388-2.3 Page 47
RF Test Module
A2 nanoLOC
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Scale = 2:1
Page 48 NA-09-0230-0388-2.3
A2
Scale = 2:1
NA-09-0230-0388-2.3 Page 49
RF Test Module
A2 nanoLOC
nanoLOC TRX Transceiver (NA5TR1) Datasheet
A2.4
Company
Description
Label
Value
QTY
Package
Remarks
Supplier
Product
Number
2x200R:50R
Wuerth
Elektronik
WE
748422245
Balun
BALUN1
WE 748422245
BAL0805
Band pass
filter
BPF1
Not assembled
Capacitors
C23
1pF
0402
NPO, 50V, 5%
C21
3.3pF
0402
NPO, 50V, 5%
C24, C25
5.6pF
0402
NPO, 50V, 5%
C12, C15
18pF
0402
NPO, 50V, 5%
C7, C9
22pF
0402
NPO, 50V, 5%
C20
33pF
0402
NPO, 50V, 5%
100pF
0402
NPO, 50V, 5%
1nF
0402
X7R, 10V,
10%
100nF
0402
X7R, 10V,
10%
Not assembled
100nF
0603
X1
JOHNSON_JAC
K_GND_2
JOHNSON_J
ACK_GND_2
Johnson
Components
142-0701-851
X2
2X10
Pin Header
2X10
10 Pins, double
Row, pitch
2.54mm
Winslow
Adaptics
W82120T382
5
X3
2X05
Pin Header
2X05
5 Pins, double
Row, pitch
2.54mm
Winslow
Adaptics
W82110T382
5
Q1
32.768kHz
MS1V-TK
CL=12.5pF
Golledge
MS1V-T1K
32.768kHz
20ppm
CL=12pF
Petermann
Technik
SMD03025/4
32.000 MHz
AT-FUND 10/
20/-40+85/
12pF/40R
C4
C1, C5, C6, C11,
C14, C17, C19
C22
C26, C27, C28,
C29
Connectors
Clock crystals
Inductors
X7R, 10V,
10%
End Launch
Jack
Receptacle
Q2
32.000MHz
32SMX
L2
3.3nH
0402
Wuerth
Elektronik
WE
744784033
L1, L3
3.9nH
0402
Wuerth
Elektronik
WE
744784039
L5
5.6nH
0402
Wuerth
Elektronik
WE
744784056
L4, L6
8.2nH
0402
Wuerth
Elektronik
WE
744784082
NA5TR1
QFN48
Nanotron
Technologies
NLSG0501A
P141
CONTAG
ICs
IC1
PCB
PCB1
Resistors
R2
0R
0402
R1
10k, 1%
0402
Page 50 NA-09-0230-0388-2.3
63mW, 1%
A3
Abbreviations
A . . . . . . . .
C . . . . . . . .
CIrq . . . . . .
CReset . . .
CVcc . . . . .
CVccExt. . .
F . . . . . . . .
H . . . . . . . .
s. . . . . . . . .
.........
AC . . . . . . . .
Ack . . . . . . .
ADC . . . . . . .
AFC . . . . . . .
AGC. . . . . . .
ASIC . . . . . .
B .........
B .........
BA . . . . . . . .
BALUN . . . .
BCH . . . . . . .
BER . . . . . . .
BOM . . . . . .
bps. . . . . . . .
C .........
C .........
C . . . . . . . .
CCITT . . . . .
CDDL. . . . . .
C/I . . . . . . . .
Clk . . . . . . . .
CRC. . . . . . .
CMMR . . . . .
CMOS . . . . .
CS . . . . . . . .
CSMA . . . . .
CSMA/CA . .
CSS . . . . . . .
CSS Mode . .
DAC . . . . . . .
Data . . . . . . .
dB . . . . . . . .
dBi . . . . . . . .
DBO-CSS . .
dBm . . . . . . .
dBr . . . . . . . .
DC . . . . . . . .
DiIO . . . . . . .
DPA . . . . . . .
DPD . . . . . . .
DUT . . . . . . .
Eb . . . . . . . .
EIRP . . . . . .
ESD . . . . . . .
FCD . . . . . . .
FCM. . . . . . .
FDMA . . . . .
FEC . . . . . . .
FET . . . . . . .
FHSS . . . . . .
FIFO . . . . . .
FS . . . . . . . .
GBWP . . . . .
GHz . . . . . . .
GND . . . . . .
HBM . . . . . .
I..........
IC . . . . . . . . .
IEC . . . . . . .
IF . . . . . . . . .
I/O . . . . . . . .
IOH . . . . . . . .
IOL . . . . . . . .
IRQ . . . . . . .
IQ. . . . . . . . .
ISM . . . . . . .
ISO . . . . . . .
k . . . . . . . .
kHz . . . . . . .
kpbs . . . . . . .
L. . . . . . . . . .
LNA . . . . . . .
LO . . . . . . . .
LPF . . . . . . .
LSB . . . . . . .
. . . . . . . .
mA . . . . . . . .
Mbaud . . . . .
Mbps . . . . . .
MAC. . . . . . .
MHz . . . . . . .
MISO . . . . . .
MIX . . . . . . .
MLF . . . . . . .
MOD . . . . . .
MOSI . . . . . .
MUX. . . . . . .
mW . . . . . . .
nc. . . . . . . . .
nF . . . . . . . .
nH . . . . . . . .
No . . . . . . . .
ns. . . . . . . . .
OEM . . . . . .
OSC. . . . . . .
OP . . . . . . . .
OTA . . . . . . .
PA . . . . . . . .
PAE . . . . . . .
PAMP. . . . . .
PDK . . . . . . .
PEP . . . . . . .
pF . . . . . . . .
PFD . . . . . . .
PLL . . . . . . .
Pout . . . . . . .
ppm . . . . . . .
PCB . . . . . . .
PGA . . . . . . .
PGC. . . . . . .
POMD . . . . .
PSRR. . . . . .
PTAT . . . . . .
Q.........
QFN . . . . . . .
R .........
RF . . . . . . . .
RFID . . . . . .
ROM . . . . . .
RSSI . . . . . .
RTC . . . . . . .
Rx . . . . . . . .
S .........
SAR . . . . . . .
SAW . . . . . .
SDS-TWR . .
SLNA . . . . . .
SMIX . . . . . .
SNR . . . . . . .
SPI. . . . . . . .
SpiClk . . . . .
SpiSsn . . . . .
SpiRxD. . . . .
SpiTxD . . . . .
SRAM . . . . .
SSB . . . . . . .
NA-09-0230-0388-2.3 Page 51
and Symbols
A3 Abbreviations
nanoLOC TRX Transceiver (NA5TR1) Datasheet
t..........
T .........
TBD . . . . . . .
TDMA . . . . .
Tjunct . . . . . .
THD . . . . . . .
TRL . . . . . . .
TRX . . . . . . .
TTL . . . . . . .
Typ. . . . . . . .
Tx . . . . . . . .
V .........
VIH . . . . . . . .
VIL . . . . . . . .
VOH . . . . . . .
A3.2
Time constant
Duration time of the chirp waveform
To Be Determined
Time Division Multiple Access
Temperature of junction
Total Harmonic Distortion
Transmission Line
Transceiver
Transistor-Transistor Logic
Typical
Transmitter
Volts (unit of electrical potential)
Input voltage for High level
Input voltage for Low level
Output voltage for High level
VOL . . . . . . .
VCA . . . . . . .
VCC . . . . . . .
VCO. . . . . . .
VDDA . . . . . .
VDDD . . . . . .
VFQFPN . . .
VGA . . . . . . .
VSSA . . . . . .
VSSD . . . . . .
VSWR . . . . .
XTAL . . . . . .
XCO. . . . . . .
T .........
Tj . . . . . . . . .
TC . . . . . . . .
Vpp . . . . . . . .
VD . . . . . . . .
VDS . . . . . . .
VGS . . . . . . .
VT . . . . . . . .
VTO . . . . . . .
a. . . . . . . . . .
b. . . . . . . . . .
d. . . . . . . . . .
o . . . . . . . . .
r . . . . . . . . .
reff . . . . . . .
G.........
o . . . . . . . . .
r . . . . . . . . .
m.........
.........
.........
.........
Period
Junction Temperature
Temperature coefficient, e.g. TK(IDSS)
Peak-to-Peak Voltage
Diffusion voltage
Drain-Source voltage
Gate-Source voltage
Thermal voltage, VT=kT/q
Threshold voltage, Turn-on voltage
Angle
Current gain
Partial derivative
Dielectric constant of a vacuum
Dielectric constant relative to a vacuum
Effective relative dielectric constant
Reflection coefficient
Permeability of a vacuum
Permeability relative to a vacuum
Charge carrier mobility
Angular frequency
Difference
Sum
Special Symbols
CDS . . . . . . .
CGD . . . . . . .
CGS . . . . . . .
Cr . . . . . . . .
D .........
EG . . . . . . . .
fT . . . . . . . . .
G.........
GaAs . . . . . .
Ge . . . . . . . .
gm . . . . . . . .
H .........
IDSS . . . . . . .
Drain-source capacitance
Gate-drain capacitance
Gate-source capacitance
Feedback capacitance
Drain
Energy gap
Transit frequency
Gate, Gradient
Gallium-Arsenide
Germanium
Short-circuit forward transconductance
Hybrid parameter
Drain current with VGS=0
Page 52 NA-09-0230-0388-2.3
Index
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Index
Symbols
/POnReset .................................................................... 12
/SpiSSn ........................................................................ 12
Numerics
22 MHz signal bandwidth .................................................. 7
32768 Hz clock ................................................................ 1
A
address matching, automatic ............................................. 7
analog receiver ................................................................ 6
antennas, and maximum link attenuation ............................. 6
applications ..................................................................... 7
ation .............................................................................. 4
B
battery
long life of .................................................................... 6
low alarm ..................................................................... 7
bit processing, function of MAC layer .................................. 6
block diagram .................................................................. 3
C
C/I, see Carrier to Interference Ratio
calibration time
dynamic performance .................................................. 17
timing diagram ........................................................... 25
Carrier to Interference Ratio
described .................................................................... 7
value ........................................................................... 1
channels
14 FDMA overlapping frequency bands ............................ 7
2 non-overlapping frequency bands ................................. 7
chirp duration, values (0.5, 1, 2, 4) .................................... 16
Chirp Sequencer (CSQ)
clock frequency value .................................................. 16
in nanoLOC memory space .......................................... 14
Chirp Spread Spectrum
described .................................................................... 6
values ....................................................................... 16
CRC generation ............................................................... 6
current
consumption and power management, values ................. 20
low consumption, feature of chip ..................................... 5
low shut down .............................................................. 1
maximum output, digital IOs ......................................... 19
maximum output, external microcontroller ...................... 20
maximum output, for pin 29 uCVcc ................................ 15
saved using Powerdown mode ....................................... 1
typical supply, values .................................................... 2
typical values, analog block .......................................... 15
typical values, digital block ........................................... 15
typical values, total supply ............................................ 15
D
D0, pin described ........................................................... 12
D1, pin described ........................................................... 12
D2, pin described ........................................................... 12
D3, pin described ........................................................... 12
data rate
maximum .................................................................... 2
selectable .................................................................... 5
values ......................................................................... 1
DDDL, integrated into nanoLOC ......................................... 5
decryption, included in MAC layer ...................................... 6
digital I/Os
described .................................................................. 13
provided for ease of connection ...................................... 1
digital interface, values ................................................... 19
E
encryption, included in MAC layer ...................................... 6
exposed pad, and nanoLOC package ............................... 31
F
fast ranging mode, described ........................................... 29
FDMA
and channelization ........................................................ 1
described .................................................................... 7
footprint, nanoLOC ......................................................... 34
Forward Error Correction
and Link Budget ........................................................... 6
supported .................................................................... 7
frame buffering
included in MAC layer ................................................... 6
integrated in chip .......................................................... 1
to work with slow microcontrollers ................................... 7
frequency
bandwidth values .......................................................... 2
calibration .................................................................. 16
center values ............................................................. 19
channels and IEEE.15.4a ............................................. 16
channels Europe .......................................................... 2
channels USA .............................................................. 2
of chirps ...................................................................... 6
quartz oscillator values ................................................ 18
H
handshake modes, included .............................................. 7
human exposure, and nanoLOC ........................................ 5
I
IEEE 802.15.4a standard ................................................ 16
in-band and out-of-band disturbances ................................. 7
input signal, maximum value ............................................ 17
L
Link Budget, value and FEC .............................................. 6
LO frequency calibration accuracy .................................... 17
load impedance, value .................................................... 16
load type, value ............................................................. 16
Local Oscillator, values ................................................... 18
M
MACFrame coding, included in MAC layer ........................... 6
maximum link attenuation, value ........................................ 6
maximum transmission power, value .................................. 6
memory, of nanoLOC chip ............................................... 14
microcontroller, power supply for ...................................... 20
modulation method
Chirp Spread Spectrum ................................................. 1
value ......................................................................... 15
N
nanoLOC
absolute maximum ratings ............................................. 9
block diagram .............................................................. 3
digital interface values ................................................. 19
electrical specifications ................................................ 15
general description ....................................................... 6
general parameters ..................................................... 15
key features ................................................................. 1
key values ................................................................... 2
order number ............................................................. 36
output power control .................................................... 27
package .................................................................... 31
pin connections .......................................................... 11
ranging modes ........................................................... 28
RX parameters ........................................................... 17
sample application ........................................................ 4
tape and reel .............................................................. 35
timing diagrams .......................................................... 21
TX parameters ........................................................... 16
noise, typical value ......................................................... 17
nominal conditions ........................................................... 9
O
operating frequency range, value ..................................... 15
operating temperature range, value .................................. 15
operational voltages, typical values .................................... 2
oscillation type, value ..................................................... 18
output power
control characteristics .................................................. 27
control register values ................................................. 27
dynamic range ............................................................. 1
NA-09-0230-0388-2.3 Page 53
Index
nanoLOC TRX Transceiver (NA5TR1) Datasheet
maximum .................................................................... 2
nominal, value ............................................................ 16
number of steps .......................................................... 16
P
package
contact to PCB ........................................................... 31
described .................................................................. 31
MicroLeadFrame, described ......................................... 31
small, 7x7x1mm ........................................................... 5
VFQFPN-48, .............................................................. 32
pin
connections ............................................................... 11
descriptions ............................................................... 11
POnReset ..................................................................... 14
power consumption .......................................................... 5
power management
feature of chip .............................................................. 7
PowerDownFull state .................................................. 20
PowerUp state ........................................................... 20
PwrDownModePad ..................................................... 20
Ready state ............................................................... 20
StandBy state ............................................................ 20
states ........................................................................ 20
power supply
analog block ................................................................ 2
digital block .................................................................. 2
PowerDownFull state, power management ........................ 20
PowerUp state, power management ................................. 20
Processing Delay ........................................................... 28
PwrDownModePad state, power management ................... 20
Q
QFN - Quad Flat No-Lead ............................................... 31
R
ranging
fast mode .................................................................. 29
measurements used .................................................... 28
normal mode .............................................................. 28
part of nanoLOC system ................................................ 7
raw data mode, value ....................................................... 6
read timing of the SPI bus ............................................... 26
Ready state, power management ..................................... 20
Real Time Clock
part of digital block ........................................................ 6
supported by chip ......................................................... 7
values of ................................................................... 18
receiver sensitivity
described, includes value of ........................................... 6
value (FEC on and off) .................................................. 1
value, part of RX parameters ........................................ 17
reel dimensions ............................................................. 35
reference quartz resonator, value ..................................... 18
retransmissions, automatic ................................................ 7
RfTxOutputPower
register values ............................................................ 27
register, used to set output power ................................. 27
RRef
pin, described ............................................................ 11
pin, values ........................................................... 13, 15
RX input, type value ....................................................... 17
RxN, pin described ......................................................... 12
RxP, pin described ......................................................... 12
S
sample application ........................................................... 4
SDS-TWR, ranging methodology ..................................... 28
sensitivity
described .................................................................... 6
typical values ............................................................... 2
shut down current, low ...................................................... 1
SPI
bus read timing ........................................................... 26
bus write timing .......................................................... 25
bus, write timing of ...................................................... 25
digital block setup using ................................................. 6
interface value .............................................................. 1
Page 54 NA-09-0230-0388-2.3
Revision History
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Revision History
Date
Version
Description/Changes
1.00
2006-08-29
1.01
2006-11-03
1.02
2007-02-21
1.03
2007-07-31
Correction to values in rows 3 to 5 in table 11: Quart controlled oscillator for reference frequency.
2.00
2008-04-11
/POnReset circuitry added to sample application; small errors in block diagrams corrected; Frequency
channel description moved to Local Oscillator table; full listing of frequency allocations updated
according to IEEE 802.15.4a standard; data throughout updated to conform to latest chip measurements; extended descriptions of chip pins added; reference to chip registers added; dynamic performance table updated; timing diagrams updated; Local Oscillator table updated; summary of nanoLOC
ranging added; recommended footprint dimensions diagram updated; tape and reel information
added; new nanoLOC RF Test Module added; minor text edits and corrections throughout.
2.01
2008-04-23
2.02
2009-01-06
Package dimensions and footprint figures improved; RF Test Module BOM corrected (C23); other
minor corrections; power management states and current consumption table added; index added
2.3
2010-03-04
Template updated.
This equipment generates, uses, and can radiate radio frequency energy
and, if not installed and used in accordance with the instructions as provided
in the user manual, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a
particular installation. Operation of this equipment in a residential area is
likely to cause harmful interference in which case the user will be required to
correct the interference at his or her own expense.
If this equipment does cause harmful interference to radio or television
reception, which can be determined by turning the equipment off and on, the
user is encouraged to try to correct the interference by one or more of the
following measures:
Page 55 NA-09-0230-0388-2.3
Revision History
nanoLOC TRX Transceiver (NA5TR1) Datasheet
Further Information:
Nanotron provides reliable loss protection technology and solutions that are
used to protect people and animals. Energy efficient, battery- powered wireless nodes are the key building blocks. These small devices create a Virtual
Safety Zone which protects tagged people and animals. Robust wireless
Chirp technology underpins nanotron's offering of chips, modules and loss
protection software for indoor and outdoor environments world wide.
For more information about this product and other products from Nanotron
Technologies, contact a sales representative at the following address:
Nanotron Technologies GmbH
Alt-Moabit 60, 10555 Berlin, Germany
Phone: +49 30 399 954 - 0 | Fax: +49 30 399 954 - 188
Email: sales@nanotron.com | Internet: www.nanotron.com