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nanoLOC TRX

Transceiver (NA5TR1)
Datasheet
Version 2.3
NA-09-0230-0388-2.3
This document contains information on a pre-engineering chip.
Specifications and information herein are subject to change
without notice.

Document Information
nanoLOC TRX Transceiver (NA5TR1) Datasheet

Document Information
Document Title:

nanoLOC TRX Transceiver (NA5TR1) Datasheet

Document Version:

2.3

Published (yyyy-mm-dd):

2010-03-04

Current Printing:

2010-3-4, 10:15 am

Document ID:

NA-09-0230-0388-2.3

Document Status:

Released

Disclaimer
Nanotron Technologies GmbH believes the information contained herein
is correct and accurate at the time of release. Nanotron Technologies
GmbH reserves the right to make changes without further notice to the
product to improve reliability, function or design. Nanotron Technologies
GmbH does not assume any liability or responsibility arising out of this
product, as well as any application or circuits described herein, neither
does it convey any license under its patent rights.
As far as possible, significant changes to product specifications and
functionality will be provided in product specific Errata sheets, or in new
versions of this document. Customers are encouraged to check the Nanotron website for the most recent updates on products.

Page ii NA-09-0230-0388-2.3

Trademarks
All other trademarks, registered trademarks, and product names are the
sole property of their respective owners.
This document and the information contained herein is the subject of
copyright and intellectual property rights under international convention.
All rights reserved. No part of this document may be reproduced, stored
in a retrieval system, or transmitted in any form by any means, electronic, mechanical or optical, in whole or in part, without the prior written
permission of Nanotron
Technologies GmbH.
Copyright 2010 Nanotron Technologies GmbH.

Subject to change without notice

2010 Nanotron Technologies GmbH.

Table of Contents
nanoLOC TRX Transceiver (NA5TR1) Datasheet

Table of Contents
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v
1 Chip Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Key Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Quick Reference Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3 nanoLOC NA5TR1 Block Diagram - Simplified . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
4 Sample Application With Recommended Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5 Main Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
6 General Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
7 nanoLOC System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
8 Target Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
9 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
10 Nominal Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
11 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12 Pin Connections and Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12.1
12.2
12.3
12.4
12.5
12.6
12.7
12.8

Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin 2: RRef External Precise Reference Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pins 19-22: D0 to D3 Programmable Digital I/Os. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin 27: CIRQ Microcontroller Interrupt Request. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin 28: VDD1V2_Cap 1.2 V Digital Power Supply Decoupling . . . . . . . . . . . . . . . . . . . . . . . .
Pin 30: /POnReset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin 47: VBalun DC voltage for RF output stage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chip Memory Spaces and Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

11
13
13
13
13
14
14
14

13 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
13.1 General / DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.2 Transmitter (TX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.2.1 General Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.2.2 Chirp Specification (CSS - Chirp Spread Spectrum) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.3 Receiver (RX) General Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.4 Dynamic Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.5 Quartz Controlled Oscillator for Reference Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.6 Quartz Controlled Oscillator for Real Time Clock (RTC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.7 Local Oscillator (LO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.8 Digital Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.9 Power Supply for the External Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.10 Power Management States and Current Consumption. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

15
16
16
16
17
17
18
18
18
19
20
20

14 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
14.1
14.2
14.3
14.4
14.5
14.6
14.7
14.8
14.9
14.10
14.11
14.12

Switch-On Time for the Receiver (Rx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .


Switch-On Time for the Transmitter (Tx). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switch Time From Tx to Rx (ACK to DATA Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switch Time From Tx to Rx (DATA to DATA Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switch Time From Tx to Rx (DATA to ACK Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switch Time From Rx to Tx (ACK to DATA Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switch Time From Rx to Tx (DATA to DATA Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switch Time From Rx to Tx (from DATA to ACK mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Start-up Time for 32 MHz Crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Calibration Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPI Bus Write Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPI Bus Read Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2010 Nanotron Technologies GmbH.

Subject to change without notice

21
21
22
22
22
23
23
23
24
25
25
26

NA-09-0230-0388-2.3 Page iii

Table of Contents
nanoLOC TRX Transceiver (NA5TR1) Datasheet

15 Output Power Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27


16 nanoLOC Ranging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
16.1 Time Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16.1.1 TX Propagation Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16.1.2 Processing Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16.2 Ranging Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16.2.1 Normal Ranging Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16.2.2 Fast Ranging Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

28
28
28
28
28
29

17 nanoLOC Package (VFQFPN-48) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31


17.1 MicroLeadFrame QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
17.2 VFQFPN-48 Package (7x 7mm, 48 Pins, 0.5 mm Pitch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
17.3 Recommended Footprint Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
18 Tape and Reel Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
18.1 Reel Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
18.2 Tape Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
19 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
A1 Example Application - RF Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
A1.1 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
A1.2 PCB Layout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
A1.3 Example Application Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
A2 nanoLOC RF Test Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
A2.1
A2.2
A2.3
A2.4

Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCB Layout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RF Test Module Bill of Materials (BOM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

43
43
47
50

A3 Abbreviations and Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51


A3.1 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
A3.2 Special Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Page iv NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

List of Tables
nanoLOC TRX Transceiver (NA5TR1) Datasheet

List of Tables
Table 1: Quick reference data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Table 2: Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 3: Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 4: RRef (pin 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 5: VDD1V2_Cap (Pin 28) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 6: VBalun (Pin 47) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 7: General / DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 8: Transmitter general parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 9: Transmitter Chirp specification (CSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 10: Receiver general parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 11: Dynamic performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 12: Quartz controlled oscillator for reference frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 13: Quartz Controlled Oscillator for Real Time Clock (RTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 14: Local Oscillator (LO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 15: Digital Interface to Sensor / Actor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 16: Power supply for external microcontroller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 17: Power management states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 18: SPI bus timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 19: Typical output power for RfTxOutputPower register values . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 20: VFQFPN-48 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 21: Recommended footprint dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 22: Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 23: Tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 24: Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 25: Example Application bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 26: RF Test Module bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

List of Figures
Figure 1: nanoLOC block diagram (simplified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 2: Sample application showing recommended circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 3: nanoLOC TRX Transceiver (NA5TR1) block diagram (simplified) . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 4: nanoLOC TRX Transceiver (NA5TR1) pin assignment (through top view) . . . . . . . . . . . . . . . . . 11
Figure 5: /POnReset timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 6: Turn-on time Rx: time = tRxTO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 7: Turn-on time Tx: time = tTxTO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 8: Switch time from Tx to Rx (from ACK to DATA mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 9: Switch time from Tx to Rx (from DATA to DATA mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 10: Switch time from Tx to Rx (from DATA to ACK mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 11: Switch time from Rx to Tx (from ACK to DATA mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 12: Switch time from Rx to Tx (from DATA to DATA mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 13: Switch time from Rx to Tx (from DATA to ACK mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 14: 32 MHz crystal start-up time: time = tXtalSU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 15: Start-up time for LO frequency calibration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 16: SPI bus write timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 17: SPI bus read timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 18: nanoLOC output power control measured at RF Test Module SMA connector . . . . . . . . . . . . 27

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page v

List of Figures
nanoLOC TRX Transceiver (NA5TR1) Datasheet

Figure 19: Normal ranging mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28


Figure 20: Normal ranging mode using SDS-TWR. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 21: Fast ranging mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 22: Fast ranging mode using SDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 23: Basic construction of standard MLF package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 24: nanoLOC chip VFQFPN2-48 package: 7 mm x 7 mm, 48 pins, 0.5 mm pitch . . . . . . . . . . . . . 32
Figure 25: Dimensions for package VFQFPN2-48 used to encapsulate nanoLOC chip . . . . . . . . . . . . . . 33
Figure 26: Package VFQFPN2-48 recommended footprint dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 27: Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 28: Tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 29: Example Application schematics 1 of 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 30: Example Application schematics 2 of 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 31: Example Application schematics 3 of 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 32: Example Application top components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 33: Example Application: bottom layer (inverted) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 34: Example Application: top components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 35: nanoLOC RF Test Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 36: nanoLOC RF Test Module: schematics 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure 37: RF Test Module: schematics 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 38: RF Test Module: schematics 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 39: nanoLOC RF Test Module top layer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 40: nanoLOC RF Test Module 2nd layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 41: nanoLOC RF Test Module 3rd layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 42: nanoLOC RF Test Module bottom layer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 43: nanoLOC RF Test Module top components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 44: nanoLOC RF Test Module bottom components (inverted). . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Page vi NA-09-0230-0388-2.3

Subject to change without notice

2009 Nanotron Technologies GmbH.

Chip Summary
nanoLOC TRX Transceiver (NA5TR1) Datasheet

1 Chip Summary
The nanoLOC TRX Transceiver is a lowpower, highly integrated mixed signal chip
with ranging capabilities utilizing Nanotrons unique wireless communication
technology Chirp Spread Spectrum (CSS).
Adjustable Frequencies
Supporting a freely adjustable center frequency with three non-overlapping frequency channels, nanoLOC enables
multiple physically independent networks
and improved coexistence with existing 2.4 GHz wireless technologies.
Ranging and Robust Wireless Communication
With its unique ranging feature, nanoLOC TRX measures the link distance between two nodes,
thus supporting location-aware applications. Example applications include location-based services
(LBS), enhanced RFID, and asset tracking (2D/3D RTLS). As ranging is performed during regular
data communication, additional infrastructure, power, and/or bandwidth is not required.
The nanoLOC TRX Transceiver includes a sophisticated MAC controller with CSMA/CA, TDMA,
and FDMA. Forward Error Correction (FEC) and 128 bit hardware encryption are selectable.
To minimize software and microcontroller requirements, scrambling, automatic address matching,
and packet retransmission can be enabled. Furthermore, data rates are selectable from 2 Mbps to
125 kbps.

1.1

Key Features
+

Precise buit-in ranging

In-band Carrier to Interference Ratio (C/I):


C/I = 0 3 dB @ 250 kbps @ C = -65 dBm

Operates worldwide: 2.45 GHz ISM

Programmable dData rates: 2 Mbps to


125 kbps

Allows unregulated 2.3 V2.7 V supply


voltage

Modulation technique: CSS (Chirp Spread


Spectrum)

Powerdown mode for increased current


saving

Programmable output power dynamic


range1: 37.5 dB

Extremely low shut down current 2 A1

Receiver sensitivity: -95 dBm @


BER=0.001 at nominal conditions1
(FEC off)

Software controlled power supply for external microcontroller allows further energy
saving

32768 Hz clock available for an external


microcontroller and other frequencies are
also available (feature clock)

Integrated fast SPI interface (27 Mbps,


slave mode only)

Integrated frame buffering

Integrated microcontroller management


function

General purpose 4-bit digital I/Os for easy


connection to sensors and actors

Hardware MAC accelerators for time critical


and computation intensive tasks

Receiver sensitivity: -97 dBm @


BER=0.001 at nominal conditions1
(FEC on)
Extended operating temperature range
(industrial): Tambient = -40C ... +85C
FDMA (Frequency Division Multiplex
Access) with 3 non-overlapping frequency
channels and 14 overlapping frequency
channels
1.

See 10. Nominal Conditions on page 9.

Note: For more a more detailed list, see 5. Main Features on page 5.

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 1

Quick Reference Data


nanoLOC TRX Transceiver (NA5TR1) Datasheet

2 Quick Reference Data


Table 1: Quick reference data

Parameter

Value

Unit

Maximum supply voltage

2.7

Minimum supply voltage

2.3

Maximum output power

dBm

Maximum data rate

Mbps

Typical sensitivity at nominal conditionsa

-95

dBm

Typical sensitivity at nominal conditionsa, FEC=ON

-97

dBm

In transmit mode @ -10 dBm output power and nominal conditionsa

25

mA

In transmit mode @ 0 dBm output power and nominal conditionsa

30

mA

@ 80 MHz and 1 Mbit/s

35

mA

@ 80 MHz and 250 kbit/s

35

mA

In receive mode and nominal conditionsa

33

mA

In shut-down mode

-40 to +85

Number of frequency channels (Europe)

Number

Number of frequency channels (USA)

Number

14

Number

Nominal frequency bandwidth of the channel @ -30 dBr

22

MHz

Nominal frequency bandwidth for ranging @ -30 dBr

80

MHz

Typical power supply voltage VDDA (analogue block)

2.5

Typical power supply voltage VDDD (digital block)

2.5

Typical supply current:

Operating temperature range


Frequency channels (FDMA Mode, non-overlapping channels)
according to IEEE 802.15.4a standard:b

Frequency channels (FDMA Mode, overlapping channels)


according to IEEE 802.15.4a standard:c
Number of frequency channels

Typical operational voltages:

a.
b.
c.

See 10. Nominal Conditions on page 9.


For a full list of frequency channels used for Europe and USA, see 13.7. Local Oscillator (LO) on page 18
For a full list of frequency channels, see 13.7. Local Oscillator (LO) on page 18

Page 2 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

nanoLOC NA5TR1 Block Diagram - Simplified


nanoLOC TRX Transceiver (NA5TR1) Datasheet

3 nanoLOC NA5TR1 Block Diagram - Simplified

VDDA_DCO

Digital
IO

Xtal32MP

Xtal32MN

RRef

D3

D2

D1

32 kHz
Osc

D0

Xtal32kP

Battery
Management

Xtal32kN

DigitalGND
DigitalVcc

Analog GND

CReset

C
Management

Analog Vcc

/POnReset

CVcc

Synthesizer

RTC

CIRQ

VBalun
LPF

Chirp
Pulse
Sequencer
DAC

LPF

PA
IQ MOD

DAC

TxP
TxN

VDD1V2Cap
Tx/Rx

SpiClk
SpiSSn

Digital
Processing

VGA

VGA

LPF

ADC

SpiRxD

LPF

ADC
VGA

IQ DEMOD

SpiTxD

RxP
RxN
LNA

VGA

VDDA_ADC

Figure 1: nanoLOC block diagram (simplified)

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 3

Sample Application With Recommended Circuitry


nanoLOC TRX Transceiver (NA5TR1) Datasheet

4 Sample Application With Recommended Circuitry

Bandpass Filter

Balun

VCC

nc

nc

VSSA

VSSA

RxN

RxP

VSSA

TxN

TxP

VSSA

VBalun

VDDA

GND

VCC

48 47 46 45 44 43 42 41 40 39 38 37
VDDA
RRfef
VSSA
VDDA_DCO
Xtal32kP
Xtal32kN
Xtal32MP
Xtal32MN
Tx/Rx
VSSD
VSSD
VDDD

36

35

34

33

nanoLOC TRX
NA5TR1

5
6

32
31

30

29

28

10

27

11

26

12

25

VDDA

VCC

VDDA
VSSA

VCC

nc
VDDA_ADC

VCC

VSSD
/POnReset
CVcc
VDD1V2_Cap
CIRQ
CReset
VSSD

VCC

VDDD

VSSD

D3

D2

D1

D0

SpiRxD

SpiTxD

/SpiSsn

SpiClk

VSSD

VDDD

13 14 15 16 17 18 19 20 21 22 23 24

Actor
Temperature
Control
Unit

VCC

Microcontroller

Figure 2: Sample application showing recommended circuitry

Note: For more details, see Appendix 1: Example Application - RF Module on page 37.

Page 4 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

Main Features
nanoLOC TRX Transceiver (NA5TR1) Datasheet

5 Main Features
+

Low Radiated Power (Low Human


Exposure)

Programmable digital support block.

Reduced radiated power to absolute


minimum reduces human exposure.

Programmable RF output power


(dynamic range 37.5 dB).

Chirp modulation dramatically reduces


power spectral density of emitted signal.

Reduced power spectral density of the


signal directly reduces human exposure.

Link distances (indoors, outdoors, and


free space) for EIRP=1 mW (PEP): 10
m, 100 m, 300 m respectively1.

Receiver sensitivity1 in the range of 95


dBm @ BER = 0.001.

Low radiated power: -33 dBm for 10 m


link distance in free space, with isotropic
antennas1.

Low Power Consumption


+

Extremely low current consumption.

Operates with batteries.

Sleep-mode/wake-up operation
expands battery lifetime and reduces
human exposure.

Internal hardware accelerators for all


time critical and computing intensive
tasks.

Further energy saving possible through


software controlled, switchable power
supply for external microcontroller.

Immunity against Doppler effect.

Main analog signal processing provides


simplicity, low-cost, and low power consumption.

DDDL (Digital Dispersive Delay Line)


has been integrated into chip so that no
external filters are required, thus reducing the BOM.

Small Package
+

Few Required Additional Components


+

Low C/I (Carrier to Interference) ratio.

The nanoLOC chip uses a small 7x 7x1


mm leadless Leadframe Package (LLP):
VFQFPN-48.

Configurable Transmit and Receive


+

Configurable Rx/Tx buffers.

4 kbit Rx/Tx buffers can store several


frames.

Several Rx/Tx frames can be stored


simultaneously in the buffers.

Selectable Data Rates


+

Data rates selectable between 125 kbit/


s and 2 Mbit/s.

Low data rate over air interface in relationship with theoretical data rate for this
particular modulation.

Big processing gain implicates improved


noise immunity.

Full-Featured MAC / PHY


+

Fully Integrated 2.45 GHz ISM RF transceiver:


0

Full hardware-supported ranging


(link distance estimation) capability
in either 22 MHz signal bandwidth or
80 MHz signal bandwidth with
improved ranging accuracy.
FDMA (Frequency Division Multiplex
Access) with frequency channels
selectable by software.
Two independent channel (nonoverlapping frequency band) allocations one for Europe and one for
North America.

Simple, Flexible Digital I/O Interface


+

nanoLOC Networks
+

Network topology not limited by hardware implementation.

Proposed network topology (if any).

Additional Features
+

Simple API access to chip registers


using the nTRX Driver.

Evaluation kits, development kits and


RF Modules available.

1.

At nominal conditions. See Nominal Conditions on page 9.

Fourteen FDMA channels (overlapping frequency bands) are available.

CSMA/CA, TDMA supported.

2010 Nanotron Technologies GmbH.

Fast (27 Mbps) worldwide-accepted


Serial Peripheral Interface (SPI) interface (slave mode only).

Subject to change without notice

NA-09-0230-0388-2.3 Page 5

General Description
nanoLOC TRX Transceiver (NA5TR1) Datasheet

6 General Description
Fully Integrated Chip
nanoLOC is a fully integrated single chip transceiver with ranging capabilities, consisting of:
+

Complete analog receiver (from antenna


output to the demodulated digital data output) with minimal number of external elements.

Complete transmitter (from digital data input


to output from RF power amplifier, which
can be directly connected to the antenna
input).

Programmable support block including


power management, battery voltage monitor, and much more. All important functions
of this block can be setup and controlled by
software.

tonic from a lower value to a higher value


(Upchirp) or from a higher value to a lower
value (Downchirp).
In nanoLOC, Upchirps and Downchirps have a
symbol duration tsymbol = 1 s, 2 s, or 4 s
and a frequency bandwidth Bchirp = 22 MHz or
80 MHz.

Upchirp

Programmable Digital Support Block


This programmable digital support block communicates with an external microcontroller via
the Serial Peripheral Interface (SPI). This block
performs several service functions including
RF-front-end control and calibration for the
analog part of the chip. Additionally, this block
includes support for some fundamental protocol stack functions of the MAC layer. These
include MACFrame coding, frame buffering, bit
processing (such as CRC generation/checking
and encryption/decryption), as well as MAC
protocol handling (such as medium access
control and automatic acknowledgement-frame
transmission).
Additional functions of this block include ranging support, Real Time Clock maintenance,
and power-down/wake-up management. All
functions of this block can be setup and controlled by software, which is executed by a
microcontroller connected to the chip by means
of the SPI interface.
Robust, Short Distance Wireless Networks
nanoLOC is designed for building up robust,
short distance wireless networks operating in
the 2.45 GHz ISM band, especially networks
that require extremely low power consumption
over a wide range of the operating temperatures. For battery operating applications requiring a long battery life (for several years, for
example), this chip offers an ideal solution.
About Chirp Spread Spectrum (CSS)
For communication over the air, nanoLOC uses
Nanotron-developed chirp technology Chirp
Spread Spectrum (CSS). A chirp pulse is a frequency modulated pulse that changes monoPage 6 NA-09-0230-0388-2.3

Downchirp

Application software can define and select different data rates between 125 kbit/s and 2
Mbit/s.
Receiver Sensitivity
The sensitivity of the nanoLOC chip is defined
by the raw data mode (when data is not coded)
where BER = 0.001. The typical sensitivity is:
Psensitivity = -95 dBm or better
which is achieved at nominal conditions1. The
typical link budget is equal to:
Alink_budget = 95 dB
If two transceivers that attempt to establish a
wireless communication link are equipped with
an identical patch antenna (each with gain GA
= 3 dBi), then for BER = 0.001 and
P transmitted_max = 0 dBm the maximum link
attenuation between the two antennas is equal
to:
Apath_att_max = Ptransmitted_max + 2*GA +
Psensitivity = 101 dB
To increase the Link Budget value and/or
increase the quality of the wireless link (for
example, reduce BER value), FEC can be activated. When FEC is on (activated), the typical
receivers sensitivity is2:
Psensitivity_FEC = -97 dBm or better
For this scenario, maximum link attenuation is
increased to:
Apath_att_max_fec = 103 dB
Maximum Transmission Output Power
The maximum transmission power of the
nanoLOC chip is1:
Ptransmitted-max = 0 dBm
1.
2.

Subject to change without notice

At nominal conditions. See 10. Nominal Conditions on page 9.


Achieved at nominal conditions, except FEC
is on.

2010 Nanotron Technologies GmbH.

nanoLOC System
nanoLOC TRX Transceiver (NA5TR1) Datasheet

The transmission power can be programmed


by the application software and can be stepwise reduced (from maximum 0 dBm) in several steps. It can vary from 33 dBm to 0 dBm
(without any additional external power amplifier, attenuator, and so on).

Minimum Required External Components


The nanoLOC chip is designed so that only a
minimum number of external elements are
required to build up a fully operational bi-directional wireless communication node.
Additional Chip Features

Frame Buffers
Due to nanoLOCs use of frame buffers, even a
very slow microcontroller can work with this
high speed chip. nanoLOCs 4 kbit receive or
transmit buffers can store several frames
(depending of the frame length). For instance,
several receive and transmit frames can be
stored simultaneously in the buffers.
These buffers eliminate potential congestion
caused by different peak data rates between
the following interfaces:
+

Digital interface that is between a slow


microncontroller and the high speed nanoLOC chip
Air interface between nanoLOC nodes

Additional features of nanoLOC which are supported and controlled by software include:
+

Power management module

Wake-up circuitry

Real Time Clock

Low battery alarm

Encryption/decryption

Cyclic Redundancy Checksum (CRC) generation/check block

Forward Error Correction (FEC) block

Automatic address matching

Automatic retransmissions

Handshake modes

7 nanoLOC System
Ranging Capabilities Based on SDS-TWR
A key feature of the nanoLOC chip is its built-in
precise ranging capability. This allows the chip
to provide both a wireless communication link
and the ability to estimate the link distance
between two communicating nanoLOC nodes.
Ranging in nanoLOC is based on precise time
measurements of the signals propagating
between two nodes 1 . The nanoLOC system
provides two ranging bandwidths:
+

22 MHz signal bandwidth

80 MHz signal bandwidth with improved


ranging accuracy

FDMA (Frequency Division Multiple Access)


As the nanoLOC chip uses the 2.4 GHz
licence-free ISM band2, other equipment such
as microwave ovens also operate in this band.
Consequently, services operating in this band,
1.

2.

For more details, see the Real Time Location


Systems White Paper available from Nanotron.
Allocated worldwide for Industrial, Scientific
and Medical applications

including wireless communication, must accept


and tolerate potential interferences and disturbances.
As a means of counteracting in-band and outof-band disturbances, nanoLOC provides
FDMA (Frequency Division Multiple Access).
This access method divides the 2.4 GHz bandwidth into different frequency bands. The nanoLOC chip provides the following channel
allocations:
+

Two independent channel (non-overlapping frequency bands) allocations: one for


Europe and one for USA

Fourteen FDMA channels (overlapping frequency bands) are available, depending on


the frequency allocations for a region

Low C/I (Carrier to Interference) Ratio


The ISM frequency band is very noisy as it
often has many unwanted signals (noise) that
detract from the potential quality of the wanted
signals (carrier). Due to nanoLOCs high processing gain, the carrier to interference ratio is
extremely low and operates effectively in this
noisy ISM band.

8 Target Applications
The nanoLOC chip is ideal for applications that
require a robust wireless link over short distances, but are license-free, operate with a bat 2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 7

Target Applications
nanoLOC TRX Transceiver (NA5TR1) Datasheet

tery, and permit only low human exposure to


RF energy, all at a low cost. For application
developers, the chip offers simplicity of development using the full-featured nanoLOC Development Kit.
Target applications are primarily in the capital
goods market, in particular, OEM customers
that install transceivers into their industrial
application products.
These applications can be installed either
indoors or outdoors.
Logistics applications using low-cost active
RFID / RTLS for asset tracking
+

Asset identification and tracking

Inventory management

Visitor/employee identification and tracking

Logistics applications (location-aware)

Page 8 NA-09-0230-0388-2.3

Medical applications requiring low-cost and


low-human exposure
+

Medical personnel monitoring

Medical equipment tracking

Patient monitoring

Sensitive medical control applications

Industrial monitoring and control


applications for sensor and actor networks
+

Sensor networks and Actor RF Networks

Manufacturing and production processing


equipment

Heating, ventilation, and air conditioning

Condition monitoring

Subject to change without notice

2010 Nanotron Technologies GmbH.

Absolute Maximum Ratings


nanoLOC TRX Transceiver (NA5TR1) Datasheet

9 Absolute Maximum Ratings


Table 2: Absolute maximum ratings

Value1

Unit

Maximum operating temperature

85

Maximum junction temperature

95

Maximum storage temperature

125

Reflow solder temperature (lead-free package)

242

Power supply voltage VDDA (analogue block)

2.7

Power supply voltage VDDD (digital block)

2.7

250

mW

1000

Parameter
Temperature:

Voltages:

Power:
Total power dissipation
Electrostatic Discharge Protection (ESD Protection):
Maximum ESD input potential, Human Body Model
1.

It is critical that the ratings provided in Absolute Maximum Ratings be carefully observed. Stress exceeding one
or more of these limiting values may cause permanent damage to the device.

10 Nominal Conditions
Nominal conditions are specified below, except otherwise noted:
+

Reference design used1

Receiver synchronized

Tjunct = 30C

Bit scrambling

VSSA = VSSD = GND

BER = 0.001 during receive mode

VDDA = VDDD = +2.5 V

Transmission / reception @ 250 kbps

RF output power (PEP) during transmit


phase = 0 dBm EIRP measured during continuous transmission

Nominal frequency bandwidth (TX/RX)


B = 22 MHz @ -30 dBr

Nominal process

Raw data mode

RF ports are impedance matched according


to the specification.

No CRC

No FEC

RF power is measured on the chips


terminals (pins)

No encryption

For link distance measurement, two identical nanoLOC systems are used

Baseband clock = 32 MHz

1.

See Appendix 2. nanoLOC RF Test Module on


page 43.

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 9

11

Block Diagram
nanoLOC TRX Transceiver (NA5TR1) Datasheet

LNA

RxN

RxP

Tx/Rx

TxN

PA
Synthesizer

VDDA_DCO

Q
LPF
ADC

VGA

VGA

Xtal32MN

LPF

IQ DEMOD

ADC

Xtal32MP

TxP

VBalun

11 Block Diagram

IQ MOD

LPF

LPF

DAC

DAC

RRef

Xtal32kN

RTC

Xtal32kP

32 kHz
Osc

D0

VGA

D1

VGA

D2

Digital
IO

D3

Chirp
Pulse
Sequencer

VDDA_ADC

SpiRxD

SpiTxD

/SpiSSn

Digital
Processing

SpiClk

C
Management

CVcc

/POnReset

VDD1V2Cap

AnalogueVcc

CIRQ

AnalogueGND

CReset

DigitalVcc

Battery
Management

DigitalGND

Figure 3: nanoLOC TRX Transceiver (NA5TR1) block diagram (simplified)

Page 10 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

Pin Connections and Description


nanoLOC TRX Transceiver (NA5TR1) Datasheet

12

nc

nc

VSSA

VSSA

RxN

RxP

VSSA

TxN

TxP

VSSA

VDDA

GND
Exposed die
attach pad

VBalun

12 Pin Connections and Description

48 47 46 45 44 43 42 41 40 39 38 37

Pin 1 Identification
VDDA

36

VDDA

RRfef

35

VDDA

34

VSSA

33

nc

32

VDDA_ADC

31

VSSD

VSSA
VDDA_DCO
Xtal32kP

nanoLOC TRX
NA5TR1

4
5

Xtal32kN

Xtal32MP

30

/POnReset

Xtal32MN

29

CVcc

28

VDD1V2_Cap

VSSD

10

27

CIRQ

VSSD

11

26

CReset

VDDD

12

25

VSSD

Tx/Rx

VDDD

VSSD

D3

D2

D1

D0

SpiRxD

SpiTxD

/SpiSsn

SpiClk

VSSD

VDDD

13 14 15 16 17 18 19 20 21 22 23 24

Figure 4: nanoLOC TRX Transceiver (NA5TR1) pin assignment (through top view)

12.1

Pin Descriptions
Table 3: Pin description

Pin

Name

Type

Description

GND

Ground
(analog)

Exposed die attach pad: must be connected to solid ground


plane.

VDDA

Supply

Power supply for analog parts.

RRef

Analog IO

External precise reference resistor (see Pin 2: RRef External


Precise Reference Resistor on page 13 for details).

VSSA

Supply

Power supply for analog parts.

VDDA_DCO

Supply

Power supply for DCO.

Xtal32kP

Analog IO

32768 Hz crystal oscillator pin 1 or input for an external


32768 Hz clock generator. Used to connect crystal or active frequency reference

Xtal32kN

Analog IO

32768 Hz crystal oscillator pin 2.

Xtal32MP

Analog IO

32 MHz crystal oscillator pin 1 or input for an external 32 MHz


clock generator. Usage: Connect crystal or active frequency reference

Xtal32MN

Analog IO

32 MHz kHz crystal oscillator pin 2.

Tx/Rx

Digital Output

Distinguishes between the TX and RX phase. Can also be used


to provide an external power amplifier control. Active Low during TX, otherwise High.

10

VSSD

Supply

Power supply for digital parts.

11

VSSD

Supply

Power supply for digital parts.

12

VDDD

Supply

Power supply for digital parts.

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 11

12

Pin Connections and Description


nanoLOC TRX Transceiver (NA5TR1) Datasheet

Table 3: Pin description (Continued)

Pin

Name

Type

Description

13

VDDD

Supply

Power supply for digital parts.

14

VSSD

Supply

Power supply for digital parts.

15

SpiClk

Digital Input

SPI Clock.

16

/SpiSSn

Digital Input

SPI Slave Selected; Active Low.

17

SpiTxD

Digital Output

SPI Transmit Data (MISO).

18

SpiRxD

Digital Input

SPI Receive Data (MOSI).

19

D0

Digital IO

General purpose programmable digital IO line 0.1

20

D1

Digital IO

General purpose programmable digital IO line 1.1

21

D2

Digital IO

General purpose programmable digital IO line 2.1

22

D3

Digital IO

General purpose programmable digital IO line 3.1


Note: A 32768 Hz clock operates on the pin D3 after reset/
power.

23

VSSD

Supply

Power supply for digital parts.

24

VDDD

Supply

Power supply for digital parts.

25

VSSD

Supply

Power supply for digital parts.

26

CReset

Digital Output

Used to reset an external microcontroller at power-up and


wake-up. Active Low during normal operation.

27

CIRQ

Digital Output

Microcontroller interrupt request. Can be used to send an interrupt request to an external microcontroller. Logic levels can be
programmed.2

28

VDD1V2_Cap

Supply

1.2 V digital power supply decoupling.3

29

CVcc

DC Output

Switchable power supply for external microcontroller.

30

/POnReset

Digital Input

Power on reset signal.4

31

VSSD

Supply

Power supply for digital parts.

32

VDDA_ADC

Supply

Power supply for analog parts (Rx ADC).

33

nc

Not connected.

34

VSSA

Supply

Power supply for analog parts.

35

VDDA

Supply

Power supply for analog parts.

36

VDDA

Supply

Power supply for analog parts.

37

nc

Must not be connected.

38

nc

Must not be connected.

39

VSSA

Supply

Power supply for analog parts.

40

VSSA

Supply

Power supply for analog parts.

41

RxN

RF Input

Differential receiver input (inverted).

42

RxP

RF Input

Differential receiver input.

43

VSSA

Supply

Power supply for analog parts.

44

TxN

RF Output

Differential transmitter output (Inverted).

45

TxP

RF Output

Differential transmitter output.

46

VSSA

Supply

Power supply for analog parts.

47

VBalun

DC Output

DC voltage for RF output stage.5

48

VDDA

Supply

Power supply for analog parts.

Page 12 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

Pin Connections and Description


nanoLOC TRX Transceiver (NA5TR1) Datasheet

1.
2.
3.
4.
5.

12.2

12

See 12.3. Pins 19-22: D0 to D3 Programmable Digital I/Os on page 13


See 12.4. Pin 27: CIRQ Microcontroller Interrupt Request on page 13.
See 12.5. Pin 28: VDD1V2_Cap 1.2 V Digital Power Supply Decoupling on page 13.
See 12.6. Pin 30: /POnReset on page 14.
See 12.7. Pin 47: VBalun DC voltage for RF output stage on page 14.

Pin 2: RRef External Precise Reference Resistor


Table 4: RRef (pin 2)

RRef (Pin 2)

12.3

Value

Unit

Nominal resistance

10

Recommended resistance tolerance

Pins 19-22: D0 to D3 Programmable Digital I/Os


These four digital I/Os are programmed
through the use of register 0x04 and 0x05.
The digital IO ports have several functions.
These include a normal input where the signal
level at these ports can be read, or a normal
output where a programmable value is driven
out of the chip. Additionally, the digital IO ports
can be used as an alarm input which reports
the occurrence of an alarm event. This could
be used to wake-up the chip. Also a clock (feature clock) can be driven out of the chip on
these pins.

When reading this register, each bit reports the


signal level or the occurrence of an alarm at the
corresponding digital IO port. When writing to
this register, the values are just set inside this
register. The values first influence one or more
digital IO ports when a write strobe is generated for the desired digital IO port(s) via register 0x05. This causes the values in this register
to be copied to the corresponding configuration
registers of these digital IO ports.

Note: For more details, see the nanoLOC TRX Transceiver (NA5TR1) User Guide.

12.4

Pin 27: CIRQ Microcontroller Interrupt Request


CIRQ is a programmable output pin that
sends an interrupt request to an external microcontroller. This IRQ pin can be configured as
either low or high active, as well as either pushpull or open-drain using register 0x00. The IRQ

pin can be driven by either a transmitter interrupt, a receiver interrupt, a baseband timer
interrupt, or a local oscillator interrupt using
register 0x0F.

Note: For more details, see the nanoLOC TRX Transceiver (NA5TR1) User Guide.

12.5

Pin 28: VDD1V2_Cap 1.2 V Digital Power Supply Decoupling


Table 5: VDD1V2_Cap (Pin 28)

VDD1V2_Cap (Pin 28)


Decoupling capacitance (typical)

2010 Nanotron Technologies GmbH.

Subject to change without notice

Value

Unit

100

nF

NA-09-0230-0388-2.3 Page 13

12

Pin Connections and Description

12.6

Pin 30: /POnReset

nanoLOC TRX Transceiver (NA5TR1) Datasheet

/POnReset signal is active low. Figure 5 shows a timing diagram for pin 30 /POnReset.
V level
High = Vdddd * 0.7
tmin

tdelay

5 s

400 s

Threshold
levels
Start of
internal reset

Stop

Low= Vdddd * 0.2

Time
Figure 5: /POnReset timing diagram

12.7

Pin 47: VBalun DC voltage for RF output stage


This must be fed to TxN and TxP using bias
tees or a balun / transformer with center tap.
Minimum and maximum values for a decou-

pling bypass capacitor are shown below. (Note:


It is not a block capacitor.) RF ceramic type
with low serial inductance is recommended.

Table 6: VBalun (Pin 47)

VBalun (Pin 47)

Value

Unit

Decoupling bypass capacitor minimum capacitance

27

pF

Decoupling bypass capacitor maximum capacitance

47

pF

Note: See also 1. Example Application - RF Module on page 37.

12.8

Chip Memory Spaces and Registers


The nanoLOC chip provides four memory
spaces:
+

128 byte programmable chip register (register block) for chip configuration settings

512 byte baseband RAM

Chirp sequencer RAM

Page 14 NA-09-0230-0388-2.3

Correlator memory

A complete description of these memory


spaces and all end-user registers, as well as
information on programming the chip, is provided in nanoLOC TRX Transceiver (NA5TR1)
User Guide.

Subject to change without notice

2010 Nanotron Technologies GmbH.

Electrical Specifications
nanoLOC TRX Transceiver (NA5TR1) Datasheet

13

13 Electrical Specifications
This section provides the fundamental electrical specifications of the major blocks of the nanoLOC
chip (NA5TR1). Typical values represent the mean production values (nominal process) at nominal
operating conditions (See 10. Nominal Conditions on page 9). The minimum/maximum values are
guaranteed values over the entire operating range (unless otherwise stated). For a balanced signal, all impedances, signal voltages, and so on, refer to the differential signal.

13.1

General / DC Parameters
Table 7: General / DC Parameters

Parameter

Value

Unit

2.4

GHz ISM Band

2.3 2.7

Chirp

-40 +85

Analog part, Tx block (Pout = 0 dBm)

23

mA

Analog part, Tx block, ranging with increased accuracy


(Pout = 0 dBm)

25

mA

Analog part, Rx block

24

mA

Analog part, Rx block, ranging with increased accuracy

28

mA

Digital part, Tx mode

mA

Digital part, Tx mode, ranging with increased accuracy

10

mA

Digital part, Rx mode

mA

Digital part, Rx mode, ranging with increased accuracy

20

mA

Tx Mode (Pout = 0 dBm)

30

mA

Tx Mode, ranging with increased accuracy (Pout = 0 dBm)

35

mA

Rx Mode

33

mA

Rx Mode, ranging with increased accuracy

48

mA

100

nF

Operating frequency range


Supply voltage range
Modulation method
Operating temperature range
Typical supply current for individual blocks:

Typical total supply current:

VDD1V2_Cap (Pin 28): 1.2 V digital power supply decoupling:


Decoupling capacitance (typical)
VBalun (Pin 47): DC voltage for RF output stage
For Decoupling bypass capacitor Min and Max, see 12.7. Pin 47: VBalun DC voltage for RF output stage
on page 14.
CVcc (pin 29): Switchable power supply for external microcontroller:
Maximum capacitive load

10

Maximum output current

10

mA

Nominal resistance

10

Recommended resistance tolerance

RRef (pin 2): External precise reference resistor:

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 15

13

Electrical Specifications

13.2

Transmitter (TX)

nanoLOC TRX Transceiver (NA5TR1) Datasheet

13.2.1 General Parameters


Note: All values at nominal conditions. See 10. Nominal Conditions on page 9.
Table 8: Transmitter general parameters

Parameter

Value

Unit

dBm

Dynamic for output power control (typical)

37.5

dB

Number of steps for output power control

64

Number

200

Ohm

Balanced

Transmitter spurious outputs (1 GHz ... 12.5 GHz)

-80

dBm/Hz

Transmitter carrier suppression

-20

dBc

Number

14

Number

Carrier frequency calibration accuracy (relative), CSS mode3

70

ppm

Carrier frequency calibration accuracy (absolute), CSS mode1

171

kHz

Transmitter nominal output power

Load impedance
Type of load

Number of frequency channels (FDMA Mode, non-overlapping channels), according to IEEE 802.15.4a standard1
Number of frequency channels (FDMA Mode, overlapping channels),
according to IEEE 802.15.4a standard2

1.
2.
3.

For a list of frequency allocations for Europe and USA, see 13.7. Local Oscillator (LO) on page 18.
For a list of frequency allocations, see 13.7. Local Oscillator (LO) on page 18.
Warming-up, temperature drift and voltage supply changes will cause a drift of the oscillator frequency. Therefore
the calibration of the oscillator should be repeated regularly.

13.2.2 Chirp Specification (CSS - Chirp Spread Spectrum)


Table 9: Transmitter Chirp specification (CSS)

Parameter

Value

Unit

0.5, 1, 2, and 4

Symbol rate:

Nominal

Mbaud

Reduced

0.5 and 0.25

Mbaud

32

MHz

244.175

MHz

Chirp duration (programmable)

Chirp Sequencer Clock Frequency fChirp, FDMA-CSS mode


Chirp Sequencer Clock Frequency fChirp, CSS Ranging mode

Page 16 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

13

Electrical Specifications
nanoLOC TRX Transceiver (NA5TR1) Datasheet

13.3

Receiver (RX) General Parameters


Table 10: Receiver general parameters

Parameter

Value
-3

Typical receiver sensitivity @ BER=10 , nominal conditions (FEC=off)

-95

dBm

Typical receiver sensitivity @ BER=10-3, nominal conditions1 (FEC=on)

-97

dBm

Balanced

3.5

dB

-20

dBm

Number

14

Number

Nominal frequency bandwidth of the channel @ -30 dBr (narrowband)

22

MHz

Nominal frequency bandwidth of the channel @ -30 dBr (wideband)

80

MHz

LO frequency calibration accuracy (relative), CSS mode1,4

70

ppm

LO frequency calibration accuracy (absolute), CSS mode1,2

171

kHz

Type of RX input
Typical noise figure
Maximum input signal @ BER=10

-3

Number of frequency channels (FDMA Mode, non-overlapping channels), according to IEEE 802.15.4a standard2
Number of frequency channels (FDMA Mode, overlapping channels),
according to IEEE 802.15.4a standard3

1.
2.
3.
4.

13.4

Unit

At nominal conditions. See 10. Nominal Conditions on page 9.


For a list of frequency allocations for Europe and USA, see 13.7. Local Oscillator (LO) on page 18.
For a list of frequency allocations, see 13.7. Local Oscillator (LO) on page 18.
Warming-up, temperature drift and voltage supply changes will cause a drift of the oscillator frequency. Therefore
the calibration of the oscillator should be repeated regularly.

Dynamic Performance
Note: See figures in 14. Timing Diagrams on page 21.
Table 11: Dynamic performance

Parameter

Figure

Variable

Value

Unit

Switch-on time for the receiver (Rx)1

Figure 6

tRxTO

Switch-on time for the transmitter (Tx)

Figure 7

tTxTO

24

Switch Tx to Rx, ACK to DATA Mode2

Figure 8

tTxRxAckData

24

Switch Tx to Rx, DATA to DATA Mode3

Figure 9

tTxRxDataData

Switch Tx to Rx, DATA to ACK Mode3

Figure 10

tTxRxDataAck

Switch Rx to Tx, ACK to DATA Mode

Figure 11

tRxTxAckData

24

Switch Rx to Tx, DATA to DATA Mode

Figure 12

tRxTxDataData

24

Switch Rx to Tx, DATA to ACK Mode

Figure 13

tRxTxDataAck

Start-up time for 32 MHz reference oscillator

Figure 14

tXtalSU

ms

Calibration time

Figure 15

tLOFQ

ms

1.
2.

At input power = approx. -80 dBm


Assuming RX is initialized.

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 17

13

Electrical Specifications

13.5

Quartz Controlled Oscillator for Reference Frequency

nanoLOC TRX Transceiver (NA5TR1) Datasheet

Table 12: Quartz controlled oscillator for reference frequency

Parameter

Value

Unit

32

MHz

Fundamental

40

ppm

Recommended maximum frequency temperature coefficient of the


reference quartz resonator

20

ppm

Recommended maximum frequency tolerance of the reference quartz


resonator

10

ppm

Recommended maximum aging of the reference quartz resonator in


10 years

10

ppm

Maximum equivalent serial resistance of the reference quartz


resonator

40

Recommended load capacitance

12

pF

Input for external signal with frequency fREF

Yes

Xtal32MP

Frequency fREF
Oscillation type of the reference quartz resonator
Recommended reference quartz resonator

Pin name for external signal with frequency fREF

13.6

Quartz Controlled Oscillator for Real Time Clock (RTC)


Table 13: Quartz Controlled Oscillator for Real Time Clock (RTC)

Parameter

Value

Unit

Frequency fRTC

32768

Hz

Fundamental

20

ppm

80

Recommended load capacitance

12.5

pF

Input for external signal with frequency fRTC

Yes

Xtal32kP

Value

Unit

Number

Nominal LO frequency fLO1E for FDMA channel no. 0 (Europe)

2412

MHz

Nominal LO frequency fLO2E for FDMA channel no. 6 (Europe)

2442

MHz

Nominal LO frequency fLO3E for FDMA channel no. 12 (Europe)

2472

MHz

Nominal LO frequency fLO1U for FDMA channel no. 0 (USA)

2412

MHz

Nominal LO frequency fLO2U for FDMA channel no. 5 (USA)

2437

MHz

Nominal LO frequency fLO3U for FDMA channel no. 10 (USA)

2462

MHz

Oscillation type of the RTC quartz resonator


Recommended frequency accuracy of the quartz resonator
Maximum equivalent serial resistance of the RTC quartz resonator

Pin name for external signal with frequency fRTC

13.7

Local Oscillator (LO)


Table 14: Local Oscillator (LO)

Parameter
Number of frequency channels (FDMA Mode, non-overlapping channels) according to IEEE 802.15.4a standard

Page 18 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

Electrical Specifications
nanoLOC TRX Transceiver (NA5TR1) Datasheet

13

Table 14: Local Oscillator (LO) (Continued)

Parameter

Value

Unit

14

Number

Center frequency of channel no. 0 (overlapping)

2412

MHz

Center frequency of channel no. 1 (overlapping)

2417

MHz

Center frequency of channel no. 2 (overlapping)

2422

MHz

Center frequency of channel no. 3 (overlapping)

2427

MHz

Center frequency of channel no. 4 (overlapping)

2432

MHz

Center frequency of channel no. 5 (overlapping)

2437

MHz

Center frequency of channel no. 6 (overlapping)

2442

MHz

Center frequency of channel no. 7 (overlapping)

2447

MHz

Center frequency of channel no. 8 (overlapping)

2452

MHz

Center frequency of channel no. 9 (overlapping)

2457

MHz

Center frequency of channel no. 10 (overlapping)

2462

MHz

Center frequency of channel no. 11 (overlapping)

2467

MHz

Center frequency of channel no. 12 (overlapping)

2472

MHz

2484

MHz

70

ppm

100

ppm

Number of frequency channels (FDMA Mode, overlapping channels)


according to IEEE 802.15.4a standard

Center frequency of channel no. 13 (overlapping)


Accuracy of the LO frequency calibration, typical CSS

mode1

Accuracy of the LO frequency calibration, worst case, CSS mode1


1.

13.8

Warming-up, temperature drift and voltage supply changes will cause a drift of the oscillator frequency. Therefore
the calibration of the oscillator should be repeated regularly.

Digital Interface
Note: The following table refers to the Digital IOs D0, D1, D2, D3, CReset, CIRQ, SpiTxD,
SpiClk, SpiSSn, Tx/Rx.
Table 15: Digital Interface to Sensor / Actor

Symbol

Parameter

Value

Unit

Number of general purpose input/outputs

Number

Width of each interface

Bit

Direction

In/Out (bi-directional,
open-drain with pullup

Type

Programmable

2.5

pF

CIN

Logic Input Capacitance


Input Voltage

VIL

Low level input voltage (minimum)

0.2 x VDDD

VIH

High level input voltage (maximum)

0.7 x VDDD

Output Voltage
VOL

Low level output voltage (maximum)

0.3

VOH

High level output voltage (minimum)

VDDD - 0.3

Maximum output current

mA

Equivalent pull-up resistance (minimum)

50

RUP

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 19

13

Electrical Specifications
nanoLOC TRX Transceiver (NA5TR1) Datasheet

Table 15: Digital Interface to Sensor / Actor (Continued)

Symbol

13.9

Parameter

Value

Unit

RUP

Equivalent pull-up resistance (maximum)

193

RDN

Equivalent pull-down resistance (minimum)

50

RDN

Equivalent pull-down resistance (maximum)

275

Power Supply for the External Microcontroller


Table 16: Power supply for external microcontroller

Parameter

Value
VDD-0.04 1

Maximum Capacitive Load at CVcc

10

Maximum output current

10

mA

Typical Start-Up Time @ ILoad = 10mA, CLoad = 10uF

1.5

ms

Typical Output Voltage @ ILoad = 10mA

1.

13.10

Unit

VDD=2.3 2.7 V

Power Management States and Current Consumption


Table 17: Power management states

State

Current
Consumption1

Activation Time into State

PwrDownModeFull

under 2.5 A

PowerUp: between 1 and 32 ms (programmable) + boot time


of the external microcontroller

PwrDownModePad

650 A (typ.)

PowerUp: between 1 and 32 ms (programmable) + boot time


of the external microcontroller

PowerUp

750 A (typ.)

StandBy: # 5 ms (depending on the speed of the baseband


quartz oscillator)

StandBy

# 2.5 mA

Ready

# 4 mA

Ready (without reconfiguration) 6 s2


n./a.

1. Current consumption values are typical values only.


2. @ 4 Mbit/s SPI.

Page 20 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

Example Application - RF Module


nanoLOC TRX Transceiver (NA5TR1) Datasheet

A1

A1 Example Application - RF Module


A1.1

Schematics

Figure 29: Example Application schematics 1 of 3

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 37

Application - RF Module
A1 Example
nanoLOC TRX Transceiver (NA5TR1) Datasheet

Figure 30: Example Application schematics 2 of 3

Page 38 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

Example Application - RF Module


nanoLOC TRX Transceiver (NA5TR1) Datasheet

A1

Figure 31: Example Application schematics 3 of 3

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 39

Application - RF Module
A1 Example
nanoLOC TRX Transceiver (NA5TR1) Datasheet

A1.2

PCB Layout
Note: As this example application includes level shifters, it can be used in a variety of 3 volt environments, controllers, and other circuits. To work in a 2.5 volt environment, voltage converters are not required. The board dimensions are 30 mm x 20 mm.
Scale = 3:1

Figure 32: Example Application top components


Scale = 3:1

Figure 33: Example Application: bottom layer (inverted)


Scale = 3:1

Figure 34: Example Application: top components


Page 40 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

Example Application - RF Module


nanoLOC TRX Transceiver (NA5TR1) Datasheet

A1.3

A1

Example Application Bill of Materials

Table 25: Example Application bill of materials


Part

Company

Description
Resistor

Label

Value

Qty

Remarks

Package

Supplier

Order Number

R2

0R

Not specified

0402

Not specified

Not specified

R3, R4, R5

2k2

63mW, 5%

0402

Not specified

Not specified

R1

Capacitor

Inductor

10k, 1%

63mW, 1%

0402

Not specified

Not specified

R6, R7

100k

63mW, 5%

0402

Not specified

Not specified

C21

n.a.

Not specified

0402

Not specified

Not specified

C22, C23

5.6pF

NPO, 50V, 5%

0402

Not specified

Not specified

C7, C9

22pF

NPO, 50V, 5%

0402

Not specified

Not specified

C12, C15

18pF

NPO, 50V, 5%

0402

Not specified

Not specified

C20

33pF

NPO, 50V, 5%

0402

Not specified

Not specified

C2, C3,
C8, C10,
C13, C16,
C18

100pF

NPO, 50V, 5%

0402

Not specified

Not specified

C4

1nF

NPO, 50V, 5%

0402

Not specified

Not specified

C30

10nF

X7R, 10V, 10%

0402

Not specified

Not specified

C1, C5,
C6, C11,
C14, C17,
C19, C24,
C25, C26,
C27, C29

100nF

12

X7R, 10V, 10%

0402

Not specified

Not specified

C28

2.2uF

X5R, 6.3V, 10%

0603

Not specified

Not specified

L1

3.9nH

WE-MK

0402

Wuerth Elektronik

WE 744784039

L3

5.6nH

WE-MK

0402

Wuerth Elektronik

WE 744 784056

L2, L4

8.2nH

WE-MK

0402

Wuerth Elektronik

WE 744 784082

Balun
50R:200R

BALUN1

WE 748422245

ISM 2.44GHz,
50R:200R

BAL0805

Wuerth Elektronik

WE 748422245

Bandpass
Filter 2.4GHz

BPF1

WE-748351124

ISM 2.44GHz

WEBPF1008

Wuerth Elektronik

WE 748351124

Clock Crystal

Q1

32.768kHz

20ppm @ -40C
... +85C,
CL=12.5pF

MS1V-TK

GOLLEDGE

MS1V-T1K
32.768kHz
20ppm

Q2

32.000MHz

20ppm @ -40C
...+85C,
CL=12pF

TSX-3225

Epson Toycoon

Q32.0000TS
X3225+ET0

P-Channel
MOSFET

T1

IRLML5203

TrenchMOS
enhancement
mode FET

SOT-23

International
Rectifier

IRLML5203PbF

N-Channel
MOSFET

T2

PMV60EN

HEXFET Power
MOSFET

SOT-23

Philips
Semiconductor

PMV60EN

nanoLOC TRX
Transceiver

IC1

NA5TR1

nanoLOC chip

VFQFPN4
8

Nanotron
Technologies

NA5TR1

Level Shifters

IC2, IC3

SN74AVC4T24
5

4 Bit dual supply


bus transceiver

TSSOP16

Texas Instruments

SN74AVC4
T245PWT

Voltage
Regulator

IC5

TPS79425DGN

LD Voltage
Regulator

MSOP-8

Texas Instruments

TPS79425DGNT

PCB

PCB

P138

Not specified

30 x 20
mm

Nanotron
Technologies

P138

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 41

Application - RF Module
A1 Example
nanoLOC TRX Transceiver (NA5TR1) Datasheet

Intentionally Left Blank

Page 42 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

Timing Diagrams
nanoLOC TRX Transceiver (NA5TR1) Datasheet

14

14 Timing Diagrams
Note: The time values in the following diagrams are based on Table 11 on page 17.

14.1

Switch-On Time for the Receiver (Rx)


The switch-on time1 for the receiver in the nanoLOC chip from the receiving of the command via
SPI to the beginning of packet reception is 6 s (at input power = approximately -80 dBm). This is
represented in figure 6 below by tRxTO.
SpiClk

SpiRxD

...
/SpiSSn

...

RxP, RxN

Command requesting
packet reception

tRxTO

Packet reception

Figure 6: Turn-on time Rx: time = tRxTO

14.2

Switch-On Time for the Transmitter (Tx)


The switch-on time for the transmitter in the nanoLOC chip from the receiving of the command via
SPI to the beginning of packet transmission is 24 s. This is represented in figure 7 below by
tTxTO.

...

TxP, TxN
SpiClk

SpiRxD

...
/SpiSSn
Command requesting
packet transmission

tTxTO

Packet transmission

Figure 7: Turn-on time Tx: time = tTxTO


1.

At nominal conditions. See 10. Nominal Conditions on page 9.

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 21

14

Timing Diagrams

14.3

Switch Time From Tx to Rx (ACK to DATA Mode)

nanoLOC TRX Transceiver (NA5TR1) Datasheet

The switch time1 from Tx to Rx (ACK to DATA mode), tTxRxAckData, is 24 s.


TxP, TxN

...
ACK Packet

...

RxP, RxN
tTxRxAckData

DATA Packet

Figure 8: Switch time from Tx to Rx (from ACK to DATA mode)

14.4

Switch Time From Tx to Rx (DATA to DATA Mode)


The switch time1 from Tx to Rx (DATA to DATA mode), tTxRxDataData, is 24 s.
TxP, TxN

...
DATA Packet

...

RxP, RxN
tTxRxDataData

DATA Packet

Figure 9: Switch time from Tx to Rx (from DATA to DATA mode)

14.5

Switch Time From Tx to Rx (DATA to ACK Mode)


The switch time1 from Tx to Rx (DATA to ACK mode), tTxRxDataAck, is 8 s.
TxP, TxN

...
DATA Packet

...

RxP, RxN
tTxRxDataAck

ACK Packet

Figure 10: Switch time from Tx to Rx (from DATA to ACK mode)

1.

Assuming RX is initialized.

Page 22 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

Timing Diagrams
nanoLOC TRX Transceiver (NA5TR1) Datasheet

14.6

14

Switch Time From Rx to Tx (ACK to DATA Mode)


The switch time from Rx to Tx (from ACK to DATA mode), tRxTxAckData, is 24 s.
RxP, RxN

...
ACK Packet

...

TxP, TxN
tRxTxAckData

DATA Packet

Figure 11: Switch time from Rx to Tx (from ACK to DATA mode)

14.7

Switch Time From Rx to Tx (DATA to DATA Mode)


The switch time from Rx to Tx (from DATA to DATA mode), tRxTxDataData, is 24 s.
RxP, RxN

...
DATA Packet

...

TxP, TxN
tRxTxDataData

DATA Packet

Figure 12: Switch time from Rx to Tx (from DATA to DATA mode)

14.8

Switch Time From Rx to Tx (from DATA to ACK mode)


The switch time from Rx to Tx (from DATA to ACK mode), tRxTxDataAck, is 8 s.
RxP, RxN

...
DATA Packet

...

TxP, TxN
tRxTxDataAck

ACK Packet

Figure 13: Switch time from Rx to Tx (from DATA to ACK mode)

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 23

14

Timing Diagrams

14.9

Start-up Time for 32 MHz Crystal

nanoLOC TRX Transceiver (NA5TR1) Datasheet

The start-up time, tXtalSU, for the 32 MHz quartz oscillator until it reaches a stable frequency generation is 5 ms.
Frequency deviation for 32 MHz
reference quartz oscillator

Start of 32 MHz
quartz oscillation

Allowed frequency
deviation

Time

SpiClk

SpiTxD

...

/SpiSSn

Command starting
32 MHz reference quartz oscillator

tXtalSU

Figure 14: 32 MHz crystal start-up time: time = tXtalSU

Page 24 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

Timing Diagrams
nanoLOC TRX Transceiver (NA5TR1) Datasheet

14.10

14

Calibration Time
The calibration time, tLOFQ, is 6 ms.
LO frequency deviation
from nominal value
[MHz]
+1
+ 0.5
0

Time

-1

LO frequency drift

LO frequency calibration

LO frequency drift

- 0.5

LO frequency calibrated
SpiClk

SpiTxD

...

/SpiSSn
Command requesting
LO frequency calibration

tLOFQ

Figure 15: Start-up time for LO frequency calibration

14.11

SPI Bus Write Timing


The following timing diagrams shows the write timing of the SPI bus. For more details, see the
nanoLOC TRX (NA5TR1) Transceiver User Guide.
tLC

tHC

...

SpiClk

tHRxD

tSRxD
Bit 0

SpiRxD

...

tHS

tSS
/SpiSsn

Bit N

...
Figure 16: SPI bus write timing

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 25

14
14.12

Timing Diagrams
nanoLOC TRX Transceiver (NA5TR1) Datasheet

SPI Bus Read Timing


The following timing diagrams shows the read timing of the SPI bus. For more details, see nanoLOC TRX (NA5TR1) Transceiver User Guide.

...

...

SpiClk
tHTxD / tPTxDZ

tPDTxD

...

Bit 0

SpiTxD

Bit N
tHS

/SpiSsn

...

...
Figure 17: SPI bus read timing

The following table lists the timing values for the SPI bus:
Table 18: SPI bus timing values

Parameter

Minimum

Maximum

fmax

27 MHz

tLC

18.5 ns

Low time SpiClk

tHC

18.5 ns

High time SpiClk

tSS

4 ns

/SpiSsn Setup

tHS

2 ns

SpiSsn Hold

tSRxD

4 ns

SpiRxD Setup

tHRxD

2 ns

SpiRxD Hold

tPDTxD

18.5 ns

tHTxD

2.5 ns

tPTxDZ

18.5 ns

Page 26 NA-09-0230-0388-2.3

Description
SpiClk

SpiTxD Propagation Delay Drive


SpiTxD Hold
SpiTxD Propagation Delay High Impedance

Subject to change without notice

2010 Nanotron Technologies GmbH.

Output Power Control


nanoLOC TRX Transceiver (NA5TR1) Datasheet

15

15 Output Power Control


The typical characteristics of the output power control (as set by RfTxOutputPower) measured at
the SMA connector of the nanoLOC RF Module (see Appendix 2: nanoLOC RF Test Module on
page 43) is shown in 18 below. The typical output power values are listed in table Table 19 on
page 27.

Figure 18: nanoLOC output power control measured at RF Test Module SMA connector
Table 19: Typical output power for RfTxOutputPower register values
Register
Value

Pout /
dBm

Register
Value

Pout /
dBm

Register
Value

Pout /
dBm

Register
Value

Pout /
dBm

-36.20

16

-23.28

32

-12.07

48

-3.33

-35.30

17

-22.48

33

-11.41

49

-2.87

-34.47

18

-21.75

34

-10.80

50

-2.45

-33.65

19

-21.03

35

-10.20

51

-2.05

-32.83

20

-20.31

36

-9.61

52

-1.66

-32.02

21

-19.60

37

-9.03

53

-1.28

-31.21

22

-18.89

38

-8.46

54

-0.92

-30.41

23

-18.19

39

-7.91

55

-0.57

-29.54

24

-17.44

40

-7.31

56

-0.23

-28.70

25

-16.70

41

-6.74

57

0.12

10

-27.92

26

-16.02

42

-6.22

58

0.42

11

-27.14

27

-15.36

43

-5.71

59

0.72

12

-26.37

28

-14.70

44

-5.21

60

1.00

13

-25.60

29

-14.04

45

-4.73

61

1.28

14

-24.85

30

-13.40

46

-4.26

62

1.54

15

-24.09

31

-12.76

47

-3.80

63

1.79

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 27

16

nanoLOC Ranging
nanoLOC TRX Transceiver (NA5TR1) Datasheet

16 nanoLOC Ranging
Ranging in the nanoLOC chip uses two types
of transmissions, which are Data packet and
hardware Acknowledgments, to obtain two
types of time measurements:

16.1

TX Propagation Delay

Processing Delay

The chip also offers two ranging modes:


+

Normal Ranging Mode

Fast Ranging Mode

These are briefly discussed below.

Time Measurements
16.1.1 TX Propagation Delay
This delay is the time for a data or acknowledgement packet to be transmitted from one
station to another. As the speed of a signal
propagating through the air is known (the

speed of light), the time in which a packet is


sent from one station to another can be used to
calculate the distance between the stations.

16.1.2 Processing Delay


This delay is the time required to process a
received data packet and generate and transmit a hardware acknowledgement packet to the
sending station. This also is a known value and
is used as part of the ranging calculations.

16.2

These time measurements are accumulated


and with a ranging formula used to obtain a
ranging distance between two nanoLOC
nodes.

Ranging Modes
16.2.1 Normal Ranging Mode
Normal ranging mode uses a ranging methodology developed by Nanotron called Symmetrical Double-Sided Two-Way Ranging (SDSTWR).1 This ranging methodology is symmetrical in that the measurement from the local
nanoLOC station to the remote nanoLOC station is mirrored by a measurement from the
1.

remote nanoLOC station to the local nanoLOC


station (ABA to BAB). It is Double-Sided in that
only two stations (a remote and a local station)
are used for ranging measurements. It is TwoWay in that a data packet is sent from one station and a hardware acknowledgement is automatically sent back to the sending station.

For more information about SDS-TWR, see


the white paper Real Time Location Systems.

Node 1 (Tag)

First Measurement
Node 1 - Node 2 - Node 1

Node 2 (Anchor)

Node 1 (Tag)

Second Measurement
Node 2 - Node 1 - Node 2

Node 2 (Anchor)

Figure 19: Normal ranging mode

Page 28 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

nanoLOC Ranging
nanoLOC TRX Transceiver (NA5TR1) Datasheet

Ranging States

Node 2

RANGING_READY State

Request Ranging

RANGING_START State

Initiate acknowledged
data packet transmission

DATA Packet

T2
Processing
Delay

T1
Propagation
Delay

First Measurement

Call from
application

Node 1

16

ToaOffsetMeanData

HW Ack Packet

ToaOffsetMeanAck
TxRespTime

ANSWER1 State

Initiate acknowledged
data packet transmission

Returned
distance
value

T4
Processing
Delay

T3
Propagation
Delay

Second Measurement

DATA Packet

ToaOffsetMeanData

HW Ack Packet

ToaOffsetMeanAck
TxRespTime
ANSWER2 State

Read out values of


TxRespTime from both station

Send value of TxRespTime


to local station in Data packet

DATA Packet

Calculate distance in software

Figure 20: Normal ranging mode using SDS-TWR

Ranging measurements between two nanoLOC stations in normal ranging mode are
obtained using the following formula:

Distance =
( T1 T2 ) + ( T3 T4 )
------------------------------4

T1 = propagation delay time of a round trip


between a local and a remote station

T2 = processing delay in the remote station

Determining ANSWER2

Answer2 = T3 - T4 where

Determining ANSWER1

Answer1 = T1 - T2 where

T3 = propagation delay time of a round trip


between a remote and a local station

T4 = processing delay in the local station

16.2.2 Fast Ranging Mode


Fast ranging mode uses the same ranging
methodology as normal ranging mode, except
that it is not symmetrical. Only one set of measurements are used (ABA). This increases the

Node 1

speed at which ranging values can be determined, but without the additional validity of the
second measurement in normal ranging mode.

First Measurement
Node 1 - Node 2 - Node 1

Node 2

Figure 21: Fast ranging mode

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 29

16

nanoLOC Ranging
nanoLOC TRX Transceiver (NA5TR1) Datasheet

Ranging States

PDSap()

RANGING_START State

T2
Processing
Delay

T1
Propagation
Delay

DATA Packet

HW Ack Packet

ToaOffsetMeanAck
TxRespTime

ToaOffsetMeanData

ANSWER2 State

Read out value of TxRespTime


Returned
distance
value

Remote Station

RANGING_READY State

Initiate acknowledged
data packet transmission

Measurement

Call from
application

Local Station

Initiate final
data packet transmission

DATA Packet

getDistance()
Figure 22: Fast ranging mode using SDS

Ranging measurements between two stations


in fast ranging mode are obtained using the following formula:

Distance =

Page 30 NA-09-0230-0388-2.3

( T1 T2 )
------------2

Determining ANSWER2

Answer2 = Answer1 = T1 - T2
+

T1 = propagation delay time of a round trip


between a local and a remote station

T2 = processing delay in the remote station

Subject to change without notice

2010 Nanotron Technologies GmbH.

nanoLOC Package (VFQFPN-48)


nanoLOC TRX Transceiver (NA5TR1) Datasheet

17

17 nanoLOC Package (VFQFPN-48)


The nanoLOC TRX Transceiver uses the MicroLeadFrame (QFN - Quad Flat No-Lead) package
VFQFPN2 7X7X1.0 48 PITCH 0.5.
Note: VFQFPN2 stands for Thermally Enhanced Very thin Fine pitch Quad Packages No lead
and has 48 pins.

17.1

MicroLeadFrame QFN
The nanoLOC chip uses the MicroLeadFrame (MLF), (QFN - Quad Flat No-Lead) package. It is a
leadless leadframe based Chip Scale Package (CSP) that enhances chip speed, reduces thermal
impedance, and reduces the printed circuit board area required for mounting. The small size and
very low profile make it ideal for the nanoLOC chip.
MicroLeadFrame (QFN - Quad Flat No-Lead) package is a near CSP plastic encapsulated package with a copper leadframe substrate. This package uses perimeter lands on the bottom of the
package to provide electrical contact to the PCB. The package also offers Exposed Pad technology as a thermal enhancement by having the die attach paddle exposed on the bottom of the package surface to provide an efficient heat path when soldered directly to the PCB. This enhancement
also enables stable ground by use of down bonds or by electrical connection through a conductive
die attach material.
Figure 23 below shows the basic construction and view of the MLF QFN package.
Die Attach Material

Mold Compound
Gold Wire

Die
Cu
Exposed
Contact

Standard MLF

Exposed Die
Attach Pad

Figure 23: Basic construction of standard MLF package

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 31

17

nanoLOC Package (VFQFPN-48)

17.2

VFQFPN-48 Package (7x 7mm, 48 Pins, 0.5 mm Pitch)

nanoLOC TRX Transceiver (NA5TR1) Datasheet

Figure 24 below shows the nanoLOC chip encapsulated in the VFQFPN-48 package.

Figure 24: nanoLOC chip VFQFPN2-48 package: 7 mm x 7 mm, 48 pins, 0.5 mm pitch

Table 20 and figure 25 below provide the dimensions of the VFQFPN-48 package.
Table 20: VFQFPN-48 package dimensions

Ref

Min.

Typ.

Max.

0.85

.90

A1

0.01

0.05

A2

0.65

0.70

A3

0.20

0.18

0.23

0.30

b1

0.60

6.90

7.00

7.10

D1

6.75

D2

See Exposed Pad Variation

D3

See Mixed Ring Pad Variation

6.90

7.00

7.10

E1

6.75

E2

See Exposed Pad Variation

E3

See Mixed Ring Pad Variation

0.50

0.30

0.40

0.50

0.24

0.42

0.60

12

ddd

0.08

Notes

Degrees

Exposed Pad Variation


D2

2.75

2.90

3.05

E2

2.75

2.90

3.05

Mixed Ring Pad Variation


D3

5.45

5.60

5.75

E3

5.45

5.60

5.75

Page 32 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

nanoLOC Package (VFQFPN-48)


nanoLOC TRX Transceiver (NA5TR1) Datasheet

17

Pin #1 Identifier

D1/E1

ddd

A3

A1

A2

D
D3
D2
e

Plastic

E3

E2

Two grooves
in die pad

Pin #1 Identifier
L

Groove

Ring

Scale 10:1
Dimensions are in millimeters

Bottom View

Figure 25: Dimensions for package VFQFPN2-48 used to encapsulate nanoLOC chip

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 33

17

nanoLOC Package (VFQFPN-48)

17.3

Recommended Footprint Dimensions

nanoLOC TRX Transceiver (NA5TR1) Datasheet

Table 21 and figure 26 below provide the recommended footprint data (dimensions) for the nanoLOC chip (NA5TR1).
Scale 10:1
Dimensions are in millimeters
A
J
B

E
F

Figure 26: Package VFQFPN2-48 recommended footprint dimensions


Table 21: Recommended footprint dimensions

Page 34 NA-09-0230-0388-2.3

Ref

Value

7.5

0.28

0.5

5.75

0.65

0.225

7.5

0.7

5.75

3.75

Subject to change without notice

2010 Nanotron Technologies GmbH.

Tape and Reel Information


nanoLOC TRX Transceiver (NA5TR1) Datasheet

18

18 Tape and Reel Information


An embossed tape and reel is used to facilitate
automatic pick and place equipment feed
requirements. The tape is used as the shipping
container for the nanoLOC chip (NA5TR1) and

18.1

requires a minimum of handling. The antistatic/


conductive tape provides a secure cavity for
the product when sealed with the peel-back
cover tape.

Reel Dimensions
Table 22 and figure 27 below provide the nanoLOC chip carrying reel dimensions.
Table 22: Reel dimensions

1.

Reel Diameter

Units Per Reel

Reel and Hub Size1

13

2,500

13/4

Reel and hub size = 13 inch reel with 4 inch hub.

Includes flange distortion at


outer edge:25.4

1.5 (0.59) min.

Lab
el

330
(13.00)

16.5 min

Outside dimension:
30.0
Note: Dimensions are in millimeters
Figure 27: Reel dimensions

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 35

19

Ordering Information

18.2

Tape Dimensions

nanoLOC TRX Transceiver (NA5TR1) Datasheet

Table 23 and figure 28 below provide the nanoLOC chip carrying tape dimensions.
Table 23: Tape dimensions

Package Type

Number of
Leads

Nominal
Package Size

Carrier Tape
Width

Carrier Tape
Pitch

Leader/Trailer

VFQFPN-48

48

7 x 7 x 1 mm

16 mm

12 mm

EIA

1.

Length1

The device loading orientation is in compliance with EIA-481.

A0 = 7.25
B0 = 7.25
K0 = 1.00

Notes:
1. Dimensions are in millimeters
2. 10 sprocket hole pitch cumulative tolerance 0.2
3. Carrier in compliance with EIA 481
4. Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole
Figure 28: Tape dimensions

19 Ordering Information
Note: To order the product described in this datasheet, use the following information.
Table 24: Ordering information

Part Description
nanoLOC TRX Transceiver
(NA5TR1)

Page 36 NA-09-0230-0388-2.3

Part Number
NLSG0501A

Additional Information
nanoLOC Development Kit and nanoLOC Driver are
also available.

Subject to change without notice

2010 Nanotron Technologies GmbH.

nanoLOC RF Test Module


nanoLOC TRX Transceiver (NA5TR1) Datasheet

A2

A2 nanoLOC RF Test Module


A2.1

Overview
The nanoLOC RF Test Module was designed for testing and measurement purposes only. It was
used during measurements and simulations to determine parameters published in this document,
unless otherwise specified. For conducting tests purposes, the nanoLOC RF Test Module includes
a 50 coaxial SMA connector.

Figure 35: nanoLOC RF Test Module

A2.2

Schematics
The following schematics represents the following major blocks of the design:
+

Schematic 1: Power supply for nanoLOC chip and connection with crystal resonators.

Schematic 2: RF interface between nanoLOC chip and SMA connector (impedance matching
circuitry for Rx and Tx, balun).

Schematic 3: Interface to the automatic test equipment.

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 43

RF Test Module
A2 nanoLOC
nanoLOC TRX Transceiver (NA5TR1) Datasheet

Figure 36: nanoLOC RF Test Module: schematics 1

Page 44 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

nanoLOC RF Test Module


nanoLOC TRX Transceiver (NA5TR1) Datasheet

A2

Figure 37: RF Test Module: schematics 2

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 45

RF Test Module
A2 nanoLOC
nanoLOC TRX Transceiver (NA5TR1) Datasheet

Figure 38: RF Test Module: schematics 3

Page 46 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

nanoLOC RF Test Module


nanoLOC TRX Transceiver (NA5TR1) Datasheet

A2.3

A2

PCB Layout
Scale = 2:1

Figure 39: nanoLOC RF Test Module top layer


Scale = 2:1

Figure 40: nanoLOC RF Test Module 2nd layer

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 47

RF Test Module
A2 nanoLOC
nanoLOC TRX Transceiver (NA5TR1) Datasheet

Scale = 2:1

Figure 41: nanoLOC RF Test Module 3rd layer


Scale = 2:1

Figure 42: nanoLOC RF Test Module bottom layer

Page 48 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

nanoLOC RF Test Module


nanoLOC TRX Transceiver (NA5TR1) Datasheet

A2

Scale = 2:1

Figure 43: nanoLOC RF Test Module top components


Scale = 2:1

Figure 44: nanoLOC RF Test Module bottom components (inverted)

2010 Nanotron Technologies GmbH.

Subject to change without notice

NA-09-0230-0388-2.3 Page 49

RF Test Module
A2 nanoLOC
nanoLOC TRX Transceiver (NA5TR1) Datasheet

A2.4

RF Test Module Bill of Materials (BOM)

Table 26: RF Test Module bill of materials


Part

Company

Description

Label

Value

QTY

Package

Remarks

Supplier

Product
Number

2x200R:50R

Wuerth
Elektronik

WE
748422245

Balun

BALUN1

WE 748422245

BAL0805

Band pass
filter

BPF1

Not assembled

Capacitors

C23

1pF

0402

NPO, 50V, 5%

C21

3.3pF

0402

NPO, 50V, 5%

C24, C25

5.6pF

0402

NPO, 50V, 5%

C12, C15

18pF

0402

NPO, 50V, 5%

C7, C9

22pF

0402

NPO, 50V, 5%

C20

33pF

0402

NPO, 50V, 5%

C2, C3, C8,


C10,C13, C16,
C18

100pF

0402

NPO, 50V, 5%

1nF

0402

X7R, 10V,
10%

100nF

0402

X7R, 10V,
10%

Not assembled

100nF

0603

X1

JOHNSON_JAC
K_GND_2

JOHNSON_J
ACK_GND_2

Johnson
Components

142-0701-851

X2

2X10

Pin Header
2X10

10 Pins, double
Row, pitch
2.54mm

Winslow
Adaptics

W82120T382
5

X3

2X05

Pin Header
2X05

5 Pins, double
Row, pitch
2.54mm

Winslow
Adaptics

W82110T382
5

Q1

32.768kHz

MS1V-TK

CL=12.5pF

Golledge

MS1V-T1K
32.768kHz
20ppm

CL=12pF

Petermann
Technik

SMD03025/4
32.000 MHz
AT-FUND 10/
20/-40+85/
12pF/40R

C4
C1, C5, C6, C11,
C14, C17, C19
C22
C26, C27, C28,
C29
Connectors

Clock crystals

Inductors

X7R, 10V,
10%
End Launch
Jack
Receptacle

Q2

32.000MHz

32SMX

L2

3.3nH

0402

Wuerth
Elektronik

WE
744784033

L1, L3

3.9nH

0402

Wuerth
Elektronik

WE
744784039

L5

5.6nH

0402

Wuerth
Elektronik

WE
744784056

L4, L6

8.2nH

0402

Wuerth
Elektronik

WE
744784082

NA5TR1

QFN48

Nanotron
Technologies

NLSG0501A

P141

CONTAG

ICs

IC1

PCB

PCB1

Resistors

R2

0R

0402

R1

10k, 1%

0402

Page 50 NA-09-0230-0388-2.3

Subject to change without notice

63mW, 1%

2010 Nanotron Technologies GmbH.

Abbreviations and Symbols


nanoLOC TRX Transceiver (NA5TR1) Datasheet

A3

A3 Abbreviations and Symbols


A3.1

Abbreviations
A . . . . . . . .
C . . . . . . . .
CIrq . . . . . .
CReset . . .
CVcc . . . . .
CVccExt. . .
F . . . . . . . .
H . . . . . . . .
s. . . . . . . . .
.........
AC . . . . . . . .
Ack . . . . . . .
ADC . . . . . . .
AFC . . . . . . .
AGC. . . . . . .
ASIC . . . . . .
B .........
B .........
BA . . . . . . . .
BALUN . . . .
BCH . . . . . . .
BER . . . . . . .
BOM . . . . . .
bps. . . . . . . .
C .........
C .........
C . . . . . . . .
CCITT . . . . .
CDDL. . . . . .
C/I . . . . . . . .
Clk . . . . . . . .
CRC. . . . . . .
CMMR . . . . .
CMOS . . . . .
CS . . . . . . . .
CSMA . . . . .
CSMA/CA . .
CSS . . . . . . .
CSS Mode . .
DAC . . . . . . .
Data . . . . . . .
dB . . . . . . . .

dBi . . . . . . . .
DBO-CSS . .
dBm . . . . . . .
dBr . . . . . . . .
DC . . . . . . . .
DiIO . . . . . . .
DPA . . . . . . .
DPD . . . . . . .
DUT . . . . . . .
Eb . . . . . . . .
EIRP . . . . . .
ESD . . . . . . .
FCD . . . . . . .
FCM. . . . . . .
FDMA . . . . .
FEC . . . . . . .
FET . . . . . . .
FHSS . . . . . .
FIFO . . . . . .
FS . . . . . . . .
GBWP . . . . .
GHz . . . . . . .
GND . . . . . .
HBM . . . . . .
I..........
IC . . . . . . . . .
IEC . . . . . . .
IF . . . . . . . . .
I/O . . . . . . . .

Microampere (unit of electrical current)


Microcontroller
External microprocessor interrupt request
External microprocessor reset
External microprocessor battery supply
voltage
External microprocessor power supply voltage
Microfarad (unit of electrical capacitance)
Microhenry (unit of electrical inductance)
Microseconds (unit of time)
Ohm (unit of electrical resistance)
Alternating Current
Acknowledgement packet type
Analogue to Digital Converter
Automatic Frequency Control
Automatic Gain Control
Application Specific-IC
Battery
Frequency bandwidth
Balun (See BALUN)
Balun Unbalanced
Bose-Chaudhuri-Hochquenghem
Bit Error Rate
Bill of Materials
Bits per second (unit of data throughput)
Capacitor
Power of signal carrier
Celsius (unit of temperature)
Comit Consultatif International Tlphonique
et Tlgraphique
Complementary Dispersive Delay Line
Carrier to Interference Ratio
Clock
Cyclic Redundancy Check
Common Mode Rejection Ratio
Complementary Metal Oxide Semiconductor
Chip Select
Carrier Sense Multiple Access
Carrier Sense Multiple Access/Collision Avoidance
Chirp Spread Spectrum
Chirp Spread Spectrum Mode
Digital to Analog Converter
Data packet type
Decibel (ratio between two values, such as
signal power, voltage, or current levels in logarithmic scale)
Gain referenced to isotropic antennae
Differentially Bi-Orthogonal Chirp Spread
Spectrum
dB referenced to one milliwatt
(10-3W = 1mW)
Decibels relative to reference level
Direct Current
Digital Input/Output
Differential Power Amplifier
Differential Peak Detector
Device Under Test
Energy of bit
Effective Isotropic Radiated Power
Electrostatic Discharge
Folded Chirp Detector
Folded Chirp Mixer
Frequency Division Multiplex Access
Forward Error Correction
Field Effect Transistor
Frequency Hopping Spread Spectrum
First In First Out
Full Scale
Gain Bandwidth Product
Gigahertz (unit of frequency)
Ground
Human Body Model
Inline
Integrated Circuit
International Electrotechnical Commission
Intermediate Frequency
Input/Output

2010 Nanotron Technologies GmbH.

IOH . . . . . . . .
IOL . . . . . . . .
IRQ . . . . . . .
IQ. . . . . . . . .
ISM . . . . . . .
ISO . . . . . . .
k . . . . . . . .
kHz . . . . . . .
kpbs . . . . . . .
L. . . . . . . . . .
LNA . . . . . . .
LO . . . . . . . .
LPF . . . . . . .
LSB . . . . . . .
. . . . . . . .
mA . . . . . . . .
Mbaud . . . . .
Mbps . . . . . .
MAC. . . . . . .
MHz . . . . . . .
MISO . . . . . .
MIX . . . . . . .
MLF . . . . . . .
MOD . . . . . .
MOSI . . . . . .
MUX. . . . . . .
mW . . . . . . .
nc. . . . . . . . .
nF . . . . . . . .
nH . . . . . . . .
No . . . . . . . .
ns. . . . . . . . .
OEM . . . . . .
OSC. . . . . . .
OP . . . . . . . .
OTA . . . . . . .
PA . . . . . . . .
PAE . . . . . . .
PAMP. . . . . .
PDK . . . . . . .
PEP . . . . . . .
pF . . . . . . . .
PFD . . . . . . .
PLL . . . . . . .
Pout . . . . . . .
ppm . . . . . . .
PCB . . . . . . .
PGA . . . . . . .
PGC. . . . . . .
POMD . . . . .
PSRR. . . . . .
PTAT . . . . . .
Q.........
QFN . . . . . . .
R .........
RF . . . . . . . .
RFID . . . . . .
ROM . . . . . .
RSSI . . . . . .
RTC . . . . . . .
Rx . . . . . . . .
S .........
SAR . . . . . . .
SAW . . . . . .
SDS-TWR . .
SLNA . . . . . .
SMIX . . . . . .
SNR . . . . . . .
SPI. . . . . . . .
SpiClk . . . . .
SpiSsn . . . . .
SpiRxD. . . . .
SpiTxD . . . . .
SRAM . . . . .
SSB . . . . . . .

Subject to change without notice

Output current high level


Output current low level
Interrupt request
In-phase, Quadrature
Industrial Scientific Medical
International Organization for Standardization
Kiloohms (unit of electrical resistance)
Kilohertz (unit of frequency)
Kilobits per second (unit of data throughput)
Inductance
Low Noise Amplifier
Local Oscillator
Low Pass Filter
Least Significant Bit
Megaohms (unit of electrical resistance)
Milliampere (unit of electrical current)
Megabauds
Megabits per second (unit of data throughput)
Medium Access Control
Megahertz (unit of frequency)
Master In, Slave Out
Mixer
Micro Lead Frame Package
Modulator
Master Out Slave In
Multiplexer
milliwatt (unit of power)
Not connected
Nanofarad (unit of electrical capacitance)
Nanohenry (unit of electrical inductance)
Power spectral density of thermal noises
Nanosecond (unit of time)
Original Equipment Manufacturer
Oscillator
Operational Amplifier
Operational Transconductance Amplifier
Power Amplifier
Power Added Efficiency
Power Amplifier
Process Development Kit
Peak Envelope Power
Picofarad (unit of electrical capacitance)
Phase Frequency Detector
Phase Locked Loop
Power Out
parts per million
Printed Circuit Board
Programmable Gain Amplifier
Power Gain Control
Peak Over Mean Detector
Power Supply Rejection Ratio
Proportional to Absolute Temperature
Quadrature
Quad Flat No-lead
Resistor
Radio Frequency
Radio Frequency IDentification
Read Only Memory
Radio Signal Strength Indicator
Real Time Clock
Receiver
Switch/button
Successive Approximation Register
Surface Acoustic Wave
Symmetrical Double Sided Two Way Ranging
Symmetric Low Noise Amplifier
Symmetric Mixer
Signal to Noise Ratio
Serial Peripheral Interface
Serial peripheral interface Clock
Serial peripheral interface Slave select
Serial peripheral interface Receive Data
Serial peripheral interface Transmit Data
Static RAM
Single Side Band

NA-09-0230-0388-2.3 Page 51

and Symbols
A3 Abbreviations
nanoLOC TRX Transceiver (NA5TR1) Datasheet

t..........
T .........
TBD . . . . . . .
TDMA . . . . .
Tjunct . . . . . .
THD . . . . . . .
TRL . . . . . . .
TRX . . . . . . .
TTL . . . . . . .
Typ. . . . . . . .
Tx . . . . . . . .
V .........
VIH . . . . . . . .
VIL . . . . . . . .
VOH . . . . . . .

A3.2

Time constant
Duration time of the chirp waveform
To Be Determined
Time Division Multiple Access
Temperature of junction
Total Harmonic Distortion
Transmission Line
Transceiver
Transistor-Transistor Logic
Typical
Transmitter
Volts (unit of electrical potential)
Input voltage for High level
Input voltage for Low level
Output voltage for High level

VOL . . . . . . .
VCA . . . . . . .
VCC . . . . . . .
VCO. . . . . . .
VDDA . . . . . .
VDDD . . . . . .
VFQFPN . . .
VGA . . . . . . .
VSSA . . . . . .
VSSD . . . . . .
VSWR . . . . .
XTAL . . . . . .
XCO. . . . . . .

Output voltage for Low level


Voltage Controlled Amplifier
Battery supply voltage
Voltage Controlled Oscillator
Power supply for analog part
Power supply for digital part
Very thin Fine pitch Quad Flat Pack Nolead
Package
Variable Gain Amplifier
Analog ground
Digital ground
Voltage Standing Wave Ratio
Crystal
Xtal (crystal) Controlled Oscillator

T .........
Tj . . . . . . . . .
TC . . . . . . . .
Vpp . . . . . . . .
VD . . . . . . . .
VDS . . . . . . .
VGS . . . . . . .
VT . . . . . . . .
VTO . . . . . . .
a. . . . . . . . . .
b. . . . . . . . . .
d. . . . . . . . . .
o . . . . . . . . .
r . . . . . . . . .
reff . . . . . . .
G.........
o . . . . . . . . .
r . . . . . . . . .
m.........
.........
.........
.........

Period
Junction Temperature
Temperature coefficient, e.g. TK(IDSS)
Peak-to-Peak Voltage
Diffusion voltage
Drain-Source voltage
Gate-Source voltage
Thermal voltage, VT=kT/q
Threshold voltage, Turn-on voltage
Angle
Current gain
Partial derivative
Dielectric constant of a vacuum
Dielectric constant relative to a vacuum
Effective relative dielectric constant
Reflection coefficient
Permeability of a vacuum
Permeability relative to a vacuum
Charge carrier mobility
Angular frequency
Difference
Sum

Special Symbols
CDS . . . . . . .
CGD . . . . . . .
CGS . . . . . . .
Cr . . . . . . . .
D .........
EG . . . . . . . .
fT . . . . . . . . .
G.........
GaAs . . . . . .
Ge . . . . . . . .
gm . . . . . . . .
H .........
IDSS . . . . . . .

Drain-source capacitance
Gate-drain capacitance
Gate-source capacitance
Feedback capacitance
Drain
Energy gap
Transit frequency
Gate, Gradient
Gallium-Arsenide
Germanium
Short-circuit forward transconductance
Hybrid parameter
Drain current with VGS=0

k. . . . . . . . . . Boltzmann constant, 1.3810-23J/K or stability


factor
q . . . . . . . . . Electron charge, 1.60210-19As
rDS . . . . . . . . Differential drain-source-resistance
RMS . . . . . . Root Mean Square
Rth . . . . . . . . Thermal resistance in K/W
S . . . . . . . . . Source
Sij . . . . . . . . . Scattering parameters
Si . . . . . . . . . Silicon

Page 52 NA-09-0230-0388-2.3

Subject to change without notice

2010 Nanotron Technologies GmbH.

Index
nanoLOC TRX Transceiver (NA5TR1) Datasheet

Index
Symbols
/POnReset .................................................................... 12
/SpiSSn ........................................................................ 12
Numerics
22 MHz signal bandwidth .................................................. 7
32768 Hz clock ................................................................ 1
A
address matching, automatic ............................................. 7
analog receiver ................................................................ 6
antennas, and maximum link attenuation ............................. 6
applications ..................................................................... 7
ation .............................................................................. 4
B
battery
long life of .................................................................... 6
low alarm ..................................................................... 7
bit processing, function of MAC layer .................................. 6
block diagram .................................................................. 3
C
C/I, see Carrier to Interference Ratio
calibration time
dynamic performance .................................................. 17
timing diagram ........................................................... 25
Carrier to Interference Ratio
described .................................................................... 7
value ........................................................................... 1
channels
14 FDMA overlapping frequency bands ............................ 7
2 non-overlapping frequency bands ................................. 7
chirp duration, values (0.5, 1, 2, 4) .................................... 16
Chirp Sequencer (CSQ)
clock frequency value .................................................. 16
in nanoLOC memory space .......................................... 14
Chirp Spread Spectrum
described .................................................................... 6
values ....................................................................... 16
CRC generation ............................................................... 6
current
consumption and power management, values ................. 20
low consumption, feature of chip ..................................... 5
low shut down .............................................................. 1
maximum output, digital IOs ......................................... 19
maximum output, external microcontroller ...................... 20
maximum output, for pin 29 uCVcc ................................ 15
saved using Powerdown mode ....................................... 1
typical supply, values .................................................... 2
typical values, analog block .......................................... 15
typical values, digital block ........................................... 15
typical values, total supply ............................................ 15
D
D0, pin described ........................................................... 12
D1, pin described ........................................................... 12
D2, pin described ........................................................... 12
D3, pin described ........................................................... 12
data rate
maximum .................................................................... 2
selectable .................................................................... 5
values ......................................................................... 1
DDDL, integrated into nanoLOC ......................................... 5
decryption, included in MAC layer ...................................... 6
digital I/Os
described .................................................................. 13
provided for ease of connection ...................................... 1
digital interface, values ................................................... 19
E
encryption, included in MAC layer ...................................... 6
exposed pad, and nanoLOC package ............................... 31
F
fast ranging mode, described ........................................... 29
FDMA
and channelization ........................................................ 1

2010 Nanotron Technologies GmbH.

described .................................................................... 7
footprint, nanoLOC ......................................................... 34
Forward Error Correction
and Link Budget ........................................................... 6
supported .................................................................... 7
frame buffering
included in MAC layer ................................................... 6
integrated in chip .......................................................... 1
to work with slow microcontrollers ................................... 7
frequency
bandwidth values .......................................................... 2
calibration .................................................................. 16
center values ............................................................. 19
channels and IEEE.15.4a ............................................. 16
channels Europe .......................................................... 2
channels USA .............................................................. 2
of chirps ...................................................................... 6
quartz oscillator values ................................................ 18
H
handshake modes, included .............................................. 7
human exposure, and nanoLOC ........................................ 5
I
IEEE 802.15.4a standard ................................................ 16
in-band and out-of-band disturbances ................................. 7
input signal, maximum value ............................................ 17
L
Link Budget, value and FEC .............................................. 6
LO frequency calibration accuracy .................................... 17
load impedance, value .................................................... 16
load type, value ............................................................. 16
Local Oscillator, values ................................................... 18
M
MACFrame coding, included in MAC layer ........................... 6
maximum link attenuation, value ........................................ 6
maximum transmission power, value .................................. 6
memory, of nanoLOC chip ............................................... 14
microcontroller, power supply for ...................................... 20
modulation method
Chirp Spread Spectrum ................................................. 1
value ......................................................................... 15
N
nanoLOC
absolute maximum ratings ............................................. 9
block diagram .............................................................. 3
digital interface values ................................................. 19
electrical specifications ................................................ 15
general description ....................................................... 6
general parameters ..................................................... 15
key features ................................................................. 1
key values ................................................................... 2
order number ............................................................. 36
output power control .................................................... 27
package .................................................................... 31
pin connections .......................................................... 11
ranging modes ........................................................... 28
RX parameters ........................................................... 17
sample application ........................................................ 4
tape and reel .............................................................. 35
timing diagrams .......................................................... 21
TX parameters ........................................................... 16
noise, typical value ......................................................... 17
nominal conditions ........................................................... 9
O
operating frequency range, value ..................................... 15
operating temperature range, value .................................. 15
operational voltages, typical values .................................... 2
oscillation type, value ..................................................... 18
output power
control characteristics .................................................. 27
control register values ................................................. 27
dynamic range ............................................................. 1

Subject to change without notice

NA-09-0230-0388-2.3 Page 53

Index
nanoLOC TRX Transceiver (NA5TR1) Datasheet

maximum .................................................................... 2
nominal, value ............................................................ 16
number of steps .......................................................... 16
P
package
contact to PCB ........................................................... 31
described .................................................................. 31
MicroLeadFrame, described ......................................... 31
small, 7x7x1mm ........................................................... 5
VFQFPN-48, .............................................................. 32
pin
connections ............................................................... 11
descriptions ............................................................... 11
POnReset ..................................................................... 14
power consumption .......................................................... 5
power management
feature of chip .............................................................. 7
PowerDownFull state .................................................. 20
PowerUp state ........................................................... 20
PwrDownModePad ..................................................... 20
Ready state ............................................................... 20
StandBy state ............................................................ 20
states ........................................................................ 20
power supply
analog block ................................................................ 2
digital block .................................................................. 2
PowerDownFull state, power management ........................ 20
PowerUp state, power management ................................. 20
Processing Delay ........................................................... 28
PwrDownModePad state, power management ................... 20
Q
QFN - Quad Flat No-Lead ............................................... 31
R
ranging
fast mode .................................................................. 29
measurements used .................................................... 28
normal mode .............................................................. 28
part of nanoLOC system ................................................ 7
raw data mode, value ....................................................... 6
read timing of the SPI bus ............................................... 26
Ready state, power management ..................................... 20
Real Time Clock
part of digital block ........................................................ 6
supported by chip ......................................................... 7
values of ................................................................... 18
receiver sensitivity
described, includes value of ........................................... 6
value (FEC on and off) .................................................. 1
value, part of RX parameters ........................................ 17
reel dimensions ............................................................. 35
reference quartz resonator, value ..................................... 18
retransmissions, automatic ................................................ 7
RfTxOutputPower
register values ............................................................ 27
register, used to set output power ................................. 27
RRef
pin, described ............................................................ 11
pin, values ........................................................... 13, 15
RX input, type value ....................................................... 17
RxN, pin described ......................................................... 12
RxP, pin described ......................................................... 12
S
sample application ........................................................... 4
SDS-TWR, ranging methodology ..................................... 28
sensitivity
described .................................................................... 6
typical values ............................................................... 2
shut down current, low ...................................................... 1
SPI
bus read timing ........................................................... 26
bus write timing .......................................................... 25
bus, write timing of ...................................................... 25
digital block setup using ................................................. 6
interface value .............................................................. 1

Page 54 NA-09-0230-0388-2.3

timing values for the SPI bus ........................................ 26


SPI interface ................................................................... 6
SpiClk, pin described ...................................................... 12
SpiRxD, pin described .................................................... 12
SpiTxD, pin described .................................................... 12
StandBy state, power management .................................. 20
start-up time
for 32 MHz Crystal ...................................................... 24
for 32 MHz reference oscillator ..................................... 17
supply current ................................................................. 2
for individual blocks ..................................................... 15
typical total ................................................................ 15
supply voltage ........................................................... 1, 15
maximum .................................................................... 2
minimum ..................................................................... 2
support block, programmable ............................................. 6
switch time
from Rx to Tx (ACK to DATA) ....................................... 23
from Rx to Tx (DATA to ACK) ....................................... 23
from Rx to Tx (DATA to DATA) ..................................... 23
from Tx to Rx (ACK to DATA) ....................................... 22
from Tx to Rx (DATA to ACK) ....................................... 22
from Tx to Rx (DATA to DATA) ..................................... 22
symbol
duration, values ............................................................ 6
rate, value ................................................................. 16
T
tape dimensions ............................................................ 36
temperature range, operating values ................................... 2
timing values of SPI bus ................................................. 26
timning diagrams ........................................................... 21
transmitter carrier suppression ......................................... 16
transmitter spurious outputs ............................................ 16
TX Propagation Delay .................................................... 28
Tx/Rx, pin described ....................................................... 11
TxN, pin described ......................................................... 12
TxP, pin described ......................................................... 12
V
VBalun
general parameters, value ............................................ 15
pin described ............................................................. 12
pin usage .................................................................. 14
VDD1V2_Cap
general parameters value ............................................ 15
pin, desribed .............................................................. 12
usage ....................................................................... 13
VDDA, pin described ...................................................... 11
VDDA_ADC, pin described .............................................. 12
VDDA_DCO, pin described ............................................. 11
VDDD .................................................................... 12, 19
pin, described ............................................................ 11
supply voltage, digital block ............................................ 2
value digital interface .................................................. 19
VFQFPN-48, package of chip .......................................... 32
VSSA, pin described ...................................................... 11
VSSD, pin described ...................................................... 11
W
Wake-up circuitry, included in chip ...................................... 7
X
Xtal32kN, pin described .................................................. 11
Xtal32MN, pin described ................................................. 11
Xtal32MP, pin described ................................................. 11
Z
CIRQ
pin described ............................................................. 12
usage ....................................................................... 13
CReset, pin described .................................................. 12
CVcc
general parameters, value ............................................ 15
pin described ............................................................. 12

Subject to change without notice

2010 Nanotron Technologies GmbH.

Revision History
nanoLOC TRX Transceiver (NA5TR1) Datasheet

Revision History
Date

Version

Description/Changes

1.00

2006-08-29

Pre-engineering preliminary document.

1.01

2006-11-03

Pre-engineering preliminary document. Specifications, pin description, reference design, product


descriptions added. Errata: Nominal conditions include Bit scrambling

1.02

2007-02-21

Minor text edits and corrections.

1.03

2007-07-31

Correction to values in rows 3 to 5 in table 11: Quart controlled oscillator for reference frequency.

2.00

2008-04-11

/POnReset circuitry added to sample application; small errors in block diagrams corrected; Frequency
channel description moved to Local Oscillator table; full listing of frequency allocations updated
according to IEEE 802.15.4a standard; data throughout updated to conform to latest chip measurements; extended descriptions of chip pins added; reference to chip registers added; dynamic performance table updated; timing diagrams updated; Local Oscillator table updated; summary of nanoLOC
ranging added; recommended footprint dimensions diagram updated; tape and reel information
added; new nanoLOC RF Test Module added; minor text edits and corrections throughout.

2.01

2008-04-23

Output power control added.

2.02

2009-01-06

Package dimensions and footprint figures improved; RF Test Module BOM corrected (C23); other
minor corrections; power management states and current consumption table added; index added

2.3

2010-03-04

Template updated.

Life Support Policy


These products are not designed for use in life support appliances, devices,
or systems where malfunction of these products can reasonably be
expected to result in personal injury. Nanotron Technologies GmbH customers using or selling these products for use in such applications do so at their
own risk and agree to fully indemnify Nanotron Technologies GmbH for any
damages resulting from such improper use or sale.
Electromagnetic Interference / Compatibility
Nearly every electronic device is susceptible to electromagnetic interference
(EMI) if inadequately shielded, designed, or otherwise configured for electromagnetic compatibility.
To avoid electromagnetic interference and/or compatibility conflicts, do not
use this device in any facility where posted notices instruct you to do so.

FCC User Information


Statement according to FCC part 15.19:
This device complies with Part 15 of the FCC Rules. Operation is subject to
the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including
interference that may cause undesired operation.
Statement according to FCC part 15.21:
Modifications not expressly approved by this company could void the user's
authority to operate the equipment.
RF exposure mobil:
The internal / external antennas used for this mobile transmitter must provide a separation distance of at least 20 cm from all persons and must not be
co-located or operating in conjunction with any other antenna or transmitter.
Statement according to FCC part 15.105:
This equipment has been tested and found to comply with the limits for a
Class A and Class B digital device, pursuant to Part 15 of the FCC Rules.
These limits are designed to provide reasonable protection against harmful
interference in a residential installation and against harmful interference
when the equipment is operated in a commercial environment.

2010 Nanotron Technologies GmbH.

In aircraft, use of any radio frequency devices must be in accordance with


applicable regulations. Hospitals or health care facilities may be using equipment that is sensitive to external RF energy.
With medical devices, maintain a minimum separation of 15 cm (6 inches)
between pacemakers and wireless devices and some wireless radios may
interfere with some hearing aids. If other personal medical devices are being
used in the vicinity of wireless devices, ensure that the device has been adequately shielded from RF energy. In a domestic environment this product
may cause radio interference in which case the user may be required to take
adequate measures.
CAUTION! Electrostatic Sensitive Device. Precaution should be
used when handling the device in order to prevent permanent
damage.

This equipment generates, uses, and can radiate radio frequency energy
and, if not installed and used in accordance with the instructions as provided
in the user manual, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a
particular installation. Operation of this equipment in a residential area is
likely to cause harmful interference in which case the user will be required to
correct the interference at his or her own expense.
If this equipment does cause harmful interference to radio or television
reception, which can be determined by turning the equipment off and on, the
user is encouraged to try to correct the interference by one or more of the
following measures:

Reorient or relocate the receiving antenna.

Increase the separation between the equipment and receiver.

Connect the equipment into an outlet on a circuit different from that to


connected.

Consult the dealer or an experienced technician for help.

Page 55 NA-09-0230-0388-2.3

Revision History
nanoLOC TRX Transceiver (NA5TR1) Datasheet

About Nanotron Technologies GmbH

Further Information:

Nanotron provides reliable loss protection technology and solutions that are
used to protect people and animals. Energy efficient, battery- powered wireless nodes are the key building blocks. These small devices create a Virtual
Safety Zone which protects tagged people and animals. Robust wireless
Chirp technology underpins nanotron's offering of chips, modules and loss
protection software for indoor and outdoor environments world wide.

For more information about this product and other products from Nanotron
Technologies, contact a sales representative at the following address:
Nanotron Technologies GmbH
Alt-Moabit 60, 10555 Berlin, Germany
Phone: +49 30 399 954 - 0 | Fax: +49 30 399 954 - 188
Email: sales@nanotron.com | Internet: www.nanotron.com

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