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Towards a MOS model

Madhav Desai

July 22, 2013

Sources

The books by Streetman and Leblebici/Kang, also Tsividis, The


MOS Transistor, McGraw-Hill.

Fermi level

The Fermi level is the average energy of an electron in a solid in


the following sense: If the solid has Fermi level EF , then the
probability that an electron state with energy E is occupied is
f (E ) =

1
1+

e (E EF )/kT

(This is called the Fermi-Dirac statistical model of a solid).

Work functions
How difficult is it to extract an electron from a solid?
0

material M.

E FM

In the diagram, is measured in volts, and E in joules (note:


1eV = 1.6 1019 J, and is often a convenient scale for
measuring energies of electrons).

Contact potentials
When two materials are brought together, a contact potential
develops across their junction.
S

MS

MS

= S M
= (E

E )/q

Energy bands when M,O,S are separated


Lets start with the three materials separated from each other..
Eo

Ec

qS

q
E
Fm

Ec

EFp
Metal

qFp

Ei
Ev

Oxide

ptype Silicon

Ev

Lets assume that qM = 4.1eV , qS = 4.9eV so that


M = 4.1V , S = 4.9V .

Energy bands in MOS structure


Now we bring them together: at equilibrium, the Fermi-level
throughout the system must be the same.

Metal
EF

Silicon
Oxide
+

S M

Electrons will prefer the Silicon, an electric field will be produced


(in the oxide and the Silicon), the bands bend.

Getting the flat-band condition


To unbend the bands, we want to make the metal as attractive as
Silicon (for the electrons). Connect a voltage source of value
VFB = SM = M S between the metal gate and the
substrate.. (why?)

M
O
+

V
FB

qVFB
E

Fm
Semiconductor.

Metal
Oxide

Because

Physical justification: Flat-band condition

The positive terminal acts a sink for electrons and the


negative terminal acts as a source.

If M < S , then M should be connected to an electron


source to keep supplying electrons to it, while S should be
connected to an electron sink which keeps extracting excess
electrons.

Accumulation: VGB < VFB


If we lower the voltage below VFB , holes will accumulate near the
surface... The bands bend up.

M
O
+

VGB < V
FB

Semiconductor.
Oxide

Henceforth, assume that VFB = 0. It makes things less confusing!

Depletion.. : VGB > VFB (= 0)


If we raise the voltage below 0(VFB ), the hole concentration near
the surface is reduced... The bands bend down.

M
O
+

V >V
GB FB

Semiconductor.
Oxide

Width of the depletion region


When the bands bend, Ei (x) is a function of the distance from the
surface. The Fermi potential is defined as qF (x) = Ei (x) EF .
We can then relate the surface Fermi potential S = F (0) with
the width of the depletion region.

E_i(x)

x=0

x=D

charge
density N
A

It is easy to show that:


|S Fp | = |q|NA D 2 /2Si
where Fp = F (), i.e., deep in the semiconductor.

Width of the depletion region

So the depth of the depletion region is


s
2Si |S Fp |
D =
|q|NA
and the depletion charge is
QD =

q
2Si |S Fp ||q|NA

Inversion
When bands bend far enough that S = Fp , we could say that
the Silicon at the surface is as n-type as the Silicon in the
substrate was p-type..
The depth of the depletion region is
s
2Si 2|Fp |
D =
|q|NA
and the depletion charge is
QD =

q
2Si 2|Fp ||q|NA

The threshold voltage


At inversion:
VGB = VT

= VFB
+ 2|Fp |
p
2Si 2|Fp ||q|NA
+
Cox
Qox

Cox

The gate material and the substrate doping are the primary
mechanisms to control the threshold voltage (of course, the oxide
charge must be small enough in order to get a reliable working
device).

Rewrite the equation


At inversion:
VGB = VT

= VFB
+ 2|Fp |
p
+ S VB
Qox

Cox

where S is the potential at the surface, and


p
2|q|NA
=
Cox
is called the body coefficient.

Strong inversion: beyond the threshold voltage


When VGB is increased beyond VT , we expect that

the increase in gate voltage causes an increase in electron


density at the surface.

the depletion width does not change.

Thus,
Qinv (VGB ) = Qinv (VT ) +

ox (VGB VT )
tox

Also,
Qi nv (VGB ) e qS /kT
so, the surface potential does not change much if VGB is raised
beyond VT .

The MOSFET under positive gate bias


In a MOSFET, the situation is
+

VDS
VGS

n+

n+
S

VSB

Depletion
region supported
by gate..

Thus, the threshold voltage for VGS is


VT

= VFB + 2|Fp |
q
+ |2|Fp | VBS |

Qox
Cox

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