10EC56

USN

Fifth Semester B.E. Degree Examination, June/July 2014

Fundamentals of CMOS VLSI
Time: 3 hrs.

Max. Marks:100
Note: Answer FIVE fuII questions, selecting
at least TWO questions from each part.

o
o

PART _ A

la.
b.

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c.

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6)

a.

Draw the circuit diagram of a 2 i/p CMOS NAND gate along with stick diagram. Explain
(08 Marks)
also the working of the circuit.
Explain how layout optimization can be used for increase in speed with an AND gate circuit
(12 Marks)
and stick diagrams.

b.
a.

a2

Discuss the working, merits and demerits of the following logic structures with two i/p
gate realization as an example:
(10 Marks)
i) Pseudo NMOS logic
ii),Complementary CMOS logic.
Explain CMOS domino logic with the basic gate and derive the evaluation voltage equation.
(10 Marks)
What are the advantages of this logic?

NAND

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ao.

c.

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aE

What is sheet resistance? Explain the steps involved in calculating the sheet resistance of:
(09 Marks)
i) transistor channel, i ) nMOS inverter, iiD CMOS inverter.
A particular layei of MOS circuit has a resistivity of i 0 ohm-crn. A section of this layer is
55 pm long and 5 pm wide and has a thickness of I prm. Calculate the resistance from one
(05 Marks)
end of this section to the other end. What is the value of Rs.?
What is the drawback of conventional inverter? How it is overcome using super buffers?
Explain the working of inverting and non-inverting super buffers with necessary diagrams.
(06 Marks)

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(04 Marks)

Find the value of body effect parameter (y) and the threshold voltage V6,, when the applied
substrate bias is 3V. Given Vtr,o: 0.4 V, Ne: 10r6/c#, thermal equivalent voltage :26mY,
ni : 1.5 x 1010/cd, to*:40 nm, eo:8.85 ,, l0la F,/cm, r(si): 11.9, e4o*y - 3.9,
q: l.6x l0-roC.
(05 Marks)

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the threshold voltage.

d.

B9

bo

(04 Marks)
Write a note on evolution of IC era.
Explain the basic DC equations used in different regions of operation of MOS device.
(07 Marks)
Identifu these regions on V-I characteristics.
Explain with necessary circuit diagram and expressions, the body effect and how it affects

7a.

PART _ B
Explain the working of switch logic, pass transistor and transmission gates with their merits
(08 Marks)
and demerits.
Explain the structural design concept using bus arbitration logic as an example. 02 Marks)
What are the general considerations to be followed in designing a sub system? (08 Marks)
What are the basic requirements of a shifter? Explain with an example of 4 x 4 crossbar
switch. What are the drawbacks of this basic switch and how it is overcome? (12 Marks)
Explain the working of three transistor dynamics RAM cell with circuit and stick diagrams.
(10 Marks)

o.

b.

Mention and explain various VLSI design tools used. Also explain different levels at
(10 Marks)
simulation of VLSI design.
Write shofi notes

on: a. I/O pads

c. Silicides

b.

Real estate in VLSI

d. Clocked circuits.

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(20 Marks)