1.1.

Overview of PDH Limitations

Interconnection between national (European/North American/Japanese)

systems very difficult.

PDH 'multiplexer mountain' is costly and inflexible.

All hierarchy levels are clocked individually, so slips possible.

Protection of paths is at higher rates only.

Management is very limited.

Relatively prone to faults (by today's standards).

2. Origins of SDH

As can be seen from the previous chapter PDH is a workable but flawed system.
At its conception it used the best available technology and was a giant leap forward
in transmission, but with the advent of silicon chips and integrated microprocessors,
customer demand soon provided the need to introduce a new and better system.
This new system needed to solve the existing limitations of PDH, but also provide
for applications of the future.

The first of the working systems to be introduced was the SYNTRAN (Synchronous
Transmission) system from Bellcore. This did not live up to expectations and was
soon replaced with SONET (Synchronous Optical Network).
Initially SONET could only carry the ANSI (American National Standards Institute) bit
rates i.e. 1.5, 6, 45 Mbit/s.
Since the aim of the project was to provide easier international interconnection,
SONET was modified to carry the European standard bit rates of 2, 8, 34 & 140
Mbit/s.

In 1989 CCITT (Consultative Committee International for Telephone and Telegraph),

now ITU-T (International Telecommunications Union - Telecommunication's
standardisation section) published recommendations G704, G.707, G.708 and
G.709 which covered the standards for SDH.
These were adopted in North America by ANSI (SONET is now thought of as a subset
of SDH), making SDH a truly global standard.

2.1.

Features and Advantages of SDH

SDH permits the mixing of existing European (ETSI) and North American (ANSI)
PDH bit rates.

SDH is apparently synchronous. All SDH equipment is based on the use of a

single master reference clock source.

Compatible with the majority of existing PDH bit rates

SDH provides for much simpler extraction/insertion, of a lower order bit rate from
a higher order aggregate stream, without the need to de-multiplex in stages.

SDH provides cross-connection of any low order stream to any other low order
stream without the need to de-multiplex in stages.

SDH allows for integrated management and performance monitoring using a

centralised network control.

SDH provides for a standard optical interface thus allowing the inter-working of
different manufacturers equipment's.

SDH provides for future higher order rates by a simple BYTE interleaving process.

SDH standards have been prepared for future applications such as Asynchronous
Transfer Mode (ATM), High Definition Television (HDTV) and Metropolitan Area
Networks (MAN).

Increase
in
system
equipment/jumpering.

reliability

due

to

reduction

of

necessary

2.2. Basic SDH Network Topology

SDH networks are usually deployed in rings. This has the advantage of giving
protection to the data, by providing an alternate route for it to travel over in the
event of equipment or network failure.

Each side of the ring (known as A and B, or sometimes, East and West), consists of
an individual transmit and receive fibre. These fibres will take diverse physical paths
to the distant end equipment to minimise the risk of both routes failing at the same
time.
The SDH equipment can detect when there is a problem and will automatically
switch to the alternate route.

TX

RX

TX

RX

RX

TX

RX

TX

Customer A

"Ring Normal"

Customer B

Customer A

"Fibre break on the Ring Customer B Switches"

Customer B

To speed up switching times, the SDH multiplexers transmit on both routes

simultaneously, but only elect to receive on one side. This means that only the
receiving end needs to switch (the transmitting end stays the same), thus reducing
the impact of a fault on the customers' data. To further improve switching times,
each network element will switch independently of its neighbours (Uni-directional).
This means that if a single fibre is broken, only one site needs to switch.

Automatic restoration to a chosen path (revertive switching), is provided for within

the switching set up, but is not used by COLT, as this would just cause another "Hit"
on the customers' data.

3. SDH Principles
3.1.

Overview

The SDH standard defines a number of 'Containers' each corresponding to an

existing PDH bit rate. Information from the incoming PDH signal is mapped into the
relevant container. This is achieved using a bit stuffing procedure similar to that
used in a PDH multiplexer.
Each container then has some control information known as the 'Path Overhead'
(POH) added to it. The path overhead bytes allow the system operator to achieve
end to end path monitoring of areas such as error indication, alarm indication and
performance monitoring data. Together the container and the path overhead form a
'Virtual Container' (VC).

In an SDH network, all equipment is synchronised from a single master clock.

The timing of the PDH signals entering the SDH network and being mapped into the
VC's may vary slightly in frequency and/or phase from the SDH master clock.
Additional stuffing bits are either added, or used as data bits, to align the different
clock rates in a process called Justification.
Groups of four VC frames make up an SDH multiframe.
Due to clock phase differences, the start of the multiframe may not coincide with
the start of the four VC frames and as a result, the location of individual virtual
containers within the multiframe may vary.
Identification of the start of the four VC's is achieved by adding a 'Pointer' that
identifies the start of the VC within the multiframe.
The VC and its relevant pointer together form a 'Tributary Unit' (TU).

Tributary units are then multiplexed together in stages (Tributary User Group 2
(TUG-2) - Tributary User Group 3 (TUG-3) - Virtual Container 4 (VC-4)), to form
an Administrative Unit 4 (AU-4). Additional stuffing, pointers and overheads are
added during this procedure.
This AU-4 in effect contains 63 x 2 Mbit/s channels and all the control information
that is required.

Finally, Section Overheads (SOH) are added to the AU-4.

These SOH's contain the control bytes for the STM-1 section comprising of framing,
section performance monitoring, maintenance and operational control information.
An AU-4 plus its SOH's together form an STM-1 transport frame.

3.2.

STM Hierarchy and Container Bit Rates

The first hierarchy level for SDH is set at 155,520 kbit/s/s.

This is known as a Synchronous Transport Module 1 (STM-1).
Higher levels are simply multiples of the first level, which are denoted by the
number after the -
At present the SDH hierarchy is as follows:

STM-1:
STM-4:

155,520 kbit/s.
622,080 kbit/s.

(155 Mbit/s)
(620 Mbit/s)

STM-16: 2,488,320 kbit/s.

STM-64: 9,953,280 kbit/s.

(2.5 Gbit/s)
(10 Gbit/s)

SDH allows for various PDH input rates to be mapped into containers as shown
below:

Container
Container
Container
Container
Container

C11:
C12:
C2:
C3:
C4:

1544 kbit/s
2048 kbit/s
6312 kbit/s
49,536 kbit/s
139,264 kbit/s

(1.5 Mbit/s)
(2 Mbit/s)
(6 Mbit/s)
(45 & 34 Mbit/s)
(140 Mbit/s)

As can be seen from this chart, the only PDH rate that is not directly supported by
SDH is 8 Mbit/s. This is not a popular bit rate in Europe and can be achieved by
inverse multiplexing techniques if required although only on a manufacturer specific
basis.

Note: Containers are expressed, as (for instance), 'Container - One - Two',

not
'Container Twelve' etc.

3.3.

Full SDH Multiplexing Structure

The diagram shows the complete SDH multiplexing structure. PDH signals enter on
the right into the relevant container and progress across to the left through the
various processes.
The route via VC-3 and AU-3 (shown with dotted lines) are for SONET applications
(does not include 140 Mbit/s payloads), and are not applicable in Europe.

S T M -n

xN

AUG

x1

A U -4

V C -4

C -4

1 3 9 2 6 4 k b it/s

C -3

4 4 7 3 6 k b it/s
3 4 3 6 8 k b it/s

x3
x3

x1

T U G -3

T U -3

V C -3

x7
A U -3

V C -3

x7
P o in te r
P ro c e s s in g
M u lt ip le x in g
A lig n in g
M a p p in g

T U G -2

x1

T U -2

V C -2

C -2

6 3 1 2 k b it /s

T U -1 2

V C -1 2

C -1 2

2 0 4 8 k b it /s

T U -1 1

V C -1 1

C -1 1

1 5 4 4 k b it /s

x3

x4

3.4.

European Preferred Multiplexing Structure

The above diagram shows the European structure for a 2 Mbit/s circuit. The relative
bit rate and process is shown for each stage

Adds
SO H
(7 2 b y te s )

S T M -n
155520000

T ra n s p a re n t

xN

AUG

x1

150912000

P o in te r
P r o c e s s in g

Adds AU
P o in t e r
(9 b y te s )

M u ltip le x e s
3 T U G 3 's
to fo rm a
V C - 4 w ith 2
c o lu m n s o f
f ix e d s tu f f in g
and a
V C -4 p a th
o v e rh e a d
(2 7 b y te s )

A U -4

V C -4

150912000

150336000

M u ltip le x e s
7 T U G 2 's t o
fo rm a
T U G - 3 w it h
2 c o lu m n s o f
fix e d s tu f fin g
(1 8 b y te s )

x3

M a p p in g

T U G -3
49536000

x7

M u lt ip le x e s
3 T U - 1 2 's
to fo rm a
T U G -2

x3

T U G -2
6912000

Adds
TU
P o in t e r
(1 b y te )

A d d s P a th
O v e rh e a d ,
J u s t if ic a t io n a n d
fix e d S tu f fin g
(3 b y te s )

T U -1 2

V C -1 2

C -1 2

2304000

2240000

2048000

A lig n in g

B it s

M u lt ip le x in g

3.5.

Graphical SDH Multiplexing Structure

STM -1
Stream

SOH
VC-4

AU Pointers
SOH

AU Pointers

VC-4

VC-4 + AU Pointers
= AUG / AU

3 x TUG-3's + POH
= VC-4

P
O
H

TUG-3 #1

TUG-3 #2

TUG-3 #3

7 x TUG-2's = TUG-3
A

3 x TU-12's = TUG-2
TU
Pointer

T
U
1
2

V5 Path
overhead

V
C
1
2

Stuffing and
Justification
bits

C
1
2

PDH
Bitstream