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Fault Tolerant Control Strategy of 3-phase AC-DC PWM

Converter under Multiple Open-switch Faults Conditions

Won-Sang Im, Jong-Joo Moon,
Jang-Mok Kim

Dong-Choon Lee

Kyo-Beum Lee

Department of Electrical Engineering

Pusan National University
Busan, KOREA
{won42, moonjongjoo, jmok }@pusan.ac.kr

Department of Electrical Engineering

Yeungnam University
Kyungsan, KOREA

Department of Electronic Engineering

Abstract3-phase AC-DC PWM (Pulse Width Modulation)

converter has a possibility of open-switch faults due to some
trouble of the switching devices and gate drivers. In this case,
the converter causes imbalance of the AC input currents and the
pulsation of DC-link voltage. This paper proposes fault tolerant
control strategy of 3-phase AC-DC PWM converter under
multiple open-switch fault conditions. So a detection method of
the open-switch faults and fault tolerance methods are suggested
according to fault cases. In this paper, two or more switches
fault cases are dealt with. Both computer simulation and
experimental results verify the usefulness of the proposed faulttolerant control algorithm.



The 3-phase pulse width-modulation (PWM) AC-DC

converter has been increasingly employed in recent years
owing to its advanced features including sinusoidal input
current with unity power factor and high-quality dc output
voltage [1]. It is estimated that about 38% of the faults in
voltage source conversion system are due to failures of power
devices such as insulated gate bipolar transistors (IGBTs).
IGBTs failures can be broadly categorized as short-circuit
faults and open-switch faults [2].
If short-circuit fault is happened in the voltage source
converter or inverter system, it causes system shutdown. So its
source is blocked by protection circuits such as circuit
breakers and fuses. Otherwise, the switching elements and
peripheral devices which are the control board and gating
circuit of the inverter are destroyed critically. Hence,
protection circuits are most important in faulted circuit. On the
other hand, open-switch fault of the system doesnt cause
system shutdown, but degrades its performance. In this case,
the converter causes the imbalance of the AC input current
and pulsation of DC-link voltage. If such an abnormal
operation lasts continuously, accumulated fatigue with
unstable operation may generate malfunctions of converter
system. Accordingly, there is high possibility of secondary
faults in the converter system, load, and grid. Therefore, the
fault detection and the tolerant control technics are required

for open-switch faults to solve the above mentioned situation

Some fault detection methods for open-switch fault of DCAC inverter have been developed during the last decade [7-12].
However, inverter and converter have different current
patterns each other under the same condition of IGBT open
switch fault. Hence, new detection methods are required. In
this paper, fault detection method of [13] is used for openswitch fault of PWM converter. In [13], a fault tolerant control
method is also proposed under only one switch open fault
condition. However, multiple faulty conditions are not
considered. So, this paper proposes fault tolerant control
strategy of 3-phase AC-DC PWM converter under multiple
open switch fault condition. Two or more switches fault cases
are dealt with. The usefulness of this paper is verified through
the computer simulation and the experimentation, respectively.


Fig.1 shows 3-phase AC-DC PWM converter. The

converter can provide unity power factor and high-quality dc
output voltage by using the PWM strategy of the converter.
Generally, space vector PWM (SVPWM) can be used for the
high performance of the converter. Fig.2 shows 3-phase
currents and conducting devices of the normal operation of the
PWM converter. One cycle of the currents can be divided by
12 regions as shown in Fig.2. The 3-phase currents have the
same phase as grid 3-phase voltages due to unity power factor.

This work has been supported by KESRI (Korea Electrical Engineering and
Science Research Institute) (2009T100100651), which is funded by MKE
(Ministry of Knowledge Economy).

978-1-4577-1216-6/12/$26.00 2012 IEEE

Ajou University
Suwon, KOREA


Fig.1 3-phase AC-DC PWM converter

(a) {S1, S4} open switch fault case

Fig. 2 3-phase currents, conducting diodes and switches at normal

(b) {S1, S3} open switch fault case

Fig.3 SVPWM hexagon

And, the output voltage of PI current regulators of the PWM

converter is shown in Fig.3 as V*. The rotating direction is the
Two switch faults can be classified as three cases. First
case is two switches of any one phase, which is {S1, S4}, {S3,
S6} and {S5, S2}. Second case is two of three top switches or
two of three bottom switches, which is {S1, S3}, {S3, S5}, {S4,
S6} and so on. Last case is one of three top switches and one
of three bottom switches, which is {S1, S6}, {S5, S4} and so on.
Typical three cases are shown in Fig.4.
Fig.4(a) shows an example of the first case. If {S1, S4} is
faulted, all twelve regions of Fig.2 are affected. So, there are
no normal controllable regions as shown in Fig.4(a). The
distorted currents with an imbalance are appeared, and the aphase current is similar to a current shape of well-known
diode rectifier due to two switches fault of a-phase. In 3-phase
AC-DC PWM converter, despite of open switches fault, the
currents can flow like a diode rectifier because freewheeling
diodes are conducted when one pole voltage is lower than the
other poles. Fig.4(b) shows an example of the second case. In
this case, two regions are controllable and ten regions are
uncontrollable. Two regions among ten regions are affected by
both switches. Fig.4(c) shows an example of the last case.
This case has just ten regions because two uncontrollable
regions are marked as box in Fig.4(c) are not appeared. Hence,
ten regions can be divided as four controllable regions and six
uncontrollable regions. Although there are four controllable

(c) {S1, S6} open switch fault case

Fig.4 Three cases of two switch open faults

regions, the performance is very low. It is because any

currents cannot flow around the disappeared regions.
If the converter has three or more switches open fault, the
case has at least two fault phenomena simultaneously except a
special case. Therefore, their current imbalances are poorer
than two switches fault cases. However, in a case like three
switches fault of top side or bottom side, although the currents
are distorted and have many harmonics, there is no current
imbalance as shown in Fig.5.


Fig. 5 Switch fault case of {S1, S3, S5}

The current imbalances cause DC-link voltage ripples and

drops of efficiency and power factor. Hence, possibilities of
secondary fault are increased. Therefore, fault detection is
required. Also, a proper tolerant control strategy is needed
according to the fault cases.


In order to detect an open switch fault, the fault detection

method uses a phenomenon of 2-phase conduction when the
fault is happened. Fig.6 shows current angle of six cases with
one switch fault. The detection regions are independent each
other because each switch has each assigned region. Hence, it
can use a superposition principle in the multi-fault conditions.
Therefore, the detection method is also available under the
multiple open switch faults condition.
For example, Fig.7 shows phase currents and the angle of
the current vector before and after open switch fault of S1 and
S3. At normal operation, balanced 3-phase currents and current
angle of constant frequency are displayed. However, after two
switches fault, distorted imbalance currents and current angle
are appeared. The distorted current angle is represented as a
sum of S1 and S3 switch fault cases. Therefore, the faulty
switches can be found from the detection method.
As shown in Fig.6, in detection region 1 , the starting
current of faulty phase is zero and the current is not produced
during /6 due to associated switch fault. However, in
detection region 2 , the starting current is nonzero. So, the
remaining current reduces into zero first of all. And then, the
current maintains zero during the remaining interval.

Fig.7 Phase currents and current angle before and after open switch fault of
S1 and S3

Therefore, it is more difficult to detect the fault in detection

region 2 than in the detection region 1 . Nevertheless, it is
needed for fast fault detection time because the detection is
possible under the low load conditions.


In normal operation of the converter without fault, voltage

output of SVPWM can be expressed as (1).

V = Vn + Vn +1

, = 2


where TS is sampling period of the PWM converter, T1 and T2

are two active vector times, and n is sector number of Fig.3. If
any open switch fault is happened, the voltage output is
distorted due to the faulty switches. One of twelve regions is
related with three switches as shown in Fig.2. One fault of
three switches is sorted by two cases. If first or last among
three switches is fault, the faulted vector is distorted by only a
zero vector like (2).
V fault = V + Vzero

T0 / 2



where T0 is zero vector time. Because symmetric PWM is

used, a half of the T0 is distorted. Table I shows faulted zero
vectors according to the switching elements and the direction
of the phase current. Or, if the middle switch is fault, the
faulted vector is distorted by not only a zero vector but also
active vectors like (3).
V fault = (V ) + Vzero


So, the voltage vector by distorted active vector is represented

as one available nearest active vector like (4).

(V ) = ( + )Vactive
Fig. 6 Current angle of six cases with one open switch fault


In previous {S1, S4} fault case, above equations can be

applied because only one switch is faulted per each region.


available voltage vector. The distortion by zero vector is

compensated through the DPWM as well. In addition, the
duration of available active vector is revised to approach the
original voltage vector like (8).





After( Vzero

S1(A Top)

if (Ia<0)



S2(C Bot)

if (Ic>0)



S3(B Top)

if (Ib<0)



S4(A Bot)

if (Ia>0)



S5(C Top)

if (Ic<0)



S6(B Bot)

if (Ib>0)



Vcompen = ( / 2 + ) Vactive

However, (5) should be used for two switches fault including

the middle switch.

V fault = ( + + ) Vactive


Hence, in {S1, S3} fault case, the voltage vector can use only
active vector V5 during two regions with two switches fault.
And the duration of V5 is sum of , and .
In case of first and last switch fault, zero vectors cannot be
produced due to the faulty two switches. Instead of the zero
vectors, duration of remaining active vectors is increased as
shown in (6).

V fault = ( + ) Vn + ( + ) Vn +1

Also, (5) should be compensated like (8) because it is a

nearest voltage vector. However, the compensation of (6) is
impossible because both zero vector V0 and V7 cannot be used.
Fig.9 shows a compensation result of Fig.4(b) as an
example for comprehension. The uncontrollable regions are
reduced from ten to four. In six perfect compensation regions,
(2) can change into (7) through DPWM. And, in two shaded
intervals of Fig.9, first interval is related to (3) by {S1} switch
fault and second interval is related to (5) by {S1, S3} switches
fault. Both (3) and (5) can be compensated into (8). The
remaining four regions are uncontrollable 2-phase conduction


So, the stored current of the input reactor is just consumed

during these regions because there is no zero vector time to
store the currents. Therefore, in {S1, S6} fault case, the two
switches fault regions are disappeared and all currents go
toward into zero as shown in Fig.4(c).
In order to compensate the faulted voltage vectors, they
need to recover or approach toward the original voltage vector.
Discontinuous PWM (DPWM) technic [14-16] can be used
for the compensation. Hence, (2) can change as (7) using

Vcompen = V


Fig.9 Compensation result of {S1, S3} fault case

Computer simulation is performed by using MATLAB
Simulink. Fig.10 shows 3-phase currents and DC-link voltage
about three cases. The simulation parameters and test
conditions are shown in Table II.

Because the voltage vector is recovered perfectly as

original vector, normal control becomes possible during the
region despite of the open switch fault. Fig.8 shows an
example of above compensation. As shown in Table I, zero
vector V7 acts like V4 by S1 switch fault. Hence, if V7 is
removed and V0 is expanded as shown in Fig.8, the active
vector can be recovered.
The faulted vector in (3) can be compensated into nearest

Fig. 8 Compensation by DWPM in SecIII of SVPWM


Input voltage
3 220[V]
Grid frequency


DC capacitor


Reference voltage


DC load resistor


Fault start time


Control format



Tolerant control
start time


Fig.10(a) is about two switches fault case of one phase.

Aforementioned, when {S1, S4} is faulted, the currents are
distorted due to faulted voltage vectors according to the region.
And, DC-link voltage is vibrated as two times of grid
frequency because of the distorted imbalance currents. Twelve
regions are defective altogether. If tolerance control is applied
after 0.25[s], the current imbalance is improved largely. Thus,
the DC-link voltage ripple is also reduced. Eight regions
change into controllable region through DPWM except four


(a) {S1, S4} fault case

current imbalance as explained in Fig.9. In Fig.10(c) of {S1,

S6} fault case, DC-link voltage ripple is largest among three
cases because it has the point where every current is zero.
Despite of tolerance control, the point does not disappear.
However, two regions and one region are recovered perfectly
and partially, respectively. So, current imbalance is reduced
slightly. Thus, the DC-link voltage ripple is also reduced about
Fig.11 shows simulation waveforms under three switches
fault conditions. As Fig.11(a) is {S1, S3, S4} fault case, the
characteristics of Fig.10 are appeared together. After tolerance
control, the performance is improved somewhat. Fig.11(b)
shows a special case of {S1, S3, S5} fault case. Although the
faulty currents arent sine waveform, there is no current
imbalance as mentioned earlier. So, the DC-link voltage ripple
is small. Also, although tolerance control is applied, the
improvement of the performance is minimal.

(b) {S1, S3} fault case

(a) {S1, S3, S4} fault case

(c) {S1, S6} fault case

(b) {S1, S3, S5} fault case

Fig. 11 3-phase currents and DC-link voltage about three cases of three
switches fault

Fig. 10 3-phase currents and DC-link voltage about three cases of two
switches fault

uncontrollable regions of 2-phase conduction. Fig.10(b) shows
{S1, S3} fault case. The DC-link voltage has ripple of grid
frequency in faulty condition. But, after tolerance control, the
ripple is reduced largely because of the improvement of the


Fig.12 shows the a-phase current, the current angle, the

angle variation and the fault detection signal for the open
switch fault detection. The faulty switches can be found by the
distorted current angle thought Fig.6 as mentioned in Fig.7.


(a) Normal operation

Fig. 12 Experimental waveforms for fault detection

Fig.13 shows the experimental waveforms of the tolerance

control. The experimental conditions are the same as test
conditions of previous simulation. 3-phase currents, DC-link
voltage and FFT result of DC-link voltage are shown in Fig.13.
Fig.13(a) shows waveforms in normal operation of 3-phase
AC-DC PWM converter. After open switches fault of {S1, S3},
the waveforms change into Fig.13(b). Distorted imbalance
currents and vibrating DC-link voltage are shown like a
previous simulation. If tolerance control is applied, waveforms
of Fig.13(b) change into Fig.13(c). The current imbalance is
dramatically reduced and the DC-link voltage ripple also is
reduced. FFT result of DC-link voltage in Fig.13(b) is also
improved like in Fig.13(c).

(b) Open fault operation of {S1, S3}

This paper proposed fault tolerant control strategy of 3phase AC-DC PWM converter to minimize the current
imbalance and DC-link voltage ripple under multiple open
switch fault condition. In various multiple switch fault cases,
fault phenomena and tolerance control methods were analyzed,
respectively. Hence, the results were represented before and
after the tolerance control under multiple open switches fault
conditions. This method is easily implementated by revising
the switching pattern of SVPWM. The feasibility of the fault
tolerant control strategy was proved by simulation and
experimentation results.

(c) Tolerance control operation

Fig. 13 3-phase currents, DC-link voltage and FFT of the voltage

This work has been supported by KESRI (Korea
Electrical Engineering and Science Research Institute)
(2009T100100651), which is funded by MKE (Ministry of
Knowledge Economy).





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