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A natural extension of the Random Access Machine (RAM) serial architecture is the
Parallel Random Access Machine, or PRAM.
Processors share a common clock but may execute different instructions in each
cycle.
The power of a PRAM depends on the kind of access to the shared memory locations.
PRAM Submodels and Assumptions
Processors
0
Shared Memory
0
1
2
3
1
.
.
.
p1
.
.
.
m1
1.
2.
Accumulator architecture
o memory cell R accumulates results
0
C o n c u rre n t E xc lu s ive
W rites to sa m e lo c a tio n
Types of PRAM
EREW
Least powe rful,
most realistic
ERCW
Not useful
Concurrent
CREW
Default
CRCW
Most powerful,
further subdivided
o Parallel Reduction
Broadcast Algo
Divide and Conquer
o Prefix Sum
o Parallel List Ranking
PRAM machine
time:
time: time taken by the longest running processor
hardware:
hardware: maximum number of active processors
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