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ADIS16203
FEATURES
0 to 360 Inclinometer
180 output format option
14-bit digital inclination outputs
Linear output, 0.025 resolution
12-bit digital temperature sensor output
Digitally controlled bias calibration
Digitally controlled sample rate
Digitally controlled filtering
Digitally controlled direction/orientation
Dual alarm settings with rate/threshold limits
Auxiliary digital I/O
Digitally activated self-test
Digitally activated low power mode
SPI-compatible serial interface
Auxiliary 12-bit ADC input and DAC output
Single-supply operation: 3.0 V to 3.6 V
3500 g powered shock survivability
APPLICATIONS
Tilt sensing, inclinometers
Platform control, stabilization, and leveling
Motion/position measurement
Monitor/alarm devices (security, medical, safety)
Robotics
GENERAL DESCRIPTION
The ADIS16203 is a complete incline-angle measurement system
in a single compact package enabled by the Analog Devices, Inc.,
iSensor integration. By enhancing the Analog Devices iMEMS
sensor technology with an embedded signal processing solution,
the ADIS16203 provides factory-calibrated, sensor-to-digital incline-
AUX
DAC VREF
ADIS16203
TEMPERATURE
SENSOR
INERTIAL
MEMS
SENSOR
SIGNAL
CONDITIONING
AND
CONVERSION
CALIBRATION
AND
DIGITAL
PROCESSING
CS
SPI
PORT
SCLK
DIN
DIGITAL
CONTROL
SELF-TEST
VDD
POWER
MANAGEMENT
ALARMS
DOUT
AUXILIARY
I/O
AUX COM
RST
DIO0 DIO1
06108-001
COM
Figure 1.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
ADIS16203
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Alarms .......................................................................................... 15
Specifications..................................................................................... 3
Timing Diagrams.......................................................................... 5
Peripherals........................................................................................ 22
Applications ..................................................................................... 24
Basic Operation............................................................................... 12
Second-Level Assembly.............................................................. 25
Calibration ................................................................................... 15
REVISION HISTORY
1/10Rev. 0 to Rev. A
Changes to Figure 25 ...................................................................... 11
Changes to Table 19 ........................................................................ 20
Changes to Table 23 ........................................................................ 21
Updated Outline Dimensions ....................................................... 26
8/06Revision 0: Initial Version
Rev. A | Page 2 of 28
ADIS16203
SPECIFICATIONS
TA = 40oC to +125C, VDD = 3.3 V, tilt = 0, unless otherwise noted.
Table 1.
Parameter
INCLINOMETER 1
Input Range
Relative Accuracy
Sensitivity
Accuracy Temperature Coefficient
NOISE PERFORMANCE
Output Noise
Noise Density
FREQUENCY RESPONSE
Sensor Bandwidth
Sensor Resonant Frequency
SELF-TEST STATE
Output Change When Active
TEMPERATURE SENSOR
Output at 25C
Scale Factor
ADC INPUT
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Input Range
Input Capacitance
ON-CHIP VOLTAGE REFERENCE
Accuracy
Reference Temperature Coefficient
Output Impedance
DAC OUTPUT
Resolution
Relative Accuracy
Differential Nonlinearity
Offset Error
Gain Error
Output Range
Output Impedance
Output Settling Time
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Logic 1 Input Current, IINH
Logic 0 Input Current, IINL
Input Capacitance, CIN
Conditions
Min
Typ
Max
Unit
360
0.6
0.025
0.0167
Degrees
Degrees
Degrees/LSB
Degrees/C
At 25C, no averaging
At 25C, maximum averaging
At 25C, no averaging
1.0
0.1
0.037
Degrees rms
Degrees rms
Degrees/Hz
rms
2250
5.5
Hz
kHz
34
Degrees
1278
2.13
LSB
LSB/C
12
2
1
4
2
40
70
Bits
LSB
LSB
LSB
LSB
V
pF
V
mV
ppm/oC
12
4
1
5
0.5
0 to 2.5
2
10
Bits
LSB
LSB
mV
%
V
0.2
40
10
V
V
A
A
pF
At 25C
0
During acquisition
At 25C
2.5
20
2.5
10
+10
5 k/100 pF to GND
For Code 101 to Code 4095
2.0
VIH = VDD
VIL = 0 V
Rev. A | Page 3 of 28
0.8
1
60
ADIS16203
Parameter
DIGITAL OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
SLEEP TIMER
Timeout Period 2
FLASH MEMORY
Endurance 3
Data Retention 4
CONVERSION RATE
Minimum Conversion Time
Maximum Conversion Time
Maximum Throughput Rate
Minimum Throughput Rate
POWER SUPPLY
Operating Voltage Range VDD
Power Supply Current
Conditions
Min
ISOURCE = 1.6 mA
ISINK = 1.6 mA
2.4
Typ
0.5
Max
Unit
0.4
V
V
128
Seconds
20,000
20
TJ = 85C
Cycles
Years
244
484
4096
2.066
3.0
Normal mode, SMPL_TIME 0x08
(fS 910 Hz) at 25C
Fast mode, SMPL_TIME 0x07
(fS 1024 Hz) at 25C
Sleep mode at 25C
Turn-On Time
1
s
ms
SPS
SPS
3.3
11
3.6
14
V
mA
36
42
mA
500
130
750
A
ms
This sensor relies on the earths gravity to provide accurate incline angle measurements. The axis of rotation must be perpendicular to the earths gravity to maintain the
factory-calibrated accuracy of the sensor.
Guaranteed by design.
3
Endurance is qualified as per JEDEC Standard 22 Method A117 and measured at 40C, +25C, +85C, and +125C.
4
Retention lifetime equivalent at junction temperature (TJ) 55C as per JEDEC Standard 22 Method A117. Retention lifetime decreases with junction temperature.
2
Rev. A | Page 4 of 28
ADIS16203
TIMING SPECIFICATIONS
TA = +25C, VDD = 3.3 V, tilt = 0, unless otherwise noted.
Table 2.
Parameter
fSCLK
Description
Fast mode, SMPL_TIME 0x07 (fS 1024 Hz)
Normal mode, SMPL_TIME 0x08 (fS 910 Hz)
Chip select period, fast mode, SMPL_TIME 0x07 (fS 1024 Hz)
Chip select period, normal mode, SMPL_TIME 0x08 (fS 910 Hz)
Chip select to clock edge
Data output valid after SCLK falling edge 2
Data input setup time before SCLK rising edge
Data input hold time after SCLK rising edge
Data output fall time
Data output rise time
CS high after SCLK edge 3
tDATARATE
tCS
tDAV
tDSU
tDHD
tDF
tDR
tSFS
Min 1
0.01
0.01
40
100
48.8
Typ
Max
2.5
1.0
Unit
MHz
MHz
s
s
ns
ns
ns
ns
ns
ns
ns
100
24.4
48.8
5
5
12.5
12.5
TIMING DIAGRAMS
tDATARATE
tSTALL
CS
06108-002
SCLK
tCS
tSFS
1
15
16
SCLK
tDAV
MSB
DB14
DB13
tDSU
DIN
W/R
DB12
DB11
A4
A3
DB10
DB2
DB1
LSB
tDHD
A5
A2
D2
D1
Figure 3. SPI Timing, Utilizing SPI Settings Typically Identified as Phase = 1, Polarity = 1
Rev. A | Page 5 of 28
LSB
06108-003
DOUT
ADIS16203
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Acceleration (Any Axis, Unpowered)
Acceleration (Any Axis, Powered)
VDD to COM
Digital Input/Output Voltage to COM
Analog Inputs to COM
Operating Temperature Range
Storage Temperature Range
Rating
3500 g
3500 g
0.3 V to +7.0 V
0.3 V to +5.5 V
0.3 V to VDD + 0.3 V
40C to +125C
65C to +150C
JA
250C/W
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. A | Page 6 of 28
JC
25C/W
Device Weight
0.6 g
ADIS16203
AUX ADC
VREF
COM
13
14
15
16
AUX DAC 12
ADIS16203
NC 11
BOTTOM
VIEW
(Not to Scale)
AUX COM 10
DIO1
DIO0
NC = NO CONNECT
NC
AUX COM
RST
SCLK
DOUT
DIN
CS
06108-004
VDD
Mnemonic
SCLK
DOUT
DIN
CS
DIO0, DIO1
NC
AUX COM
RST
AUX DAC
VDD
AUX ADC
VREF
COM
Type 1
I
O
I
I
I/O
S
I
O
S
I
O
S
Description
SPI Serial Clock.
SPI Data Out.
SPI Data In.
SPI Chip Select, Active Low. This input frames the serial data transfer.
Multifunction Digital I/O Pin.
No Connect.
Auxiliary Grounds. Connect to GND for proper operation.
Reset, Active Low. This input resets the embedded microcontroller to a known state.
Auxiliary DAC Analog Voltage Output.
+3.3 V Power Supply.
Auxiliary ADC Analog Input Voltage.
Precision Reference Output.
Common. Reference point for all circuitry in the ADIS16203.
Rev. A | Page 7 of 28
ADIS16203
TYPICAL PERFORMACE CHARACTERISTICS
30
90
80
25
INCL_OUT (Degrees)
POPULATION (%)
70
20
15
10
60
50
40
30
20
0.2
0.4
0.6
0.8
1.0
ERROR (Degrees)
0
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
SUPPLY (V)
06108-008
1.0
06108-032
10
0
3.5
125
3.0
2.5
QUANTITY
INCL_OUT (Degrees)
100
2.0
1.5
75
1.0
50
0.5
25
0
0.5
20
40
60
80
100
120
TEMPERATURE (C)
(V/LSB)
06108-009
06108-006
20
607.6
607.8
608.0
608.2
608.4
608.6
608.8
609.0
609.2
609.4
609.6
609.8
610.0
610.2
610.4
610.6
610.8
611.0
611.2
611.4
611.6
611.8
612.0
612.2
612.4
1.0
40
0.40
70
0.35
60
QUANTITY
0.25
0.20
50
40
30
0.15
20
0.10
10
0.05
3.1
3.2
3.3
3.4
3.5
3.6
3.7
(mV)
Rev. A | Page 8 of 28
06108-010
3.0
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0
0.3
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3.0
3.3
3.6
3.9
4.2
4.5
4.8
0
2.9
06108-033
ERROR (Degrees)
0.30
ADIS16203
3
45
40
30
QUANTITY
NONLINEARITY (LSB)
35
25
20
15
10
2
5
8192
12288
16384
ADC CODES
(mV)
3.0V/40C
3.0V/+25C
3.0V/+125C
3.3V /40C
3.3V/+25C
3.3V/+125C
3.6V/40C
3.6V/+25C
3.6V/+125C
4
2
3
NONLINEARITY (LSB)
NONLINEARITY (LSB)
06108-014
4096
2.7
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0
0.3
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3.0
3.3
3.6
3.9
4.2
4.5
06108-011
2
1
0
1
2
3
4096
8192
12288
16384
ADC CODES
06108-012
512
1024
1536
2048
2560
3072
3584
4096
DAC CODES
06108-015
4
3
120
250
100
200
QUANTITY
60
150
100
40
50
20
2.4975
2.4977
2.4979
2.4981
2.4983
2.4985
2.4987
2.4989
2.4991
2.4993
2.4995
2.4997
2.4999
2.5001
2.5003
2.5005
2.5007
2.5009
2.5011
2.5013
2.5015
2.5017
2.5019
2.5021
2.5023
06108-013
(V/LSB)
(V)
Rev. A | Page 9 of 28
06108-016
606.6
606.9
607.2
607.5
607.8
608.1
608.4
608.7
609.0
609.3
609.6
609.9
610.2
610.5
610.8
611.1
611.4
611.7
612.0
612.3
612.6
612.9
613.2
613.5
613.8
QUANTITY
80
ADIS16203
60
180
160
50
140
120
QUANTITY
QUANTITY
40
30
100
80
60
20
40
10
20
370
378
386
394
402
410
418
426
434
442
450
458
466
474
482
490
498
506
514
522
530
538
546
554
562
06108-017
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
(C)
(A)
06108-020
140
0.0010
120
QUANTITY
100
80
60
40
0.0008
0.0006
0.0004
0.0002
20
30
10
10
30
50
70
90
110
130
150
TEMPERATURE (C)
06108-021
13.0
(mA)
0
50
06108-018
12.7
12.4
12.1
11.8
11.5
11.2
10.9
10.6
10.3
10.0
9.7
9.4
140
0.0010
120
QUANTITY
100
80
60
40
0.0008
0.0006
0.0004
0.0002
20
3.0
3.1
3.2
3.3
3.4
3.5
3.6
Rev. A | Page 10 of 28
3.7
06108-022
(mA)
0
2.9
06108-019
29.0
29.6
30.2
30.8
31.4
32.0
32.6
33.2
33.8
34.4
35.0
35.6
36.2
36.8
37.4
38.0
38.6
39.2
39.8
40.4
41.0
41.6
42.2
42.8
43.4
ADIS16203
THEORY OF OPERATION
The ADIS16203 is a calibrated digital inclinometer that provides a
full 360 of measurement range in any rotational plane that is parallel to
the earths gravity. A dual-axis accelerometer provides the base-sensing
function, which resolves the earths gravity into two orthogonal vectors,
as displayed in Figure 23. A power-efficient approach to a common
trigonometric identity converts these orthogonal vectors into an inclineangle measurement.
OUTPUT RESPONSE
The incline-angle measurements are linear with respect to
degrees, and the sensors orientation produces the output
response displayed in Figure 25. This figure is helpful in
understanding the basic orientation of the inertial sensor
measurement axes.
INCL_OUT = +270
INCL_180_OUT = 90
1g
INCL_OUT = 0
INCL_180_OUT = 0
1g
a2
a1
BOTTOM
VIEW
(Not to Scale)
06108-036
EARTHS SURFACE
INCL_OUT = 180
INCL_180_OUT = 180
INCL_OUT = 90
INCL_180_OUT = 90
06108-023
EARTHS SURFACE
TEMPERATURE SENSOR
An internal temperature sensor monitors the accelerometers
junction temperature. The TEMP_OUT data register provides
a digital representation of this measurement. This sensor provides
a convenient temperature measurement for system-level characterization and calibration feedback.
PCB
ATTACHMENT
OFFSET
EARTHS SURFACE
06108-038
IDEAL = 90
Rev. A | Page 11 of 28
ADIS16203
BASIC OPERATION
SCLK have no impact on operation. A complete data frame contains
16 clock cycles. Because the SPI port operates in full duplex mode,
it supports simultaneous, 16-bit receive (DIN) and transmit (DOUT)
functions during the same data frame.
DATA FRAME
CS
SCLK
W/R
A5
A4
A3
A2
A1
REGISTER ADDRESS
WRITE = 1
READ = 0
A0
DC7
DC6
DC5 DC4
DC3
DC2
DC1
DC0
06108-037
DIN
DATA FRAME
DATA FRAME
SCLK
W/R BIT
DOUT
ADDRESS
DONT CARE
NEXT COMMAND
ZERO
Rev. A | Page 12 of 28
06108-024
DIN
ADIS16203
DATA OUTPUT REGISTER ACCESS
The MSB holds the new data (ND) indicator. When the output
registers are updated with new data, the ND bit goes to a 1 state.
After the output data is read, it returns to a 0 state. The EA bit is
used to indicate an alarm condition, which could result from a
number of conditions, such as a power supply that is out of the
specified operating range. See the Alarms section for more details.
The output data is either 12 or 14 bits in length. For all of the 12-bit
output data, the D13 and D12 bits are assigned dont care status.
LSB
ND
EA
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
The output data register map is located in Table 6 and provides all
of the necessary details for accessing each registers data. Table 7
displays the output coding for the 180 output data register,
INCL_180_OUT, and Figure 28 displays a timing diagram
example for reading this register.
Function
Power supply data
Auxiliary analog input data
Sensor temperature data
Inclination data
180 inclination data
Resolution
(Bits)
12
12
12
14
14
Address
0x03, 0x02
0x09, 0x08
0x0B, 0x0A
0x0D, 0x0C
0x0F, 0x0E
Data
Format
Binary
Binary
Binary
Binary
Twos complement
Scale Factor
(per LSB)
1.22 mV
0.61 mV
0.47C
0.025
0.025
Hex Output
0x1A94
0x0E8A
0x0019
0x0000
0x3FE7
0x3176
0x256C
Decimal
+6804
+3722
+25
0
25
3722
6804
Two MSBs have been masked off and are not considered in the coding.
Nominal sensitivity (0.025/LSB) and zero offset null performance are assumed.
CS
SCLK
DIN
W/R BIT = 0
ADDRESS = 001111
W/R BIT = 0
DOUT
DATA = 1000111010001010
NEW DATA, NO ALARM, INCL_180_OUT = +93.05
Figure 28. SPI Sequence Reading INCL_OUT When Incline Angle = 93.05
Rev. A | Page 13 of 28
06108-025
Binary Output
01 1010 1001 0100
00 1110 1000 1010
00 0000 0001 1001
00 0000 0000 0000
11 1111 1110 0111
11 0001 0111 0110
11 1100 0001 1000
ADIS16203
PROGRAMMING AND CONTROL
CONTROL REGISTER OVERVIEW
Type
Nonvolatile
INCL_NULL
ALM_MAG1
ALM_MAG2
ALM_SMPL1
ALM_SMPL2
ALM_CTRL
R/W
R/W
R/W
R/W
R/W
R/W
X
X
X
X
X
X
AUX_DAC
GPIO_CTRL
MSC_CTRL
SMPL_TIME
AVG_CNT
SLP_CNT
STATUS
COMMAND
R/W
R/W
R/W
R/W
R/W
R/W
R
W
X
X
X
Address
0x00 to 0x01
0x18
0x20
0x22
0x24
0x26
0x28
0x2A to 0x2F
0x30
0x32
0x34
0x36
0x38
0x3A
0x3C
0x3E
Bytes
2
2
2
2
2
2
2
6
2
2
2
2
2
2
2
2
Function
Reserved
Incline null calibration
Alarm 1 amplitude threshold
Alarm 2 amplitude threshold
Alarm 1 sample period
Alarm 2 sample period
Alarm source control register
Reserved
Auxiliary DAC data
Auxiliary digital I/O control register
Miscellaneous control register
ADC sample period control
Defines number of samples used by moving average filter
Counter used to determine length of power-down mode
System status register
System command register
Rev. A | Page 14 of 28
ADIS16203
CONTROL REGISTER DETAILS
All ADIS16203 control registers are organized into 2-byte segments,
and both upper (Bit 8 to Bit 15) and lower (Bit 0 to Bit 7) bytes have
unique addresses and can be accessed individually.
MSB
LSB
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Scale1
0.025
Default
0x0000
Format
Binary
Access
R/W
CALIBRATION
Bit
15:14
13:0
Description
Sets averaging count to 256
using the AVG_CNT register
Waits for the lowest noise data
Executes the global autonull
function using the COMMAND
register
Description
Not necessary, force to 0
Data bits
ALARMS
The ADIS16203 contains two independent alarm functions that
are referred to as Alarm 1 and Alarm 2. The Alarm 1 function is
managed by the ALM_MAG1 and ALM_SMPL1 control registers.
The Alarm 2 function is managed by the ALM_MAG2 and
ALM_SMPL2 control registers. Both the Alarm 1 and Alarm 2
functions share the ALM_CTRL register. For simplicity, this
section refers to the Alarm 1 functionality only.
The 16-bit ALM_CTRL register serves several roles in controlling
the Alarm 1 function. First, it is used to enable the overall Alarm 1
function and to select the output data variable that is to be
monitored for the alarm condition. Second, it is used to select
whether the Alarm 1 function is based upon a predefined threshold
(THR) level or a predefined rate-of-change (ROC) slope. Third,
the ALM_CTRL register can be used in setting up one of the
two general-purpose input/output lines (GPIOs) to serve as a
hardware output that indicates when an alarm condition has
occurred. Enabling the I/O alarm function as well as setting its
polarity and controlling its operation are accomplished using
this register. Fourth, this register provides the controls for
setting the comparison data as filtered or unfiltered.
Note that when enabled, the hardware output indicator serves
both the Alarm 1 and Alarm 2 functions and cannot be used to
differentiate between one alarm condition and the other. It is
simply used to indicate that an alarm is active and that the user
should poll the device via the SPI to determine the source of the
alarm condition (see the STATUS Register Definition section).
Because the ALM_CTRL, MSC_CTRL, and GPIO_CTRL
control registers can influence the same GPIO pins, a priority
level has been established to avoid conflicting assignments of
the two GPIO pins. This priority level is defined as MSC_CTRL,
which has precedence over ALM_CTRL, which has precedence
over GPIO_CTRL.
Rev. A | Page 15 of 28
ADIS16203
The ALM_MAG1 control register used in controlling the Alarm 1
function has two roles. The first role is to store the value with which
the output data variable is compared against to discern if an alarm
condition exists. The second role is to identify whether the alarm
should be active for excursions above or below the alarm limit. If 1 is
written to Bit 15 of the ALM_MAG1 control register, the alarm is
active for excursions extending above a given limit. If 0 is written to
Bit 15, the alarm is active for excursions dropping below the given
limit. The comparison value contained within the ALM_MAG1
control register is located within the lower 14 bits.
The versatility built into the alarm function allows the user to adapt
to several applications. For example, in the case of monitoring twos
complement variables, Bit 15 within the ALM_MAG1 control register
can allow for the detection of negative excursions below a fixed level.
In addition, the Alarm 1 and Alarm 2 functions can be set to monitor
the same variable that allows the user to discern if an output variable
remains within a predefined window.
Another potential ROC application is to monitor slowly changing
outputs in the inclination level. With the addition of the alarm hardware functionality, the ADIS16203 can be left to run independently
of the main processor and interrupt the system only when an alarm
condition occurs. Conversely, the alarm condition can be monitored
through the routine polling of any one of the seven data output registers.
Format2
N/A
Access
R/W
Use caution when monitoring the temperature output register for the
alarm conditions. Here, the negative temperature scale factor results
in the greater than and less than selections requiring reverse logic.
Setting Bit 11 in the ALM_CTRL register establishes the mode of
operation: threshold or rate of change (ROC). When the ROC
function is enabled, the comparison of the output data variable is
against the ALM_MAG1 level averaged over the number of samples
as identified in the ALM_SMPL1 control register. This acts to create
a comparison of ( units/ time) or the derivative of the output data
variable against a predefined slope.
Default1
0x0000
14
13:0
Description
Greater than Active Alarm Bit.
1: Alarm is active for an output greater than
ALM_MAG1 register setting.
0: Alarm is active for an output less than
ALM_MAG1 register setting.
Not used.
Data Bits. This number can be either twos complement
or straight binary. The format is set by the value being
monitored by this function.
Default1
0x0000
Format
Binary
Access
R/W
Rev. A | Page 16 of 28
Description
Not used
Data bits
ADIS16203
Table 15. ALM_CTRL Bit Designations
Default
0x0000
Format
N/A
Bit
15
Access
R/W
14:12
000
001
010
011
100
101
110
111
14
13:0
Description
Greater than Active Alarm Bit.
1: Alarm is active for an output greater than
ALM_MAG2 register setting.
0: Alarm is active for an output less than
ALM_MAG2 register setting.
Not used.
Data Bits. This number can be either twos complement
or straight binary. The format is set by the value being
monitored by this function.
11
10:8
000
001
010
011
100
101
110
111
Default1
0x0000
Format
Binary
Access
R/W
7:6
5
3
2
Description
Not used
Data bits
Default1
0x0000
Format
N/A
Value
Access
R/W
Rev. A | Page 17 of 28
Description
Rate of Change (ROC) Enable for Alarm 2
1: ROC is active
0: ROC is inactive
Alarm 2 Source Selection
Alarm disable
Alarm source: power supply output
Not used
Not used
Alarm source: auxiliary ADC output
Alarm source: temperature sensor output
Alarm source: INCL_OUT output
Alarm source: INCL_180_OUT output
Rate of Change (ROC) Enable for Alarm 1
1: ROC is active
0: ROC is inactive
Alarm 1 Source Selection
Alarm disable
Alarm source: power supply output
Not used
Not used
Alarm source: auxiliary ADC output
Alarm source: temperature sensor output
Alarm source: INCL_OUT output
Alarm source: INCL_180_OUT output
Not used
ADF2Alarm Data Filter
1: Use filtered data for comparison
0: Use instantaneous data for comparison
ADF1Alarm Data Filter
1: Use filtered data for comparison
0: Use instantaneous data for comparison
Not used
Alarm Output Enable
1: Alarm output enabled
0: Alarm output disabled
Alarm Output Polarity
1: Active high
0: Active low
Alarm Output Line Select
1: DIO1
0: DIO0
ADIS16203
Table 16. SMPL_TIME Bit Descriptions
Bit
15:8
7
6:0
Note that the sample period given is defined as the cumulative time
required to sample, process, and update all data output variables. The
data output variables are sampled as a group and in unison with one
another. Whatever update rate is selected for one signal, all output
data variables are updated at the same rate whether they are monitored
via the SPI or not.
For a sample period setting of less than 1098.9 s (SMPL_TIME
0x07), the overall power dissipation in the part rises by approximately 300%.
256
SMPL_TIME VALUE
192
128
FILTERING CONTROL
The ADIS16203 uses two types of filters for the output data. The
INCL_OUT and INCL_180_OUT data outputs use a Bartlett
Window function, and the SUPPLY_OUT, AUX_ADC, and
TEMP_OUT data outputs use a standard moving-averaging
filter. The number of taps set by the AVG_CNT control register
establishes the frequency response. The number of taps can be
derived from the contents of AVG_CNT using the following
equation:
N = 2 AVG _ CNT
64
10
100
10k
1k
FREQUENCY (Hz)
06108-026
Averaging:
HA(f ) =
Description
Not used.
ADC Time Base Control. The MSB and TMBS set the
time base of the acquisition system to 122.1 s when
SR7 = 0 vs. 3.784 ms when SR7 = 1.
ADC Sample Period Count. The lower seven bits, SP6
to SP0, represent a binary count that results in the
combined sample period of the ADC when added to
one and then multiplied by the time base. (The
combined sample period is the period required to
sample and update all seven data outputs.) The
minimum setting for the lower seven bits, SP6 to SP0,
is 0x01. The overall acquisition time can be varied
from 244.2 s to 15.51 ms in 122.1 s increments for
TMBS = 0 and from 7.57 ms to 481 ms in 3.784 ms
increments for TMBS = 1. This equates to the sample
rate varying from 4096 SPS to 64.5 SPS for TMBS = 0
and from 132 SPS to 2.08 SPS for TMBS = 1.
Default1
0x0008
Format
N/A
Access
R/W
Bartlett Window:
H B ( f ) = H A2 ( f )
sin( N f t s )
N sin( f t s )
Rev. A | Page 18 of 28
ADIS16203
20
POWER-DOWN CONTROL
CORE SENSOR
RESPONSE
AVG_CNT = 1
N=2
ATTENUATION (dB)
AVG_CNT = 4
N = 16
20
AVG_CNT = 8
N = 256
60
1
10
100
1000
10000
FREQUENCY (Hz)
06108-034
40
AVG_CNT = 1
N=2
ATTENUATION (dB)
0
AVG_CNT = 4
N = 16
20
AVG_CNT = 8
N = 256
60
1
10
100
1000
10000
FREQUENCY (Hz)
06108-035
40
Default1
0x0007
Format
Binary
Access
R/W
Default1
0x0000
Format
Binary
Description
Not used
Data bits (maximum = 1000, or a decimal value of 8)
Rev. A | Page 19 of 28
Description
Not used
Data bits
Access
R/W
ADIS16203
STATUS FEEDBACK
COMMAND CONTROL
The status control register within the ADIS16203 is utilized in determining the present state of the device. The ability to monitor the device
becomes necessary when and if the ADIS16203 has registered an alarm
and/or error condition as indicated by the alarm enable (Bit 14) within
the output data registers.
Default1
0x0000
Format
N/A
Access
Read only
Address
0x3F, 0x3E
7:6
5
Description
Not used
Alarm 2 Status
1: Active
0: Normal mode
Alarm 1 status
1: Active
0: Normal mode
Not used
Self Test Fail
1: Self-test failure
0: Self-test pass
SPI Communications Failure
1: Error condition
0: Normal mode
Control Register Update Failed
1: Error condition
0: Normal mode.
Power Supply Above 3.625 V
1: Error condition
0: Normal mode
Power Supply Below 2.975 V
1: Error condition
0: Normal mode
Default1
0x0000
Format
N/A
Access
Write only
Rev. A | Page 20 of 28
Description
Not used.
Software Reset Command.
Not used.
Clear Status Register, once per activation
Manual Flash Update Command. This command is
utilized in updating all of the nonvolatile registers to
Flash. Once the command is initiated, the supply
voltage, VDD, must remain within specified limits for
50 ms to ensure proper update of the nonvolatile
registers to Flash.
Auxiliary DAC Latch Command. This command acts to
latch the AUX_DAC control register data into the
auxiliary DAC upon receipt of the command. This allows
for sequential loading of the upper and lower AUX_DAC
data bytes via the SPI without having the auxiliary DAC
transition into unwanted, intermediate states based
upon the individual AUX_DAC data bytes. Once the two
bytes of AUX_DAC are loaded, the DAC latch command
is initiated to move the data into the auxiliary DAC itself.
Factory Reset Command. This command allows the user
to reset the INCL_NULL register to its nominal setting
(0x0000) upon receipt of the command. Data within the
moving average filters is reset. As the manual Flash
command (COMMAND register, Bit 3), this command
stores all of the nonvolatile registers to Flash. Once the
command is initiated, the supply voltage, VDD, must
remain within specified limits for 50 ms to ensure
proper update of the nonvolatile registers to Flash.
Null Command. This command loads the inclination
offset register with a value that zeros out the inclination
and outputs. Useful as a single command to simultaneously zero the inclination outputs. As the manual
Flash command (COMMAND register, Bit 3), this command
stores all of the nonvolatile registers to Flash. Once the
command is initiated, the supply voltage, VDD, must
remain within specified limits for 50 ms to ensure
proper update of the nonvolatile registers to Flash.
ADIS16203
MISCELLANEOUS CONTROL REGISTER
Address
0x35, 0x34
Default1
0x0000
Format
N/A
Access
R/W
7:3
2
Rev. A | Page 21 of 28
Description
Not used
No Self-Test on Power-Up
1: No self-test on power-up or reset
0: Self-test on power-up enabled (typically requires
approximately 13 ms in high performance mode and
approximately 35 ms in low power mode with every
power-up or reset)
Reverse Rotation
1: Reverses rotation of both inclination outputs
0: Normal operation
Self-Test Enable
1: ST enabled (continuous self-test)
0: ST disabled
Not used
Data-Ready Enable
1: DR enabled
0: DR disabled
Data-Ready Polarity
1: Active high
0: Active low
Data-Ready Line Select
1: DIO1
0: DIO0
ADIS16203
PERIPHERALS
AUXILIARY ADC FUNCTION
C1
R1 C2
06108-028
Default1
0x0000
Format
Binary
Access
R/W
Rev. A | Page 22 of 28
Description
Not used
Data bits
ADIS16203
Table 23. GPIO_CTRL Bit Descriptions
Bit
15:10
9
7:2
1
Default1
0x0000
Format
N/A
Access
R/W
Rev. A | Page 23 of 28
Description
Not used
General-Purpose I/O Line 1 Polarity
0: Low
1: High
General-Purpose I/O Line 0 Polarity
0: Low
1: High
Not used
General-Purpose I/O Line 1, Data Direction Control
0: Input
1: Output
General-Purpose I/O Line 0, Data Direction Control
0: Input
1: Output
ADIS16203
APPLICATIONS
HARDWARE CONSIDERATIONS
SELF-TEST TIPS
Rev. A | Page 24 of 28
ADIS16203
POWER-ON RESET OPERATION
Table 24.
Profile Feature
Average Ramp Rate (TL to TP)
Preheat
Minimum Temperature
(TSMIN)
Maximum Temperature (TSMAX)
Time (TSMIN to TSMAX) (ts)
2.35V TYP
VDD
06108-029
130ms TYP
POR
TSMAX to TL
Ramp-Up Rate
Time Maintained Above
Liquidous (TL)
Liquidous Temperature (TL)
Time (tL)
Condition
Sn63/Pb37
Pb-Free
3C/sec max
3C/sec max
100C
150C
150C
60 sec to
120 sec
200C
60 sec to
150 sec
3C/sec
3C/sec
183C
60 sec to
150 sec
240C +
0C/5C
10 sec to
30 sec
6C/sec max
6 minutes
max
217C
60 sec to
150 sec
260C +
0C/5C
20 sec to
40 sec
6C/sec max
8 minutes
max
SECOND-LEVEL ASSEMBLY
TSMIN
tS
RAMP-DOWN
PREHEAT
t25C TO PEAK
TIME
06108-030
TEMPERATURE
tL
TSMAX
0.670 BSC
(12 PLCS)
7.873 BSC
(2 PLCS)
1.127 BSC
(16 PLCS)
RAMP-UP
TL
1.178 BSC
(8 PLCS)
0.500 BSC
(16 PLCS)
CRITICAL ZONE
TL TO TP
tP
TP
Rev. A | Page 25 of 28
06108-031
ADIS16203
OUTLINE DIMENSIONS
5.391
BSC
(4)
2.6955
BSC
(8)
9.35
9.20 SQ
9.05
13
PIN 1
INDICATOR
1.000 BSC
(16)
16
12
8.373
BSC
(2)
0.797 BSC
(12)
9
4
8
0.200
MIN
(ALL SIDES)
TOP VIEW
BOTTOM VIEW
0.373 BSC
(16)
5.00
TYP
121409-C
3.90
MAX
SIDE VIEW
ORDERING GUIDE
Model 1
ADIS16203CCCZ
ADIS16203/PCBZ
1
Temperature Range
40C to +125C
Package Description
16-Terminal Land Grid Array [LGA]
Evaluation Board
Rev. A | Page 26 of 28
Package Option
CC-16-2
ADIS16203
NOTES
Rev. A | Page 27 of 28
ADIS16203
NOTES
Rev. A | Page 28 of 28