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I. INTRODUCTION
VACa
VACb
VACc
VACa
PLL
FILTER
Ki2/s
ref
DCS1
Cm-C1
145kV
200km
200kV
200km
Cb-A1
Cb-C2
380kV
50km
145kV
200km
400kV
300km
400kV
DCS3
500km
400kV
145kV
400km
400kV
200km
400kV
380kV
Vc
Cb-B2
Cb-B1
Ki3/s
abc
to
dq
VDC ref
()2 FILTER
()2
200km
n (LAC+LT)
FILTER
Md1
Ki1/s
+
++
Kp1
++
Inner Controller
Cb-D1
Vm
Cd-E1
Cm-E1
200km
N:1
DCS2
145kV
145kV
200kV
Cm-B3
B. Controller
The multi-terminal HVDC system is based on the VSC
converter controlled by vector control with decoupled inner
current controllers [14]. The vector control strategy calculates
a voltage time area across the transformer/converter
equivalent reactor, which is required to change the current
from present value to the reference value. The dq0-frame
current orders to the controller are calculated from set-points
or references. Fig.2 shows the complete schematic of the
controller. There are also supplementary controllers that can
be applied to achieve other control purposes, which are not
shown here but will be mentioned in following sections.
S
L
R
G
C
pu
1.0
25.50%
1%
0.10%
60 ms
MCa
dq M
Cb
to MCc
abc
Cm-F1
200km
PL
Mq1
n (LAC+LT)
++
Kp4
200km
200kV
200kV
Cm-B2
200km
Ki1/s
Outer Controller
Vc
+-
Iacd ref
Ki4/s
++
Kp1
FILTER
++
Kp5
VDC
Iacq
Iacd
Ki5/s
Pref
+PLL
IACa
IACb
IACc
P FILTER
Vm
Cd-B1
++
Kp3
Cm-A1
Iacq ref
FILTER
Qref
A. System Description
At present, there is no commercially available MTDC
system, and CIGRE WG B4 proposed a MTDC benchmark as
a future vision, which is composed of three DC sub-systems:
including two mono-polar systems (DCS1 and DCS2) and one
bi-polar system (DCS3).
The established system is shown in Fig.1. The operating
voltages of mono-polar and bi-polar VSC-based DC systems
are 200kV and 400kV respectively, and the limit is from
0.95pu to 1.05pu. The off-shore and on-shore AC systems
work at 145 kV and 380 kV respectively. As the focus of this
research is on the DC systems, the AC systems are simply
modelled with voltage source routines in PSCAD. All the
detailed information of these sub-systems can be obtained
from [12].
++
Kp2
VAC
TABLE I
DATA OF AC/DC CONVERTER
E1
C2 A1, B2, C1, D1, F1 A1, B1, B2, B3
200MVA 400MVA
800MVA
1200MVA
196mH 98mH
49mH
33mH
2.42
1.21
0.605
0.403
1.25S
2.5S
5S
7.5S
75F
150F
300F
450F
2) Efficient Model
The MMC converter is the most advanced VSC
technology. However, its detailed model is hard for modelling
in PSCAD because of its large amount of semi-conductors
(GTOs or IGBTs): the nodal matrix has to be inverted in every
switching action. Yet according to [13], by using Nested Fast
and Simultaneous Solution, the multi-node network of MMC
can be modelled with a Thevenin circuit. This model
decreases the simulation time and imitates the real operation
of semi-conductors. In the following passages, it will be called
an efficient model.
Modelling a large system in EMT software takes
TABLE III
DATA OF CABLE MODEL
Layer
Material
Outer diameter
(mm)
Resistivity
(m)
Relative
permittivity
Relative
permeability
Core
Copper
25.125
1.72E-08
Insulation
XLPE
20
2.3
Sheath
Lead
22
2.20E-07
Insulation
XLPE
25.1
2.3
Armor
Insulation
Steel
PP
30.6
35.6
1.80E-07
-
1
2.1
10
1
HV
L/2
R/2
L/2
R/2
S
L
R
G
C
TABLE II
DATA OF DC/DC CONVERTER
pu
E1
B1
1.0
1000MW 2000MW
5ms
800mH
1600mH
1.20%
1.92
3.84
0.025% 0.390625S 0.78125S
5ms
7.8125F 15.625F
Converter
Cm-A1
Cm-C1
Setpoint
Q
Vdc
Q=0
Q(Vac)
Vdc=1pu
P(Vdc)
Q=0(Vac=1pu)
P=-400MW(Vdc=1pu)
Converter
Cm-B2
Cm-B3
Setpoint
Q
Vdc
Q=0
Vdc=0.99pu
Q(Vac)
P(Vdc)
Q=0(Vac=1pu)
Cm-E1
Cm-F1
P=800MW
Islanded
Q(Vac)
P(Vdc)
Q=0(Vac=1pu)
P=-500MW(Vdc=1pu)
Converter
Cb-A1
Cb-B1
Cb-B2
Cb-C2
Cb-D1
Setpoint
Q(Vac)
Vdc
Q=0(Vac=1pu)
Vdc=1.01pu
Q(Vac)
P(Vdc)
Q=0(Vac=1pu)
P=1500MW(Vdc=1pu)
Q(Vac)
P(Vdc)
Q=0(Vac=1pu)
P=1700MW(Vdc=1pu)
Q(Vac)
P(Vdc)
Q=0(Vac=1pu)
Q(Vac)
P=-600MW(Vdc=1pu)
P(Vdc)
Q=0(Vac=1pu) P=-1000MW(Vdc=1pu)
TABLE V
SYSTEM CONTROL STRATEGY II
a) Control Strategy of DCS1
25
Control Mode
Converter
20
Setpoint
Q
Vdc
Q=0
15
Current [kA]
Vdc=1pu
Islanded
Cm-C1
Cm-B3
Setpoint
Q
Vdc
Q=0
Vdc=0.99pu
Q(Vac)
P(Vdc)
Q=0(Vac=1pu)
Cm-E1
Cm-F1
F-on
Cb-B1
Cb-B2
Cb-C2
Cb-D1
F-off
0.2
t [s]
(a)
P=800MW(Vdc=1pu)
Islanded
10
Islanded
Control Mode
Converter
Vdc
Q=0(Vac=1pu)
Vdc=1.01pu
Current [kA]
Q(Vac)
P(Vdc)
Q(Vac)
P(Vdc)
-2
Q=0(Vac=1pu)
P=1700MW(Vdc=1pu)
Cd-B1
P=600MW
Cd-E1
P=300MW
-4
F-on
F-off
0.027
Strategy I
Strategy II
0.028
Strategy I
Strategy II
0.3
0.4
0.2
t [s]
(b)
Fig 6. The DC current at converter terminal: (a)CmA1; (b)CmC1. F-on:
0.025s, F-off: 0.075s.
1200
1200
1000
Voltage [kV]
Current [kA]
1000
800
800
600
400
200
600
0
0.075
0.08
t [s]
0.085
Strategy I
Strategy II
0.09
400
200
0
F-on
F-off
Strategy I
Strategy II
0.3
0.4
0.2
t [s]
(a)
1000
1000
DC Voltage [kA]
800
800
Voltage [kV]
A. DC Fault at Cm-A1
The pole-to-pole fault is the most severe situation in DC
system, thus it is worthy of simulation. Thus the fault is
applied at the end of converter Cm-A1, starting at 0.025s. Its
duration and fault resistance is 50ms and 0.01ohm
respectively. The converter will be blocked if the DC current
exceeds pre-specified threshold and each converter can be
considered separately due to the change of topology during
fault. In order to enhance the computation efficiency, the
converter Cm-A1 and Cm-C1 are modelled with MMC
efficient model while the rest are modelled by using timeaverage model.
From Fig.6(a), the waveforms of DC terminal currents of
Cm-A1, IdcCmA1, are quite similar with each other under two
strategies. Because of the fault occurring at the terminal of
Cm-A1 and the infinite AC bus BaA0, the DC voltage at this
terminal drops to zero immediately, as Fig.7(a) shows. On the
other hand, the real power injected through converter CmA1 is
determined by the fault characteristic when the converter is
blocked and it is irrelevant with AC side, which is clarified by
Fig.8(a): the power through CmA1 has good agreement during
the fault (from F-on: 0.025s to F-off: 0.075s) with two
0.026
t [s]
P=1500MW(Vdc=1pu)
P(Vdc)
0
0.025
Q(Vac)
P=-600MW(Vdc=1pu)
Islanded
Q=0(Vac=1pu)
Q(Vac)
Setpoint
Q=0(Vac=1pu)
Strategy I
Strategy II
0.3
0.4
-5
Cb-A1
Control Mode
Converter
Cm-B2
10
Current [kA]
Cm-A1
strategies.
600
600
400
200
0.075
400
0.08
t [s]
0.085
Strategy I
Strategy II
0.09
200
F-on
F-off
0.2
t [s]
Strategy I
Strategy II
0.3
0.4
(b)
Fig 7. The DC voltage at converter terminal: (a) Cm-A1; (b) Cm-C1. F-on:
0.025s, F-off: 0.075s.
200
0
-200
-400
-600
-800
F-on
F-off
0.2
t [s]
Strategy I
Strategy II
0.3
0.4
2000MW
2030MW
2400MW
Cb-A1
(a)
Cb-C2
683MW
0
980MW
600
800MW
B4
Cb-B1
400
Cb-B2
200
100
F-on
F-off
0.2
t [s]
0.3
Strategy I
Strategy II
0.4
910MW
750MW
805MW
Cd-B1
Cd-E1
603MW
300MW
1500MW
1220MW
320MW
DCS2
210MW
Cb-D1
1681MW
1000MW
908MW
1580MW
1500MW
600MW
84MW
-210MW
B4
1470MW
Cb-B2
1700MW
1700MW
1700MW
1000MW
908MW
1210MW
Cb-B1
1700MW
Cd-B1
Cd-E1
1500MW
603MW
300MW
1500MW
840MW
360MW
DCS2
(a)
(b)
Fig 9. Power flow after switching cable A1-C2: (a) Strategy I, (b) Strategy II.
The red color stands for original data and the dark blue color for the postswitching data; the red arrow represents reference direction.
2
(b)
Fig 8. The imported power through converter: (a) Cm-A1; (b)Cm-C1. F-on:
0.025s, F-off: 0.075s.
1.5
1
Current [kA]
980MW
0.5
Current [kA]
1210MW
920MW
300
Cb-D1
1681MW
750MW
Cb-C2
683MW
84MW
-580MW
500
Cb-A1
600MW
0
-0.5
1
0
-1
-1
-1.5
-2
S-off
-2
IdcCmA1
IdcCmC1
S-on
0.4
t [s]
-3
S-off
IdcCmA1
IdcCmC1
S-on
0.4
t [s]
(a)
(b)
Fig 10. Comparison of strategies on DC currents of DCS1: (a) Strategy I,
(b)Strategy II
2
Current [kA]
-2
-4
-6
S-off
IdcCbA1
IdcCbB1
IdcCbB2
IdcCbC2
IdcCbD1
S-on
0.4
t [s]
-2
-4
-6
S-off
IdcCbA1
IdcCbB1
IdcCbB2
IdcCbC2
IdcCbD1
S-on
0.4
t [s]
2.5
2.5
1.5
1.5
Current [kA]
Current [kA]
(a)
(b)
Fig 11. Comparison of strategies on DC currents of DCS3: (a) Strategy I,
(b)Strategy II
1
0.5
0
-0.5
-1
S-off
IdcCmB2
IdcCmB3
IdcCmE1
IdcCmF1
S-on
0.4
t [s]
8
0.5
0
-0.5
-1
S-off
6
1
IdcCmB2
IdcCmB3
IdcCmE1
IdcCmF1
S-on
0.4
t [s]
(a)
(b)
Fig 12. Comparison of strategies on DC currents of DCS2: (a) Strategy I,
(b)Strategy II
4
2
0
-2
-4
0
-1
-2
IdcCmB2
IdcCmB3
IdcCmE1
IdcCmF1
0.2
-6
-8
-10
1.05
Current [kA]
Current [kA]
Current [kA]
F-on
-4
F-on
t [s]
t [s]
(a)
(b)
Fig 14. Comparison of currents of DCS2 after DC fault on DC/DC converter
terminal: (a) Strategy I, (b)Strategy II
0.95
V. CONCLUSIONS
0.9
0.85
IdcCmB2
IdcCmB3
IdcCmE1
IdcCmF1
0.2
-3
S-off
S-on
t [s]
CdE1
CdB1
0.4
Fig 13. The duty ratios of DC/DC converter CdE1 and CdB1 under Strategy II
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14] A. Lindberg, PWM and Control of Two and Three level High Power
Voltage Source Converter, Licentiate Thesis, Royal Institute of
Technology, Stockholm, Sweden, 1995.
[15] J. Peralta, H. Saad, S. Dennetiere and J. Mahseredjian, Detailed and
Averaged Models for a 401-level MMC- HVDC System, IEEE
Transactions on Power Delivery, vol. 27, no. 3, pp. 1501-1508, 2012.
[16] PSCAD X4 Online Help, Manitoba HVDC Research Centre,
Manitoba, Canada, 2013.
[17] F. Mura, C. Meyer and R. W. De Doncker, Stability Analysis of HighPower DC Grids, IEEE Trans. Industry Applications, vol. 46, no. 2, pp.
584-592, May. 2010.