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What the Internet of Things Means for Packages and Operations

PRINTED CIRCUIT
DESIGN & FAB

pcdandf.com
circuitsassembly.com
December 2014

DENDRITE
SHORTING
HOW

TO

KNOW

THE

SOURCE

Systems Design Software


Pad-to-Via Clearance
BTC Voiding

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DECEMBER 2014 VOL. 31 NO. 12

FIRST PERSON
6

PRINTED CIRCUIT
DESIGN & FAB

CAVEAT LECTOR
Giving it away.

Mike Buetow

MONEY MATTERS
16 ROI

FEATURES

PRINTED CIRCUIT
DESIGN & FAB

pcdandf.com
circuitsassembly.com

The fab sandwich.

Peter Bigelow
17

December 2014

22

PCB DESIGN

Using Systems Design Methodology to Manage


Complex PCB Designs

FOCUS ON BUSINESS

Managing the hundreds of interconnections between

Cushioning the blows.

and without error, is virtually impossible. Is there a

boards and external connectors and controls, manually,

Susan Mucha

better way to ensure new configurations communication


and design synchronization?

by RAINER ASFALG and ANDY WATTS

TECH TALK
18

ON THE FOREFRONT

26

20

21

ON THE COVER: A dendrite


area showing the top of
a reflowed pad lacking
complete coating coverage.
(Foresite)

COVER STORY

Root Cause Failure Analysis of Dendrite


Shorting: A Comparison of Analytical Techniques
A study of 25 conformal-coated, no-clean assemblies after environmental testing for

Pad-to-via clearance effects.

40C/90%RH for 168 hr. revealed FTIR, SEM/EDS and ion chromatography need an assist

Scott Fillebrown

when determining the true source of contamination.

by TERRY MUNSON

THE FLEXPERTS
Mark Finstad

37

28

DESIGNERS NOTEBOOK

Just what are local equivalent materials?

36

In Memoriam

A look back at friends and colleagues who left us in 2014.

IoT: Its all in the package.

E. Jan Vardaman

RETROSPECTIVE

SCREEN PRINTING

ONLINE AT CIRCUITSASSEMBLY.COM

THE FACTORY

Cost Reductions Through Energy Transitions

Flat lined.

Operational energy management is becoming increasingly important. How the SMT reflow

Clive Ashmore

oven has become ground zero for the energy reduction effort.

by VOLKER FEYERABEND

TECH TIPS
Minimizing BTC voiding.

Karl Seelig and Tim ONeill


39

TEST AND INSPECTION


A career in the test trenches.

Jun Balangue
40

DEFECTS DATABASE
Breaking the slump.

Dr. Chris Hunt


41

GETTING LEAN

DEPARTMENTS
8 AROUND

THE WORLD

14

MARKET WATCH

47 MARKETPLACE

43

OFF THE SHELF

47

AD INDEX

The waste behind SMT data gathering.

Michael Ford
48

TECHNICAL ABSTRACTS

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Lenora Toscano, Mark Verbrugge

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PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

DECEMBER 2014

CAVEAT LECTOR

The Season of Giving


MIKE
BUETOW
EDITORIN-CHIEF

HAT is with all the design freeware? Has the

market changed so much that software has


become a loss leader? And if so, on what
products will CAD developers earn a profit, given that
they dont have hardware divisions?
Board fabricators have offered simple CAD
programs for years. Sunstone, Advanced Circuits
and Beta Layout (PCB Pool) are among the dozen
or so fabricators that offer a variety of products
aimed primarily at the DIY or startup market. (A
list is available at pcdandf.com under CAD/CAM/
PCB Software.) Historically those tools have offered
schematic, layout and drill capabilities. More recently,
they have come to add various design rule checks,
bills of materials, and more. Sunstones latest release,
DFMplus, provides DRC results, and will be able to
see all the errors in one pass. Beta Layouts brd-to-3D
performs 3D previews and mechanical checks. Advanced
Circuits FreeDFM also checks inner- and outerlayers,
signal layers, drill files, silkscreen and solder mask
layers, and more. It meshes nicely with the companys
PCB Artist design tool, which does everything from
schematic creation to single-sided autorouting, DRC and
copper pours.
Lately, the CAD/CAM developers have upped the
ante. DownStream Technologies updated an old Cadence
tool and fashioned it into SoloPCB, a free capture, layout
and autorouter. Although aimed at hobbyists, it has
functionality that would be very familiar to professional
designers: push and shove routing, intelligent copper
pour, any angle part rotation, and so on.
Due to licensing restrictions, DownStream offers
SoloPCB only through its FabStream network of
preferred PCB fabricators. But as bigger players jump
in, the distribution channels are widening, and the tools
are becoming less restrictive. Last month, Mentor and
DigiKey teamed up to offer a simplified version of Pads,
with limits on layer counts, nets and components, and
no autorouting feature. Altium is doing the same thing
with element14, which distributes Altiums low-cost
CircuitStudio schematic capture and project management
tools, as well as CadSofts Eagle layout software.
The partnerships are getting web-like in their
complexity. Premier Farnell owns element14, CadSoft,
which sells Eagle Software, and Newark, which supports
Component Information Portal from EMA Design
Automation, which in turn is Cadences channel partner
for OrCad.For its part, Premier Farnell also has been
offering free CAD model files for years.
Even the higher functioning tools have been packaged
to compete. At PCB West this year, Zuken announced the

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

CADStar Essential schematic and PCB design tool suite,


which handles schematics, library creation, routing and
manufacturing export, priced at under $1,000.
For some perspective, I talked to Pete Waddell, our
design technical editor who also happens to be my boss.
Pete spent 20 years designing boards before making the
jump to writing about them. Hes been around long
enough to remember when Pads had a basic placement
tool version that came on a 5.5" floppy disk; routing and
NC drill tools cost extra.
Pete is not surprised by the latest flurry of activity at
the low end. When Tango came out it was so simple, a
salesman once told me that within two weeks they had
taught a secretary to design a board. And OrCAD at
the time had no protection. It was almost like they were
encouraging people to make illegal copies.
It seems they are looking at more outlets to get
people exposed. Once one jumps in the pool, they all do.
The basic design user model, as one CAD developer
explains, has changed. Whereas the famous software
performance pyramid still exists, it no longer consists of
a base of ready to use designers topped by mid-level
users and finally enterprise users at the peak. Today the
middle section is occupied by so-called project-based
designers, who might be simple enterprise users or service
bureaus. And the bottom is now occupied by makers (aka
hobbyists) who number in the hundreds of thousands.
Its hard to say whether these new partnerships will
deliver more bank for the partners. Certainly the makers
are an untapped market whose sheer numbers make
them attractive. But that rush for customers doesnt
mean it will be a great business for vendors. Fabricators
can offer software as a loss leader; developers cannot
(not yet, anyway). Is this a race to the bottom? Can a
developer compete against brands that dont need to turn
direct profits?
I think so. The need to make money in turn makes
us disciplined and keeps us focused. And I would never
discount the value of the brands that the big names can
leverage. The competition will force the Big 3 (or 4, if
we include Altium) to adapt, and possibly develop new
revenue streams. But I cant see it disrupting the market
in the long run.

mbuetow@upmediagroup.com
@mikebuetow
End notes. As we come to the end of another year, wed
like to thank our advertisers, customers and most of all,
you, our readers, for your support, and wish you the best
for 2015!
DECEMBER 2014

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AROUND THE WORLD

PCD&F People
Mentor Graphics appointed
A.J. Incorvaia vice president
and general manager of the
companys Board Systems
Division. He was vice president
of the PCB and IC Packaging
Group at Cadence, where he spent 16
years. He also held software development
and management positions at Viewlogic
and Digital Equipment.
Park Electrochemical named John Jamieson vice president of project management. He spent eight years at Sanmina,
most recently as vice president global
manufacturing engineering.
All Flex Flexible Circuits & Heaters named
Jamin Taylor program manager.
American Standard Circuits named John
Tusant Western region sales manager.

PCD&F Briefs
Zuken has acquired the tool-related intellectual property of electrical and electronics engineering specialist Intedis.
Altium announced a partnership with
element14 to distribute CircuitStudio, a
new PCB design tool based on Altium
technology.
Mentor Graphics named Macnica Americas
distributor for North America.
Prototron Circuits appointed JT Technologies sales representative in New York.
Isolas laminate materials passed Class 2
testing for CAF resistance standards.
The deadline for entries for the PCD&F NPI
Awards isDec. 15. (www.pcdandf.com/
pcdesign/index.php/editorial/npi-award)
Accurate Circuit Engineering has added
Isolas Astra and I-Tera laminates to its list
of standard materials.
Ichia installed an Orbotech Nuvogo 800
direct imager.
Electropac, one of the oldest PCB fabricators in the US, will change its name to
Valhalla Circuits as new ownership takes
over by year-end.
FTG Circuits purchased a Via Mechanics
ND-6Y220E drill for its Toronto PCB plant.
A pair of private equity investors have
acquired all shares of Europlasma for an
undisclosed sum.
The High Density Packaging User Group
announced the Smooth Copper Signal
Integrity project, focused on evaluating the

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

EDITED BY MIKE BUETOW

Vertical Strategy Paying Off for Cadence


SAN JOSE Cadence Design Systems strategy to boost its focus on systemslevel companies is paying off, company executives told analysts in October.
Clearly our system design enablement strategy is working [with] a couple
of successful wins in the system side, in the medical, in the mil/aero and automotive, said president and CEO Lip-Bu Tan on a conference call. The systems
company need(s) a whole suite of requirements, not just tools, not just IP, not
just the PCB board, system analysis and also the hardware software co-design,
co-verification in a very expanded way. We are in a unique position to provide
that to our customer, and thats why system companies like our offerings.
The EDA software company, which traditionally had been closely tied to
the semiconductor arena, sees better margins in the broader market.
Some of these verticals are very good; they are much broader and much
more profitable. And clearly the margin over time should be better than (the)
semiconductor (design market), Tan said.
The trickle-down effect has benefited Cadences PCB design software sales.
On Oct. 20Cadence reported third-quarter revenue of $400 million, up 9%
year-over-year. Its PCB (system interconnect and analysis) sales were $40 million for the quarter, up from $36.6 million a year ago.
Tan reiterated that its PCB design business is doing well because of recent
moves such as the acquisitionof Sigrity and its subsequent integration with Allegro. Customers really need not just (the) tool, not just IP, and also the whole PC
board, the whole system, the whole system analysis. We have been investing the
last five, six years and were going to continue, driving even more success. MB

Altium, Aras Partner on


ECAD/MCAD Collaboration
SYDNEY Altium is partnering with Aras to provide advanced PLM capabilities
to ECAD design teams.
Based on Altiums solutions for collaboration and ECAD design management and Aras suite of PLM solutions, the software developers are working on a new approach to fully integrate MCAD-ECAD PLM workflows for
companies with systems engineering requirements and mechatronic product
development environments.
Team collaboration and ECAD design management are fundamental
needs in todays electronic design environments, said Jason Hingston, CTO
at Altium. The partnership with Aras will provide design engineers and the
teams in the broader organization with a new level of integration in an ECAD/
MCAD environment.
No financial terms were disclosed. CD

With Topwin Acquisition, ESI Drills


Deeper into China
PORTLAND, OR Electro Scientific Industrieshas signed a definitive agreement

to acquire Wuhan Topwin Optoelectronics Technology for an undisclosed


amount. The deal, which is subject to customary government approvals, is
expected to close in the first quarter 2015.
Topwin is a developer ofmidrange laser technology for ITO patterning,
PCB cutting, welding, and other marking and cutting applications. The acquisition of the Wuhan, Hubei Province-based company gives ESI a low-cost option
for selling to the China market.
To compete and win in the fast-moving China market, ESI must design,
build, and sell locally. The acquisition of Topwin gives us that immediate
DECEMBER 2014

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Better parts in less time. Sounds pretty good dont you think?
Download the free trial at www.ema-eda.com/OLB-Trial

AROUND THE WORLD

effects of processing smooth copper foil


for PCBs.
Viasystems has accepted a final insurance
claim settlement offer of about $26.6million related to a 2012 fire at its Guangzhou
factory, bringing its total reimbursements
to $33.1million.

CA People
Celestica president and CEO
Craig Muhlhauser will retire
from the company by the
end of 2015. He has been
president since 2005 and CEO
since 2007.
Neways named Adrie van Bragt COO.
Juki Automation Systems
Europe announced Jens Mirau
as president, replacing Jrg
Schpbach. He has more than
20 years experience in SMT,
14 with Juki.
Season Group named Maria Liao vice
president of global program management.
Enics Switzerlandnamed Daniel Buser
general manager.
Speedline Technologies promoted Ken Parker to technical support specialist. With
Speedline since 1999, he was
manufacturing engineer, dispensers, and has a bachelors
in electronic engineering technology from
the New England Institute of Technology.
IBM scientist Marie Cole
received the SMTA Founders Award for exceptional
service to the association
and the electronics assembly
industry.
Koh Young America named
John Nelson applications
manager. He was a senior
subject matter expert for Kimball Electronics since 2011,
and prior to that a process
engineer for Flextronics.
National Technology appointed Brad
Butler to handle sales in the Southern
Midwest US.
Indium named Brian OLeary
global accounts manager. He
has about nine years' experience in global electronics industry sales and marketing with
KIC, Sono-Tek and Trans-Tec.

10

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

capability and significantly expands our footprint in China, the largest laser
systems market in the world, said Edward C. Grady, CEO of ESI. With
complementary capabilities, this acquisition expands our product portfolio,
enables faster time to market and allows ESI to provide a more complete set of
laser-based manufacturing solutions consistent with our focus on total-cost-ofownership, to customers in China and throughout the region.
Our design and manufacturing expertise with a deep understanding of
the specific China market requirements, coupled with ESIs strong technology
and global reach, creates an unparalleled opportunity to address the growing
market for laser microfabrication tools, said Dr. Hu Bing, general manager
of Topwin. MB

ISO 9001 Revision Moves to Final Stage


GENEVA A recent vote overwhelmingly approved the latest draft of the revised

ISO 9001 on quality management systems, paving the way for the new version
to be released next year.
The document now goes to a subcommittee review for comment disposition
and final ratification.
The draft ISO 9001 is part of a planned periodic review, which typically
happens every three to five years.The new edition, expected in 2015, will feature some important changes, among them the introduction of the concept of
risk-based thinking.
The latest draft(Draft International Standard DIS) received nearly 90%
approval from the ISO members, enough to progress to the next stage: Final
Draft International Standard (FDIS).The ISO subcommittee revising the
standard will now review all comments received during the DIS vote in order
to produce a final draft, which will then be put forth for ratification. Once
approved, the standard can then be published.
We are on the right track, and we are on schedule for publication, said
Dr. Nigel Croft, chair of the ISO subcommittee revising the standard. The
new version is very strongly based on three basic core concepts: that process approach that was very successful in the 2008 version where the quality
management system has to be aligned with the company's strategic direction.
Superimposed on that system of processes is the plan-do-check act methodology. A third core concept that is new in the 2015 version is risk-based thinking,
aiming at preventing undesirable outcomes.
ISO 9001 is one of ISOs most well-known standards, with more than 1.1
million certificates worldwide.
Watch Croft explain whats new and thenext steps: http://youtu.
be/1JIMyvpP0tw MB

Hot Zone: Amtech to Acquire BTU


TEMPE, AZ Amtech Systems will acquire BTU International in an all-stock transaction valued at $32.5 million. Under terms of the deal, Amtech will acquire all outstanding shares of BTU, and BTU stockholders will receive 0.3291 shares of Amtech
common stock for every share of BTU common stock.BTU stockholders will own
approximately 23.9% of the combined company once the deal goes through.
The combined company generated pro forma revenues of $94.7 million,
based on results for the 12-month period ended June 30 and June 29 for
Amtech and BTU, respectively.
This acquisition further advances our strategy to expand our technology
portfolio in adjacent markets and creates a strong platform to drive the growth
of our solar business, said J.S. Whang, executive chairman of Amtech.
BTU provides Amtech with complementary thermal processing technologies in the semiconductor, electronics and solar sectors, and strengthens our
DECEMBER 2014

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AROUND THE WORLD

CA Briefs

footprint in China and other key geographic markets with attractive growth
trends, said Fokko Pentinga, CEO of Amtech.
Following the transactions close, Amtech expects to maintain BTUs presence in North Billerica, MA, and Shanghai.
Amtech will expand its board of directors by one seat, which will be filled
by Paul van der Wansem, BTUs chairman and CEO. In addition, van der Wansem will join the Amtech management executive committee.
Peter Tallian, COO of BTU, will be the general manager of the BTU International division. CD

A November fire at SVI Public Co.s EMS


plant in Pathum Thani provincecould
cost up to $30.5 million. A government
agency has restricted access to the site
until January.
Scanfil EMS is planning for temporary
layoffs of up to 45 employees at its plant in
Sievi, Finland.
Foxconn is in preliminary talks to build a
factory in northern China that would make
high-end phone screens, a sign of the companys ambition to move up the electronics
food chain.

Report: ODMs Led H1 Revenue


Turnaround

Firstronic installed an IBL CX600 vapor


phase soldering system at its Juarez,
Mexico, plant.

NEVADA CITY, CA The 20 largest contract manufacturers saw first-half revenues

increase 2.7%, a sharp reversal from a year ago, a new report said.The top 20 EMS
and ODM firms saw aggregate revenue decrease 6.6% through the first six months
of 2013, New Venture Research said.
The uptick was led by seven ODMs, which collectively saw revenues rise 9.3%
in 2014 versus adecline of 7.8% in 2013. The surge was driven by new demand for
computers and handheld devices, NVR said. Meanwhile, traditional EMS companies
saw a more muted revenue recovery.
This reversal came as a result of strong demand for ODMtablets, servers,
notebooks (desktops went into decline), and smartphones, whereasEMS companies
achieved a more modest turnaround of 2.9% growth in 2014 versus an8.6% decline
the previous year. EMS companies benefited from the rebound in demandfor smartphones and tablets, plus a resurgence from traditional industries such asmedical,
industrial, and transportation, where ODMs have only a minor manufacturingpresence, said Randall Sherman of NVR.
Companies with the strongest improvement in terms of year-to-year gainwere
Flextronics, Benchmark, Compal, Qisda and Quanta Computer. Foxconn, the
worlds largest EMS/ODM, saw gross revenue rise 2.4% to $59 billion.
Partially offsetting the gains were Wistron, Pegatron and Venture, whose collective sales fell 7.1% in 2014 versus 2.9% growth in2013. Of those companies,
Wistron suffered the most due to asignificant drop in notebook orders and slow
product diversification.Pegatron also experienced a slight decline in notebooks and
smartphones (possiblyfrom its ramp-up with Apple), consistent with the rest of the
industry overall, NVR said. MB

Universal Electronics purchased a Kurtz


Ersa North America Powerflow wave solder machine.
Juki named Quantum Systems Representative of the Year 2014, and Horizon Sales
as its Representative of the Year Best
Performance 2014.
Kitron has signed a three-year, SEK 30
million agreement with Speed Identity to
build biometric identification systems.
Vi Technology opened an applications and
training center near Munich.
Teledyne Printed Circuit Technology purchased a Kurtz Ersa North America Ecoselect 1 selective soldering machine.
Simpro Holding will acquire a majority stake in electronics manufacturer Noca
Holding AS as it continues its investment in
the EMS sector.
Advanced Manufacturing Service installed
an ASYS XACT 4 screen printer, Mycronic
MY200 placement machine, and Heller
1707 reflow oven.
Gables Engineering installed a Kurtz Ersa
North America Versaflow 3/45 selective
soldering system.
Techcon Systemshas chosen Competitive Edge Manufacturing Equipment
for sales, service and support in Baja
California, Mexico, and AR Industrial for
central Mexico.
FSInspection named Horizon Sales exclusive distributor in the Midwest US.
IECs locations in Newark, NY, and Albuquerque, NM, and its Southern California Braiding facility in Bell Gardens, CA,
have been awarded the first IPC/WHMAA-620 Qualified Manufacturers Listing.
Speedprint and Europlacer appointed Red
Rock Reps manufacturers representative
in Colorado and Utah.

12

Alpha Metals has opened an applications


lab in South Korea focused on trial or evaluation testing of products for new projects.
Foxconn will set up a production base
for handsets and connectors and a center for exhibiting robotics and other
automation equipment in Shandong
Province, northern China.
Lindsay will acquire EMS/OEM firm Elecsys
in a cash deal worth about $70.5 million.
Finetech opened a sales and support
center in Japan.
Rocket EMS purchased a Parmi Sigma X
series SPI.
Kimball International has completed the
spinoff of its EMS business, newly named
Kimball Electronics.

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

The deadline for entries for the Circuits


Assembly NPI Awards isDec. 15.
Hi-Tech Electronic Products and Manufacturing installed an ASM Assembly
Systems DEK Horizon 01iX printer.
Proto Advantage has acquired desoldering tool OEM Chip Quik.
Beyonics will build an assembly site at
an industrial park in Johor, Malaysia.
APRI purchased a Nordson Asymtek
conformal coating system for its factory
in Czech Republic.
HZO has moved its production of its
submersible thin film for electronics to
a 16,000 sq. ft. site in Shenzhen.

DECEMBER 2014

Conception : Delivered
What Will Your
Board Grow Up To Be?
Best-in-class equipment with world-class employees results in the nations premier EMS company.

High speed AOI for solder


joint inspection.
Traceability to ISO-13485
& AS-9100 standards.

High-speed pick & place equipment.


Automatic Defluxing and
Cleanliness Verification
Systems meeting IPC
Cleaning Standards.
Dual-sided Flying Probe
Test & Boundary Scan.
Precision Cleaning Solutions.

Lets Test

Award
Winner of:
1250 American Parkway
1250 American
Parkway
2011
Global Technology
Richardson,
TX
75409
Richardson, TX 75081
2011 NPI Award
972.664-0900
2012 Global Technology
972.664.0900
www.ACDUSA.com
2012 NPI Award
www.ACDUSA.com
2012 EM Asia Innovation

MARKET WATCH

EDITED BY CHELSEY DRYSDALE

METALS INDEX
DATE

PCS STILL IN FALL


Trends in the U.S. electronics equipment market (shipments only).

% CHANGE
JULY AUG. SEPT. YTD%

Computers and electronics products


Computers
Storage devices
Other peripheral equipment
Nondefense
communications equipment

3.1

Components1

-1.5

-16.5

0.2

-6.7

-8.0

6.7

-17.5

-1.7

9.0

9.8

-8.1

-1.2

-7.4

46.1

-3.1
-1.4

2.9

0.7

5.6

Defense search and


navigation equipment

-0.7

6.9

-5.0

0.6

Medical, measurement and control

2.4

1.5

0.1

8.8

*Preliminary. 1Includes semiconductors. Seasonally adjusted.


Source: U.S. Department of Commerce Census Bureau, Nov. 4, 2014

US Demand Drives Worldwide


Tablet Sales
year-over-year in the third quarter with shipments reaching
53.8 million units, according to IDC.
Marked by back-to-school promotions and US appetite for connected tablets, the third quarter also saw shipments grow sequentially by 11.2%.
Apple maintained its lead in the worldwide tablet market, shipping 12.3 million units in the third quarter. Samsung held its number two position with 9.9 million units
shipped, capturing an 18.3% market share in the third
quarter. Asus regained its number three position with 3.5
million units and 6.5% share of the market. Lenovo fell
to fourth with 3 million units. The top 5 was rounded out
by RCA, which achieved its position by shipping 2.6 million units primarily in one country, the US. Market share
for the vendors outside the top 5 continued to outgrow
the market, representing 41.8% of total tablet shipments
in the quarter.

JUNE JULY AUG. SEPT. OCT.

PMI

55.3 57.1 59.0 56.6 59.0

New orders

58.9 63.4 66.7 60.0 65.8

Production

60.0 61.2 64.5 64.6 64.8

Inventories

53.0 48.5 52.0 51.5 52.5

Customer inventories

46.5 43.5 49.0 44.5 48.0

Backlogs

48.0 49.5 52.5 47.0 53.0

Sources: Institute for Supply Management, Nov. 3, 2014

14

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

$0.95

$0.91

$0.97

$1.02

$1.01

$3.24

$3.16

$3.05

$3.08

Smartphone Sales Defy Rumors,


Keep Growing

SAN MATEO, CA The worldwide tablet market grew 11.5%

LME Cash Seller and


Settlement for Lead

STAMFORD, CT Worldwide shipments of 3D printers


will reach 217,350 units in 2015, up 101% year-overyear, says Gartner.
3D printer shipments will more than double every
year between 2015 and 2018, by which time worldwide shipments are forecast to reach more than 2.3
million, according to the research firm.
Gartner predicts end-user spending on material
extrusion technology will increase from $789 million in
2015 to around $6.9 billion in 2018. Overall end-user
spending on 3D printers is expected to increase from
$1.6 billion in 2015 to around $13.4 billion in 2018.

rRevised.

US MANUFACTURING INDICES

$9.00

Worldwide 3D Printer Shipments


to Increase 101% in 2015

0.7 -4.6 1.3 3.5

Nondefense search and


navigation equipment

$9.28

LME Cash Seller and $3.26


Settlement for Copper

-2.6 -0.3 0.9 -3.3


-21.2

LME Cash Seller and $10.34 $10.15 $9.77


Settlement for Tin

Handy and Harman $318.72 $280.96 $302 $249.90 $235.18


Silver (COMEX Silver)

4.9

-7.3 -12.9 -11.3 -17.9

Defense communications equipment 29.0


A/V equipment

-1.2

11/4/13 8/4/14 9/1/14 10/6/14 11/3/14

FRAMINGHAM, MA New smartphone releases and


an increased emphasis on emerging markets drove
global smartphone shipments above 300 million units
for the second consecutive quarter.
According to preliminary data from IDC, vendors
shipped a total of 327.6 million units during the third
quarter, resulting in 25.2% growth from a year ago
and 8.7% sequentially.
Samsung remained the clear leader in the worldwide smartphone market, but was the only company
among the top five to see its shipment volume decline
year-over-year. Apple posted its largest third-quarter
volume ever. Xiaomi jumped into the top five for
the first time, coming in third thanks to its focus on
China and adjacent markets, which resulted in tripledigit year-over-year growth. Lenovo tied for fourth
with LG.

KEY COMPONENTS
Book-to-bills of various components/equipment.

Semiconductor

MAY JUNE JULY AUG. SEPT.


equipment1

Semiconductors2
PCBs3 (North America)

1.00 1.10 1.07 1.04r 0.94p


8.79% 9.9% 9.95% 9.54%r 8%p
0.98

1.00

1.00

1.01

0.99

Computers/electronic products4 7.53 7.43 7.42 7.49r 7.56p


Sources: 1SEMI, 2SIA (3-month moving average growth), 3IPC, 4Census Bureau,
ppreliminary, rrevised

DECEMBER 2014

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Cold Cuts
The chain continues to take bites out of PCB fabricators.
FOR A NUMBER of years now I have quietly been grous-

PETER BIGELOW
is president and CEO
of IMI (imipcb.com);
pbigelow@imipcb.
com. His column
appears monthly.

16

ing in frustration how, as a fabricator of printed circuit


boards, our segment of the supply chain is at the very
bottom of that chain. Being at the bottom has few
advantages and many disadvantages as everyone seemingly is looking down at you assuming that what you do
and how you do it is simple, easy and cheap. But recently
I had a revelation that this long-held belief is not so.
We fabricators are not at the bottom of the supply chain! No, we have progressed to the unenviable
position of being square in the middle of the supply
chain. Like savory meat stuck between two pieces of
tough bread and smothered in every type of condiment possible, fabricators are now being squeezed and
smothered squeezed in more ways than just between
cost and price, and smothered by less tasteful things
than over-applied garnish.
The sandwich I am referring to has on one side the
OEM end-customer and their EMS companies, which
must deliver product that meets customer expectations, and on the other board designers and material suppliers who, in order to appeal to the OEM,
create individual board and assembly designs and
incorporate the latest components and materials suppliers can conjure up. In the middle, then, are the PCB
fabricators that have to manufacture the chassis that
incorporates the creative designs and unique materials
in a way that enables the other side of the sandwich to
assemble and deliver working product. We are indeed
the meaty part of the sandwich: intended to have lean
ingredients but so over-garnished with condiments that
serious heartburn is inevitable.
The middle of the supply chain is not necessarily a
bad place. If all sides are communicating, sharing and
open to collaborative compromise so the end-product
is better, then the middle can be an exciting place. The
problem is that, more often than not, communication
is decidedly one-way, with each side demanding from
the middle things contradictory to what the other side
is equally adamant about. When neither side is willing to listen or compromise, those demands begin to
smother the success of a project, much like too much
mustard can ruin even the best slice of meat.
So while the fabricator could arguably be considered to be in the catbird seat, square in the middle
of the supply chain, in fact we are not considered to
be in such a lofty position. After all, the catbird seat
is a place of envy, a valued power position. Regrettably fabricators are undervalued by the supply chain,
although fabricators more often than not make the difference between a products success or failure. Put differently, rarely do consumers buy a sandwich because
of the bread and garnish; its whats in the middle that
defines a sandwich.

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

In the supply chain that defining ingredient is technology transfer and that is what fabricators of all
sizes, regardless of location, do all day every day. More
than any other aspect of electronics manufacturing,
fabrication is where the rubber meets the road insofar
as meshing design, materials and desired results. While
some may view other aspects of the design and manufacturing of electronics to be in the all-powerful pivot
position, few, if any other links in the supply chain
truly merge such disparate manufacturing paradigms
in one component.
For example, material manufacturers research in
great detail what end-applications need what properties. They equally consider the specific manufacturing
process where their material is introduced. Rarely, if
ever, however, do those companies look at the holistic
manufacturing process and if they do, it is from the
theoretical, textbook aspect. Fabrication, however, is
anything but theoretical or textbook. Considering the
myriad equipment across the world, most are designed
to produce technology long obsolete by companies,
many of which are out of business, working side-by
side with new state-of-the-art machines, and it is impossible to assume that any two fabricators will approach
manufacturing process quite the same way. And if
fabricators have variations in process, its nothing compared to assembly. Mixing and matching components
with different dwell temperatures running on an array
of materials, the number of through passes to achieve
end-product success can add many more thermo shock
cycles than anyone could theoretically have imagined.
Another example is how OEMs continue to audit
and question how boards are fabricated. They are of
the opinion that boards that appear on the surface
identical should always be processed the same way.
Unfortunately, while that might have been the case
a couple of decades back, between the advanced
application demands requiring a fabricating mix of
disparate laminate materials and the environmentally
driven changes in plating chemistries and surface finish
options, those halcyon, simplistic days are long over.
It is far more common to find very different products
being manufactured next to each other, each while
looking similar, requiring very different processing
methods to ensure a quality outcome. Those different
processing methods are inevitably to harmonize the
variability that the materials, design and overall manufacturability require, and making the necessary adjustments is more often than not done at the fabrication
stage of manufacturing. So there really are no two jobs
exactly the same, and the flat, theoretical approach to
looking at any one segment of electronics manufacturing is not applicable in todays environment.
Continues on page 20
DECEMBER 2014

FOCUS ON BUSINESS

The Right Way to Disappoint a Customer


Managed correctly, screwing up can strengthen the relationship.
RECENTLY, I DECIDED to upgrade our living room furniture. Columbus Day sales were in full swing, and the
time seemed right to buy a couch and loveseat before
the holidays. I picked out a set I liked, and the salesperson confirmed it would be delivered in two to three
weeks. I checked with her a couple weeks later, and she
said the couch was in and the loveseat would be in on
a truck the following Tuesday. Secure in the knowledge
that furniture delivery would happen the following
week, I donated my old couch and loveseat to charity.
The following week I called the furniture store to
confirm the final delivery date. The salesperson told me
the loveseat wasnt on the Tuesday truck from her distribution center, but it would be in Friday and she was
setting up my delivery for Saturday. On Friday, I called
once again to see what the delivery time would be on
Saturday. My salesperson was out, but the store manager told me the couch was scheduled for Saturday delivery but the loveseat had been discontinued and wasnt
available. I switched the order to my second choice and
now have another two to three weeks of waiting. Needless to say, as a customer Im disappointed, since learning this news earlier would have given me more options.
When I tried to convey that disappointment to the store
manager, she spent a fair amount of time explaining that
it was my salespersons fault and that it would be difficult to expedite my order because they scheduled their
deliveries two to three weeks out.
How does this relate to electronics manufacturing services? The reality is that the EMS industry is
a lot like that furniture store. It isnt a matter of if a
customer will be disappointed. Instead, it is a matter
of how you address the disappointment when it happens. Here are few rules:

Rule 1: When you know you have a problem,


determine available remediation options. Systems
technology has become good enough in most EMS companies that it is easy to see a problem developing early.
There is usually clear visibility into component availability issues or production schedule constraints. However, dont call the customer without quickly figuring
out options that would solve or mitigate the problem.
Rule 2: Contact the customer as quickly as possible once options are known. Ideally, figuring out
options shouldnt take more than a few hours. Once
done, let the customer know there is a problem and
give them a choice of possible solutions, since secure
in the knowledge that their order is on its way, they
may be taking actions that make a product shortage
harder to deal with. Early warning with possible
solutions does three things: First, it lets the customer
know you are focused on the account. Second, it tells
DECEMBER 2014

them you are truly sorry that the issue occurred and
are trying to make it right. Third, choosing among
options puts the customer back in control.
Rule 3: Be prepared to make exceptions to make
it right. Telling the customer their order will be late
and that you need them to stand in line behind previously scheduled orders before you can make it right
sends the wrong signal. Find a way to prioritize the
resolution, even if it costs you money.
Rule 4: Apologize and accept blame if your company is failing to follow through on a commitment. The customer doesnt care if the problem was
caused by a supplier or another department. They see
your company as responsible for on-time, defect-free
deliveries. While you shouldnt accept responsibility
for something customer-driven such as a last-minute
design change, schedule pull-in or late delivery of
consigned components, if a commitment made by
your company isnt going to happen, be prepared
to accept the blame. Finger-pointing at others will
only anger the customer, who will be thinking it is
not their problem that you lack the systems visibility
found at your competitors.
Rule 5. Implement the corrective action and follow up with the customer to make sure they are
happy with the resolution. A little extra attention
really helps in these situations. It underscores that you
are sincere in making sure the situation is corrected.
Rule 6. Implement corrective action to prevent
another occurrence of the problem. While this
isnt always possible, it is amazing how many correctable mistakes keep repeating simply because the
people doing damage control dont change the process that enables the mistakes to happen.
It would be wonderful if we lived in a world
where mistakes never happened and customers were
never disappointed. However, that isnt likely. One
bright spot is that studies have shown that companies
that do a good job of correcting customer disappointments often end up with higher levels of customer satisfaction than those who dont. Why is that? Because,
done correctly, the process of turning a disappointed
customer into a satisfied customer demonstrates to
that customer that your company has the ability to
solve problems and prioritize their business. They
understand that when things go wrong you will do
your best to take care of them. That differentiates
your company from competitors that have never had
an issue or dont problem-solve well, and ultimately
it is a much stronger value proposition. CA

SUSAN MUCHA is
president of PowellMucha Consulting
Inc. (powellmuchaconsulting.
com), a consulting
firm providing
strategic planning,
training and market
positioning support
to EMS companies
and author of
Find It. Book
It. Grow It. A
Robust Process
for Account
Acquisition
in Electronics
Manufacturing
Service. She
can be reached at
smucha@powellmuchaconsulting.com.

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

17

ON THE FOREFRONT

Growth in The Internet of Things: Myth or Reality?


Led by wearables, IoT will intensify the designers packaging choices.

E. JAN
VARDAMAN
is president
of TechSearch
International
(techsearchinc.com);
jan@techsearchinc.
com. Her column
appears bimonthly.

THE ELECTRONICS INDUSTRY is always looking


for the next killer application, and much of the
buzz is now about the Internet of Things and
promised growth. Market projections vary widely
in both dollars and units. IDC expects the global
Internet of Things (IoT) to grow by more than $5
trillion over the next six years.1 Strategy Analytics
projects that the number of connected devices will
increase from 12 billion at the end of 2014 to 33
billion devices in 2020. And Gartner calls for a
thirty-fold increase, to 26 billion units, between
2009 and 2020.2
But what does this mean to the electronics
industry, or more specifically, the semiconductor
packaging and assembly segment?
IoT is the interconnection of uniquely identifiable embedded computing devices within the
existing Internet infrastructure. Basically this
means a lot of connected devices, including sensors, sprinkled around from everything from the
milk carton in your refrigerator to the thermostat
in your home or office.
But it is more than just a lot of sensors or RFID
tags. IoT includes information regarding transportation of goods, traffic patterns, environmental
conditions, and many other details not even developed yet. It includes data gathering through wearable electronics activities, medical conditions, and
even peoples sleep habits. Interesting analysis can
be derived from some of these data, as explained
by a presentation at the annual IMAPS International Symposium on Microelectronics in October
in San Diego. As noted by Jawbone, a maker
of fitness tracking devices and other wearables,
wristbands monitoring sleep activity captured the
timing and range of the September earthquake in
Napa, CA.
Privacy concerns abound and may limit data
collection, transmission and storage. A HewlettPackard study from last summer found that over
70% of connected devices have serious vulnerabilities,3 including encryption, password, crosssite scripting, user access, and permission. Some
analysts assert this is a concern for IoT devices
that share information and create alerts. This
includes patient data involving medical conditions
or home thermostats that could indicate when a
homeowner is away.4

IoT: Something new? Does IoT mean totally new


products? Yes and no. Obviously it means more
sensors, wireless chips and processors. Of course it
includes existing mobile devices such as smartphones
and tablets, and emerging wearable electronics
18

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

products such as activity monitoring cameras,


wrist products, and other clothing, and it probably includes devices not yet dreamed up. It would
be a mistake to add the projected IoT units to the
existing projections for appliances, smartphones
and other devices. While some of these wearable
electronics products are new, smartphones and
tablets already exist. Home and office thermostats,
appliances, and other physical products exist, but
might be replaced by new smart ones.
IoT potentially means increased data communication, storage, computation and transmission
back to the user. This will likely increase demand
for servers and data storage products beyond the
typical projections of the past.
Electronics industry impact. How will this grow
the electronics industry? Several keynote presentations during IMAPS provided insights. IPDiA
described the role of advanced integration and
packaging technologies for the miniaturization of
medical devices, especially the role of integrated
passives. Growth means mobile devices will remain
a key contributor to the overall total unit volumes
and packaging, and assembly is an enabler.
What type of package will benefit from an IoT
explosion? Qualcomm explained that the variety
of packages that will continue to be used in mobile
devices is staggering. It includes not just wafer
level packages (WLPs), including fan-out WLPs
and flip-chip devices, but also wirebond packages.
New low-cost packages that make use of leadframes combined with flip-chip are also expected
to see increased demand, thanks to relentless cost
pressures. With so many choices, the challenge is
selecting the correct package for each device to
provide proper performance, form factor and function. The story is no different in examining many
of the new wearable electronics products. Packages include BGAs, fine-pitch BGAs, flex circuit
CSPs, land grid arrays (LGAs), including multichip
modules, chip-on-board, stacked die CSP, packageon-package, leadframe packages such as quad
flat no-lead (QFN), small outline package, and
thin small outline package (TSOP), ceramic packages, wafer-level packages, and integrated passive
devices. Future packaging options include FOWLPs, a variety of routable leadframe packages,
and system-in-packages (SiPs). No single package
dominates this category, but increased cost sensitivity will place greater demands on package and
assembly decisions.
Growth in the demand for servers means
continued evolution of the packaging and assemDECEMBER 2014

ON THE FOREFRONT
bly for high-performance systems.
A presentation by IBM focused on
high-end package developments,
tracing the evolution from ceramic to laminate packages in servers.
Silicon interposers are one potential package for high-performance
devices found in servers and network
systems. The trend to finer-pitch
devices will drive the use of Cu pillar instead of conventional C4 solder
bumps for interposers and organic
packages. Assembly issues such as
warpage, voiding with the use of
underfill, higher performance thermal interface materials, and testability remain concerns. Improvements
in high-accuracy bonders, including
thermo-compression bonding, will be
needed. Companies such as K&S discussed new bonder developments at
the meeting.
Clearly, high-performance memory will be required for future systems. Examples of memory packaging, including the recently introduced
3D IC format for high-performance
applications, were detailed by
Micron. Introductions of 3D IC
memory from SK Hynix and Samsung are equally important in developing systems for the future.

Design, packaging and assembly are


the enablers of these imaginative
products. CA

REFERENCES

Business News, June 24, 2014.


3. Daniel Miessler, HP Study Reveals 70
Percent of Internet of Things Devices Vulnerable to Attack, July 29, 2014.
4. A. Justice, IoT Soup: Four Ingredients
for a Successful Smart Product, ECN,
Oct. 6, 2014.

1. L. Spencer, Internet of Things Market


to Hit $7.1 trillion by 2020: IDC, ZDNet
Insights, June 5, 2014.
2. U. Shankar, IoT & The Age of SCM
2.0 Enhances Supply Chain, Electronics

Myth or reality? Clearly, much hype


surrounds discussion of IoT growth,
and the unit volumes projected need
to be kept in perspective. The IoT is
not an additional category of products, but the culmination of greater
connectivity in mobile products that
will be enabled by improved highend computing and communication
systems. As long as privacy issues
can be addressed, the increased connectivity of many products has the
potential to provide useful analysis
for individuals, businesses and governments. Wearable electronics alone
do not represent sufficient volumes
to dictate the development of specialized packages, but instead rely
on the designer to select from the
wide variety of packaging options.
Assembly and packaging developments underway will clearly benefit
the size and performance of future
products. The reality is there are lots
of things that can make use of the
Internet; some are known products,
and others are yet to be invented.
DECEMBER 2014

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

19

What Role Do Vias Play in DfA?


Proper pad-to-via clearance can improve solder joint strength.
DESIGN FOR ASSEMBLY consists of more than
simply placing components at a safe distance apart.
Todays small pitch components push the limits of
fabrication tolerances.
Vias are a major factor in testability and DfA.
Vias too close to a pin do not permit solder mask
webbing. The absence of the webbing will starve solder from the pin. Paste will travel through the via and
short components on the opposite board.
Vias should be exposed for testability. Adequate
clearance from pins permits test probes to reach the
via and permits a solder mask web. Following is a
guide for which via type to use based on different
needs and methods.

W. SCOTT
FILLEBROWN is
president and CEO of
ACD (acdusa.com);
scott.fillebrown@
acdusa.com.
His column
runs bimonthly.

Via-in-pad. From a design perspective, this comes


into play on very tight designs where we are not able
to fan out as usual. BGAs with a pitch of 0.65mm and
below basically require this, as do some other finepitch devices.Other components such as QFNs have
thermal pads that require via-in-pad.The difference
between a via-in-pad on a thermal pad, as opposed
to a BGA, is that the vias in the thermal pad may not
need to be filled and polished flat, provided they are
a small enough drill size.BGAs or other fine-pitch
devices will need to have their vias filled and polished
flat, making them suitable for soldering.

Cover my vias, or dont. There are two reasons to


cover vias, and both have to do with the tightness of
the design. If there is insufficient pad-to-via clearance, it
will be difficult to achieve solder mask webbing between
the pad and via.This can cause solder to wick down the
barrel of the via, making the connection weaker than it
should be. The other reason is attributed to silkscreen;
tenting the vias will permit more room for any required
silk.Tenting vias lowers the overall testability of the
design because fewer vias can be accessed.

Fill material. There are two approaches to filling vias:


nonconductive epoxy or plating them closed. Nonconductive epoxy is not recommended for designs
that will have multiple thermal cycles because via
plugs can expand at different rates, possibly causing
board material to pop out of the via.
Plating vias shut with copper during plating
has its own set of challenges.Pockets of air can get
trapped in the barrel and not let the copper fill the
entire via barrel. For either option, consult with the
board shop for the best approach for a given design.
Blind/buried vias. Blind vias are holes that extend
to only one surface of the board, while buried vias do
not extend to either side of the board.Both via types
are used in tight areas, such as fine-pitch BGAs.

20

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

When choosing a blind/buried via structure,


keep in mind how many lamination cycles will be
needed.Keeping the lamination cycles to a minimum
is important to keep down costs. Take, for example,
an eight-layer design where both sides of the board
are covered with surface mount components and
a through via will not work.There could be a via
extending from layer 1 to 2, one extending from layer
1 to 3, one extending from layer 3 to 6,one extending
from 6 to 8, and another extending from 7 to 8.This
would permit fan out of both sides to layers 3 and
6, respectively. From there, find a spot for the blind
via (the 3 to 6) to get through the board to the other
side.A stackup like that would require three lamination cycles. Removing the blind vias connecting layers
1 to 2 and 7 to 8, however, would reduce this to two
lamination cycles.
This is a simple example, and most board shops
have their own methods for blind and buried via structures.Work with the shop to find the method that they
prefer, if possible, because this will help keep down
costs on these types of high-technology designs.
Vias are important in the DfA process. Knowing
which types and methods to use can be the difference
between the success of a tight design or not. Close
communication with the board shop is key to determining the best, most efficient approach for specific
designs, and for keeping costs as low as possible on
high-technology designs. PCD&F

ROI, Continued from pg. 16


When the OEM has questions as to how to make a
design more robust, an assembler has questions about
how to get better yield, or a designer is considering what
the most cost-effective combination of laminate and surface finish is, they almost inevitably ask the fabricator.
And being in the middle of that sandwich causes both
sides to squeeze the middle. However, instead of squeezing, each may find that they save money by opening a
dialog and utilizing the value fabricators add more collaboratively and ultimately more wisely.
Until either the designers and materials suppliers
reach out and are speaking more often and in greater
detail with the OEM and EMS companies which in
turn are equally reaching out throughout the supply
chain fabricators will continue to be where the rubber
meets the road in enabling design, materials, end-results
and the ability to provide that highly manufacturable
circuit. Now if we could just figure how to best leverage
that position as a valued and salable asset, then fabricators will have really moved up the chain. PCD&F
DECEMBER 2014

THE FLEXPERTS

Buy Local, Anywhere in the World


Despite differences in dielectrics, flex material performance is globally consistent.
QUESTION: I WOULD like to have the flex circuits for
my current project manufactured in China in order to
reduce costs. I had the qualification circuits manufactured in the US using US-manufactured materials, and
they worked great. The factory in China has asked if
they can use local equivalent materials. Is this common, and is there anything that I should be worried
about if I approve this?
Answer: There are a lot of companies in Asia that
manufacture flexible circuit materials, and Chinese
circuit manufacturers prefer to use these alternatives
whenever possible. There are both technical and
logistical issues that come into play when weighing
the decision to permit Asian-equivalent materials.

Logistical issues. Every flex circuit manufacturer,


whether in the US or Asia, is going to stock a significant amount of raw material ranging from copperclad base laminates used for circuitry to adhesive-clad
dielectric films used for covers and bond plys. They
typically stock raw materials from a very small
number of material suppliers. The main reasons are
procurement and acquisition costs, and also familiarity with processing a specific brand of material. Obviously, if a flex circuit manufacturer buys 10,000m2
per month of material from one supplier, they are
going to get preferential pricing on that material.

FIGURE 1. The material origin will have no bearing on


board reliability.
DECEMBER 2014

They will also usually get preferential delivery any


time a particular material is in short supply.
On the other hand, if the flex circuit manufacturer
only buys from a raw material supplier occasionally
and in small quantities, they will pay a premium for
the material they buy. If that material ever goes into
short supply, they will be way down the list as material becomes available. Many material manufacturers
will also have minimum order quantities that can
really drive up the cost of a small order. If a supplier
has an MOQ (minimum order quantity) of 5m2, and
your project only needs 1m2, the cost of the extra 4m2
will most likely be added to your overall project cost
and the extra material scrapped. The cost of cataloging and storing the extra material on the off-chance
that another customer will specify it is not justified.
Also, flex circuit materials have a shelf life which
would need to be monitored and again would not be
cost-effective for small amounts of overrun material.
Technical issues. As stated, many Asian companies
manufacture raw materials for flexible circuits. The vast
majority of these suppliers use various thicknesses of
polyimide film as the dielectric material with an epoxy
(most common in Asia) or acrylic (most common in the
US) film adhesive. These are the same basic materials
that would have been used on your US-built prototypes.
So when the flex circuit manufacturer asks to use local
or Asian equivalent materials, what you receive
should be identical or nearly identical to what you had
made in the US. The biggest difference would probably
be the film adhesive. If you had prototypes made with
US materials, chances are they were built with acrylic
film adhesive. The Asian equivalent would most likely
be epoxy-based, but should be the same thickness and
will look and perform nearly identical to its acrylic counterpart. When weighing whether to permit replacement
materials, an important thing to check is that the Asian
materials are certified to the pertinent IPC specifications
(IPC-4202, IPC-4203 and IPC-4204). Include a crosssectional view of the circuit construction on the drawing
that shows any critical material thicknesses (for flexibility or impedance performance) so that the Asian-made
flex circuit performs as the US circuit did.
So to answer your question, Asian-equivalent materials should not pose issues provided they are equivalent
in thickness to the materials used in US-made prototypes
and are certified to the appropriate IPC specifications.
To put your mind at ease, virtually all the commercial
electronics that you use every day (mobile phones, tablets, cameras, etc.) are filled with flexible circuits built in
Asia using Asian-manufactured materials. As a supplier,
I can say that the number of flex circuits that fail due to
defective materials borders on nonexistent. PCD&F

MARK FINSTAD
is senior application
engineer at Flexible
Circuit Technologies
(flexiblecircuit.
com); mark.finstad@
flexiblecircuit.
com. He and
co-Flexpert MARK

VERBRUGGE,
sales applications
engineer at Amphenol
Sincere (amphenolafc.net), welcome
your suggestions.

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

21

PCB DESIGN

SYSTEMS DESIGN
METHODOLOGY to Manage
Using

Complex PCB Designs

Automation ensures new configurations are communicated and the


design is synchronized. by RAINER ASFALG and ANDY WATTS

Todays PCB designs span a wide gamut. Designs may


be as simple as a small PCB in a garage door opener or
kitchen appliance, or as complex as dozens or hundreds of
interconnected boards in a blade server, or it may be both
small and complex, such as a smartphone. Those designs
at the complex end of the spectrum push a number of
design envelopes. Size is miniaturized to the extent that
signal integrity and thermal management become issues.
Speed is maximized to the point that tools once reserved
solely for RF use are now required for PCB analysis. And
then there is the problem of managing all the interconnections among this system of PCBs.
With complex designs employing hundreds of interconnections between boards and external connectors and
controls, managing those connections manually, and without error, has become virtually impossible. Factoring in
that the design will change many times during its lifecycle,
resulting in almost certain redistribution of the interconnections, its clear that a better way must exist for managing

systems design and connection management than doing it


manually with a drawing tool and a spreadsheet.
When a large systems design project encounters a
design flaw late in the process, the cost of respinning the
design can be enormous. Not just dollars are wasted, but
time-to-market is extended. Worse, flaws can be overlooked until the product hits the market.
Another costly solution to a design problem is to
correct the design to remedy the problem found in the
field. For example, one manufacturer of smartphones discovered an unusually high number of inspection failures
due to the phone connector being installed upside down.
To solve this problem, the connector was redesigned to
be ambidextrous, letting the user insert the connector
with either orientation. This is a clever solution, but the
end-result was a more expensive ambidextrous connector
shipped on every sold unit.

Systems Design Methodology

FIGURE 1. Systems design is often illustrated with the V Diagram, describing


the design decomposition process, followed by the implementation process
that every product encounters.
22

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

Systems design methodology is often illustrated with the V Diagram (FIGURE 1). The
V Diagram graphically shows how a typical
system is designed, from concept through
first product shipment. The process begins
with the decomposition stage, beginning
with a system-of-systems. For example, the
first definition in the decomposition stage
might be were going to design a communications satellite. Thats an exceptionally
broad definition, but it is how just about
every project begins. Decomposition continues until the individual circuit elements are
defined by the circuit designer. The right side
of the V begins the implementation of the
project, in the reverse order from element to
system-of-systems.
From the perspective of PCB design,
the PCBs become modules within a system.
Thus, the PCB design should begin with a
logical representation of the PCBs. Then, the
DECEMBER 2014

FIGURE 2. As changes to the design occur, rapid and accurate communication must
take place between the systems designers and the PCB designers.

FIGURE 3. Automation tools allow the systems designer to place functions on


individual logical boards and to define the logical interconnection among the boards.
DECEMBER 2014

required interconnections between


the boards can be defined.
Other criteria as well must be
considered when partitioning the
functions into logical PCB representations. For example, it is likely the
thermal dissipation needs to be relatively evenly distributed across the
physical PCBs. For some systems,
weight is a primary constraint, or
weight and weight distribution
across the system are paramount.
High-speed design requirements
may constrain certain parts to
reside on the same PCB to ensure
signal integrity.
In each of these cases, and many
more, rearranging the location of
functions among logical PCBs and
reconfiguring the interconnections
may occur multiple times before
the design is frozen. With current
methods, this could mean substantial manual effort, and substantial
opportunity for errors.
And, lets not forget that changes
to the system design are not limited
to the logical PCB stage. Problems
can, and do, creep up at all stages
PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

23

PCB DESIGN
of the design flow and sometimes require re-partitioning
of the functions among the boards; thus communication
between the systems designers and PCB designers must
take place to implement the changes (FIGURE 2).

Connector Management
Weve already defined many of the potential trouble areas in

a system design, but the magnitude of one of those problems


is sometimes overlooked: connector management. While it
is certainly not trivial to redesign several PCBs because a
thermal problem required moving circuit elements around
to other locations, the sheer number and constraints associated with connections between the boards is astounding.
The inevitable changes will cause anyone to take notice

FIGURE 4. The entire logical system is represented, and automation tracks functions assigned to logical boards, as well as the
interconnections.

FIGURE 5. Changing a connector becomes a matter of dragging the new connector type to replace the existing one. All signals
are mapped and connected correctly, by design.
24

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

DECEMBER 2014

PCB DESIGN
when they have to move those connections without errors.
Moving the signals from one connector to another is a task that will
cause most peoples eyes to cross.
But thats just part of the task. Some
of those signals will be constrained
because of speed concerns. Others
might be constrained by length or by
current carrying capacity. All these
constraints must be cataloged and
applied when a change takes place.
Clearly, the number of connections of high-end systems, coupled
with the extended set of constraints,
has made connector management just
about beyond the capability of any
human being. So, what kind of automation is needed to manage systems
connections so that all are done accurately and all constraints are applied?

to add or change connectors (FIGURE


5), and as logical elements are moved
among the boards, the connectivity
moves right along with them. Once a
change is made, the design automation
ensures that the new configuration is
communicated to other teams and that
the design is synchronized.

Summary

More products are entering complex


systems design, combining multiple
PCBs into a single system, which
may then become part of a systemof-systems.
Current methodology inserts
unnecessary costs, in both time and
money, into new product design.
Errors cost time, money and lost
opportunity. Failure to maintain the
integrity of even a single interconnection could result
in delay, thousands of
dollars to resolve and
The number and constraints associated with perhaps even an expenCONNECTIONS BETWEEN PCBS sive product recall. To
combat these possibiliIS ASTOUNDING. ties, some manufacturers have built-in failsafe precautions, but
Systems Design Automation
these too add cost to every unit.
A systems design platform should
This increasing complexity has
incorporate a drawing tool so that just about placed managing the functhe designer can quickly produce logi- tions and interconnections of the
cal systems diagrams and intercon- system outside of the capabilities
nections. Automation should track of humans. What is needed at the
each interconnection and ensure all multi-board system level is a simiconstraints are maintained. Chang- lar revolution to provide a solution
es should be not only quick and that automates the enormous connecaccurate, but easily communicated to tion management problem, facilitates
other project groups and should syn- easy system and logical design and
chronize the design.
integrates seamlessly with the PCB
Systems design automation prod- design flow. Such products will turn
ucts are being developed that achieve a tedious, often error-rich procedure
these goals and allow quicker, more into a smooth and quick process that
accurate designs that can be read- eliminates human errors. PCD&F
ily (and accurately) modified during
the design process. With the drawing RAINER ASFALG is product line director
tools, the systems designer can define and ANDY WATTS is product marketing
the functionality and interconnection manager at Mentor Graphics (mentor.
among the individual boards in the com); rainer_asfalg@mentor.com.
system (FIGURE 3). The automation
tracks every function, interconnection
and constraint.
As system design evolves, the logical
and physical designs are synchronized,
providing users with an accurate system representation (FIGURE 4). When
changes ultimately arrive, the design
automation allows the systems designer
DECEMBER 2014

September
15th 17th
2015
Santa Clara
Convention Center, CA

See you
next year!

pcbwest.com
PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

25

RETROSPECTIVE

In MEMORIAM
A look back at friends and colleagues who left us in 2014.

Roger Benson, 58, package design engineer with Hittite


Microwave, Digital and Raytheon, and vice president of
IMAPS Foundation of New England.
Dieter Bergman, 82, IPC technical director and former circuit board designer at Philco.
Peter Biocca, applications engineer for Kester, Henkel and
Multicore.
Andrew Kay, 95, designer of an early portable computer,
the Kaypro II.
Carl Korn, 92, Cobra Electronics founder and chairman.
Frank Kurisu, 64, founder of SolderMask Inc.
Elizabeth C. Masten, 99, retired electronics assembler with
Digitech.
Jack McCullen, 75, Intel packaging engineer and industry
standards group chairman.
Mike Silverman, 50, reliability engineer and frequent
industry speaker who founded Ops A La Carte, a reliability
consulting services firm.

PC PIONEER
Kay
26

SHOW MAN
Wayman

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

COMPONENTS
EXPERT Benson

Dave Steinberg, instructor for Hobbs Engineering and


author of Vibration Analysis for Electronic Equipment.
Seth Teller, 50, professor of computer science and engineering at MIT and developer of autonomous car.
David R. Trester, 41,
Benchmark Electronics.
Jack Wayman, 92, founder of Consumer Electronics
Show.
Glenn Wells, veteran
printed circuit board
designer and instructor.
Gene Wolfe, 82, Texas
Instruments
packaging
engineer and former SMTA
board chairman.
Xu Lizhi, 24, Foxconn
worker.
IPC ICON Bergman

BENCHMARKER
Trester

MR. RELIABLE
Silverman

SOLDERING GURU
Biocca
DECEMBER 2014

February 2-5, 2015


Kauai, Hawaii

Microelectronics Symposium
Featured Keynote Speakers
Required Packaging
Technologies for Cognitive
Computing Devices

Trends of 3D IC/3D Packaging for


Mobile & Wearable Electronics

Advanced Integration
Technologies for Cyber Physical
Systems

Yasumitsu Orii
IBM Corporation

Shen Li Fu, Ph.D.


I-Shou University

Klaus-Dieter Lang, Ph.D.


Fraunhofer IZM

Big Data in Health Care and


Biomedical Research

John Quackenbush, Ph.D.


Harvard School of Public Health

Patient Connected Health:


The Digital Domain

Matthew Hudes
Deloitte & Touche

In-situ Control Systems


in Manufacturing

Horatio Quinones, Ph.D.


FDCS LLC

smta.org/panpac

COVER STORY

Root Cause FAILURE

ANALYSIS OF
DENDRITE SHORTING: A Comparison
of Analytical Techniques

FTIR, SEM/EDS and ion chromatography used in concert with a pair of


extraction methods offered varying degrees of precision. by TERRY MUNSON

A group of 25 conformal-coated, no-clean assemblies was


placed in an environmental test chamber at 40C/90%RH
for 168 hr. under functional conditions. Each assembly was
tested with its plastic/metal enclosure on the unit; large openings in the enclosures permitted the assemblies to be exposed
to the environmental conditions. Twenty-two units produced
dendrites in multiple locations; all grew shorts on the SMT
pad without components (FIGURE 1). The units were biased
with 3.3V for 168 hr. at 40oC/90%RH.
FTIR, SEM/EDS and IC (ion chromatography)1 methods
using total board (bag) and C3 localized area extractions
were performed to understand the dendrite failures per the
clients request. The localized extractions were performed at
the specific area of the failure and a reference area.
FTIR (Fourier transform infrared spectroscopy) analysis
was performed using a Thermo Nicolet iS10 spectrometer
and Continuum Microscope. A match was shown to the
reference area of the nearby conformal coating. Data interpretations of FTIR analysis (FIGURE 2) show that the dendrite
area matches only the conformal coating reference residues.
SEM/EDS analysis was conducted in an Amray SEM/
EDS system using variable pressure mode. This does

not require gold or carbon coating of the specimen and


requires additional analysis to be performed after SEM/
EDS on the same unit (#414).
EDS analysis (FIGURE 3) of unit #414 shows detectable elements as carbon, oxygen, silicon, (no chloride was

FIGURE 2. FTIR analysis of unit #414.

FIGURE 1. Dendrite on unit #414.


28

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

FIGURE 3. EDS analysis of the dendrite on unit #414.


DECEMBER 2014

COVER STORY
detected with the markers on) and tin. SEM (FIGURE 4) and
optical imaging (FIGURE 5) show dendrites grew on top of the
conformal coating and not underneath. The SMT pads show
no coating on the pad surface, permitting the metal to react
with fluid on the surface of the PCBA.
Ion chromatography analysis was performed using the
C3 test and extraction system specific for site extractions.

A reference area on top of the conformal coating was


extracted, followed by the area under the coating where
failures occurred.
After the C3 localized2 extractions were completed, the
conformal coated board (total board) was bag extracted
with 10% IPA/90% DI water for one hr. at 80C. FIGURE 6
shows the C3 test cell on reference (coated) area of PCBA.

FIGURE 4. SEM/EDS image of dendrites.

FIGURE 5. Dendrite area on top of the conformal coating.

DECEMBER 2014

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

29

COVER STORY
FIGURE 7 shows the C3 test cell on dendrite location with

coating and SMT pads exposed. Based on the results of the


dendrite and reference areas, a third extraction location on
the plastic housing (FIGURE 8) was chosen directly above
the dendrite.

The reference area C3 results were Clean, indicating


that the residue did not short the electrode in the C3 test
cell during the 180 sec. run time (FIGURE 9). The test of the
dendrite area read Dirty, indicating the copper electrode
with a 10V bias shorted in 30 sec. at 250A of current
(FIGURE 10).

FIGURE 9. C3 results of reference area.


FIGURE 6. C3 localized extraction of reference area.

FIGURE 7. C3 localized extraction of dendrite area.

FIGURE 8. Extraction location inside housing.


30

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

FIGURE 10. C3 results of dendrite area.

FIGURE 11. C3 results of housing area.


DECEMBER 2014

COVER STORY
The residues on the inside of the housing tested Dirty
in less than 1 sec., shorting the copper traces in the solution
(FIGURE 11).
FIGURE 12 shows the C3 reference area on top of the
coating, with exposed metal on the resistors surfaces. FIGURE
13 shows the dendrite area, where the top of the reflowed
pad lacks complete coating coverage.

The plastic housing (Figure 8) above the dendrite area


was tested to see if residues were transferring to the board
surface. The anion residues identified by IC analysis in the
reference area (FIGURE 14) showed low levels of acetate,
chloride, sulfate and WOA. Residues detected from the isolated dendrite area (FIGURE 15) showed high levels of acetate,
formate, chloride and sulfate that were not present in the reference area. Residues detected from inside the plastic surface
(FIGURE 16) showed the highest levels of acetate, formate,

FIGURE 12. Reference area on top of coating.

FIGURE 13. Dendrite area on reflowed pads.

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Main: 310-540-7310
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PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

31

COVER STORY
chloride and sulfate. This residue signature is typical of a mold release for
plastic parts.
A Thermo ICS 3000 IC using an
anion column AS22 with a modified
eluent isocratic bicarbonate/bicarb
structure for optimal separation of
ionic and organic residues and a
CS12A column with a sulfuric acid
eluent structure provided more accurate results from the C3 extractions.
TABLE 1 shows that the total board,
100mls, bag extractions (using 90%
DI water/10% IPA) of the PCBs with
dendrites had relatively low levels of
ionic and organic residues, compared
to the localized C3 extractions.
FIGURE 14. Reference area chromatogram.

Conclusions
FTIR testing showed no difference
organically on the surface of the
dendrites from the coated reference
area. No root cause for the failure
could be determined by this analytical method for dendrite growth.
2. SEM and optical imaging showed
the dendrite growth was on top of
the coating and that the coating
did not completely cover the solder
mound, leaving the exposed metal
to react within the environmental
conditions. Optical imaging with
UV light showed the exposed metallization of the solder domes was
not covered by conformal coating.
No root cause for the failure could
be determined by this analytical
method for dendrite growth, but it
does show there is an open path for
condensate to bridge pads.
3. EDS analysis showed the dendrites
are comprised of tin, carbon and
oxygen. There was not enough concentration to detect chlorine or sulfur elements. No root cause for
the failure could be determined by
this analytical method for dendrite
growth.
4. Ion chromatography using total
board extractions in a bag at 80C
for one hr. (board surface only)
showed acceptable levels of acetate,
chloride, sulfate, WOA, sodium and
ammonium. This larger volume of
10% IPA/90% DI water (60mL per
48 in2) dilutes the sample to acceptable levels of ionic contamination.
No root cause for the failure could
be determined by this analytical
method for dendrite growth.
1.

FIGURE 15. Dendrite area chromatogram.

FIGURE 16. Plastic housing chromatogram.


32

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

DECEMBER 2014

The CIRCUITS ASSEMBLY


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circuitsassembly.com/dems

COVER STORY
TABLE 1. Ion Chromatography Results of Both C3 and Bag Extraction Samples
ALL VALUES IN UG/IN2
Sample Description

ION CHROMATOGRAPHY (DIONEX ICS 3000 AT FORESITE) N/A = NOT APPLICABLE

C3 TESTER

F-

C2H3O2

HCO2-

Cl-

NO2-

Br-

NO3-

PO43-

SO42-

WOA

MSA

Li+

Na+

NH4+

K+

Mg2+

Ca2+

RESULTS

TIME (SEC)

2.5

2.5

2.5

2.5

2.5

2.5

2.5

n/a

0.5

2.5

n/a

n/a

Clean

>120

25

n/a

n/a

Clean

>120

2.65

0.87

2.22

2.35

0.12

1.05

3.98

2.15

0.21

Clean

180

78.78

2.9

55.03

3.49

1.22

5.03

4.19

27.95

2.84

Dirty

30

144.82

16.22

117.27

1.98

8.98

72.13

9.22

Dirty

2.04

3.25

3.65

1.21

1.24

15.24

1.37

1.21

Not C3 tested

1.26

2.14

3.09

1.36

1.36

22.61

1.31

1.06

Not C3 tested

1.95

2.05

3.54

1.05

1.29

20.36

1.06

1.36

Not C3 tested

1.95

2.69

4.07

1.29

1.05

24.08

1.54

1.14

Not C3 tested

Foresite recommended
limits for
bare boards
Foresite recommended
limits for
PCBA (cleaned)
ID

Unit #414

Area A - Reference
area (on top of CC)

Area B - Dendrite
area (on top of CC)

Area C - Inside
plastic housing

Total board bag


extraction of #414

Total board bag


extraction of #415

Total board bag


extraction of #422

Total board bag


extraction of #417

5. Ion

chromatography using C3 localized extractions


comparing the dendrite area to the reference area
led us to analyze the molded plastic housing above
the dendrite area. C3 results of the dendrite showed
Dirty C3 results in 30 sec. and good Clean results

of the reference area with the same exposed solder pad


domes. C3 analysis of the plastic housing, above the
shorting location, showed C3 results as Dirty with
a failure time of 0.2 sec., causing a short to bridge the
C3 electrode with 10V. IC results for the dendrite and
inside housing locations showed high acetate, chloride,
sulfate, sodium and ammonium residues not present
on the reference area. This is a typical residue signature for many of the mold release and mold protection
systems found on plastic housings and enclosures that
can be transferred during heat and humidity testing
of electronics systems. Using localized extraction, it
was determined the board processing was clean, and
contamination from the housing was responsible for
dendrite shorting of the powered devices.
6. Root cause for the failure was the housing cleanliness
prior to assembly. Residues were transferred during
elevated humidity testing, leaving micro drops of corrosive fluid on the surface of the coated, assembled
PCB surface. This permitted the dendrite to form on the
surface of the coating. CA

REFERENCES

THE NEW
INDUSTRY HOTSPOTS

1. IPC-TM-650, Test Methods Manual, test method 2.3.28B, Ionic Analysis of Circuit Boards, Ion Chromatography, November 2012.
2. Stephen Shoda and Terry Munson, Cleanliness Evaluation for Electronic Hardware Reliability, IPC Apex Proceedings, February 2007.
Ed.: This article was first presented at SMTA International in October
2014 and is published here with permission of the author.

TERRY MUNSON is founder and president of Foresite


(foresiteinc.com); terrym@residues.com.

PCDANDF.COM CIRCUITSASSEMBLY.COM

34

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

DECEMBER 2014

SCREEN PRINTING

Keeping Tooling Top of Mind


Given coplanarity deviations, theres a way to manage squeegee pressure.

CLIVE ASHMORE
is global applied
process engineering
manager at ASM
Assembly Systems,
Printing Solutions
Division, DEK
(asmpt.com); clive.
ashmore@asmpt.
com. His column
appears bimonthly.

36

Its an oft forgotten element of the printing process,


reads the strain gage measurements for the duration
but one that is the absolute foundation of a good
of the print stroke. Because the squeegee blade is set
print. Because the tooling block is more or less out
to traverse at a set pressure, if the strain gage sees a
of sight, it is easy for it to also be out of mind. Back
massive rise in deflection because the board is now
in the days of 2mm-thick printed circuit boards and
sitting higher in the tooling nest than it should be and
low densities, you could get away with a little forthe squeegee is trying to push through the stencil, that
getfulness. Todays highly miniaturized assemblies,
increase in pressure is logged. Understanding that all
however, dictate a bit more keen attention to subboards and tooling are not absolutely flat, this funcstrate support. Even slight deviations from improper
tion can be set as an output to an SPC tool, and the
manufacture or rogue components in the pockets of
engineer has the option of putting in upper and lower
the tooling block can wreak havoc on yield.
deflection control limits that would account for any
In an ideal world, everything the board and
slight variations in coplanarity. When the printer regtooling would be manufactured to be completely flat
isters a deviation in deflection, it will complete that
and coplanar. In reality, this is almost never the case.
print stroke and then issue a warning. Its then up
And, when coplanarity is
off significantly, there may
be issues with proper material volumes being printed.
More common than that,
however, is the flatness of
the board is affected by a
component or components that have dropped
off the bottom side of the
board into the tooling
block. Once the top side of
the board has been printed, placed and reflowed, it
goes back through the line
for second side assembly.
If there has been an error,
and a component hasnt
been mechanically soldered, it can drop off into a FIGURE 1. Miniaturized products mean miniaturized components, which require
pocket, and the next board robust substrate support.
that comes along now has
interference in the pocket.
This can elevate the board,
increasing the deflection and affecting print quality.
to the operator to clear the warning and reprint, or
The opposite can happen if there is a decrease in
ignore the warning. A note of caution: Ignoring the
deflection for some reason (a pin that doesnt fire
warning is not advised! Eventually, multiple warnon automatic board support or a poorly placed/misings will wear down even the most immune operator.
placed magnetic pin, for example).
Worse, disregarding the warnings can result in serious
Software-controlled safeguards help ensure engidefects and yield losses.
neers and operators are ever-mindful of any issues
If the tooling is wrong, the result is wrong. When
with tooling. Leveraging the functionality of the
the pressure is too high, material may get scooped
printers pressure feedback mechanism, the amount
out of larger apertures during the print stroke. Result:
of force and deflection of the squeegee is evaluated
insufficient material volume and possible stencil damand reads if the pressure applied is within tolerance.
age from coining. If the pressure is too low, its possiThis capability ensures that if an engineer programs
ble to experience excessive bridging. Using a tool like
in 5kg of force, then 5kg of force of displacement is
a deviation monitor eliminates tooling nightmares,
applied onto the squeegee blade. Tying into the presimproves yield, lowers cost and makes sure tooling
sure feedback system, which is controlled by a strain
stays in the front of ones mind, as the warnings wont
gage, the pint platform deviation monitor software
let you forget. CA

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

DECEMBER 2014

TECH TIPS

Minimizing BTC Voids


And why waiting until the last process step is a bad idea.
BTCS, OR BOTTOM termination components, are a
class of package referred to by a variety of acronyms
and abbreviations. Different component and packaging companies may use different nomenclature
(FIGURE 1), but almost all these components share
one common, ugly characteristic: large pads that are
prone to solder voiding. By design, these large thermal or ground pads require a defined percentage of
contact with the solder and PCB to properly conduct
heat and/or electricity. Excess solder voids can impact
performance and reliability of the package.
The voiding problem has given both designers
and manufacturers heartburn for the better part of
two decades. Some of the drivers for this frustration
are that voiding rates are highly variable, and numerous factors can impact their formation. While there
is still no clear consensus on how much voiding is
acceptable, one trend is clear: the smaller and fewer
the voids, the better. Voids cannot be completely
eliminated, but there are a number of ways to minimize their formation, ranging from PCB design and
solder paste formulation to stencil design and reflow
profile adjustments.

Solder paste selection. Solder paste formulations


balance a large number of characteristics, including
reliability, wetting, pin-testability, printability, shelf
life, cleanability and reflow properties. Balancing all
these considerations will have an impact on paste
voiding characteristics. Selecting a solder paste formulated to mitigate voids in the reflow process will
result in smaller and fewer voids not only under BTCs
but in BGAs and other components as well.
Solder paste consists of two components: flux
medium and solder powder. The role of medium on
solder void formation can be manipulated using various techniques, including solvent selection and activator systems. We set out to determine if size and distribution of the spheres in the solder powder would
have any impact on BTC void formation. If we could
correlate powder distribution to void reduction, we
would be able to offer another tool to the assembler
toward void reduction. Unfortunately, the initial test
results do not indicate a strong correlation between
voiding and particle size distribution; however, the
research continues to explore the relationship in
greater depth. Well keep you posted on our findings.

PCB design. Large lake voids can be averted by


dividing the large pad with solder mask (FIGURE 2).
Using solder mask to create window panes (as
shown on the left) maintains outgassing paths for
volatiles to escape, and often prevents smaller voids
from merging together into larger ones (as shown on
the right). If contact area is critical to the function of
the device, the solder mask-covered areas obviously
do not have the opportunity to make contact with
the solder, and the design calculations should reflect
the limitation of the masked areas to conduct heat
or electricity, in addition to anticipating a certain
amount of voids in the solderable areas.
Additionally, if the pads contain thermal vias,
voiding can be mitigated by not applying solder
mask or solder paste over the vias. Leaving the vias
unobstructed provides outgassing paths through the
PCB (FIGURE 3).

Stencil design. We recently completed a series of


designed experiments on void generation using the
AIM standard test vehicle, which contains a variety
of BTC footprints. (Users wishing to use this board in
their own tests can get it from Practical Components.)
We were able to try 18 different stencil aperture
designs and coverage ratios (FIGURE 4). We found
that voiding is not as dependent on paste coverage
area percentage as it is on the design of the apertures.
Our data indicate designs that created outgassing
paths for flux volatiles outperformed designs that
did not.
BTC stencil design should consider component
float in addition to voiding. Printing excess solder
paste on the center pad can create a large solder mass
that is taller than the adjacent solder masses on the

KARL SEELIG is
vice president of
technology at AIM
Solder; kseelig@
aimsolder.com.

TIM ONEILL
is regional
manager at AIM;
toneill@
aimsolder.com.

FIGURE 1. Multiple names of BTCs.


DECEMBER 2014

FIGURE 2. BTC center pad divided by solder mask to


limit void size.
PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

37

TECH TIPS
versus the center pad. Ideally, the solder joints on both should
have standoffs of 2 to 3 mils.

FIGURE 3. Ground pad window pane solder mask design


and effect on void size.

component lands. During reflow, the BTC component floats


or tilts/skews on the surface of the large liquid central solder
mass, creating open or unreliable solder joints on one or
more sides of the device. As a general rule, if any of the terminations stencil apertures have area ratios less than 0.75,
the stencil designer should perform some basic calculations
on the solder volumes and relative heights of the I/O joints

FIGURE 4. Center pad aperture design experiment.


38

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

Reflow profile. Our experiment tested five different


reflow profiles, which varied peak temperatures from
240 to 255C, time above liquidus (TAL) from 50 to 90
sec., and time to peak temperature from 3:30 to 5:30, in
both straight ramp and soak configurations. We found
that the best (lowest) voiding performance was obtained
with lower peak temperatures and shorter TAL. High peak
temps and long TAL created the most voids. Soak zones
did not exhibit a profound effect on voiding behavior. FIGURE 5 compares center pad voiding results of the best- and
worst-performing profiles.
BTC voiding will never be completely eliminated, but it
can certainly be mitigated at numerous points in the product
development cycle. PCB designers can apply void-limiting
layout strategies like window paning the thermal and
ground pads with solder mask, strategically placing thermal
vias and leaving them unobstructed, and consulting with their
assembler. Either the designer or assembler could specify lowvoiding solder paste. Prior to production, the stencil designer
can maintain outgassing pathways created by the solder mask
divisions, or create pathways if solder mask divisions dont
exist, and keep solder paste away from vias. Finally, on the
production floor, the process engineer or technician can often
tweak the reflow profile to reduce void formation.
Unfortunately, that last line of defense the production
floor is used as the first line. At that juncture, a great deal
of opportunity to limit voiding has already been missed. The
only tools the assembler has are:
Solder paste selection, if not specified by OEM.
Aperture redesign.
Reflow profiling.
These variables, even in combination, have limited and
changeable impact on void reduction. If BTC voiding raises
concerns about electrical or thermal performance, the most
effective measures can easily be taken early in the PCB
design process to address it throughout the development
and introduction of the product. Each individual strategy
contributes to improved contact, and the more deployed,
the better the results.CA

FIGURE 5. Reflow profile effect on voiding.


DECEMBER 2014

TEST AND INSPECTION

Im a Board Test Engineer and Im Loving It!


Life on the road can be relentless, but its never boring.
I WAS RECENTLY mulling on the pending end to

2014 when a coworker asked what I thought of


my life as an engineer. My life as a board test engineer? Im swamped, but wow, what a swim!
Every day is an adventure and, despite 27 years
of work experience, Im still learning new things,
from managing projects and customer requests to
implementation of the latest test technologies. Inside
the life of a board test engineer is a wide variety of
responsibilities and expertise needed to maintain
relevance in a very competitive market where technology evolves as fast as the new product shipping out.
The array of products tested in electronics
manufacturing is more than enough to keep board
test engineers motivated. Just imagine the millions
of printed circuit board assemblies (PCBA) for
smartphones, tablets, computers, network servers,
LED televisions, industrial tools, home appliances,
automotive electronics and even medical equipment the list goes on.
The best thing about my job is that I get to
work on amazing leading-edge manufacturing
board test solutions, such as the latest in in-circuit
test (ICT), boundary scan test and even innovations like Intel Silicon View Technology. Let me
briefly describe these technologies.
ICT is essential, used to test electronics components in a PCBA, to detect manufacturing-related
defects such as short, open or wrong/defective
components. In essence, its an electrical process
test to ensure all signals go as they should.
Boundary scan or 1149.1 is an IEEE standard
that enables testing of a PCBA by utilizing the

FIGURE 1. Boundary scan or IEEE 1149.1.


DECEMBER 2014

boundary scan cells that are embedded in a pin


of an integrated circuit (FIGURE 1). The boundary
scan test solution is not limited to testing opens
and shorts between the interconnection of ICs with
a boundary scan cell. It can also test interconnections between ICs without boundary scan, and
be used to program memories or even execute a
built-in self-test.
Intel SVT, a proprietary Intel test technology,
enables testing of motherboard PCBAs that use Haswell CPUs. In such board architectures, test access is
constrained by PCBA real estate or high-speed signal,
limiting access needed if ICT were used. With new
technologies such as the x1149 boundary scan analyzer, the only test access required is the debug port2,
and using Intel DFx* Abstraction Layer (Intel DAL)
to securely access the Haswell CPU silicon to verify
its function and that of surrounding devices.
My job enables me to travel to places where
most people go for their holiday destinations. For
me though, sightseeing is done en route to the customer site. Traveling means spending a good part
of my time on the customers manufacturing floor,
debugging a test, testing a new system feature or
software release. Most evenings, work continues
inside my hotel room doing teleconferences for test
developments, reports or simply replying to emails.
Being a self-proclaimed gourmand (yes I love
to cook, and am pretty awesome at dishing up
gourmet numbers), I consider cross-continental
cuisine as a perk as I get to taste food from all
over the world. However, most meals are done in
a rush. I have also become adept at driving different car models, switching easily between left- and
right-hand drive within the span of two airports.
The most exciting part of this job is attending
international test conferences to learn what competitors offer and, of course, to socialize with fellow test engineers; its back to the fraternity feel on
such occasions where we can swap tales and jokes
in test lingo without the other party throwing a
blank face back at me! With all this flying around,
I clock enough mileage to make up for missed family time with free airline tickets for a real holiday
once in a while.
Call it mobile computing, or mobile commuting. I can basically work anywhere from the
comfort of my home or out in the park. Modern
technologies allow us to physically work anywhere
in the world, with my laptop, smartphone and
software connecting me with my company servers
and global colleagues.
Like most of my colleagues, I like gizmos, and
I think the smartphone is probably one of the

JUNBALANGUE
is a technical
marketing engineer
atKeysight
Technologies
(keysight.com); jun_
balangue@keysight.
com. The former
Agilent Technologies
Electronic
Measurement Group
is now Keysight.

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

39

TEST AND INSPECTION

FIGURE 2. LinkedIn and Facebook are two of the ways I stay


connected with colleagues.

most productive toys invented in recent times. It enables


most people to get connected via various social media. I
manage to enjoy my smartphone, using it to update our
ICT product page on Facebook, and use WhatsApp and
LinkedIn to stay connected with fellow engineers around
the world (FIGURE 2).
Most of the time, I work alone and can be oblivious
to my surroundings. But I have many friends whom I can
count on when in need of technical help. My smartphone
and laptop enable me to call and chat with colleagues and
global customers or visit technical forums to search for
solutions, literally at my fingertips.
The life of a board test engineer is nothing like what
many perceive it to be:a boring deskbound job. It offers
both great challenges and opportunities. At the end of the
day I find great satisfaction knowing that when I login
to another day at work, I have made a contribution to
change the world of technology, and my small role in the
grander scheme of things has actually made life easier
for someone, from fellow manufacturing engineers, right
to the end-users, like you and me, connecting via this
increasingly seamless world of electronics. CA

THE
DEFECTS
DATABASE
THE
DEFECTS
DATABASE

In a Slump
Before printing, study material characteristics for resistance to slumping.

DR. CHRIS
HUNT is with the
National Physical
Laboratory Industry
and Innovation
division (npl.co.uk);
chris.hunt@npl.
co.uk. His column
appears monthly.

40

SOLDER PASTE SLUMP can and


A good solder paste will be
will lead to solder shorts during
slump-resistant, even when it passreflow. FIGURE 1 shows a 0.020"es from preheat into reflow, but
pitch QFP with wet paste shorts
that is tied to supplier formulapresent after placement. The paste
tions and, in some cases, how
may have been present between
products are maintained at the
the pads prior to placement and
manufacturer. Material problems
directly after printing. In this
or batch problems have been seen;
case the printer or SPI should
incorrect shipping controls or poor
have picked up the faults prior to
storage are also potential issues.
FIGURE 1. Wet paste shorts, likely
placement. It is good practice to caused by excess solder between pads. Its worth looking at IPC stanreview the paste products used to
dards for solder paste tests (J-STDunderstand the degree of slump
005) and for solder paste printing
expected prior to reflow and the highest temperature
inspection criteria (IPC-7527).
just before reflow. This will provide insight as to the
These are typical defects shown in the National
likelihood of short circuits.
Physical Laboratorys interactive assembly and solIn the case of wet shorts, as in the example, its
dering defects database. The database (http://defectsnot guaranteed this will form a post-reflow short. In
database.npl.co.uk), available to all this publications
a nitrogen soldering environment, for instance, shorts
readers, allows engineers to search and view countless
wont form due to better wetting. It may form on OSP
defects and solutions, or to submit defects online. To
boards in air but not on solder-leveled circuits due to
complement the defect of the month, NPL features
wetting forces. Normally a good quality solder paste
the Defect Video of the Month, presented online
will not slump during normal processing; if it does,
by Bob Willis. This describes over 20 different failinvestigate the performance separate from the process
ure modes, many with video examples of the defect
to rule out a material issue.
occurring in real time. CA

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

DECEMBER 2014

www.datest.com
510.490.4600

"Cadence believes that it is in the industry's best interest that an open,


public, neutrally maintained standard be adopted by all segments of
the PCB design, fabrication, assembly and test supply-chain. Cadence
commits to develop and maintain
IPC-2581 export from its Allegro
PCB design software and stay current
with latest approved and published
IPC-2581 specification."

Hemant Shah
Cadence

ipc2581.com

GETTING LEAN

How Lean is The Internet of Things?


Using multiple approaches to gather SMT data is inherently wasteful.
WHAT DO PEOPLE really think when they hear the

information varies extensively, coming from different


sources with different levels of understanding and
experiences. The Internet is simply the conduit to
make the information available. It is left to the intelligence of the reader to sort out what is useful and
what is not. This view, however, represents the Internet of People, rather than the Internet of Things.
Deriving information from machines and automated processes should not be affected by subjective elements such as opinions and philosophy,
but rather should simply contain specific, appropriately detailed, accurate and timely information. We otherwise end up with an Intelligencedeprived Internet of Things (IdIoT). The value
of this definitive information from things could
be quite significant. If we trust the information,
then we can permit it to manage and govern our
operation, to an extent, without
human intervention. This provides the opportunity for automation beyond the simple mechanical layer that has been the focus
of attention in the past.
The term Lean is correctly
interpreted as being the removal
of all waste. The challenge with
Lean is to know how to apply this
simple mantra. Projects that focus
on an entity, performing value
stream mapping, will find and
expose as many of the improvement opportunities as possible.
These projects are often, however,
not worth as much as anticipated
where certain key elements external to the project may have been
overlooked. Lean projects can
become too specialized, unable to
adapt to changing situations, and
may not fit the context in which
the process is used in the factory.
Lean components work best
in Lean machines. The most
important element of Lean that
sets the context for Lean analysis,
but is often overlooked or at least
is underestimated, is the aspect of
the pull signal. This is the communication mechanism between
processes that can be used to
determine minimum commitment;
that is, dont do anything until
you need to. It is otherwise, by
FIGURE 1. Live information can automatically pull products and related
definition, a waste.
resources through production in the most lean and efficient way.

term Internet of Things? The Internet carries with


it varying perspectives and experiences, meaning different things for different people. The term Lean has
been around a lot longer, but also carries the same
issue there is no single consensus of understanding
of what it is. This is not unexpected; there are many
points of view from people with different roles.
What is important, however, is that we perceive the
real value and worth of these innovations, joining
them to create a better operation. SMT production
represents a real challenge in this respect, but, done
properly, there is a real opportunity to get to raise
ones competitiveness and profitability.
The Internet started as a series of simple websites,
offering information from one source to everyone
else. As we have experienced, the quality of this

NOVEMBER 2014

MICHAEL FORD
is marketing
development
manager, Mentor
Graphics (mentor.
com); michael_ford@
mentor.com.

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

41

GETTING LEAN
The link then between the Internet of Things and
Lean is the ability for the information taken from processes to be used in an automated way to create the pull
signal for Lean. In the SMT environment, were we able to
get information from all of the machines and processes
in the way that the Internet of Things suggests, then
there are some very significant benefits that could be realized. These include Lean materials, planning, engineering,
maintenance, new product introduction, and many more,
each of which we will explore in detail in forthcoming columns. The benefits that we will discover are not only targeted at the internal operations in the SMT and assembly
factory, but also at permitting the factory to reduce costs
and delays associated with the distribution chain, between
goods coming off the production lines and arriving at the
customer. This enables the factory to support the changing needs of the business as a whole, in a significant way.
To imagine how to apply the IoT to the surface mount
environment is quite a challenge. The need for data collection from SMT has been around since the machines first
came along. It started with manual data collection, simply
in terms of counting product completions, from which
throughput and productivity were calculated in a crude
way. Manually collected data are hardly detailed, accurate
or timely and have been a needless distraction to production operators. As more data from SMT were required in
an increasingly timely fashion, several attempts have been
made to establish industry standards.

42

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

Unlike the semiconductor industry, SMT machine


vendors paid little attention to this need from their
customers. Cross-industry and cross-vendor approaches
such as IBMs Map and Top, GEM-SECS, and more recently
CAM-X, among others, have appeared but have all failed to
find adoption as a standard. Most likely because of industry competitiveness, machine vendors have instead recently
started to use the SMT machine communication ability as
leverage to support the sales of the latest platforms of their
machines, effectively trying to tie in customers to a single
machine vendor. In most cases, however, factories need the
flexibility of having machines from a minimum of two vendors (which also ensures Lean pricing).
Going forward, the solution for the IoT relies on
third parties working closely with SMT machine vendors
to extract the necessary live transactional information.
This is a two-layer approach involving first the conduit
to the machine that is, the interface itself and then
the interpretation and normalization of the format and
meaning of data that are collected, in a way that needs to
be increasingly intelligent and real-time. To do this in a
complete, accurate and reliable way is no mean feat, and it
is adequately maintained by very few third-party vendors
in the market. The potential benefits, however, of the IoT
together with Lean are really picking up momentum, and
will not be ignored, so it is something that needs to be
lived with, for now.
Next time, we look into Lean factory flow. CA

DECEMBER 2014

MACHINES

MATERIALS

TOOLS

SYSTEMS

SOFTWARE

MULTI-BOARD CONNECTIVITY
Xpedition Systems Designer software captures hardware description
of multi-board systems, from logical
system definition down to individual
PCBs, automating multi-level system
design synchronization processes for
team collaboration with accuracy and
faster design productivity. Captures
cables and other elements (backplane,
cable assemblies, sensors and actuators). Unique design "cockpit" enables
system-wide partitioning of logical
system blocks into individual PCBs.
Fully supports concurrent design.

AUTOMOTIVE HARNESS ANALYZER


SOLID STATE UV LASER
AVIA NX series of q-switched, diodepumped, solid-state lasers offer output powers up to 40W at 355nm.
Feature patented pumping technology of the Nd:YVO4 gain medium.
Novel optical mounting technology
for stability and reliability. For PCB
via hole drilling, and drilling and cutting of flex materials.

E.HarnessAnalyzer is for viewing and


analyzing automotive harness drawings in the standard HCV container
data format, which combines KBL
(physical data model) and SVG (vector
graphics) data. Supports efficient collaboration through powerful analysis,
redlining, and version compare functionality. Provides greater ease-of-use
when sharing comprehensive harness
design models and documents.

Mentor Graphics

Coherent

Zuken

mentor.com/pcb/xpedition/systems-design/

coherent.com

zuken.com/transportation

OTHERS OF NOTE
VIRTUAL 3D EAGLE VIEWER

STARTUP DESIGN TOOLS

CAD WITH IRREGULAR SHAPE PARTS

brd-to-3D takes layout file (more formats


to be released) and generates a free
comprehensive 3D package consisting
of photo-realistic images of the board
and SMT stencil; STEP file of virtually
assembled PCB; PDF formatted 3D view
that rotates freely, allowing all angles
of viewing. Laser-sintered 3D model of
assembled PCB free with PCB order.

Designer Schematic and Designer Layout EDA/CAD tools are for design starts,
providing a foundation for long-term
product design. Link affordable design
software to an inventory of more than
four million electronic components.
Come with free access to PartQuest, a
website that merges part numbers into
symbols and footprints. Product licenses
are sold as an annual subscription.

EPD v8.2 includes netlist capture


upgrades, such as accurately capturing
irregular shape component bondpads,
clips and heatslugs in leadframes. Supports AutoCAD version 2015 and BricsCAD v. 14.2. Improved 3D Bondwire
clearance checking technology works on
3D EPD-created JEDEC wires.

Beta Layout

Digi-Key digikey.com

CAD Design Software

pcb-pool.com/ppus/index.html

Mentor Graphics mentor.com

cad-design.com

HIGH-FREQUENCY PCB CHEMISTRY

FLEXIBLE HEATER INKS

FREE LAYOUT TOOL

M-Speed provides low-profile innerlayer


copper; delivers strong adhesion to all
high-speed dielectrics. Offers cleaning,
etching, and copper surface modification for optimal innerlayer bonding. Provides low-profile surface topography.
Copper-to-resin adhesion and thermal
resistance reportedly exceed alternative
chemical processes.

Loctite ECI 8000 series printable inks


are positive temperature coefficient
materials for flexible heating applications. Replace traditional copper wire
and printed carbon. Exceptionally thin
form factors, for use within tight spaces
and in infinite patterns. Self-regulating
to keep temperature below set point.

PCBWeb Designer free schematic capture and


layout EDA/CAD tool comes as a full-license
application with no limitations on number of
parts, size or layer count. Is linked to inventory
of more than four million searchable electronic components, including 300,000 readyto-place parts. Includes built-in board and
component ordering. Enables multi-sheet
and multi-gate schematic capture, multilayer
PCB layout with copper pour and custom
parts editor. Integrated BoM manager.

MacDermid Electronics Solutions

Henkel Electronics

Digi-Key, Aspen Labs

macdermid.com

henkel.com

pcbweb.com

DECEMBER 2014

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

43

MACHINES

MATERIALS

TOOLS

SYSTEMS

SOFTWARE

FREE DFM, DRC CHECKS


DFMplus software verifies PCB designs
before ordering. Aids in project schematics simulation prior to physical layout. Previews possible failure points,
for debugging and testing. Enables
easier, more efficient design file data
transfer to manufacturing. Accepts partial designs, or regions of the design,
as a section-by-section check. Supplies
comprehensive DRC results.

HDI VIA FILL

NON-CYANIDE IMAU

EnFILL Copper Via Fill systems are for


HDI any-layer buildups. Reportedly
offer a high current capacity proven to
reduce cycle time by up to 40%, while
providing via fill capacity with minimal
dimple. Are engineered for vertical conveyorized plating.

Techni IM Gold AT8000 is said to


improve solderability while reducing
gold usage. Slows and controls deposition of gold on electroless nickel,
reportedly eliminating corrosion products and creating a pore-free ENIG
deposit with better solder spread.

Sunstone Circuits

Enthone

Technic

sunstone.com

enthone.com/enfill

technic.com

OTHERS OF NOTE

44

THERMO-FLUID SIMULATION TOOL

LASER MARKABLE LABELS

PET, PEN FILMS

Flowmaster now comes with functional mock-up interface for use in opensource environment. Includes export
capability. Provides enhanced secondary air solver and natural circulation
capability. Secondary air feature provides solver algorithms that improve
stability and accuracy of modeling flow
through rotating parts.

Primera LP130 are for high-temperature


and harsh environments. Available in
UL-approved XF-537 for PCB applications, and GMW14573/GM6121M tested
XF-670 for low surface energy applications. Can be ablated and cut by a wide
variety of low power CO2, YAG, fiber
and UV lasers to produce high contrast
linear and 2-D barcodes and alphanumeric characters.

White Teijin Tetoron UF PET films and


Teonex QF PEN films are halogenfree and flame-retardant. Have chemical resistance, strength and insulation
properties. VTM-0 flame rating. Come
in thicknesses from 25 to 250m. PEN
films withstand processing at temperatures over 180C.

Mentor Graphics

Polyonics

DuPont Teijin Films

mentor.com/products/mechanical/products/flowmaster

polyonics.com

dupontteijinfilms.com

CIRCUIT SIMULATION TOOL

3D PCB EDITOR, CAD

ELECTROLESS CU PROCESS

CST Studio Suite now comes with Filter


Designer 2D, permitting synthesis, electromagnetic simulation, optimization
and multiphysics analysis of filters in
one single environment. Database has
variety of filter types, including lumped
element and distributed element implementations. Automatically suggests
design based on filter specifications,
including frequency response and any
physical limitations.

CircuitStudio PCB design tool is based


on straightforward schematic capture
and project management tools. Is reportedly easy to use, but powerful enough
for professionals. Has a PCB design
engine that supports 3D PCB editing.

Circuposit 6000 is for high-reliability HDI


circuit boards. Offers enhanced microvia
reliability and improved performance.

Computer Simulation Technology (CST)

Altium / element14

Dow Electronic Materials

cst.com

circuitstudio.com

dowelectronicmaterials.com

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

DECEMBER 2014

MACHINES

MATERIALS

TOOLS

SYSTEMS

SOFTWARE

TAPE-AND-REEL COUNTER
XQuik combines x-ray imaging with
AccuCount Technology image processing and inventory management
to provide accurate counts of components stored in tape-and-reel. Is said
to automatically complete the count
of components as small as 01005 with
better than 99% accuracy in seconds.
Works without having to remove reels
from moisture barrier or antistatic
bags. Footprint is 26 x 24". Optional barcode reading, automatic label
printing and MES system interface.

LARGE-PANEL AXI

AUTOMATED FLUID DISPENSER


Pro Series integrates vision and laser
height sensing with closed-loop encoding. Smart vision CCD camera captures
detailed component part images. Fully
integrated laser height sensing detects
height variations and makes dispensing height corrections.

X8068 has an extended inspection


scope for larger assemblies. Is flexible, and equipped for random sample
analysis of nonstandard components
or automated inspection of panels up
to 722mm. Has open x-ray tube. IPS
monitor depicts x-ray results independent of viewing angle. Detector swivel
range is up to 60. XMC software
available for specialized inspection or
nonstandard components. Optional
sealed direct beam tube.

VJ Electronix

Nordson EFD

Viscom

vjt.com/vje/vje/

nordson.com/en-us/divisions/efd

viscom.com

OTHERS OF NOTE
3D SENSORS

X-RAY ANALYSIS TOOL

CT SOFTWARE

3D sensing capabilities incorporate


multi-reflection suppression technology and 3D algorithms. Enable highquality 3D images at production speeds,
using multi-view sensors. Multi-view
3D data are merged with algorithms
and MRS that suppress reflection that
can distort data. Sensor design captures and transmits data simultaneously and in parallel.

Inspect-X 4.1 acquisition and analysis


software for x-ray and CT systems
provides improved real-time imaging, analysis and reporting for BGAs,
stacked components and multilayer
boards. Automatically adjusts image
controls, contrast and brightness to
provide clear, sharp images to aid in
defect recognition. Inspects multiple
boards in one routine.

Phoenix Datos|x 2.3 comes with new


highlights like a specific production mode
for fully automated CT data acquisition,
reconstruction and evaluation and supports high-precision 3D measurements
following VDI 2630 guidelines. Onebutton-CT production mode automates
entire CT process chain from scan to final
evaluation report, speeding 3D metrology
and failure analysis. Control functions
such as detector calibration or tube conditioning run totally independent from
operator influence in the background.

CyberOptics

Nikon Metrology

GE Measurement & Control

cyberoptics.com

nikonmetrology.com

ge-mcs.com/en/radiography-x-ray/ct-computedtomography.html

LOW-NOISE VSA

HARSH ENVIRONMENT CONFORMAL COATINGS

LED SOLDER PASTE

26.5 GHz microwave vector signal analyzer delivers low noise floor, high linearity, and low phase noise. Has up to
765MHz of instantaneous bandwidth.
Can analyze radar pulses, LTE-advanced
transmissions and 802.11ac waveforms.
Can program FPGA with LabVIEW system design software.

CC7090E and CC7130-E Prima Protect


are non-silicone and electrically insulating. Good adhesion; abrasion-resistant.
Withstand low temperature cracking.
Fungicide protects in submerged environments. Meet IPC-CC-830 requirements with UV inspection dye and fungi-resistance. Can be brushed, dipped
or sprayed on.

Lumet P53 with SBX02 alloy is for


LED package assembly on PET flexible circuits; provides low-temperature
LED package on PET reflow capability,
enabling the use of PET flex substrates.
Enables the use of SAC or Maxrel solder-based die attach in package.

National Instruments

AI Technology

Alpha

ni.com/microwave/

aitechnology.com

alpha.alent.com/Markets/LED

DECEMBER 2014

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

45

MACHINES

MATERIALS

TOOLS

SYSTEMS

SOFTWARE

ADHESIVE REMOVER
TidyPen 60-second sticky stuff remover
has an improved formulation for cleaning glues, tapes, labels, most fluxes,
some inks and many conformal coatings. Is said to be safe on plastics
and gaskets, as well as other materials found on PCBs. VOC, GHS and
REACH compliant. Comes in two sizes:
vending-machine sized and a larger box
containing five tools.

NO-WIRES PROFILER
3D SPI
TR7007Q features high-speed "Stopand-Go" imaging for accuracy and
ease-of-use. Includes SPC analytics
software.

DeltaProbe is for periodic profile capture without test boards. Measurement


sensors capture process records without a test card or wires. Holds product
and process recipe information. Fits to
an adjustable frame; changes to width
of PCB being measured.

Microcare

Test Research Inc. (TRI)

SolderStar

microcare.com

tri.com.tw

solderstar.com

OTHERS
OTHERSOFOFNOTE
NOTE

46

FAST-INDEXING PLACEMENT

POLYURETHANE ENCAPSULANT

THICK PCB FLUX

MR Series include 4th generation linear motors, electronic eX feeders, and


machine and NPI software. Feeder
capacity is 120 slots; part capacity is
25mm. Smart eX feeders reportedly
index six times faster than previous
design. Series includes two single gantry, single conveyor, and two dual gantry dual conveyor models. Up to six
module-type heads per gantry. ZHMD
sensor electronically measures Z height
of stick and tray parts.

20-2121 polyurethane plant-based potting, casting and encapsulating compound for applications with low toxicity requirements. Is said to offer little
shrinkage or exotherm, alleviation of
mechanical and thermal stresses on
sensitive electrical components. Tensile
strength 2,000 psi; tear strength 119 PLI.

EF-8800HF wave solder flux is designed


for thick, high-density PCBs. Is halogen-free, mid solids, alcohol-based,
and no-clean. Is said to demonstrate
superior hole fill, pin testing and solder
ball performance. Spreads evenly. Tackfree residue.

Mirae

Epoxies Etc.

Alpha

mirae.com

epoxies.com/try-adhesives.aspx

alpha.alent.com

ESD PROTECTIVE TAPE

CONNECTOR JTAG

DEFECT SIMULATION

ESD tape is made of three layers: two


dissipating copolymer substrates on the
outside and a conductive layer between
them. Reportedly provides strong adhesion and meets or exceeds requirements
of ANSI ESD-S20.20. Is non-charge generating; safe for all ESD applications. Is
good for multiple uses and is available
in sleeves of six.

Cion-LX module/FXT96 boundary scan


module is for test of analog, digital and
mixed signals. Extends BS test to connectors, clusters or analog interfaces.
Ninety-six single-ended, 12 high current
and 24 differential channels available.
Supports IEEE1149.1, IEEE1149.6 and
IEEE1149.8.1.

FailSim simulates defects to provide


real-world test coverage on a live board.
Identifies program, debug or fixture
issues that could be reducing fault
coverage. Verifies existing ICT detects
failures on a UUT by simulating component defects (wrong value) by using
HW simulation, by placing additional
resistors/capacitors in parallel/series to
DUT while checking that the actual test
statement detects the failure condition.

CCI

Goepel Electronic

Digitaltest

corstat.com

goepel.com

digitaltest.net

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

DECEMBER 2014

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efabpcb is a UL-approved ISO9001:2000 certified facility

AD INDEX
To learn about the advertisers in this issue, go to
pcdandf.com or circuitsassembly.com and select
Current Issue to access the digital edition. This
will provide you with direct links to the websites of
each advertiser in this index.
Company

Page No.

ACD, www.acdusa.com. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Advanced Assembly, www.aapcb.com. . . . . . . . . . . . . . . . . . 23
Amitron, www.efabpcb.com. . . . . . . . . . . . . . . . . . . . . . . . . . 47
Cadence, www.cadence.com/productcreation . . . . . . . . . . . . . 3
CapTron Corporation, www.captroncorp.com. . . . . . . . . . . . . 47
Design2Part Shows, www.d2p.com . . . . . . . . . . . . . . . . . . . . 35
Directory of EMS Companies, www.circuitsassembly.com/dems. 33
ECD, www.ecd.com . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
EMA, www.ema-eda.com/OLB-Trial . . . . . . . . . . . . . . . . . . . . . 9
EMA, www.ema-eda.com/New-OrCAD. . . . . . . . . . . . . . . . . . . C4
Imagineering, Inc., www.PCBnet.com . . . . . . . . . . . . . . . . . . . 1
IPC Apex Expo, www.ipcapexexpo.org. . . . . . . . . . . . . . . . . . . 15
Online Electronics, www.pcb4less.com . . . . . . . . . . . . . . . . . 47
Overnite Protos, www.pcborder.com. . . . . . . . . . . . . . . . . . . . 47
DECEMBER 2014

7429 Lindbergh Dr
www.captroncorp.com Gaithersburg, MD 20879

PCB West 2015, www.pcbwest.com. . . . . . . . . . . . . . . . . . . . 25


Powell-Mucha Consulting, www.powell-muchaconsulting.com. . 42
Prototron Circuits, www.prototron.com. . . . . . . . . . . . . . . . . . 19
Rogers, www.rogerscorp.com; www.rogerscorp.com/coolspan. 11
Rush PCB, www.rushpcb.com . . . . . . . . . . . . . . . . . . . . . . . . . 5
Seika Machinery, www.seikausa.com. . . . . . . . . . . . . . . . . . . 31
Sierra Circuits, instantturnkeypcb.com. . . . . . . . . . . . . . . . . C2
Sigmatron, www.sigmatronintl.com. . . . . . . . . . . . . . . . . . . . . 7
SMTA Pan Pacific, www.smta.org/panpac. . . . . . . . . . . . . . . 27
Uni Precision, www.unihk.com. . . . . . . . . . . . . . . . . . . . . . . . . 4
UP Media Group, www.circuitsassembly.com; www.pcdandf.com. 34
Uyemura, www.uyemura.com. . . . . . . . . . . . . . . . . . . . . . . . . C3
The advertising index is published as an additional service. The
publisher does not assume any liability for errors or omissions.

Advertising Sales
UP Media Group, Inc. PO Box 470, Canton, GA 30169

Sales Director:
Frances Stewart, 678-817-1286, fstewart@upmediagroup.com

Sales Assistant:
Robin Foran, 404-304-2563, rforan@upmediagroup.com

Get
your

dose

of PCB industry news and views.

Subscribe to PCB UPdate


www.pcbupdate.com
The e-mail newsletter filled with
news and resources for PCB design,
fab and assembly professionals

September

15th 17th, 2015

Santa Clara

Convention Center, CA

See you next year!


pcbwest.com
PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

47

TECHNICAL ABSTRACTS

In Case You Missed It


Wearable Electronics
Three-Dimensionally Deformable, Highly Stretchable, Permeable, Durable and Washable Fabric
Circuit Boards
Authors: Qiao Li and Xiao Ming Tao; xiao-ming.
tao@polyu.edu.hk.
Abstract: Fabric circuit boards (FCB), a new
type of circuit board, are three-dimensionally
deformable, highly stretchable, durable and washable, ideally for wearable electronic applications.
Fabricated by using computerized knitting technologies at ambient dry conditions, the resultant
knitted FCBs exhibit outstanding electrical stability with less than 1% relative resistance change
up to 300% strain in unidirectional tensile test or
150% membrane strain in three-dimensional ball
punch test, extraordinary fatigue life of more than
onemillion loading cycles at 20% maximum strain,
and satisfactory washing capability up to 30 times.
To the best of the researchers knowledge, the performance of new FCBs has far exceeded those of
previously reported metal-coated elastomeric films
or other organic materials in terms of changes in
electrical resistance, stretchability, fatigue life and
washing capability, as well as permeability. Theoretical analysis and numerical simulation illustrate
that the structural conversion of knitted fabrics is
attributed to the effective mitigation of strain in
the conductive metal fibers, hence the outstanding
mechanical and electrical properties. Those distinctive features make the FCBs particularly suitable
for next-to-skin electronic devices. (Proceedings of
the Royal Society A, September 2014)

DNA-Based Electronics

This column provides


abstracts from recent
industry conferences
and company white
papers. Our goal is
to provide an added
opportunity for readers to keep abreast of
technology and business trends.
48

Long-Range Charge Transport in Single G-Quadruplex DNA Molecules


Authors: Gideon I. Livshits, et al.; livshits.gideon@mail.huji.ac.il.
Abstract: DNA and DNA-based polymers are
of interest in molecular electronics because of their
versatile and programmable structures. However,
transport measurements have produced a range of
seemingly contradictory results due to differences in
the measured molecules and experimental setups, and
transporting significant current through individual
DNA-based molecules remains a considerable challenge. Here, the authors report reproducible charge
transport in guanine-quadruplex (G4) DNA molecules adsorbed on a mica substrate. Currents ranging
from tens of picoamperes to more than 100pA were
measured in the G4-DNA over distances ranging
from tens of nanometers to more than 100nm. The
experimental results, combined with theoretical modeling, suggest that transport occurs via a thermally
activated long-range hopping between multi-tetrad

PRINTED CIRCUIT DESIGN & FAB / CIRCUITS ASSEMBLY

segments of DNA. These results could reignite interest in DNA-based wires and devices, and in the use
of such systems in the development of programmable
circuits. (Nature Nanotechnology, Oct. 27, 2014)

Solder Reliability
Effects of Electromigration on the Creep and Thermal Fatigue Behavior of Sn58Bi Solder Joints
Authors: Yong Zuo,Limin Ma, et al; malimin@
bjut.edu.cn.
Abstract: Electromigration, creep and thermal
fatigue are the most important aspects of solder joint
reliability, the failure mechanisms of which used to be
investigated separately. However, current, mechanical
loading and temperature fluctuation usually coexist under real service conditions, especially as the
magnitude of current density is increasing with joint
miniaturization. The importance of EM can no longer
be simply ignored when analyzing the creep and TF
behavior of a solder joint. The published literature
reports that current density substantially changes
creep rate, but the intrinsic mechanism is still unclear.
Hence, the purpose of this study was to investigate
the effects of EM on the creep and TF behavior of
Sn58Bi solder joints by analyzing the evolution of
electrical resistance and microstructure. The results
indicated that EM shortens the lifetime of creep or
TF of Sn58Bi solder joints. During creep, EM delays
or suppresses the cracking and deforming process, so
fracture occurs at the cathode interface. During TF,
EM suppresses the cracking process and changes the
interfacial structure. (Journal of Electronic Materials,
December 2014)
Optimization of Flip Chip Lead-free Solder Joints
Reliability Using Numerical Methods
Authors: Emeka Hyginus Amalu, Nduka Nnamdi
Ekere and Musa Tanko Zarmai.
Abstract: To increase mean-time-to-failure of
the solder joints in FC assembly, an in-depth understanding of the mechanism of degradation and the
setting of parameters of the joints are crucial. This
investigation employs CAE coupled with finite element analysis, using Ansys software, to model and
predict optimal parameter setting of control factors
for reliable FC lead-free solder joint assembly. Degradation of the lead-free solder material was simulated using Garofalo-Arrhenius creep model. Results
demonstrate that the factors considered have significant main effects and interactions that influence
assembly integrity. Proposed is a parameter setting
that gives optimal design for a reliable FC assembly.
(Materials Science & Technology 2014 Proceedings,
October 2014)

DECEMBER 2014

In North America

Uyemura is again

#1

for ENIG, ENEPIG,

Via Fill Coppers,


and Electroless Golds

We are honored, and deeply grateful to our customers,

vendor partners and employees for making us North Americas leader in PCB finishes.
Thank you for an extraordinary year, and for the opportunity to be of service.
As we have since 1985, Uyemura-USA is committed to providing its customers with significant
advantages in performance, cost, and maintenance, and to supporting each program
with the industrys finest technical support.

UYEMURA USA
Corporate Headquarters: Ontario, CA ph: (909) 466-5635 (800) 969-4842 fax: (909) 466-5177

Tech Center: Southington, CT ph: (860) 793-4011 (800) 243-3564 fax: (860) 793-4020

THE BRAND NEW

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OrCAD has a history of delivering cutting edge products. Whether it is leading the desktop
PCB revolution with OrCAD Capture or defining the standard for SPICE simulation and
virtual prototyping with PSpice, OrCAD consistently stands at the forefront of desktop
PCB design. We are proud to announce a new set of OrCAD technologies designed
to improve productivity, reduce errors, enable collaboration, and help you
deliver innovative products on time and on budget.

See demos of the new products at www.ema-eda.com/New-OrCAD

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